Back contact solar cell, preparation method and cell module
By forming a mask layer above the first doped semiconductor layer in the back contact solar cell, the diffusion of doped elements is blocked, and the problem of boron atoms being pushed into the N region affecting the passivation effect, improving the passivation effect and the performance of the solar cell.
Patent Information
- Application Number
- CN202510236467.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-28
- Publication Date
- 2025-05-27
AI Technical Summary
In back contact solar cells, boron atoms are easily pushed into the N zone, affecting the passivation effect.
By forming a first mask layer above the first doped semiconductor layer, the doped elements of the second doped semiconductor layer are blocked from diffusing into the first doped semiconductor layer, thereby preventing the doped elements from being pushed into the N region.
The passivation effect is improved, the passivation deterioration caused by the diffusion of doped elements is reduced, and the performance of solar cells is enhanced.
Smart Images
Figure CN120051062A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the technical field of crystalline silicon solar cells, and particularly relates to a back-contact solar cell, a preparation method, and a battery module. Background Art
[0002] With the continuous exploration and maturity of PERC (Passivated emitter and rear contact) cell technology, P-type cells have gradually approached their theoretical conversion efficiency. Therefore, the development of N-type cell technology has become the key way to improve the efficiency and reduce the cost of future crystalline silicon cells. Currently, the mainstream N-type cell technologies mainly include TOPCon (Tunnel oxide passivated contact), HJT (Heterojunction), and IBC (Interdigitated back contact), etc.
[0003] When forming the p-region on the back surface of a back-contact (BC) cell, boron atoms are easily pushed into the N-region, affecting the passivation effect. Summary of the Invention
[0004] This application aims to solve at least one of the technical problems existing in the prior art. For this purpose, this application provides a back-contact solar cell, a preparation method, and a battery module, which can prevent the doping elements of the second doping layer from being pushed into the N-region and improve the passivation effect.
[0005] In a first aspect, this application provides a back-contact solar cell, including:
[0006] A semiconductor substrate having opposite light-receiving and backlight surfaces, and the backlight surface includes a first polarity region and a second polarity region;
[0007] A first passivation layer and a first doped semiconductor layer, which are stacked along the direction away from the semiconductor substrate on the first polarity region;
[0008] A first mask layer located on a partial surface of the first doped semiconductor layer;
[0009] A second passivation layer and a second doped semiconductor layer, which are stacked along the direction away from the semiconductor substrate on the second polarity region, and the doping types of the first doped semiconductor layer and the second doped semiconductor layer are opposite; the second passivation layer and the second doped semiconductor layer extend toward the first polarity region to cover the surface of the first mask layer located in the first polarity region;
[0010] A first electrode and a second electrode, the first electrode being electrically connected to the first doped semiconductor layer, and the second electrode being electrically connected to the second doped semiconductor layer.
[0011] For the back-contact solar cell according to the present application, a first mask layer is provided on a partial surface of the first passivation layer, so as to avoid the doping elements in the P region from being pushed into the N region when the second doped semiconductor layer is formed by diffusion.
[0012] According to an embodiment of the present application, the material of the first mask layer includes one or more of amorphous silicon and polycrystalline silicon.
[0013] According to an embodiment of the present application, the semiconductor substrate further has a third doped semiconductor layer, the third doped semiconductor layer is located in the first polarity region, on a side of the first passivation layer away from the first doped semiconductor layer, and the doping type of the third doped semiconductor layer is the same as that of the first doped semiconductor.
[0014] According to an embodiment of the present application, it further includes a first conductive layer located in the first polarity region and a second conductive layer located in the second polarity region, the first conductive layer and the second conductive layer are electrically isolated from each other, the first conductive layer is in contact with the first passivation layer exposed by the first mask layer, and the second conductive layer is in contact with the second passivation layer.
[0015] According to an embodiment of the present application, an opening is provided between the first conductive layer and the second conductive layer to space the first conductive layer and the second conductive layer apart, and the opening exposes at least one of the second passivation layer, the second doped semiconductor layer, or the mask layer.
[0016] In a second aspect, the present application provides a method for manufacturing a back-contact solar cell, including:
[0017] Providing a semiconductor substrate, the semiconductor substrate having an opposite light-receiving surface and a backlight surface, the backlight surface including a first polarity region and a second polarity region;
[0018] Forming a stacked first passivation layer and a first doped semiconductor layer in the first polarity region along a direction away from the semiconductor substrate;
[0019] Forming a first mask layer on at least a partial surface of the first doped semiconductor layer away from the semiconductor substrate;
[0020] Forming a second passivation layer on a surface of the first mask layer away from the semiconductor substrate and on a surface of the second polarity region;
[0021] Forming a second doped semiconductor layer on a surface of the second passivation layer by a diffusion process.
[0022] According to an embodiment of the present application, forming a stacked first passivation layer and a first doped semiconductor layer in the first polarity region in a direction away from the semiconductor substrate, and forming a first mask layer on at least a part of the surface of the first doped semiconductor layer away from the semiconductor substrate includes: forming a stacked first passivation layer and a first doped semiconductor layer on the backlight surface of the semiconductor substrate; forming a first mask layer on the side of the first doped semiconductor layer away from the semiconductor substrate; removing the first mask layer in the second polarity region by using a laser etching process; etching and removing the first passivation layer and the first doped semiconductor layer in the second polarity region by using a laser etching process or a polishing and texturing process.
[0023] According to an embodiment of the present application, it further includes forming a passivation and antireflection layer and a second mask layer on the light-receiving surface. The second mask layer is formed simultaneously with the first mask layer, and the second mask layer is removed when the first mask layer in the second polarity region is removed by using a laser etching process.
[0024] According to an embodiment of the present application, the first mask layer and the second mask layer include one or more of amorphous silicon and polycrystalline silicon.
[0025] According to an embodiment of the present application, it further includes forming a third doped semiconductor layer on the side of the first passivation layer close to the semiconductor substrate. The doping type of the third doped semiconductor layer is the same as that of the first doped semiconductor.
[0026] According to an embodiment of the present application, it further includes forming a conductive layer on the surface of the second passivation layer away from the semiconductor substrate;
[0027] Preparing an opening that at least truncates the conductive layer to form a first conductive layer in the first polarity region and a second conductive layer in the second polarity region.
[0028] In a third aspect, the present application provides a battery assembly, including the aforementioned back-contact solar cell, or including a back-contact solar cell prepared according to the aforementioned preparation method.
[0029] Without adding new machine tools and introducing new impurities, the present application deposits a first mask layer on the back surface. When forming the second passivation layer and the second doped semiconductor layer, the first mask layer above the first doped semiconductor layer can block the diffusion of the doping elements of the second doped semiconductor layer into the first doped semiconductor layer, alleviating the deterioration of passivation. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] The above and / or additional aspects and advantages of the present application will become apparent and be easily understood from the description of the embodiments in conjunction with the following drawings, where
[0031] Figure 1One of the flowcharts of the preparation method of a solar cell according to an embodiment;
[0032] Figure 2 is Figure 1 Schematic diagram of the solar cell after step S300 of the embodiment;
[0033] Figure 3 is Figure 1 Schematic diagram of the solar cell after step S500 of the embodiment;
[0034] Figure 4 One of the flowcharts of the preparation method of a solar cell according to an embodiment;
[0035] Figure 5 is Figure 4 Schematic diagram of the solar cell after step S210 of the embodiment;
[0036] Figure 6 is Figure 4 Schematic diagram of the solar cell after step S310 of the embodiment;
[0037] Figure 7 One of the flowcharts of the preparation method of a solar cell according to an embodiment;
[0038] Figure 8 is Figure 7 Schematic diagram of the solar cell after step S600 of the embodiment;
[0039] Figure 9 is Figure 7 Schematic diagram of the solar cell after step S700 of the embodiment;
[0040] Figure 10 is Figure 7 Schematic diagram of the solar cell after step S800 of the embodiment.
[0041] Reference numerals: 1, semiconductor substrate; 1a, first polarity region; 1b, second polarity region; 2, third doped semiconductor layer; 3, first passivation layer; 4, first doped semiconductor layer; 5, alumina layer; 6, antireflection layer; 7, first mask layer; 8, second mask layer; 9, second passivation layer; 10, second doped semiconductor layer; 11, transparent conductive layer; 12, first electrode; 13, second electrode. Detailed implementation manners
[0042] Embodiments of the present application will be described in detail below. Examples of the embodiments are shown in the drawings. In the drawings, for clarity, the dimensions of layers, regions, elements, and their relative dimensions may be exaggerated. Wherever the same or similar reference numerals are used throughout, they denote the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present application and should not be construed as a limitation of the present application.
[0043] It should be understood that when an element or layer is referred to as "on", "adjacent to", "connected to", or "coupled to" another element or layer, it can be directly on, adjacent to, connected to, or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as "directly on", "directly adjacent to", "directly connected to", or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, without departing from the teachings of the present disclosure, the first element, component, region, layer, or part discussed below may be referred to as the second element, component, region, layer, or part. And when discussing the second element, component, region, layer, or part, it does not mean that the present disclosure necessarily has a first element, component, region, layer, or part.
[0044] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0045] An embodiment of the present application provides a method for manufacturing a back contact battery (Back Contact). The BC battery is fully named the back contact battery (Back Contact), and its basic type is the interdigitated back contact (IBC) battery. Taking the IBC battery as an example, a first mask layer 7 is formed on at least a part of the surface of the first doped semiconductor layer 4 away from the semiconductor substrate 1, which can block the doping atoms in the P region from being pushed into the N region when forming the second doped semiconductor layer 10, reducing the influence on the passivation effect.
[0046] Figure 1 Flow chart of the preparation method of a back-contact solar cell according to an embodiment Figure 2 is Figure 1 Schematic diagram of the back-contact solar cell after step S300 of the embodiment Figure 3 is Figure 1 Schematic diagram of the back-contact solar cell after step S500 of the embodiment, with reference to Figures 1 to 3 The preparation method of the back-contact solar cell includes steps S100 to S500
[0047] S100, provide a semiconductor substrate 1
[0048] Among them, the semiconductor substrate 1 has an opposite light-receiving surface and a backlight surface, and the backlight surface includes a first polarity region 1a and a second polarity region 1b. The semiconductor substrate 1 can be a silicon substrate
[0049] S200, form a stacked first passivation layer 3 and a first doped semiconductor layer 4 in the first polarity region 1a along the direction away from the semiconductor substrate 1
[0050] The first passivation layer 3 includes a tunneling oxide with a thickness of 0.5 nm - 2 nm; the first doped semiconductor layer 4 includes doped polysilicon with a thickness of 10 - 400 nm. The dopant in the first doped semiconductor layer 4 can be any one of N-type dopants and P-type dopants. N-type dopants include but are not limited to phosphorus, arsenic, etc., and P-type dopants include but are not limited to boron, etc
[0051] The preparation methods of the first passivation layer 3 and the first doped semiconductor layer 4 include LPCVD (low-pressure chemical vapor deposition) or PECVD (plasma-enhanced chemical vapor deposition)
[0052] S300, form a first mask layer 7 on at least part of the surface of the first doped semiconductor layer 4 away from the semiconductor substrate 1
[0053] Optionally, the first mask layer 7 includes one or more of amorphous silicon and polysilicon. The preparation method includes LPCVD (low-pressure chemical vapor deposition) or PECVD (plasma-enhanced chemical vapor deposition), and the thickness is 10 nm - 300 nm
[0054] Using one or more of amorphous silicon and polysilicon as the first mask layer 7, on the one hand, it will not increase new machine tools and avoid increasing the preparation cost. On the other hand, the first mask layer 7 does not introduce new impurities and does not need to be removed in the subsequent preparation process
[0055] S400, form a second passivation layer 9 on the surface of the first mask layer 7 away from the semiconductor substrate 1 and the surface of the second polarity region 1b
[0056] Among them, the second passivation layer 9 includes intrinsic amorphous silicon and has a thickness of 4 nm to 25 nm.
[0057] S500. A second doped semiconductor layer 10 is formed on the surface of the second passivation layer 9 through a diffusion process.
[0058] The second doped semiconductor layer 10 includes doped amorphous silicon and / or doped microcrystalline silicon, has a thickness of 5 nm to 50 nm, and has a doping type opposite to that of the first doped semiconductor layer 4. When the dopant in the first doped semiconductor layer 4 is an N-type dopant, the dopant in the second doped semiconductor layer 10 is a P-type dopant.
[0059] In an embodiment of the present application, a first mask layer 7 is formed on at least a part of the surface of the first doped semiconductor layer 4 away from the substrate. The first mask layer 7 can protect the first passivation layer 3. When preparing the second doped semiconductor 10, the first mask layer 7 can prevent the doping elements of the second doped semiconductor layer 10 from being pushed into the first passivation layer, reducing the influence on the passivation effect of the first passivation layer 3.
[0060] Figure 4 It is the second flowchart of the preparation method of a back-contact solar cell in an embodiment. Figure 5 For Figure 4 a schematic diagram of the back-contact solar cell after step S230 of the embodiment. Figure 6 For Figure 4 a schematic diagram of the back-contact solar cell after step S320 of the embodiment. With reference to Figure 2 、 Figures 4 to 6 , in one of the embodiments, the preparation method of the back-contact solar cell includes steps S100 to S500. Among them, steps S100, S400, and S500 can refer to the foregoing embodiments and will not be elaborated here. The foregoing step S300 includes S310, S320, and S330.
[0061] S100. Provide a semiconductor substrate 1.
[0062] Among them, the semiconductor substrate 1 has an opposite light-receiving surface and backlight surface, and the backlight surface includes a first polarity region 1a and a second polarity region 1b.
[0063] S210. Form a stacked first passivation layer 3 and first doped semiconductor layer 4 on the backlight surface of the semiconductor substrate 1.
[0064] S310. Form a first mask layer 7 on the side of the first doped semiconductor layer 4 away from the semiconductor substrate 1.
[0065] S320. Use a laser etching process to remove the first mask layer 7 in the second polarity region 1b.
[0066] Among them, the laser etching process includes a film opening process using a nanosecond / picosecond pulse width, ultraviolet / green laser, with the laser power between 20% and 70% and the overlap rate between 0% and 50%.
[0067] S330, use a laser etching process or polishing and texturing etching to remove the first passivation layer 3 and the first doped semiconductor layer 4 in the second polarity region 1b.
[0068] Optionally, all of the first passivation layer 3 and the first doped semiconductor layer 4 in the second polarity region 1b can be removed using a laser etching process, or a part of the first doped semiconductor layer 4 can be removed using a laser etching process, and the remaining first doped semiconductor layer 4 and the first passivation layer 3 can be removed using a polishing and etching process.
[0069] S400, form a second passivation layer 9 on the surface of the first mask layer 7 away from the semiconductor substrate 1 and on the surface of the second polarity region 1b.
[0070] S500, form a second doped semiconductor layer 10 on the surface of the second passivation layer 9 through a diffusion process.
[0071] In the embodiments of the application, a first mask layer 7 is provided on the side of the first doped semiconductor layer 4 away from the semiconductor substrate 1. When grooving on the back surface, the first mask layer 7 located in the second polarity region 1b can reduce the damage of the laser etching to the silicon substrate, and the first mask layer 7 located in the first polarity region 1a can serve as a barrier layer to protect the first doped semiconductor layer 4 and the first passivation layer 3 and reduce the damage of the laser to the first doped semiconductor layer 4 and the first passivation layer 3.
[0072] In one of the embodiments, refer to Figure 2 , while forming the first mask layer 7, a second mask layer 8 is formed on the light-receiving surface of the semiconductor substrate. On the side of the second mask layer 8 close to the semiconductor substrate 1, there are stacked an alumina layer 5 and an antireflection layer 6 arranged in a direction away from the semiconductor substrate. The alumina layer 5 is deposited by atomic layer deposition (ALD) with a thickness of 3 nm - 20 nm. The antireflection layer 6 includes one or more of silicon oxide, silicon nitride, and silicon oxynitride, and is deposited by CVD such as PECVD with a thickness of 40 nm - 1 nm. The material of the second mask layer 8 includes one or more of amorphous silicon and polycrystalline silicon. When the first mask layer 7 in the second polarity region 1b is removed by laser grooving on the back surface, the second mask layer 8 deposited on the front surface can protect the front surface texture and the front surface antireflection layer 6. It can be understood that when using a laser etching process or a polishing and texturing process to etch and remove the first passivation layer 3 and the first doped semiconductor layer 4 in the second polarity region 1b, the second mask layer 8 can reduce the damage of the laser etching process and the polishing and texturing process to the front surface antireflection layer 6.
[0073] In one embodiment, the method for manufacturing a back-contact solar cell further includes: forming a third doped semiconductor layer 2 on a side of the first passivation layer 3 close to the semiconductor substrate 1. Optionally, the third doped semiconductor layer 2 can be prepared by internal diffusion. When preparing the first passivation layer 3 and the first doped semiconductor layer 4, high-temperature diffusion is used for doping and crystallization, and impurity atoms enter the semiconductor substrate 1 to form the third doped semiconductor layer 2.
[0074] Figure 7 It is the third of the flowcharts of the method for manufacturing a back-contact solar cell according to an embodiment. With reference to Figures 7 to 10 . Among them, Figure 8 is Figure 7 one of the structural schematic diagrams of the back-contact solar cell after step S600 of the embodiment. Figure 9 is Figure 7 one of the structural schematic diagrams of the back-contact solar cell after step S700 of the embodiment. Figure 10 is Figure 7 one of the structural schematic diagrams of the back-contact solar cell after step S800 of the embodiment. Among them, S100 to S500 can refer to the foregoing embodiments and will not be elaborated here.
[0075] S100, providing a semiconductor substrate 1, the semiconductor substrate 1 having opposite light-receiving and backlight surfaces, and the backlight surface including a first polarity region 1a and a second polarity region 1b.
[0076] S210, forming a stacked first passivation layer 3 and first doped semiconductor layer 4 on the backlight surface of the semiconductor substrate.
[0077] S310, forming a first mask layer 7 on a side of the first doped semiconductor layer 4 away from the semiconductor substrate.
[0078] S320, removing the first mask layer 7 in the second polarity region 1b by using a laser etching process.
[0079] S330, removing the first passivation layer 3 and the first doped semiconductor layer 4 in the second polarity region 1b by using a laser etching process or a polishing and texturing etching.
[0080] S400, forming a second passivation layer 9 on the surface of the first mask layer 7 away from the semiconductor substrate and on the surface of the second polarity region 1b.
[0081] S500, forming a second doped semiconductor layer 10 on the surface of the second passivation layer 9 through a diffusion process.
[0082] S600, removing the first mask layer 7, the second doped semiconductor layer 10, and the second passivation layer 9 by using a laser etching process to prepare a first passivation layer contact region in the first polarity region 1a.
[0083] In S700, a transparent conductive layer 11 is prepared on the backlight surface of the semiconductor substrate 1, and an opening 12 is prepared. The opening 12 at least truncates the conductive layer to form a first conductive layer 111 in the first polarity region 1a and a second conductive layer 112 in the second polarity region 1b.
[0084] The opening 12 at least truncates the transparent conductive layer to expose the second passivation layer 9 or the second doped semiconductor layer 10, and at most exposes the first mask layer 7. The method for preparing the opening includes laser etching or ink printing mask, and is matched with wet chemical etching. It can be understood that the first mask layer 7 serves as a barrier layer to reduce the damage of the laser to the first doped semiconductor.
[0085] In S800, a first electrode 13 and a second electrode 14 are prepared.
[0086] Among them, the first electrode 13 is located in the first polarity region 1a, one end penetrates through the first conductive layer 111 and is electrically connected to the first doped semiconductor layer 4, and the other end extends in a direction away from the semiconductor substrate 1. The second electrode 14 is located in the second polarity region 1b, one end penetrates through the transparent second conductive layer 112 and is electrically connected to the second doped semiconductor layer 10, and the other end of the second electrode 14 extends in a direction away from the semiconductor substrate 1. Exemplarily, the first electrode 13 and the second electrode 14 can be formed by screen printing and sintering, or can be formed by laser opening and electroplating, which is not limited herein.
[0087] The embodiment of the present application also provides a back-contact solar cell, which is prepared by using the preparation method of the solar cell as described above.
[0088] Continuing to refer to Figure 10 , the embodiment of the present application also provides a back-contact solar cell, including a semiconductor substrate 1, a first passivation layer 3, a first doped semiconductor layer 4, a first mask layer 7, a second passivation layer 9, and a second doped semiconductor layer 10. Among them, the first passivation layer 3 and the first doped semiconductor layer 4 are stacked in a direction away from the semiconductor substrate 1 in the first polarity region 1a, the first mask layer 7 is located on a part of the surface of the first doped semiconductor layer 4, the second passivation layer 9 and the second doped semiconductor layer 10 are stacked in a direction away from the semiconductor substrate 1 in the second polarity region 1b, the doping types of the first doped semiconductor layer 4 and the second doped semiconductor layer 10 are opposite, and the second passivation layer 9 and the second doped semiconductor layer 10 extend toward the first polarity region 1a to cover the surface of the first mask layer 7 located in the first polarity region 1a.
[0089] Continuing to refer to Figure 10 , in one of the embodiments, the material of the first mask layer 7 includes one or more of amorphous silicon and polycrystalline silicon.
[0090] In one embodiment, the back-contact solar cell further includes a third doped semiconductor layer 2, which is located in the first polarity region 1a, on the side of the first passivation layer 3 away from the first doped semiconductor layer 4, and the doping type of the third doped semiconductor layer 2 is the same as that of the first doped semiconductor 4.
[0091] In one embodiment, the back-contact solar cell further includes a first conductive layer 111 located in the first polarity region 1a and a second conductive layer 112 located in the second polarity region 1b. The first conductive layer 111 and the second conductive layer 112 are electrically isolated from each other. The first conductive layer 111 is in contact with the first passivation layer 3 exposed by the first mask layer 7, and the second conductive layer 112 is in contact with the second passivation layer 9.
[0092] In one embodiment, an opening is provided between the first conductive layer 111 and the second conductive layer 112 to space the first conductive layer 111 and the second conductive layer 112 apart, and the opening exposes at least one of the second passivation layer 9, the second doped semiconductor layer 10, or the first mask layer 7.
[0093] An embodiment of the present application further provides a photovoltaic module, including a battery string formed by connecting a plurality of back-contact solar cells as described above.
[0094] In the description of this specification, the description referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.
[0095] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.
[0096] The above-described embodiments merely represent several implementation manners of the present application, and the description thereof is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.
Claims
1. A back contact solar cell, characterized in that: include: A semiconductor substrate having a light-receiving surface and a backlight surface opposite to each other, wherein the backlight surface includes a first polarity region and a second polarity region; A first passivation layer and a first doped semiconductor layer, wherein the first passivation layer and the first doped semiconductor layer are stacked in the first polarity region in a direction away from the semiconductor substrate; A first mask layer is located on a portion of the surface of the first doped semiconductor layer; a second passivation layer and a second doped semiconductor layer, wherein the second passivation layer and the second doped semiconductor layer are stacked in the second polarity region in a direction away from the semiconductor substrate, and the doping type of the first doped semiconductor layer is opposite to the doping type of the second doped semiconductor layer; The second passivation layer and the second doped semiconductor layer extend toward the first polarity region to cover the surface of the first mask layer located in the first polarity region; A first electrode and a second electrode, wherein the first electrode is electrically connected to the first doped semiconductor layer, and the second electrode is electrically connected to the second doped semiconductor layer.
2. The back contact solar cell according to claim 1, characterized in that: The material of the first mask layer includes one or more of amorphous silicon and polycrystalline silicon.
3. The back contact solar cell according to claim 1, characterized in that: Also includes: A third doped semiconductor layer is located in the first polarity region and on a side of the first passivation layer away from the first doped semiconductor layer. The doping type of the third doped semiconductor layer is the same as the doping type of the first doped semiconductor layer.
4. The back contact solar cell according to claim 1, characterized in that: It also includes a first conductive layer located in the first polarity region and a second conductive layer located in the second polarity region, the first conductive layer and the second conductive layer are electrically isolated, the first conductive layer is in contact with the first passivation layer exposed by the first mask layer 7, and the second conductive layer is in contact with the second passivation layer.
5. The back contact solar cell according to claim 4, characterized in that: An opening is provided between the first conductive layer and the second conductive layer to separate the first conductive layer and the second conductive layer, and the opening exposes at least one of the second passivation layer, the second doped semiconductor layer or the mask layer.
6. A method for preparing a back contact solar cell, characterized in that: The method comprises: Providing a semiconductor substrate, the semiconductor substrate having a light-receiving surface and a backlight surface opposite to each other, the backlight surface comprising a first polarity region and a second polarity region; forming a stacked first passivation layer and a first doped semiconductor layer in the first polarity region in a direction away from the semiconductor substrate; forming a first mask layer on at least a portion of the surface of the first doped semiconductor layer away from the semiconductor substrate; forming a second passivation layer on a surface of the first mask layer away from the semiconductor substrate and a surface of the second polarity region; forming a second passivation layer on a surface of the first mask layer away from the semiconductor substrate and a surface of the second polarity region; A second doped semiconductor layer is formed on the surface of the second passivation layer by a diffusion process.
7. The method for preparing a back contact solar cell according to claim 6, characterized in that: The method of forming a stacked first passivation layer and a first doped semiconductor layer in the first polarity region in a direction away from the semiconductor substrate, and forming a first mask layer on at least a portion of the surface of the first doped semiconductor layer away from the semiconductor substrate comprises: forming a stacked first passivation layer and a first doped semiconductor layer on the backlight surface of the semiconductor substrate; forming a first mask layer on a side of the first doped semiconductor layer away from the semiconductor substrate; Using a laser etching process to remove the first mask layer in the second polarity region; The first passivation layer and the first doped semiconductor layer in the second polarity region are etched away by using a laser etching process or a polishing and texturing process.
8. The method for preparing a back contact solar cell according to claim 7, characterized in that: Also includes: A passivation anti-reflection layer and a second mask layer are formed on the light-receiving surface. The second mask layer is formed simultaneously with the first mask layer. The second mask layer is removed when the first mask layer in the second polarity region is removed by a laser etching process.
9. The method for preparing a back contact solar cell according to claim 8, characterized in that: The first mask layer and the second mask layer include one or more of amorphous silicon and polycrystalline silicon.
10. The method for preparing a back contact solar cell according to any one of claims 6 to 9, characterized in that: The method further includes forming a third doped semiconductor layer on a side of the first passivation layer close to the semiconductor substrate, wherein the doping type of the third doped semiconductor layer is the same as the doping type of the first doped semiconductor layer.
11. The method for preparing a back contact solar cell according to any one of claims 6 to 9, characterized in that: Also includes: forming a conductive layer on a surface of the second passivation layer away from the semiconductor substrate; An opening is prepared, wherein the opening at least cuts off the conductive layer to form a first conductive layer located in the first polarity region and a second conductive layer located in the second polarity region.
12. A battery assembly, characterized in that: A back-contact solar cell comprising the back-contact solar cell according to any one of claims 1-6, or a back-contact solar cell prepared by the method for preparing a back-contact solar cell according to any one of claims 7-11.