Back contact battery and photovoltaic module

Abstract

The invention discloses a back contact battery and a photovoltaic module, relates to the technical field of photovoltaic, and aims to improve the double-sided rate and the working performance of the back contact battery. A back contact cell includes a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a passivation layer. The first doped semiconductor layer is disposed on the first region. The first doped semiconductor layer is an emitter doped layer. The second doped semiconductor layer is disposed on the second region. The conductive types of the second doped semiconductor layer and the first doped semiconductor layer are opposite. A passivation layer is disposed on the first doped semiconductor layer, the second doped semiconductor layer, and the spacer region. Wherein the spacer region includes a first sub-region adjacent to the first doped semiconductor layer, and a second sub-region adjacent to the second doped semiconductor layer. In a side of the passivation layer facing away from the semiconductor substrate, a surface reflectance of a portion corresponding to the first sub-region is less than a surface reflectance of a portion corresponding to the second sub-region.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular, to a back-contact battery and a photovoltaic module. Background Art

[0002] A back-contact battery refers to a solar cell in which the light-facing surface of the cell has no electrodes, and the positive and negative electrodes are both disposed on the backlight side of the cell, so that the shielding of the electrodes on the cell can be reduced, the short-circuit current of the cell can be increased, and the energy conversion efficiency of the cell can be improved.

[0003] However, in the back side of the existing back-contact battery, the morphologies of the respective parts of the local surface corresponding to the spaced regions are substantially the same, and the requirements of passivation and light trapping cannot be taken into account, resulting in poor working performance of the back-contact battery. Summary of the Invention

[0004] The object of the present invention is to provide a back-contact battery and a photovoltaic module, so that the part corresponding to the first sub-region on the side of the passivation layer facing away from the semiconductor substrate has a smaller surface reflectivity, so that more light is reflected into the adjacent emitter doping layer, and the bifaciality of the back-contact battery is improved. Moreover, the part corresponding to the second sub-region on the side of the passivation layer facing away from the semiconductor substrate has a larger surface reflectivity, so that the second sub-region has a surface with a smaller specific surface area, the passivation effect of the passivation layer on the second sub-region is improved, and the working performance of the back-contact battery is enhanced.

[0005] To achieve the above object, in a first aspect, the present invention provides a back-contact battery, which includes: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a passivation layer. The semiconductor substrate has opposite first and second surfaces. The first surface has alternately spaced first and second regions, and a spaced region between the first and second regions. The first doped semiconductor layer is disposed on the first region. The first doped semiconductor layer is an emitter doping layer. The second doped semiconductor layer is disposed on the second region. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. The passivation layer is disposed on the first doped semiconductor layer, the second doped semiconductor layer, and the spaced region. Among them, the spaced region includes a first sub-region adjacent to the first doped semiconductor layer and a second sub-region adjacent to the second doped semiconductor layer. On the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the part corresponding to the first sub-region is less than the surface reflectivity of the part corresponding to the second sub-region.

[0006] In the case of adopting the above technical solution, when the back-contact battery is in a working state, the above first doped semiconductor layer and second doped semiconductor layer can effectively shunt and collect carriers, which is conducive to the formation of photocurrent. The spacer region disposed between the first doped semiconductor layer and the second doped semiconductor layer is used to electrically isolate the first doped semiconductor layer and the second doped semiconductor layer with opposite conductivity types, reducing the carrier recombination rate therebetween. Secondly, the passivation layer disposed on the first doped semiconductor layer, the second doped semiconductor layer and the spacer region can also reduce the carrier recombination rate on the back side of the back-contact battery, improving the conversion efficiency of the back-contact battery.

[0007] In addition, in the side of the passivation layer facing away from the semiconductor substrate, the portion corresponding to the first sub-region has a small surface reflectivity, which is conducive to reflecting more light into the first doped semiconductor layer adjacent to the first sub-region, improving the bifaciality of the back-contact battery. At the same time, the first doped semiconductor layer is an emitter doping layer. Since the emitter doping layer is used to provide the injection and separation of electron-hole pairs, when more light is incident on the emitter doping layer, it is conducive to generating more photo-generated carriers by laser, and thus conducive to improving the conversion efficiency of the back-contact battery. And because the passivation layer is formed on the first side by a deposition process, the undulating morphology of the portion corresponding to the spacer region in the side of the passivation layer facing away from the semiconductor substrate can to some extent reflect the undulating morphology of the surface of the spacer region of the semiconductor substrate. Therefore, when the portion corresponding to the second sub-region in the side of the passivation layer facing away from the semiconductor substrate has a large surface reflectivity, compared with the first sub-region, the specific surface area of the second sub-region is smaller, making the surface roughness of the second sub-region smaller, which is conducive to improving the passivation effect of the passivation layer on the second sub-region and enhancing the working performance of the back-contact battery. In addition, since the first sub-region is adjacent to the first doped semiconductor layer and the second sub-region is adjacent to the second doped semiconductor layer, as the boundary region of different structures, when the surface reflectivities of the first sub-region and the second sub-region are different, the brightness of the first sub-region is darker and the brightness of the second sub-region is higher, which is conducive to enhancing the contrast of the captured image, thereby more accurately identifying the alignment marks provided on the battery and improving the yield of battery production.

[0008] As a possible implementation solution, in at least one spacer region, the area of the first sub-region is larger than the area of the second sub-region. In this case, the proportion of the area of the local surface with a lower surface reflectivity in the side of the passivation layer facing away from the semiconductor substrate is larger, which is conducive to improving the light trapping effect of the surface corresponding to the spacer region in the side of the passivation layer facing away from the semiconductor substrate, enabling more light to be reflected into the emitter doping layer, and further increasing the bifaciality of the back-contact battery.

[0009] As a possible implementation solution, on the side of the passivation layer facing away from the semiconductor substrate, the surfaces corresponding to the first sub-region and the second sub-region have a texture structure. Among them, on the side of the passivation layer facing away from the semiconductor substrate, the one-dimensional size of the texture structure in the surface corresponding to the first sub-region is different from the one-dimensional size of the texture structure in the surface corresponding to the second sub-region; and / or, the distribution density of the texture structure in the surface corresponding to the first sub-region is different from the distribution density of the texture structure in the surface corresponding to the second sub-region; and / or, the one-dimensional size uniformity of the texture structure in the surface corresponding to the first sub-region is greater than the one-dimensional size uniformity of the texture structure in the surface corresponding to the second sub-region.

[0010] In the case of adopting the above technical solution, by adjusting at least one of the one-dimensional size, distribution density, and one-dimensional size uniformity of the texture structure of the surfaces corresponding to the first sub-region and the second sub-region on the side of the passivation layer facing away from the semiconductor substrate, the reflectivity of the surfaces corresponding to the first sub-region and the second sub-region on the side of the passivation layer facing away from the semiconductor substrate can be respectively regulated, so as to realize regional differentiation settings for different parts of the local surface of the corresponding spaced region on the side of the passivation layer facing away from the semiconductor substrate, so that the local surface of the corresponding spaced region on the side of the passivation layer facing away from the semiconductor substrate can simultaneously meet the requirements of passivation and light trapping. While improving the working performance of the back contact battery, it is also possible to select a suitable range according to the requirements of different actual application scenarios, thereby improving the applicability of the back contact battery provided by the present invention in different application scenarios.

[0011] As a possible implementation solution, the texture structure includes a quasi-pyramid structure. Moreover, on the side of the passivation layer facing away from the semiconductor substrate, the distribution density of the quasi-pyramid structure in the surface corresponding to the first sub-region is greater than the distribution density of the quasi-pyramid structure in the surface corresponding to the second sub-region; and / or, the one-dimensional size of the quasi-pyramid structure in the surface corresponding to the first sub-region is smaller than the one-dimensional size of the quasi-pyramid structure in the surface corresponding to the second sub-region; and / or, the one-dimensional size uniformity of the quasi-pyramid structure in the surface corresponding to the first sub-region is greater than the one-dimensional size uniformity of the quasi-pyramid structure in the surface corresponding to the second sub-region.

[0012] In the case of adopting the above technical solution, when on the side of the passivation layer facing away from the semiconductor substrate, the texture structures of the surfaces corresponding to the first sub-region and the second sub-region include a pyramid-like structure, and the distribution density of the pyramid-like structures in the surface corresponding to the first sub-region is greater than the distribution density of the pyramid-like structures in the surface corresponding to the second sub-region, the undulating topography of the surface corresponding to the first sub-region is denser, which is conducive to further increasing the surface roughness of the part corresponding to the first sub-region on the side of the passivation layer facing away from the semiconductor substrate, reducing the surface reflectivity of the part corresponding to the first sub-region on the side of the passivation layer facing away from the semiconductor substrate, facilitating more light to be reflected into the emitter doping layer, thereby exciting more photo-generated carriers and further improving the conversion efficiency of the battery. Secondly, when the one-dimensional size of the pyramid-like structures in the surface corresponding to the first sub-region is smaller than the one-dimensional size of the pyramid-like structures in the surface corresponding to the second sub-region, and / or when the one-dimensional size uniformity of the pyramid-like structures in the surface corresponding to the first sub-region is greater than the one-dimensional size uniformity of the pyramid-like structures in the surface corresponding to the second sub-region, the application principle of the beneficial effects can refer to the application principle of the beneficial effects that the distribution density of the pyramid-like structures in the surface corresponding to the first sub-region is greater than the distribution density of the pyramid-like structures in the surface corresponding to the second sub-region described above, and will not be elaborated here.

[0013] As a possible implementation solution, on the side of the passivation layer facing away from the semiconductor substrate, the surfaces corresponding to the first sub-region and the second sub-region have texture structures; and the texture structures of the surface corresponding to the first sub-region and the texture structures of the surface corresponding to the second sub-region are different. Optionally, the texture structure of the surface corresponding to the first sub-region includes a pyramid-like structure, and the texture structure of the surface corresponding to the second sub-region includes a tower-base-like structure.

[0014] In the case of adopting the above technical solution, on the side of the passivation layer facing away from the semiconductor substrate, compared with the tower-base-like structure of the surface corresponding to the second sub-region, the pyramid-like structure of the surface corresponding to the first sub-region has a sharper tower top, so the undulating degree of the surface corresponding to the first sub-region is greater, which is beneficial to increasing the surface roughness of the part corresponding to the first sub-region, reducing the surface reflectivity of the part corresponding to the first sub-region on the side of the passivation layer facing away from the semiconductor substrate, facilitating more light to be reflected into the emitter doping layer, thereby exciting more photo-generated carriers and further improving the conversion efficiency of the battery.

[0015] As a possible implementation solution, on the side of the passivation layer facing away from the semiconductor substrate, the texture structure of the surface corresponding to the second sub-region further includes a pyramid-like structure. And in the surface corresponding to the second sub-region, the surfaces of at least one tower-base-like structure have pyramid-like structures distributed discretely.

[0016] In the case of adopting the above technical solution, it can be understood that the tower-base-like structure is a concave structure that concaves into the passivation layer along the thickness direction of the semiconductor substrate. The pyramid-like structure is a convex structure that protrudes in the direction away from the semiconductor substrate. Based on this, when on the surface of the corresponding second sub-region, the surfaces of at least one tower-base-like structure have pyramid-like structures distributed discretely, the surface of the tower-base-like structure that concaves into the passivation layer is superimposed with the pyramid-like structure that protrudes in the direction away from the semiconductor substrate, which is conducive to changing the surface of the corresponding second sub-region with a relatively large height difference originally into a surface with a relatively small height difference, reducing the undulation degree of the surface of the corresponding second sub-region on the side of the passivation layer away from the semiconductor substrate, and being conducive to further reducing the surface roughness and surface reflectivity of the part of the corresponding second sub-region on the side of the passivation layer away from the semiconductor substrate, and further improving the passivation effect of the passivation layer in the second sub-region.

[0017] As a possible implementation solution, on the side of the passivation layer away from the semiconductor substrate, the surface of the corresponding second sub-region concaves into the semiconductor substrate relative to the surface of the corresponding first sub-region. In this case, it is conducive to further reducing the leakage risk between the first doped semiconductor layer and the second doped semiconductor layer with opposite conduction types. Secondly, the passivation layer is formed on the first doped semiconductor layer, the second doped semiconductor layer and the spacer region through a deposition process. The undulating morphology of the part of the passivation layer corresponding to the spacer region on the side away from the semiconductor substrate is substantially the same as the undulating morphology of the spacer region itself. Therefore, when on the side of the passivation layer away from the semiconductor substrate, the surface of the corresponding second sub-region concaves into the semiconductor substrate relative to the surface of the corresponding first sub-region, the surface of the second sub-region included in the spacer region also concaves into the semiconductor substrate relative to the surface of the first sub-region, which can increase the passivation contact area between the passivation layer and the spacer region and further improve the passivation effect of the passivation layer on the spacer region.

[0018] As a possible implementation solution, on the side of the passivation layer away from the semiconductor substrate, the surface of the corresponding second sub-region includes a planar region and a matte region. In this case, compared with the conventional matte surface where all parts are matte regions, when the surface of the corresponding second sub-region on the side of the passivation layer away from the semiconductor substrate also has a planar region, the distribution of the matte structure on the surface of the corresponding second sub-region is relatively sparse, which is conducive to reducing the surface roughness and surface reflectivity of the corresponding second sub-region on the side of the passivation layer away from the semiconductor substrate and further improving the passivation effect of the passivation layer on the spacer region.

[0019] As a possible implementation solution, the first surface has a boundary, and the first surface further includes an isolation region. The isolation region is located between the boundary and the first region, and between the boundary and the second region. Among them, on the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the isolation region is greater than the surface reflectivity of the portion corresponding to the first sub-region; and / or, the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate.

[0020] In the case of adopting the above technical solution, when the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate is greater than the surface reflectivity of the portion corresponding to the first sub-region, the surface reflectivity of the portion corresponding to the first sub-region is smaller, which is beneficial to making more light reflect into the emitter doping layer, thereby laser more photo-generated carriers and improving the conversion efficiency of the battery. When the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate, the second surface (front surface) of the back-contact battery has a higher light-trapping effect, which is beneficial to improving the light utilization rate of the battery.

[0021] As a possible implementation solution, on the side of the passivation layer facing away from the semiconductor substrate, the surfaces corresponding to the first sub-region, the second sub-region, and the isolation region have a texture structure, and the texture structure includes a quasi-pyramid structure. Moreover, the apex angle of the quasi-pyramid structure in the surface corresponding to the isolation region is greater than the apex angles of the quasi-pyramid structures in the surfaces corresponding to the first sub-region and the second sub-region.

[0022] In the case of adopting the above technical solution, when other factors are the same, the larger the apex angle of the pyramid structure, the "short and fat" the pyramid structure is, and its height changes relatively gently. And the smaller the apex angle of the pyramid structure, the "thin and tall" it is, and its height changes greatly. Based on this, when the apex angle of the quasi-pyramid structure in the surface corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate is larger, the surface of the portion corresponding to the isolation region is relatively flat, which is beneficial to making the surface of the isolation region on the first surface also relatively flat, improving the passivation effect of the passivation layer on the isolation region, reducing the number of surface defects in the isolation region, and improving the working performance of the back-contact battery.

[0023] As a possible implementation solution, the surface corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate and the surface of the second surface have a texture structure, and the texture structure includes a quasi-pyramid structure. The apex angle of the quasi-pyramid structure in the second surface is less than the apex angle of the quasi-pyramid structure in the surface corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate.

[0024] When the above technical solution is adopted, as mentioned above, under the condition that other factors are the same, the height change of the pyramid-shaped structure with a larger vertex angle is relatively gentle. Therefore, when the vertex angle of the pyramid-shaped structure in the surface corresponding to the isolation area on the side of the isolation passivation layer away from the semiconductor substrate is relatively large, it is beneficial to improve the passivation effect of the passivation layer on the isolation area, reduce the number of surface defects in the isolation area, and improve the working performance of the back contact battery. The vertex angle of the pyramid-shaped structure in the second surface is relatively small, so that the second surface of the back contact battery has a better light trapping effect, thereby improving the light utilization rate of the battery.

[0025] As a possible implementation scheme, the back contact battery includes a plurality of sliced ​​battery cells spaced apart along an arrangement direction perpendicular to the first region and the second region. A cutting path region is provided between two adjacent sliced ​​battery cells. An alignment mark is provided on the cutting path region. In this case, it is convenient to accurately identify the positions of different battery structures according to the alignment mark provided on the cutting path region, thereby improving the yield of battery production.

[0026] As a possible implementation scheme, on the side of the passivation layer facing away from the semiconductor substrate, the surface of the corresponding cutting path area has a texture structure, and within the surface of the corresponding cutting path area, the distribution density of the texture structure on the surface of the area close to the alignment mark is greater than the distribution density of the texture structure on the surface of the remaining area. In this case, the surface roughness of the area close to the alignment mark is higher and the surface reflectivity is lower, so that the brightness of the area close to the alignment mark is lower, which is conducive to improving the contrast of the captured image, thereby more accurately identifying the alignment mark set on the battery and improving the yield of battery production.

[0027] In a second aspect, the present invention provides a photovoltaic module, which includes a back-contact cell provided by the first aspect and various implementations thereof.

[0028] The beneficial effects of the second aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0029] In a third aspect, the present invention provides another back-contact battery, which includes: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a passivation layer. The semiconductor substrate has opposite first and second surfaces. The first surface has first regions and second regions that are alternately and spaced apart, and a spacer region located between the first regions and the second regions. The first doped semiconductor layer is disposed on the first regions. The first doped semiconductor layer is an emitter doping layer. The second doped semiconductor layer is disposed on the second regions. The second doped semiconductor layer has a conductivity type opposite to that of the first doped semiconductor layer. The passivation layer is disposed on the first doped semiconductor layer, the second doped semiconductor layer, and the spacer region. The spacer region includes a first sub-region adjacent to the first doped semiconductor layer and a second sub-region adjacent to the second doped semiconductor layer. The first surface has a boundary, and the first surface further includes an isolation region. The isolation region is located between the boundary and the first regions, and between the boundary and the second regions. Wherein, on the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the isolation region is greater than the surface reflectivity of the portion corresponding to the first sub-region; and / or, the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate.

[0030] In the case of adopting the above technical solution, when, on the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the isolation region is greater than the surface reflectivity of the portion corresponding to the first sub-region, the surface reflectivity of the portion corresponding to the first sub-region is smaller, which is conducive to reflecting more light into the emitter doping layer, thereby generating more photo-generated carriers by laser and improving the conversion efficiency of the battery. When the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate, the second surface (front surface) of the back-contact battery has a higher light-trapping effect, which is conducive to improving the light utilization rate of the battery. Description of the Drawings

[0031] The drawings described herein are used to provide a further understanding of the present invention, and constitute a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0032] Figure 1 It is a longitudinal cross-sectional schematic diagram of the first structure of the back-contact battery provided by the embodiment of the present invention;

[0033] Figure 2 It is a surface SEM diagram of the portion corresponding to the spacer region on the side of the passivation layer facing away from the semiconductor substrate in the back-contact battery provided by the embodiment of the present invention;

[0034] Figure 3 It is a surface SEM diagram of a portion near the spacer region on the side of the passivation layer facing away from the semiconductor substrate in the back-contact battery provided by the embodiment of the present invention;

[0035] Figure 4 Schematic diagram of the distribution of the first region, the second region and the spacer region in the back-contact battery provided by the embodiment of the present invention Figure 1 ;

[0036] Figure 5 Schematic diagram of the distribution of the first region, the second region and the spacer region in the back-contact battery provided by the embodiment of the present invention Figure 2 ;

[0037] Figure 6 Longitudinal cross-sectional schematic diagram of the second structure of the back-contact battery provided by the embodiment of the present invention;

[0038] Figure 7 Longitudinal cross-sectional schematic diagram of the third structure of the back-contact battery provided by the embodiment of the present invention;

[0039] Figure 8 Longitudinal cross-sectional schematic diagram of the fourth structure of the back-contact battery provided by the embodiment of the present invention;

[0040] Figure 9 Longitudinal cross-sectional schematic diagram of the fifth structure of the back-contact battery provided by the embodiment of the present invention;

[0041] Figure 10 Surface side view SEM image of the part corresponding to the second sub-region on the side of the passivation layer away from the semiconductor substrate in the back-contact battery provided by the embodiment of the present invention;

[0042] Figure 11 Surface top view SEM of the part corresponding to the second sub-region on the side of the passivation layer away from the semiconductor substrate in the back-contact battery provided by the embodiment of the present invention Figure 1 ;

[0043] Figure 12 Surface side view SEM image of the part corresponding to the first sub-region on the side of the passivation layer away from the semiconductor substrate in the back-contact battery provided by the embodiment of the present invention;

[0044] Figure 13 Surface top view SEM image of the part corresponding to the first sub-region on the side of the passivation layer away from the semiconductor substrate in the back-contact battery provided by the embodiment of the present invention;

[0045] Figure 14 Surface top view SEM of the part corresponding to the second sub-region on the side of the passivation layer away from the semiconductor substrate in the back-contact battery provided by the embodiment of the present invention Figure 2 ;

[0046] Figure 15 Longitudinal cross-sectional schematic diagram of the sixth structure of the back-contact battery provided by the embodiment of the present invention;

[0047] Figure 16 Top-down SEM image of the surface of the portion corresponding to the isolation region in the passivation layer on the side facing away from the semiconductor substrate in the back-contact battery provided by the embodiment of the present invention Figure 1 ;

[0048] Figure 17 Top-down SEM image of the surface of the portion corresponding to the isolation region in the passivation layer on the side facing away from the semiconductor substrate in the back-contact battery provided by the embodiment of the present invention Figure 2 ;

[0049] Figure 18 Partial surface SEM image of the second side of the back-contact battery provided by the embodiment of the present invention.

[0050] Reference numerals: 11 is a semiconductor substrate, 12 is a first region, 13 is a second region, 14 is a spacer region, 15 is a first doped semiconductor layer, 16 is a second doped semiconductor layer, 17 is a passivation layer, 18 is a first sub-region, 19 is a second sub-region, 20 is a planar region, 21 is a matte region, 22 is an isolation region, 23 is a first interface passivation layer, 24 is a second interface passivation layer, 25 is a surface passivation layer, 26 is an antireflection layer, 27 is a transparent conductive layer. Detailed implementation manners

[0051] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present invention.

[0052] Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, where certain details are enlarged for clearer expression and certain details may be omitted. The shapes of various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary. In practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art can design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0053] In the context of the present invention, when a layer / component is referred to as being "on" another layer / component, the layer / component may be directly on the other layer / component, or there may be an intermediate layer / component therebetween. Additionally, if a layer / component is "on" another layer / component in one orientation, then when the orientation is reversed, the layer / component may be "under" the other layer / component. To make the technical problems to be solved, technical solutions and beneficial effects of the present invention clearer and more understandable, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0054] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality" means two or more, unless otherwise specifically defined. "Several" means one or more, unless otherwise specifically defined.

[0055] In the description of the present invention, it should be noted that unless otherwise clearly specified and limited, the terms "mounted", "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0056] A solar cell is a device that can convert the light energy of the sun into electrical energy. Specifically, when the solar cell is in a working state, sunlight shines on the semiconductor p-n junction of the solar cell, forming new hole-electron pairs. Under the action of the built-in electric field in the p-n junction, the photo-generated holes flow to the p region, and the photo-generated electrons flow to the n region. After the circuit is connected, an electric current can be generated. Among them, a solar cell in which both the positive electrode and the negative electrode are on the back surface of the cell is a back-contact cell. Compared with a double-sided contact solar cell, the front surface of this back-contact cell has no metal electrode obstruction, so that the light-facing side of the back-contact cell has a higher light utilization rate. Therefore, the back-contact cell has a higher short-circuit current and photoelectric conversion efficiency, and is one of the technical directions for realizing high-efficiency crystalline silicon cells at present.

[0057] However, in the back side of the existing back-contact battery, the surface morphologies of the respective parts corresponding to the spaced regions are substantially the same. For example: each part of the local surface corresponding to the spaced region in the back side of the battery is a relatively flat plane with substantially the same one-dimensional size of the tower base structure. At this time, the light trapping effect of the spaced region is poor, which is not conducive to the excitation and injection of more photo-generated carriers in the emitter doping layer of the battery, resulting in a lower bifaciality of the back-contact battery. Another example: each part of the local surface corresponding to the spaced region in the back side of the battery is a relatively rough suede surface with substantially the same one-dimensional size of the bottom of the pyramid structure. At this time, the specific surface area of the spaced region is relatively large, resulting in poor formation quality of the passivation layer, which is not conducive to improving the passivation effect. It can be seen that the local surfaces corresponding to the spaced regions in the back side of the existing back-contact battery cannot meet the requirements of both passivation and light trapping, resulting in poor working performance of the back-contact battery.

[0058] To solve the above technical problems, in a first aspect, embodiments of the present invention provide a back-contact battery. As Figure 1 shown, the back-contact battery includes: a semiconductor substrate 11, a first doped semiconductor layer 15, a second doped semiconductor layer 16, and a passivation layer 17. The semiconductor substrate 11 has opposite first and second surfaces. The first surface has alternately spaced first regions 12 and second regions 13, and a spaced region 14 located between the first regions 12 and the second regions 13. The first doped semiconductor layer 15 is disposed on the first region 12. The first doped semiconductor layer 15 is an emitter doping layer. The second doped semiconductor layer 16 is disposed on the second region 13. The second doped semiconductor layer 16 and the first doped semiconductor layer 15 have opposite conductivity types. The passivation layer 17 is disposed on the first doped semiconductor layer 15, the second doped semiconductor layer 16, and the spaced region 14. Wherein, the spaced region 14 includes a first sub-region 18 adjacent to the first doped semiconductor layer 15 and a second sub-region 19 adjacent to the second doped semiconductor layer 16.

[0059] Exemplarily, as Figures 1 to 3 shown, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface reflectivity of the part corresponding to the first sub-region 18 is less than the surface reflectivity of the part corresponding to the second sub-region 19.

[0060] In the case of adopting the above technical solution, when the back-contact battery is in a working state, the first doped semiconductor layer and the second doped semiconductor layer can effectively shunt and collect carriers, which is beneficial to the formation of photocurrent. The spacer region disposed between the first doped semiconductor layer and the second doped semiconductor layer is used to electrically isolate the first doped semiconductor layer and the second doped semiconductor layer with opposite conduction types, and reduce the carrier recombination rate therebetween. Secondly, the passivation layer disposed on the first doped semiconductor layer, the second doped semiconductor layer and the spacer region can reduce the number of surface defects on the back side of the back-contact battery and improve the conversion efficiency of the back-contact battery. Additionally, as Figures 1 to 3 shown, in the side of the passivation layer 17 facing away from the semiconductor substrate 11, the portion corresponding to the first sub-region 18 has a smaller surface reflectivity, which is beneficial to reflect more light to the first doped semiconductor layer 15 adjacent to the first sub-region 18 and improve the bifaciality of the back-contact battery. At the same time, the first doped semiconductor layer 15 is an emitter doping layer. Since the emitter doping layer is used to provide the injection and separation of electron-hole pairs, when more light is incident on the emitter doping layer, it is beneficial to generate more photocarriers by laser, and thus beneficial to improve the conversion efficiency of the back-contact battery. And, since the passivation layer 17 is formed on the first side by a deposition process, the undulating morphology of the portion of the passivation layer 17 facing away from the semiconductor substrate 11 corresponding to the spacer region 14 can to some extent reflect the undulating morphology of the surface of the spacer region 14 of the semiconductor substrate 11. Therefore, when the portion of the passivation layer 17 facing away from the semiconductor substrate 11 corresponding to the second sub-region 19 has a larger surface reflectivity, compared with the first sub-region 18, the specific surface area of the second sub-region 19 is smaller, so that the surface roughness of the second sub-region 19 is smaller, which is beneficial to improve the passivation effect of the passivation layer 17 on the second sub-region 19 and enhance the working performance of the back-contact battery. In addition, since the first sub-region 18 is adjacent to the first doped semiconductor layer 15 and the second sub-region 19 is adjacent to the second doped semiconductor layer 16, as the boundary region of different structures, when the surface reflectivities of the first sub-region 18 and the second sub-region 19 are different, the brightness of the first sub-region 18 is darker and the brightness of the second sub-region 19 is higher, which is beneficial to improve the contrast of the captured image, so as to more accurately identify the alignment marks provided on the battery and improve the yield of battery production.

[0061] In the actual application process, the embodiments of the present invention do not make specific limitations on the material and conduction type of the semiconductor substrate. Exemplarily, the semiconductor substrate can be a silicon substrate. Alternatively, the semiconductor substrate can also be a substrate of any semiconductor material such as a germanium-silicon substrate, a germanium substrate or a gallium arsenide substrate.

[0062] Secondly, the semiconductor substrate includes opposite first and second surfaces. The first surface of the semiconductor substrate corresponds to the back surface of the back-contact battery, and the second surface of the semiconductor substrate corresponds to the front surface of the back-contact battery. Among them, the distribution of the first region, the second region, and the spacer region on the first surface can be determined according to the distribution of the first doped semiconductor layer and the second doped semiconductor layer formed on one side of the first surface. Specifically, since the first doped semiconductor layer included in the back-contact battery is disposed on the first region, the distribution range of the first region on the first surface can be determined according to the distribution requirements of the first doped semiconductor layer in the actual application scenario. Since the second doped semiconductor layer included in the back-contact battery is disposed on the second region of the first surface, the distribution range of the second region on the first surface can be determined according to the distribution requirements of the second doped semiconductor layer on the semiconductor substrate in the actual application scenario. As for the spacer region, after the ranges of the first region and the second region are determined, the range of the spacer region in the first surface is also determined.

[0063] It can be understood that in the first surface of the semiconductor substrate, the first region generally corresponds to the emitter region, and the second region generally corresponds to the back field region. Among them, one of the first region and the second region corresponds to the P region, and the other corresponds to the N region, and the spacer region is the spacer region located between the P region and the N region.

[0064] As for the shapes of the first region, the second region, and the spacer region, they can be determined according to the actual application scenario and are not specifically limited here. For example: as Figure 4 shown, the first region 12 and the second region 13 can be alternately and spacedly distributed in a strip shape. At this time, along the direction parallel to the first surface, the spacer region 14 is the region located between the P-type strip region and the N-type strip region. Another example: as Figure 5 shown, the first region 12 and the second region 13 can also be alternately and spacedly distributed in an interdigitated shape. At this time, along the direction parallel to the first surface, the spacer region 14 can be the region located between the P-type strip region and the N-type strip region, or the region located between the P-type connection region and the N-type strip region, or the region located between the N-type connection region and the P-type strip region. Among them, the P-type connection region is connected to the P-type strip region, and the N-type connection region is connected to the N-type strip region.

[0065] For the spacer region, along the width direction of the spacer region, as Figure 1 shown, the spacer region 14 may only include the first sub-region 18 and the second sub-region 19. At this time, the first sub-region 18 and the second sub-region 19 are adjacent. Alternatively, the spacer region may further include a third sub-region located between the first sub-region and the second sub-region. The width range and the surface reflectivity of the third sub-region can be set according to actual needs and are not specifically limited here.

[0066] Regarding the specific surface topography of the first surface of the semiconductor substrate, as described above, to a certain extent, the surface undulation topography on the side of the passivation layer facing away from the semiconductor substrate can reflect the surface undulation topography of the first surface of the semiconductor substrate. Therefore, the surface topography on the side of the first doped semiconductor layer and the second doped semiconductor layer facing away from the semiconductor substrate, as well as the surface topography of the intermediate region on the first surface, can refer to the surface topography on the side of the passivation layer facing away from the semiconductor substrate. In some examples, since the surface reflectivity of the portion corresponding to the first sub-region in the side of the passivation layer facing away from the semiconductor substrate is less than the surface reflectivity of the portion corresponding to the second sub-region, the surface reflectivity of the first sub-region on the first surface of the semiconductor substrate is less than the surface reflectivity of the second sub-region. Regarding the ranges of the surface reflectivities of the first sub-region and the second sub-region on the first surface, the difference between the surface reflectivities of the first sub-region and the second sub-region, the proportions of the first sub-region and the second sub-region in the spacer region, and the specific surface topography of the first sub-region and the second sub-region, reference can be made to the ranges of the surface reflectivities of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region in the side of the passivation layer facing away from the semiconductor substrate, the difference between the surface reflectivities of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region, the proportions of the surface corresponding to the first sub-region and the surface corresponding to the second sub-region in the entire spacer region corresponding to the passivation layer, and the specific surface topography of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region, etc. Information, which will not be elaborated here.

[0067] For the first doped semiconductor layer and the second doped semiconductor layer, in terms of the conduction type, in the embodiments of the present invention, the conduction types of the first doped semiconductor layer and the second doped semiconductor layer are not specifically limited, as long as the first doped semiconductor layer is an emitter doping layer and the conduction types of the first doped semiconductor layer and the second doped semiconductor layer are opposite. Specifically, when the conduction type of the semiconductor substrate is P-type, the conduction type of the first doped semiconductor layer is N-type, and the conduction type of the second doped semiconductor layer is P-type. Alternatively, when the conduction type of the semiconductor substrate is N-type, the conduction type of the first doped semiconductor layer is P-type, and the conduction type of the second doped semiconductor layer is N-type.

[0068] The material of the first doped semiconductor layer and / or the second doped semiconductor layer may include any semiconductor material such as silicon, silicon-germanium, germanium, or gallium arsenide. In terms of the arrangement form of the substance, the crystal phase of the first doped semiconductor layer and / or the second doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline, etc. The materials of the first doped semiconductor layer and the second doped semiconductor layer may be the same or different.

[0069] For example: The materials of the first doped semiconductor layer and the second doped semiconductor layer may both be polycrystalline silicon or amorphous silicon.

[0070] For another example, the material of one of the first doped semiconductor layer and the second doped semiconductor layer includes polysilicon, and the material of the other includes amorphous silicon.

[0071] Secondly, as Figure 1 shown, the first doped semiconductor layer 15 can be directly disposed on the first region 12. Alternatively, as Figure 6 shown, the back contact battery may further include a first interface passivation layer 23 located between the first doped semiconductor layer 15 and the semiconductor substrate 11. In this case, the passivation contact structure composed of the first interface passivation layer 23 and the first doped semiconductor layer 15 has an excellent interface passivation effect, and can achieve selective collection of carriers, reduce the carrier recombination rate of the first region 12 on the first surface of the semiconductor substrate 11, and further improve the photoelectric conversion efficiency of the back contact battery. The material and thickness of the first interface passivation layer 23 can be set according to the material of the first doped semiconductor layer 15 and actual requirements, and are not specifically limited herein. For example: when the material of the first doped semiconductor layer is doped polysilicon, the first interface passivation layer is a tunneling oxide layer. For another example: when the material of the first doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the first interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer, or a mixed layer of the above three.

[0072] As for the second doped semiconductor layer, as Figure 1 shown, the second doped semiconductor layer 16 can be directly disposed on the second region 13. Alternatively, as Figure 6 shown, the back contact battery may further include a second interface passivation layer 24, and the second interface passivation layer 24 is located between the semiconductor substrate 11 and the second doped semiconductor layer 16. In this case, the passivation contact structure composed of the second interface passivation layer 24 and the second doped semiconductor layer 16 can achieve selective collection of carriers and reduce the carrier recombination rate of the second region 13 on the first surface of the semiconductor substrate 11. The principle of setting the material and thickness of the second interface passivation layer 24 can refer to the principle of setting the material and thickness of the first interface passivation layer 23 described above, and will not be elaborated herein.

[0073] For the passivation layer, in terms of structure and material, the specific structure of the passivation layer can be determined according to the type of solar cell and actual application scenarios, and is not specifically limited herein. Exemplarily, the passivation layer may include at least one of a surface passivation layer, an antireflection layer, and a transparent conductive layer.

[0074] As Figures 7 to 9As shown, when the passivation layer 17 includes at least one of a surface passivation layer 25, an antireflection layer 26, and a transparent conductive layer 27, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface of the portion corresponding to the first sub-region 18 is the outermost layer among the film layers included in the passivation layer 17 (i.e., the one with the largest distance from the semiconductor substrate 11 in the thickness direction of the semiconductor substrate 11), and it is the surface of the portion corresponding to the first sub-region 18 on the side of the passivation layer 17 facing away from the semiconductor substrate 11. On the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface of the portion corresponding to the second sub-region 19 is the outermost layer among the film layers included in the passivation layer 17 (i.e., the one with the largest distance from the semiconductor substrate 11 in the thickness direction of the semiconductor substrate 11), and it is the surface of the portion corresponding to the second sub-region 19 on the side of the passivation layer 17 facing away from the semiconductor substrate 11.

[0075] For example: As Figure 9 shown, when the passivation layer 17 only includes a surface passivation layer 25 and an antireflection layer 26, and the antireflection layer 26 is disposed on the side of the surface passivation layer 25 facing away from the semiconductor substrate 11, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface of the portion corresponding to the first sub-region 18 is the surface of the portion corresponding to the first sub-region 18 on the side of the antireflection layer 26 facing away from the semiconductor substrate 11. On the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface of the portion corresponding to the second sub-region 19 is the surface of the portion corresponding to the second sub-region 19 on the side of the antireflection layer 26 facing away from the semiconductor substrate 11.

[0076] In addition, the materials of the surface passivation layer, the antireflection layer, and the transparent conductive layer can be set according to actual requirements. Exemplarily, the material of the surface passivation layer can include any passivation material such as silicon oxide, aluminum oxide, silicon nitride, or silicon oxynitride. The material of the antireflection layer can include silicon nitride or silicon oxynitride, etc. The material of the transparent conductive layer can include at least one of tin-doped indium oxide, aluminum-doped zinc oxide, indium tin oxide, indium tungsten oxide, indium molybdenum oxide, indium cerium oxide, and indium hydroxide.

[0077] It should be noted that when the passivation layer includes a transparent conductive layer, the portion of the transparent conductive layer corresponding to the first region is electrically insulated from the portion of the transparent conductive layer corresponding to the second region to prevent short circuit.

[0078] It can be understood that, as described above, in the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the first sub-region and the surface reflectivity of the portion corresponding to the second sub-region will affect the passivation effect of the passivation layer on the spacer region and the incident amount of light incident from the spacer region into the emitter doping layer (or the emitter doping layer and the semiconductor substrate) (and thus affect the bifaciality of the cell and the number of photo-generated carriers that can be excited and injected by the emitter doping layer). Therefore, according to the requirements for the passivation effect of the passivation layer on the spacer region, the bifaciality of the cell, and the amount of carriers that can be excited by the emitter doping layer in the actual application scenario, the surface reflectivity and the difference between the surface reflectivity of the portion corresponding to the first sub-region and the surface reflectivity of the portion corresponding to the second sub-region, the surface topography of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region, and the proportion range of the portion corresponding to the first sub-region and the portion corresponding to the second sub-region in the side of the passivation layer facing away from the semiconductor substrate can be determined, and no specific limitation is made here.

[0079] Exemplarily, as Figure 2 shown, in at least one spacer region, the area of the first sub-region 18 can be larger than the area of the second sub-region 19. In this case, the proportion of the area of the local surface with a lower surface reflectivity in the side of the passivation layer facing away from the semiconductor substrate is larger, which is beneficial to improving the light trapping effect of the surface corresponding to the spacer region in the side of the passivation layer facing away from the semiconductor substrate, enabling more light to be reflected into the emitter doping layer, and further increasing the bifaciality of the back-contact cell.

[0080] Of course, in at least one spacer region, the area of the first sub-region can also be smaller than or equal to the area of the second sub-region.

[0081] Exemplarily, on the side of the passivation layer facing away from the semiconductor substrate, the surfaces corresponding to the first sub-region and the surfaces corresponding to the second sub-region may have a texture structure. Among them, on the side of the passivation layer facing away from the semiconductor substrate, the one-dimensional size of the texture structure in the surface corresponding to the first sub-region is different from the one-dimensional size of the texture structure in the surface corresponding to the second sub-region; and / or, the distribution density of the texture structure in the surface corresponding to the first sub-region is different from the distribution density of the texture structure in the surface corresponding to the second sub-region; and / or, the one-dimensional size uniformity of the texture structure in the surface corresponding to the first sub-region is greater than the one-dimensional size uniformity of the texture structure in the surface corresponding to the second sub-region. In this case, by adjusting at least one of the one-dimensional size, distribution density, and one-dimensional size uniformity of the texture structure of the surfaces corresponding to the first sub-region and the surfaces corresponding to the second sub-region on the side of the passivation layer facing away from the semiconductor substrate, the reflectivity of the surfaces corresponding to the first sub-region and the surfaces corresponding to the second sub-region on the side of the passivation layer facing away from the semiconductor substrate can be regulated respectively, so as to achieve regional differentiation settings for different parts of the local surface of the corresponding spaced region on the side of the passivation layer facing away from the semiconductor substrate, so that the local surface of the corresponding spaced region on the side of the passivation layer facing away from the semiconductor substrate can simultaneously meet the requirements of passivation and light trapping, improve the working performance of the back-contact battery, and at the same time, a suitable range can be selected according to the requirements of different actual application scenarios, so as to improve the applicability of the back-contact battery provided by the embodiments of the present invention in different application scenarios.

[0082] Specifically, on the side of the passivation layer facing away from the semiconductor substrate, the specific types of the texture structures of the surfaces corresponding to the first sub-region and the surfaces corresponding to the second sub-region can be set according to the reflectivity requirements for these two local surfaces in the actual application scenario and the actual needs, and no specific limitation is made here.

[0083] Exemplarily, on the side of the passivation layer facing away from the semiconductor substrate, the texture structure of the surface corresponding to the first sub-region and / or the surface corresponding to the second sub-region may be a polished texture structure such as a tower-base-like structure, or a matte texture structure such as a pyramid-like structure or a hole-like structure.

[0084] On the side of the passivation layer facing away from the semiconductor substrate, the types of the texture structures of the surfaces corresponding to the first sub-region and the surfaces corresponding to the second sub-region may be the same or different.

[0085] As for the one-dimensional size of the texture structure of the surfaces corresponding to the first sub-region and the surfaces corresponding to the second sub-region on the side of the passivation layer facing away from the semiconductor substrate, and the distribution of the texture structure of the surfaces corresponding to the first sub-region and the surfaces corresponding to the second sub-region can be determined according to the types of the texture structures of these two local surfaces and the reflectivity requirements for these two local surfaces, and no specific limitation is made here.

[0086] Exemplarily, such as Figure 2 and Figures 10 to 13 As shown, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the texture structures of the surfaces corresponding to the first sub-region 18 and the second sub-region 19 may include a pyramid-like structure. Moreover, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the distribution density of the pyramid-like structures in the surface corresponding to the first sub-region 18 is greater than that in the surface corresponding to the second sub-region 19; and / or, the one-dimensional size of the pyramid-like structures in the surface corresponding to the first sub-region 18 is smaller than that in the surface corresponding to the second sub-region 19; and / or, the one-dimensional size uniformity of the pyramid-like structures in the surface corresponding to the first sub-region 18 is greater than that in the surface corresponding to the second sub-region 19. In this case, when on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the texture structures of the surfaces corresponding to the first sub-region 18 and the second sub-region 19 include a pyramid-like structure, and the distribution density of the pyramid-like structures in the surface corresponding to the first sub-region 18 is greater than that in the surface corresponding to the second sub-region 19, the undulating topography of the surface corresponding to the first sub-region 18 is denser, which is beneficial to further increasing the surface roughness of the part corresponding to the first sub-region 18 on the side of the passivation layer 17 facing away from the semiconductor substrate 11, reducing the surface reflectivity of the part corresponding to the first sub-region 18 on the side of the passivation layer 17 facing away from the semiconductor substrate 11, facilitating more light to be reflected into the emitter doping layer, thereby generating more photo-generated carriers by laser, and further improving the conversion efficiency of the battery. Secondly, when the one-dimensional size of the pyramid-like structures in the surface corresponding to the first sub-region 18 is smaller than that in the surface corresponding to the second sub-region 19, and / or when the one-dimensional size uniformity of the pyramid-like structures in the surface corresponding to the first sub-region 18 is greater than that in the surface corresponding to the second sub-region 19, the application principle of the beneficial effects can refer to the application principle of the beneficial effects that the distribution density of the pyramid-like structures in the surface corresponding to the first sub-region 18 is greater than that in the surface corresponding to the second sub-region 19 described above, and will not be elaborated here.

[0087] Specifically, the pyramid-like structure can be a pyramid-like structure with a regular polygon as the bottom surface, or a pyramid-like structure with an irregular arc-shaped contour as the bottom surface. The side edges and vertex angles of the pyramid-like structure can have a relatively sharp transition or a smooth transition.

[0088] In addition, the one-dimensional dimension of the pyramid-like structure may refer to the side length of the bottom surface of the pyramid-like structure, the length of the diagonal of the bottom surface, the length of the side edge, or the height of the pyramid-like structure, etc.

[0089] As for the side of the passivation layer facing away from the semiconductor substrate, the distribution density, one-dimensional dimension, and uniformity of the one-dimensional dimension of the pyramid-like structures on the surfaces corresponding to the first sub-region and the second sub-region can be determined according to the reflectivity requirements of these two local surfaces, and no specific limitation is made here.

[0090] It should be noted that when the texture structures on the surfaces corresponding to the first sub-region and the second sub-region on the side of the passivation layer facing away from the semiconductor substrate include pyramid-like structures, the different pyramid-like structures on the surface corresponding to the second sub-region can be adjacent, and in this case, each part of the surface corresponding to the second sub-region is a matte surface. Or, as Figure 11 shown, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface corresponding to the second sub-region 19 may also include a planar region 20 and a matte region 21. In this case, compared with the matte surface where each part is a matte region in the conventional case, when the surface corresponding to the second sub-region 19 on the side of the passivation layer 17 facing away from the semiconductor substrate 11 also has a planar region 20, the distribution of the matte structure on the surface corresponding to the second sub-region 19 is relatively sparse, which is beneficial to reducing the surface roughness and surface reflectivity of the surface corresponding to the second sub-region 19 on the side of the passivation layer 17 facing away from the semiconductor substrate 11, and further improving the passivation effect of the passivation layer 17 on the spacer region 14. In this case, the distribution of the planar region 20 and the matte region 21 within the surface corresponding to the second sub-region 19 on the side of the passivation layer 17 facing away from the semiconductor substrate 11 can be determined according to the actual manufacturing process. For example: the planar region 20 and the matte region 21 can be evenly distributed.

[0091] Exemplarily, on the side of the passivation layer facing away from the semiconductor substrate, the texture structures of the surface corresponding to the first sub-region and the surface corresponding to the second sub-region may include tower base-like structures. Moreover, on the side of the passivation layer facing away from the semiconductor substrate, the distribution density of the tower base-like structures in the surface corresponding to the first sub-region is less than the distribution density of the tower base-like structures in the surface corresponding to the second sub-region; and / or, the recess depth of the tower base-like structures in the surface corresponding to the first sub-region is less than the recess depth of the tower base-like structures in the surface corresponding to the second sub-region; and / or, the one-dimensional dimension of the bottom surface of the tower base-like structures in the surface corresponding to the first sub-region is greater than the one-dimensional dimension of the bottom surface of the tower base-like structures in the surface corresponding to the second sub-region; and / or, the one-dimensional dimension uniformity of the tower base-like structures in the surface corresponding to the first sub-region is greater than the one-dimensional dimension uniformity of the tower base-like structures in the surface corresponding to the second sub-region. The application principle of the beneficial effects in this case can refer to the application principle of the beneficial effects that the distribution density of the pyramid-like structures in the surface corresponding to the first sub-region is greater than the distribution density of the pyramid-like structures in the surface corresponding to the second sub-region as described above, and will not be elaborated here.

[0092] The bottom surface of the tower base-like structure can be a regular or irregular polygon bottom surface (such as a quadrilateral bottom surface, a pentagon bottom surface, a hexagon bottom surface, or an octagon bottom surface, etc.; the polygon can be a regular polygon with the same side length or a polygon with different side lengths), and the angles of the polygon bottom surface can be sharp angles or chamfered angles with smooth transitions; alternatively, the bottom surface of the tower base-like structure can also be an irregular bottom surface with an arc-shaped contour. In addition, the one-dimensional dimension of the bottom surface of the tower base-like structure can also be the side length of the bottom surface or the diagonal length of the bottom surface.

[0093] As for the distribution density, one-dimensional dimension, and one-dimensional dimension uniformity of the tower base-like structures of the surface corresponding to the first sub-region and the surface corresponding to the second sub-region on the side of the passivation layer facing away from the semiconductor substrate, they can be determined according to the reflectivity requirements of these two local surfaces, and no specific limitations are made here.

[0094] Exemplarily, such as Figures 12 to 14As shown, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the texture structure on the surface corresponding to the first sub-region 18 includes a pyramid-like structure, and the texture structure on the surface corresponding to the second sub-region 19 includes a tower-base-like structure. In this case, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, compared with the tower-base-like structure on the surface corresponding to the second sub-region 19, the pyramid-like structure on the surface corresponding to the first sub-region 18 has a sharper tower top, so the surface undulation degree of the surface corresponding to the first sub-region 18 is greater, which is beneficial to increasing the surface roughness of the part corresponding to the first sub-region 18, reducing the surface reflectivity of the part corresponding to the first sub-region 18 on the side of the passivation layer 17 facing away from the semiconductor substrate 11, facilitating more light to be reflected into the emitter doping layer, thereby generating more photo-generated carriers by laser and further improving the conversion efficiency of the battery. In this case, the morphology of the pyramid-like structure on the surface corresponding to the first sub-region 18 on the side of the passivation layer 17 facing away from the semiconductor substrate 11 and the tower-base-like structure on the surface corresponding to the second sub-region 19 on the side of the passivation layer 17 facing away from the semiconductor substrate 11 can refer to the explanations in the previous text and will not be specifically defined here. In addition, in this case, the distribution density, one-dimensional size, one-dimensional size uniformity, etc. of the pyramid-like structure on the surface corresponding to the first sub-region 18 on the side of the passivation layer 17 facing away from the semiconductor substrate 11 and the tower-base-like structure on the surface corresponding to the second sub-region 19 on the side of the passivation layer 17 facing away from the semiconductor substrate 11 can be determined according to the reflectivity requirements for these two local surfaces in the actual application scenario and will not be specifically defined here.

[0095] In addition, on the side of the passivation layer facing away from the semiconductor substrate, in the case where the texture structure on the surface corresponding to the first sub-region includes a pyramid-like structure and the texture structure on the surface corresponding to the second sub-region includes a tower-base-like structure, the surface corresponding to the second sub-region may only have a tower-base-like structure; or, as Figure 14As shown, a surface corresponding to the second sub-region 19 on a side of the passivation layer 17 facing away from the semiconductor substrate 11 may further include a pyramid-like structure; and within the surface corresponding to the second sub-region 19, surfaces of at least one tower-base-like structure have pyramid-like structures distributed discretely. In this case, it can be understood that the tower-base-like structure is a concave structure recessed into the passivation layer 17 along the thickness direction of the semiconductor substrate 11. And the pyramid-like structure is a convex structure protruding in a direction away from the semiconductor substrate 11. Based on this, when within the surface corresponding to the second sub-region 19, surfaces of at least one tower-base-like structure have pyramid-like structures distributed discretely, the surface of the tower-base-like structure recessed into the passivation layer 17 is superimposed with the pyramid-like structure protruding in a direction away from the semiconductor substrate 11, which helps to make the surface of the corresponding second sub-region 19 with a relatively large height difference originally become a surface with a relatively small height difference, reducing the undulation degree of the surface corresponding to the second sub-region 19 on a side of the passivation layer 17 facing away from the semiconductor substrate 11, and helping to further reduce the surface roughness and surface reflectivity of a part of the surface corresponding to the second sub-region 19 on a side of the passivation layer 17 facing away from the semiconductor substrate 11, and further improving the passivation effect of the passivation layer 17 in the second sub-region 19. As for this case, the one-dimensional size of the pyramid-like structure on the surface corresponding to the second sub-region 19 on a side of the passivation layer 17 facing away from the semiconductor substrate 11 and its distribution and proportion within the surface of the tower-base-like texture structure can be determined according to the reflectivity requirement for this local surface in the actual application scenario, and no specific limitation is made here.

[0096] It should be noted that along the direction from the first sub-region to the second sub-region, on a side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of a part corresponding to the spaced region may gradually increase. Correspondingly, within the surface of the passivation layer facing away from the semiconductor substrate, the distribution density, one-dimensional size, and one-dimensional size uniformity of the texture structures in different regions of the surface corresponding to the spaced region also gradually change.

[0097] In addition, in terms of the surface setting height, in the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the second sub-region may be flush with the surface corresponding to the first sub-region. Alternatively, in the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the second sub-region may also be recessed into the semiconductor substrate relative to the surface corresponding to the first sub-region. In this case, it is beneficial to further reduce the leakage risk between the first doped semiconductor layer and the second doped semiconductor layer with opposite conduction types. Secondly, the passivation layer is formed on the first doped semiconductor layer, the second doped semiconductor layer and the spacer region through a deposition process. The undulating morphology of the part of the passivation layer corresponding to the spacer region on the side facing away from the semiconductor substrate is substantially the same as the undulating morphology of the spacer region itself. Therefore, when the surface of the part corresponding to the second sub-region in the side of the passivation layer facing away from the semiconductor substrate is recessed into the semiconductor substrate relative to the surface of the part corresponding to the first sub-region, the surface of the second sub-region included in the spacer region is also recessed into the semiconductor substrate relative to the surface of the first sub-region, which can increase the passivation contact area between the passivation layer and the spacer region and further improve the passivation effect of the passivation layer on the spacer region. In this case, the height difference between the surface corresponding to the second sub-region and the surface corresponding to the first sub-region in the side of the passivation layer facing away from the semiconductor substrate can be determined according to the types, distribution and one-dimensional sizes of the texture structures formed on these two local surfaces, and no specific limitation is made here.

[0098] Exemplarily, as Figures 15 to 17 shown, the first surface has a boundary, and the first surface further includes an isolation region 22. The isolation region 22 is located between the boundary and the first region 12, and between the boundary and the second region 13. Based on this, in the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surface reflectivity of the part corresponding to the isolation region 22 may be greater than the surface reflectivity of the part corresponding to the first sub-region 18. In this case, when the surface reflectivity of the part corresponding to the isolation region 22 in the side of the passivation layer 17 facing away from the semiconductor substrate 11 is greater than the surface reflectivity of the part corresponding to the first sub-region 18, the surface reflectivity of the part corresponding to the first sub-region 18 is smaller, which is beneficial to making more light reflect into the emitter doping layer, thereby laser more photo-generated carriers and improving the conversion efficiency of the battery.

[0099] Of course, in the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the part corresponding to the isolation region may also be equal to the surface reflectivity of the part corresponding to the first sub-region.

[0100] As for the surface reflectivity range of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate, the difference in surface reflectivity between it and the portion corresponding to the first sub-region, and the surface topography of the portion corresponding to the isolation region, they can be determined according to the requirements for the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate in the actual application scenario, as well as the surface topographies of the portions corresponding to the first sub-region and the second sub-region, and no specific limitations are made here.

[0101] Exemplarily, as Figures 10 to 13 、and Figure 16 and Figure 17 shown, on the side of the passivation layer 17 facing away from the semiconductor substrate 11, the surfaces corresponding to the first sub-region 18, the second sub-region 19, and the isolation region 22 have a texture structure, and the texture structure includes a pyramid-like structure. In this case, the apex angle of the pyramid-like structure in the surface of the isolation region 22 can be greater than the apex angles of the pyramid-like structures in the surfaces of the first sub-region 18 and the second sub-region 19. In this case, when other factors are the same, the larger the apex angle of the pyramid-like structure, the "shorter and fatter" the pyramid-like structure is, and its height change is relatively gentle. While the smaller the apex angle of the pyramid-like structure, the "thinner and taller" it is, and its height change is large. Based on this, when the apex angle of the pyramid-like structure in the surface of the isolation region 22 on the side of the passivation layer 17 facing away from the semiconductor substrate 11 is relatively large, the surface of the portion corresponding to the isolation region 22 is relatively flat, which is conducive to making the surface of the isolation region 22 on the first surface also relatively flat, improving the passivation effect of the passivation layer 17 on the isolation region 22, reducing the number of surface defects in the isolation region 22, and improving the working performance of the back-contact battery. For example: the apex angle of the pyramid-like structure in the surface of the isolation region corresponding to the side of the passivation layer facing away from the semiconductor substrate can be greater than or equal to 60° and less than or equal to 100°. For example: the apex angle of the pyramid-like structure in the surface corresponding to the first sub-region and / or the second sub-region on the side of the passivation layer facing away from the semiconductor substrate can be greater than or equal to 50° and less than or equal to 100°.

[0102] Alternatively, the one-dimensional size of the pyramid-like structure in the surface of the isolation region can be smaller than the one-dimensional sizes of the pyramid-like structures in the surfaces of the first sub-region and the second sub-region. Or, the distribution density of the pyramid-like structures in the surface of the isolation region can be smaller than the distribution densities of the pyramid-like structures in the surfaces of the first sub-region and the second sub-region.

[0103] In addition, the surface reflectivity of the second surface of the semiconductor substrate can be less than the surface reflectivity of the portion of the corresponding isolation region in the side of the passivation layer facing away from the semiconductor substrate. In this case, the second surface (front surface) of the back-contact battery has a higher light-trapping effect, which is beneficial to improving the light utilization rate of the battery. Alternatively, the surface reflectivity of the second surface of the semiconductor substrate can also be equal to the surface reflectivity of the portion of the corresponding isolation region in the side of the passivation layer facing away from the semiconductor substrate. The magnitude of the surface reflectivity of the second surface and the surface topography of the second surface can be determined according to the requirements for the light-trapping effect of the second surface in the actual application scenario and the surface topographies of the corresponding isolation region and the spacer region in the side of the passivation layer facing away from the semiconductor layer substrate, and no specific limitation is made here.

[0104] Exemplarily, as Figures 16 to 18 shown, the surface of the corresponding isolation region 22 in the side of the passivation layer 17 facing away from the semiconductor substrate 11 and the surface of the second surface have a texture structure, and the texture structure can include a pyramid-like structure. Moreover, the apex angle of the pyramid-like structure in the second surface is smaller than the apex angle of the pyramid-like structure in the surface of the corresponding isolation region 22 in the side of the passivation layer 17 facing away from the semiconductor substrate 11. In this case, as described above, when other factors are the same, the height change of the pyramid-like structure with a larger apex angle is relatively gentle. Therefore, when the apex angle of the pyramid-like structure in the surface of the corresponding isolation region 22 in the side of the passivation layer 17 facing away from the semiconductor substrate 11 is larger, it is beneficial to improve the passivation effect of the passivation layer 17 on the isolation region 22, reduce the number of surface defects in the isolation region 22, and improve the working performance of the back-contact battery. And the smaller apex angle of the pyramid-like structure in the second surface enables the second surface of the back-contact battery to have a better light-trapping effect and improve the light utilization rate of the battery. For example: The apex angle of the pyramid-like structure in the second surface can be greater than or equal to 70° and less than or equal to 110°.

[0105] Alternatively, the one-dimensional size of the pyramid-like structure in the surface of the corresponding isolation region can be smaller than the one-dimensional size of the pyramid-like structure in the second surface. Or, the distribution density of the pyramid-like structure in the surface of the corresponding isolation region can be smaller than the distribution density of the pyramid-like structure in the second surface.

[0106] Or, the texture structure of the second surface can include a pyramid-like structure, while the texture structure of the surface of the corresponding isolation region in the side of the passivation layer facing away from the semiconductor substrate can include a tower-base-like structure.

[0107] In some examples, the back-contact battery includes a plurality of segmented battery units that are spaced apart along a direction perpendicular to the arrangement direction of the first region and the second region. There is a scribe lane region between two adjacent segmented battery units. Alignment marks are provided on the scribe lane region. In this case, it is convenient to accurately identify the positions of different structures of the battery according to the alignment marks provided on the scribe lane region, improving the yield of battery production. The embodiments of the present invention do not specifically limit the morphology of the above alignment marks and the specific positions where the alignment marks are provided. Among them, the alignment marks can be provided on the part of the first doped semiconductor layer located in the scribe lane region, or can be provided on the part of the second doped semiconductor layer located in the scribe lane region.

[0108] Exemplarily, on the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the scribe lane region has a texture structure, and within the surface corresponding to the scribe lane region, the distribution density of the texture structure on the surface of the region close to the alignment mark is greater than that on the surface of the remaining regions. In this case, the surface roughness of the surface of the region close to the alignment mark is higher and the surface reflectivity is lower, making the brightness of the surface of the region close to the alignment mark lower, which is beneficial to improving the contrast of the captured image, thereby more accurately identifying the alignment marks provided on the battery and improving the yield of battery production.

[0109] Among them, within the surface corresponding to the scribe lane region on the side of the passivation layer facing away from the semiconductor substrate, the division range of the surface of the region close to the alignment mark can be determined according to the size of the alignment mark and the requirements for the contrast of the captured image in the actual application scenario, and no specific limitation is made here. It can be understood that the higher the requirement for the contrast of the captured image, the greater the difference in the distribution density of the texture structure on the surface of the region close to the alignment mark and that on the surface of the remaining regions. In addition, in addition to adjusting the distribution density of the texture structure, this purpose can also be achieved by adjusting the type, one-dimensional size, and one-dimensional size uniformity of the texture structure, etc. For the specific adjustment method, reference can be made to the surface morphology of the corresponding first sub-region and second sub-region on the side of the passivation layer facing away from the semiconductor substrate described above, and details are not repeated here.

[0110] In a second aspect, the embodiments of the present invention provide a photovoltaic module, which includes the back-contact battery provided in the first aspect and its various implementation manners.

[0111] For the beneficial effects of the second aspect and its various implementation manners in the embodiments of the present invention, reference can be made to the analysis of the beneficial effects in the first aspect and its various implementation manners, and details are not repeated here.

[0112] Third aspect, embodiments of the present invention provide another back-contact battery, which includes: a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a passivation layer. The semiconductor substrate has opposite first and second surfaces. The first surface has first regions and second regions that are alternately and spaced apart, and a spaced region located between the first regions and the second regions. The first doped semiconductor layer is disposed on the first regions. The first doped semiconductor layer is an emitter doping layer. The second doped semiconductor layer is disposed on the second regions. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. The passivation layer is disposed on the first doped semiconductor layer, the second doped semiconductor layer, and the spaced region. The spaced region includes a first sub-region adjacent to the first doped semiconductor layer and a second sub-region adjacent to the second doped semiconductor layer. The first surface has a boundary, and the first surface further includes an isolation region. The isolation region is located between the boundary and the first regions, and between the boundary and the second regions. Wherein, on the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity of the portion corresponding to the isolation region is greater than the surface reflectivity of the portion corresponding to the first sub-region; and / or, the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate.

[0113] It should be noted that for the material and conductivity type of the semiconductor substrate, the materials and conductivity types of the first doped semiconductor layer and the second doped semiconductor layer, and the structure, material, surface morphology, and surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate in the back-contact battery provided in the third aspect of the embodiments of the present invention, reference can be made to the information such as the material and conductivity type of the semiconductor substrate, the materials and conductivity types of the first doped semiconductor layer and the second doped semiconductor layer, and the structure, material, surface morphology, and surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate in the back-contact battery provided in the first aspect described above, and details are not described herein again.

[0114] In the case of adopting the above technical solution, when the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate is greater than the surface reflectivity of the portion corresponding to the first sub-region, the surface reflectivity of the portion corresponding to the first sub-region is smaller, which is conducive to reflecting more light into the emitter doping layer, thereby generating more photo-generated carriers by laser and improving the conversion efficiency of the battery. When the surface reflectivity of the second surface is less than the surface reflectivity of the portion corresponding to the isolation region on the side of the passivation layer facing away from the semiconductor substrate, the second surface (front surface) of the back-contact battery has a higher light-trapping effect, which is conducive to improving the light utilization rate of the battery.

[0115] In the above description, no detailed explanations are given for technical details such as the composition and etching of each layer. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of the desired shapes. Additionally, in order to form the same structure, those skilled in the art can also design methods that are not exactly the same as the methods described above. Moreover, although the above embodiments are described separately, this does not mean that the measures in each embodiment cannot be used advantageously in combination.

[0116] The above embodiments of the present invention have been described. However, these embodiments are merely for clearer illustration and not for limiting the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, those skilled in the art can make various substitutions and modifications, and these substitutions and modifications should all fall within the scope of the present invention.

Claims

1. A back contact battery, characterized in that: include: A semiconductor substrate, wherein the semiconductor substrate has a first surface and a second surface opposite to each other; the first surface has first regions and second regions alternately spaced and a spacing region between the first regions and the second regions; A first doped semiconductor layer is disposed on the first region; the first doped semiconductor layer is an emitter doped layer; a second doped semiconductor layer, disposed on the second region; the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types; A passivation layer, disposed on the first doped semiconductor layer, the second doped semiconductor layer and the spacing region; Wherein, the spacing region includes a first sub-region adjacent to the first doped semiconductor layer, and a second sub-region adjacent to the second doped semiconductor layer; On a side of the passivation layer facing away from the semiconductor substrate, a surface reflectivity of a portion corresponding to the first sub-region is smaller than a surface reflectivity of a portion corresponding to the second sub-region.

2. The back contact cell according to claim 1, characterized in that: In at least one of the spacing regions, an area of ​​the first sub-region is greater than an area of ​​the second sub-region.

3. The back contact battery according to claim 1, characterized in that: On a side of the passivation layer facing away from the semiconductor substrate, a surface corresponding to the first sub-region and a surface corresponding to the second sub-region have a texture structure; On the side of the passivation layer facing away from the semiconductor substrate, the one-dimensional size of the texture structure in the surface corresponding to the first sub-region is different from the one-dimensional size of the texture structure in the surface corresponding to the second sub-region; and / or, the distribution density of the texture structure in the surface corresponding to the first sub-region is different from the distribution density of the texture structure in the surface corresponding to the second sub-region; and / or, the one-dimensional size uniformity of the texture structure in the surface corresponding to the first sub-region is greater than the one-dimensional size uniformity of the texture structure in the surface corresponding to the second sub-region.

4. The back contact cell according to claim 3, characterized in that: The texture structure includes a pyramid-like structure; On the side of the passivation layer facing away from the semiconductor substrate, the distribution density of the pyramid-like structure in the surface corresponding to the first sub-region is greater than the distribution density of the pyramid-like structure in the surface corresponding to the second sub-region; and / or, the one-dimensional size of the pyramid-like structure in the surface corresponding to the first sub-region is smaller than the one-dimensional size of the pyramid-like structure in the surface corresponding to the second sub-region; and / or, the one-dimensional size uniformity of the pyramid-like structure in the surface corresponding to the first sub-region is greater than the one-dimensional size uniformity of the pyramid-like structure in the surface corresponding to the second sub-region.

5. The back contact cell according to claim 1, characterized in that: On the side of the passivation layer facing away from the semiconductor substrate, the surface corresponding to the first sub-region and the surface corresponding to the second sub-region have a texture structure, the texture structure corresponding to the surface of the first sub-region includes a pyramid-like structure, and the texture structure corresponding to the surface of the second sub-region includes a tower-base-like structure.

6. The back contact cell according to claim 5, characterized in that: On the side of the passivation layer facing away from the semiconductor substrate, the texture structure on the surface corresponding to the second sub-region also includes a pyramid-like structure; within the surface corresponding to the second sub-region, the surface of at least one of the tower-like structures has the pyramid-like structures in discrete distribution.

7. The back contact cell according to claim 1, characterized in that: On a side of the passivation layer facing away from the semiconductor substrate, a surface corresponding to the second sub-region is recessed into the semiconductor substrate relative to a surface corresponding to the first sub-region.

8. The back contact cell according to claim 1, characterized in that: On a side of the passivation layer facing away from the semiconductor substrate, a surface corresponding to the second sub-region includes a planar region and a textured region.

9. The back contact battery according to any one of claims 1 to 8, characterized in that: The first surface has a boundary, and the first surface further includes an isolation region; the isolation region is located between the boundary and the first region, and between the boundary and the second region; Among them, on the side of the passivation layer facing away from the semiconductor substrate, the surface reflectivity corresponding to the isolation area is greater than the surface reflectivity of the part corresponding to the first sub-area; and / or the surface reflectivity of the second surface is less than the surface reflectivity of the part corresponding to the isolation area.

10. The back contact cell according to claim 9, characterized in that: On a side of the passivation layer facing away from the semiconductor substrate, a surface corresponding to the first sub-region, a surface corresponding to the second sub-region, and a surface corresponding to the isolation region have a texture structure, and the texture structure includes a pyramid-like structure; A vertex angle of the pyramid-like structure in a surface corresponding to the isolation region is greater than a vertex angle of the pyramid-like structure in a surface corresponding to the first sub-region and a surface corresponding to the second sub-region.

11. The back contact cell according to claim 9, characterized in that: A surface of the passivation layer corresponding to the isolation region on a side facing away from the semiconductor substrate and a surface of the second surface have a texture structure, wherein the texture structure includes a pyramid-like structure; A top angle of the pyramid-like structure in the second surface is smaller than a top angle of the pyramid-like structure in a surface of the passivation layer that is away from the semiconductor substrate and corresponds to the isolation region.

12. The back contact battery according to any one of claims 1 to 8, characterized in that: The back contact battery comprises a plurality of slice battery units which are spaced apart along an arrangement direction perpendicular to the first region and the second region; a cutting line region is provided between two adjacent slice battery units; and an alignment mark is provided on the cutting line region.

13. The back contact cell according to claim 12, characterized in that: The surface of the passivation layer corresponding to the cutting path area on the side facing away from the semiconductor substrate has a texture structure, and within the surface corresponding to the cutting path area, the distribution density of the texture structure on the surface of the area close to the alignment mark is greater than the distribution density of the texture structure on the surface of the remaining area.

14. A photovoltaic module, characterized in that: Comprising a back contact battery as claimed in any one of claims 1 to 13.

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