Method for improving flatness of deep hole silicon spin coating
By performing gradient heating treatment on the deep-pore silicon wafer, the problem of protrusions at the deep-pore holes after the deep-pore silicone is uniform, significantly improving the lithography accuracy and chip product quality.
Patent Information
- Application Number
- CN202510496728.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-21
- Publication Date
- 2025-05-30
AI Technical Summary
After uniform glue on the deep-hole silicon wafer, obvious bulges will appear in the deep holes, affecting the subsequent lithography accuracy and leading to a decline in the quality of the chip product.
The glue-coated wafer is processed by gradient heating. The specific steps include placing the wafer with deep holes on the glue machine, adding photoresist drippingly and rotatingly covering the entire wafer, and then heating multiple set temperatures in the order from low to high. The heating time at the set temperature is inversely proportional to the temperature value.
Through the gradient heating method of long-term heating at low temperature and short-term heating at high temperature, the photoresist at deep holes cross-linked and hardened before the air in the deep holes is significantly expanded, which significantly reduces the bubble degree of the photoresist at deep holes after baking and improves the flatness of the silicone uniform glue in deep holes.
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Figure CN120065631A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor manufacturing, and particularly to a method for improving the leveling of photoresist on deep-hole silicon. Background Art
[0002] Lithography technology is a process of transferring a designed specific pattern onto a wafer by exposing a photoresist, and it is an important part of the production of superconducting chips. Among them, proximity exposure is one of the most efficient exposure methods. The specific process is to stack a mask plate with a pattern and a wafer together and then irradiate the mask plate with an ultraviolet lamp to transfer the pattern information to the wafer. It is easy to understand that the leveling of the photoresist on the wafer directly affects the accuracy of pattern information transfer, thereby affecting the quality of chip products.
[0003] Currently, with the continuous improvement of the integration requirements of superconducting chips, the through-silicon via (TSV) technology has been proposed and applied in wafer manufacturing. A wafer with through-silicon vias or deep holes is often called deep-hole silicon. The TSV technology can achieve vertical interconnection between die chips, greatly reducing the global interconnection length, thereby reducing delay and power consumption and improving the overall performance of integrated circuits. However, since the wafer photoresist coating process includes a baking step, when coating photoresist on a wafer with through-silicon vias, obvious bulges will appear at the deep holes due to baking expansion. The deep-hole bulges will cause the mask plate and the substrate not to fit completely during the above-mentioned photolithography exposure process, thereby affecting the photolithography accuracy and resulting in a decline in the quality of chip products. Summary of the Invention
[0004] In view of this, an embodiment of the present invention provides a method for improving the leveling of photoresist on deep-hole silicon to solve the technical problem that the deep holes on a wafer with deep holes will bulge significantly after photoresist coating, resulting in a decline in subsequent photolithography accuracy and ultimately a decline in the quality of chip products.
[0005] In a first aspect, a method for improving the leveling of photoresist on deep-hole silicon is provided. The method includes: Centering a wafer with deep holes and placing it on a rotating tray of a photoresist coater. After dropping photoresist on the surface of the wafer, the photoresist coater drives the wafer to rotate to cover the entire wafer with the photoresist, obtaining a wafer with a uniformly thick photoresist coating on the surface. Heating the wafer with the photoresist coating at a plurality of set temperatures in ascending order of temperature. The heating duration at the set temperature is inversely proportional to the temperature value of the set temperature.
[0006] Further, the photoresist is an AZ series photoresist with a viscosity of 20 cp to 40 cp.
[0007] Further, the thickness of the photoresist on the surface of the wafer with the photoresist coating is 1 um to 3 um.
[0008] Further, the temperature range of the set temperature is 40°C to 100°C, and the temperature interval is 10°C.
[0009] Further, the coated wafer is heated at a plurality of set temperatures in ascending order of temperature, and the heating duration at the set temperature is inversely proportional to the temperature value of the set temperature, including: The coated wafer is sequentially heated at 40°C for 10 minutes, at 50°C and 60°C for 5 minutes each, and at 70°C, 80°C, 90°C, and 100°C for 1 minute each in ascending order of temperature.
[0010] Further, after dropping the photoresist on the surface of the wafer, the wafer is rotated by the spin coater to cover the entire wafer with the photoresist, and a coated wafer with a uniform surface glue thickness is obtained, including: First, the spin coater drives the wafer to rotate at a first rotation speed until the photoresist completely covers the surface of the wafer, and then the spin coater drives the wafer to rotate at a second rotation speed for a first set rotation duration and then stops rotating, where the first rotation speed is less than the second rotation speed.
[0011] Further, the first rotation speed is 450 rpm, the second rotation speed is 2100 rpm, and the first set rotation duration is 30 s.
[0012] Further, before centering the wafer with deep holes and placing it on the rotating tray of the spin coater, it further includes: Placing the wafer on a 100°C hot plate and baking it for 5 min.
[0013] Further, the deep holes on the surface of the wafer are round holes with a diameter of 10 to 50 μm and a depth of 100 to 300 μm.
[0014] Further, the wafer is a 6-inch wafer.
[0015] The beneficial effects of the present invention compared with the prior art are: In the method of the present invention, first, photoresist is dropped on the wafer with deep holes, then the wafer is rotated by the spin coater to coat the photoresist on the entire surface of the wafer to obtain a coated wafer, and finally, the coated wafer is gradient heated at a plurality of set temperatures in ascending order of temperature, and the heating duration at the set temperature is set to be inversely proportional to the temperature value of the set temperature. The present invention utilizes the characteristic that the photoresist can be initially crosslinked and hardened at low temperature, and through the gradient heating method of long-time heating at low temperature and short-time heating at high temperature, the photoresist at the deep holes crosslinks and hardens before the air in the deep holes expands significantly, thereby significantly reducing the bubbling degree of the photoresist at the deep holes after baking and heating, and improving the flatness of the spin coating of deep-hole silicon. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0017] Figure 1 FIG. is a schematic flowchart of a method for improving the flatness of deep-hole silicon spin coating according to Embodiment 1 of the present invention; Figure 2 FIG.
[0016] is a schematic structural diagram of a deep-hole structure on a wafer with deep holes according to Embodiment 1 of the present invention; Figure 3 FIG. is a schematic diagram of using a profilometer to measure the height at the deep-hole position of a wafer after spin coating and baking according to Embodiment 1 of the present invention; Figure 4 FIG.
[0017] is the profilometer height measurement result at the deep-hole position of wafer A after spin coating and baking in the first control experimental group according to Embodiment 1 of the present invention; Figure 5 FIG. Figure 1 is the profilometer height measurement result at the deep-hole position of wafer B after spin coating and baking in the first control experimental group according to Embodiment 1 of the present invention; Figure 6 FIG. is the profilometer height measurement result at the deep-hole position of wafer C after spin coating and baking in the second control experimental group according to Embodiment 1 of the present invention; Figure 7 FIG. Figure 2 is the profilometer height measurement result at the deep-hole position of wafer D after spin coating and baking in the second control experimental group according to Embodiment 1 of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0018] In the following description, specific details such as specific system structures and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present invention. However, those skilled in the art should clearly understand that the present invention can also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid unnecessary details from interfering with the description of the present invention.
[0019] It should be understood that when used in the specification and appended claims of the present invention, the term "comprising" indicates the presence of the described features, wholes, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their combinations.
[0020] It should also be understood that the term "and / or" as used in the specification of the present invention and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.
[0021] As used in the specification of the present invention and the appended claims, the term "if" can be interpreted as "when", "once", "in response to determining", or "in response to detecting" depending on the context. Similarly, the phrase "if determined" or "if [the described condition or event] is detected" can be interpreted as meaning "once determined", "in response to determining", "once [the described condition or event] is detected", or "in response to detecting [the described condition or event]" depending on the context.
[0022] In addition, in the description of the specification of the present invention and the appended claims, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.
[0023] Reference to "one embodiment" or "some embodiments" or the like described in the specification of the present invention means that a specific feature, structure, or characteristic described in connection with that embodiment is included in one or more embodiments of the present invention. Thus, statements such as "in one embodiment", "in some embodiments", "in other some embodiments", "in still other embodiments", etc. that appear in different places in this specification do not necessarily all refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "comprising", "including", "having", and their variants all mean "including but not limited to", unless otherwise specifically emphasized in other ways.
[0024] It should be understood that the magnitudes of the sequence numbers of the steps in the following embodiments do not mean the order of execution is prior or posterior. The order of execution of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
[0025] To illustrate the technical solution of the present invention, the following specific embodiments are used for illustration.
[0026] The main object of the present invention is to provide a method that can effectively improve the flatness of deep-hole silicon spin coating, and solve the problem of uneven photoresist in the deep-hole silicon spin coating processing technology. This method generally adopts a gradient heating method, which can avoid the photoresist in the deep-hole area on a deep-hole silicon, that is, a wafer with deep holes, from bubbling too high after spin coating, and obtain a spin-coated wafer with better surface uniformity. Refer to Figure 1 , which is a schematic flowchart of a method for improving the flatness of deep-hole silicon spin coating provided by Embodiment 1 of the present invention. This method may include the following steps: Step S1: After centering the wafer with deep holes, place it on the rotating tray of the spin coater. Drop photoresist on the surface of the wafer, and then drive the wafer to rotate through the spin coater to cover the entire wafer with the photoresist, obtaining a wafer with a uniformly thick photoresist layer on its surface.
[0027] For a wafer with deep holes or deep-hole silicon, after centering, it is placed on the rotating tray of the spin coater. Then, an appropriate amount of photoresist is dropped on the surface of the wafer, and the spin coater is started to drive the wafer to rotate for spin coating. The type of photoresist is not limited, but preferably, in this embodiment, AZ series photoresists are used, such as AZ1500, AZ5214, AZ6112, etc., with a viscosity of 20 cp to 40 cp.
[0028] After dropping the photoresist and starting the spin coater, it is necessary to wait for the photoresist to cover the entire wafer to obtain a wafer with a uniformly thick photoresist layer on its surface. Preferably, in one embodiment, the specific process of obtaining a wafer with a photoresist layer by driving the wafer with the dropped photoresist to rotate through the spin coater is as follows: First, drive the wafer to rotate at a first speed by the spin coater until the photoresist completely covers the surface of the wafer. Then, drive the wafer to rotate at a second speed for a first set rotation duration and then stop rotating. The first speed is less than the second speed.
[0029] Furthermore, preferably, the thickness of the photoresist layer on the surface of the wafer after spin coating is 1 μm to 3 μm, and the wafer is a 6-inch wafer. Thus, the amount of the dropped photoresist can be determined. According to the amount of the photoresist and the wafer size, the first speed can be preferably set to 450 rpm, the second speed to 2100 rpm, and the first set rotation duration to 30 s.
[0030] The purpose of setting the first speed and the second speed to drive the photoresist to move at different speeds by the spin coater is that first, relying on the lower first speed, the photoresist can fully contact the surface of the wafer during the process of moving from the center to the periphery, so as to avoid air entering and causing bulges during subsequent baking. And driving the wafer with the completely covered photoresist to continue rotating at a higher second speed is to make the surface of the photoresist smoother by means of the high speed, improving the subsequent lithography effect. The coordinated spin coating treatment in the first and second speed stages can effectively improve the spin coating flatness during the photoresist coating stage.
[0031] In another embodiment, also to improve the final spin coating flatness, before centering the wafer with deep holes and placing it on the rotating tray of the spin coater, it further includes the step of placing the wafer on a hot plate for baking to remove moisture. The temperature of the hot plate can be preferably 100 °C, and the baking time can be preferably 5 min. The removal of moisture can also avoid bulges during subsequent baking and curing of the photoresist, thereby improving the final spin coating flatness.
[0032] Step S2: Heat the wafer after coating with glue at multiple set temperatures in ascending order of temperature. The heating duration at each set temperature is inversely proportional to the temperature value of that set temperature.
[0033] After the wafer is coated with photoresist to obtain the wafer after coating, it is necessary to bake and heat the photoresist to cure the photoresist. Since the present invention aims to improve the spin coating flatness of deep-hole silicon, that is, the wafer with deep holes, the deep holes will expand during baking. In this embodiment, taking advantage of the characteristic that the photoresist can be preliminarily crosslinked and hardened at low temperature, it is designed to heat the wafer after coating at multiple set temperatures in ascending order of temperature. The heating duration at each set temperature is inversely proportional to the temperature value of that set temperature, that is, the heating duration at low temperature is longer than that at high temperature, so as to fully utilize the characteristic that the photoresist can be preliminarily crosslinked and hardened at low temperature, and effectively avoid the bulging and expansion of the deep holes on the wafer after the spin coating process.
[0034] Specifically, this embodiment is described for wafers with round holes on the wafer surface with a diameter of 10 - 50 um and a depth of 100 um - 300 um. Based on the diameter and depth of the deep holes on the wafer, this embodiment preferably sets the temperature range of the set temperature to be 40°C - 100°C, and the temperature interval is 10°C, that is, the set temperatures include 40°C, 50°C, 60°C, 70°C, 80°C, 90°C, and 100°C. The heating duration at each set temperature should conform to the law of being inversely proportional to the temperature value of that set temperature.
[0035] Further, this embodiment preferably heats the wafer after coating at multiple set temperatures in ascending order of temperature, and the heating duration at each set temperature is inversely proportional to the temperature value of that set temperature, including: Heat the wafer after coating at 40°C for 10 minutes, at 50°C and 60°C for 5 minutes each, and at 70°C, 80°C, 90°C, and 100°C for 1 minute each in ascending order of temperature.
[0036] To illustrate that this photoresist baking method in this embodiment can effectively improve the spin coating flatness of deep-hole silicon, that is, the wafer with deep holes, the following two sets of control experiments are carried out for actual comparison and explanation.
[0037] The first control experimental group: Prepare 2 wafer pieces with a size of 6 inches and a thickness of 625 um, namely wafer A and wafer B. There are etched round holes on the surfaces of both wafers, with a hole diameter of 40 um and a hole depth of 200 um, as Figure 2 shown.
[0038] Place wafer A and wafer B on a 100°C hot plate and bake for 5 minutes to remove moisture. Then, after centering the two wafers respectively, automatically transfer them to the spin coating unit. Drop 7 mL of AZ6112 glue at the exact center. The rotation speed in the first stage is 450 rpm. After the entire wafer is covered, enter the second stage of rotation with a speed of 2100 rpm. Stop rotating after maintaining a constant speed for 30 seconds. The glue thickness is 1.5 um.
[0039] Baking method for wafer A: Bake at 100°C for 2 minutes; Baking method for wafer B: Heat at 40°C for 10 minutes, at 50°C and 60°C for 5 minutes each, and at 70°C, 80°C, 90°C, and 100°C for 1 minute each in ascending order of temperature.
[0040] After baking, use a profilometer to measure the height at the round holes on the wafer. The measurement method is as Figure 3 shown. Test results: The test results of wafer A are as Figure 4 shown, with a bubble height of 9.69 um. The test results of wafer B are as Figure 5 shown, with a bubble height of 0.16 um. The bubble height at the round holes of wafer B is significantly lower than that of wafer A. It can be seen that the gradient baking method for photoresist can significantly improve the wafer bulge.
[0041] Second control experimental group: Prepare 2 six-inch wafer slices with a thickness of 625 um, namely wafer C and wafer D. There are etched round holes on the surfaces of both wafers, with a hole diameter of 40 um and a hole depth of 200 um, as Figure 2 shown.
[0042] Place wafer A and wafer B on a 100°C hot plate and bake for 5 minutes to remove moisture. Then, after centering the two wafers respectively, automatically transfer them to the spin coating unit. Drop 7 mL of AZ1500 glue at the exact center. The rotation speed in the first stage is 500 rpm. After the entire wafer is covered, enter the second stage of rotation with a speed of 1680 rpm. Stop rotating after maintaining a constant speed for 30 seconds. The glue thickness is 2 um.
[0043] Baking method for wafer C: Bake at 100°C for 1 minute; Baking method for wafer D: Heat at 40°C for 10 minutes, at 50°C and 60°C for 5 minutes each, and at 70°C, 80°C, 90°C, and 100°C for 1 minute each in ascending order of temperature.
[0044] After baking, use a profilometer to measure the height at the round holes on the wafer. The measurement method is as Figure 3 shown. Test results: The test results of wafer C are as Figure 6 shown, with a bubble height of 10.97 um. The test results of wafer D are asFigure 7 As shown, the bubble height is 2.42 um. The bubble height at the round holes of wafer D is significantly lower than that at the round holes of wafer C. It can be seen that the method of heating the photoresist by gradient baking can significantly improve the convexity of the wafer.
[0045] In summary, the embodiments of the present invention utilize the characteristic that the photoresist can be initially crosslinked and hardened at low temperature, and propose a gradient heating and baking method for the photoresist with the temperature increasing from low to high. This effectively avoids the phenomenon of photoresist bubbling at the deep holes of the wafer with deep holes after the spin coating process, thereby improving the subsequent lithography accuracy of the wafer and ultimately improving the quality of the chip product.
[0046] In the above embodiments, the descriptions of the respective embodiments have their own focuses. For the parts not detailed or recorded in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0047] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professionals can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.
[0048] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.
Claims
1. A method for improving the flatness of deep hole silica gel, characterized in that: The method comprises: After the wafer with the deep hole is centered, it is placed on the rotating tray of the glue spreader, and after photoresist is dripped on the surface of the wafer, the glue spreader drives the wafer to rotate so that the photoresist covers the entire wafer, thereby obtaining a glue-coated wafer with uniform surface glue thickness; The glue-coated wafer is heated at a plurality of set temperatures in order from low to high, and the heating time at the set temperature is inversely proportional to the temperature value of the set temperature.
2. The method for improving the flatness of deep hole silica gel according to claim 1, characterized in that: The photoresist is AZ series photoresist with a viscosity of 20cp~40cp.
3. The method for improving the flatness of deep hole silica gel according to claim 2, characterized in that: The thickness of the photoresist on the wafer surface after the coating is 1um~3um.
4. The method for improving the flatness of deep hole silica gel according to any one of claims 1 to 3, characterized in that: The set temperature has a range of 40°C to 100°C, with a temperature interval of 10°C.
5. The method for improving the flatness of deep hole silicon gel coating according to claim 4, characterized in that: The method of heating the wafer after the adhesive coating at a plurality of set temperatures in order from low to high, wherein the heating time at the set temperature is inversely proportional to the temperature value of the set temperature, comprises: The coated wafer was heated in order from low to high temperature at 40°C for 10 minutes, at 50°C and 60°C for 5 minutes each, and at 70°C, 80°C, 90°C and 100°C for 1 minute each.
6. The method for improving the flatness of deep hole silica gel according to claim 1, characterized in that: After the photoresist is dripped onto the surface of the wafer, the wafer is driven to rotate by the photoresist spreader to cover the entire wafer with the photoresist, so as to obtain a wafer with uniform surface resist thickness, including: First, the coating machine drives the wafer to rotate at a first speed until the photoresist completely covers the surface of the wafer, and then drives the wafer to rotate at a second speed for a first set rotation time and then stops rotating, wherein the first speed is less than the second speed.
7. The method for improving the flatness of deep hole silica gel according to claim 6, characterized in that: The first rotation speed is 450 rpm, the second rotation speed is 2100 rpm, and the first set rotation time is 30 seconds.
8. The method for improving the flatness of deep hole silica gel according to claim 1, characterized in that: Before placing the wafer with deep holes on the spin coater rotating tray after centering, it also includes: The wafer was placed on a hot plate at 100° C. and baked for 5 minutes.
9. The method for improving the flatness of deep hole silica gel according to claim 1, characterized in that: The deep holes on the wafer surface are circular holes with a diameter of 10-50um and a depth of 100um-300um.
10. The method for improving the flatness of deep hole silica gel coating according to claim 9, characterized in that: The wafer is a 6-inch wafer.