Serial port communication method and system, electronic equipment and storage medium
By recording the actual number of sampling clock cycles using edge jumps in serial communication and matching with the preset relationship table, the target baud rate is automatically determined, which solves the problem of inconsistent baud rate in serial communication, and improves debugging efficiency and communication stability.
Patent Information
- Application Number
- CN202311629271.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-30
- Publication Date
- 2025-05-30
AI Technical Summary
In the prior art, the baud rates of the sending and receiving ends in serial communication are inconsistent, resulting in communication abnormalities, increasing the debugging workload of the serial communication system, and the manual setting of the baud rate is complicated, affecting the debugging efficiency.
When receiving serial data, the counter is started using edge jumps, the actual number of sampling clock cycles of the sub-serial data is recorded, and the value range is matched with the preset sampling clock cycle number in the preset relationship table, the target baud rate is determined, and the baud rate at the receiving end is automatically set.
It realizes the automatic setting of the baud rate at the receiver, improves the efficiency of serial communication debugging, reduces the workload of manual debugging, and ensures the stability of serial communication.
Smart Images
Figure CN120067015A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of data communication technologies, and in particular, to a serial communication method, system, electronic device, and storage medium. Background Art
[0002] Serial communication is applied to various control systems or data transmission systems with low requirements for data bandwidth. During serial communication, both communication parties must be set to the same serial baud rate parameter in advance. If the baud rates of the sending end and the receiving end are inconsistent, it will cause abnormal serial communication and increase the debugging workload of the serial communication system. In related technologies, usually an artificial method is used to set a unified baud rate for the sending end and the receiving end, and the above process is relatively complex, affecting the efficiency of serial communication debugging work.
[0003] Therefore, how to automatically set the baud rate of the receiving end and improve the efficiency of serial communication debugging work is a technical problem that needs to be solved by those skilled in the art at present. Summary of the Invention
[0004] The purpose of this application is to provide a serial communication method, system, electronic device, and storage medium, which can automatically set the baud rate of the receiving end and improve the efficiency of serial communication debugging work.
[0005] To solve the above technical problems, this application provides a serial communication method, including:
[0006] Receiving serial data;
[0007] When an edge transition occurs in the serial data, starting a counter and recording the actual sampling clock cycle number of each sub-serial data; wherein, the sub-serial data is the data received between the i-th edge transition and the (i + 1)-th edge transition in the serial data; i is a positive integer;
[0008] Matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in a preset relationship table, and determining a target baud rate according to the matching result; wherein, the preset relationship table stores the preset sampling clock cycle number value ranges for receiving each of the sub-serial data at multiple preset baud rates;
[0009] Performing parameter configuration according to the target baud rate, so that the receiving end and the sending end perform serial communication based on the target baud rate.
[0010] Optionally, before receiving serial data, it further includes:
[0011] Setting all IO pins connected to the sending end in the receiving end as serial input pins;
[0012] Correspondingly, after receiving the serial data and before performing serial communication between the receiving end and the sending end based on the target baud rate, the following steps are further included:
[0013] Set the IO pin that has received the serial data as the serial port input pin;
[0014] Set the IO pins that have not received the serial data as the serial port output pins.
[0015] Optionally, before matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in the preset relationship table, the following steps are further included:
[0016] Negotiate with the sending end to determine the serial data; wherein, the serial data is a binary string containing 0s and 1s;
[0017] Divide the serial data into n sub-serial data based on a preset rule; wherein, the preset rule is that the j-th sub-serial data is a string containing only 0s, the (j + 1)-th sub-serial data is a string containing only 1s, 1 ≤ j ≤ n; j and n are positive integers;
[0018] Select a preset baud rate from the set of alternative baud rates;
[0019] Calculate the preset sampling clock cycle number value ranges of each sub-serial data at the preset baud rate according to the error coefficient;
[0020] Judge whether all the baud rates in the set of alternative baud rates have been selected;
[0021] If so, construct the preset relationship table according to the corresponding relationship between the preset baud rate and the preset sampling clock cycle number value ranges;
[0022] If not, enter the step of selecting a preset baud rate from the set of alternative baud rates.
[0023] Optionally, when an edge transition occurs in the serial data, start a counter and record the actual sampling clock cycle numbers of each sub-serial data, including:
[0024] When an edge transition occurs in the serial data, update the edge transition count k; k is a positive integer;
[0025] If the updated edge transition count k is equal to 1, control the first cycle counter to start;
[0026] If the updated edge transition count k is greater than 1 and the serial data has not been transmitted completely, control the (k - 1)-th cycle counter to stop and control the k-th cycle counter to start;
[0027] If the serial data transmission is completed, control the k-th cycle counter to stop;
[0028] Set the count value of the k-th cycle counter to the actual sampling clock cycle number of the k-th sub-serial data.
[0029] Optionally, match the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value range in the preset relationship table, including:
[0030] Determine the preset quantity n of the sub-serial data according to the preset relationship table;
[0031] Convert the actual sampling clock cycle numbers of all the sub-serial data into a one-dimensional array {N 1 , N 2 , …, N m , …, N k}, 1 ≤ m ≤ k, N m represents the count value of the m-th cycle counter, and m is a positive integer;
[0032] Select adjacent n count values from the one-dimensional array as the target count value combination, and match the target count value combination with the preset sampling clock cycle number value range in the preset relationship table.
[0033] Optionally, select adjacent n count values from the one-dimensional array as the target count value combination, and match the target count value combination with the preset sampling clock cycle number value range in the preset relationship table, including:
[0034] Set the count value N 1 of the first cycle counter in the one-dimensional array as the starting position of the sliding window, and set the window size of the sliding window to n;
[0035] Use the n count values corresponding to the sliding window as the target count value combination;
[0036] Match the target count value combination with the preset sampling clock cycle number value range in the preset relationship table;
[0037] If the target count value combination does not match the preset sampling clock cycle number value range, update the position of the sliding window according to the preset step size, and enter the step of using the n count values corresponding to the sliding window as the target count value combination.
[0038] Optionally, before selecting adjacent n count values from the one-dimensional array as the target count value combination, further include:
[0039] Remove the count values less than the critical value in the one-dimensional array.
[0040] Optionally, it further includes:
[0041] Determine the preset quantity n of the sub-serial data according to the preset relationship table;
[0042] If the updated number of edge transitions k is equal to n + 1, it is determined that the serial data transmission is completed.
[0043] Optionally, it further includes:
[0044] Determine the preset quantity n of the sub-serial data according to the preset relationship table;
[0045] When starting the first cycle counter, start the timeout counter;
[0046] If the count value of the timeout calculator is greater than the preset value, and the updated number of edge transitions k is less than n + 1, it is determined that the received serial data is abnormal, and all the counters, the timeout counter, and the actual sampling clock cycle number are reset.
[0047] Optionally, match the actual sampling clock cycle numbers of all the sub-serial data with the value range of the preset sampling clock cycle numbers in the preset relationship table, and determine the target baud rate according to the matching result, including:
[0048] Select the current preset baud rate from the preset relationship table;
[0049] Match the actual sampling clock cycle numbers of all the sub-serial data with the value range of the preset sampling clock cycle numbers corresponding to the current preset baud rate;
[0050] If the matching result is successful, it is determined that the current preset baud rate is the target baud rate;
[0051] If the matching result is failed, enter the step of selecting the current preset baud rate from the preset relationship table.
[0052] This application also provides a serial communication system, including: a serial data transceiver module and a serial baud rate detection module;
[0053] The serial data transceiver module is used to receive serial data;
[0054] The serial baud rate detection module is used to start a counter and record the actual sampling clock cycle number of each sub-serial data when an edge transition occurs in the serial data; wherein, the sub-serial data is the data received between the i-th edge transition and the (i + 1)-th edge transition in the serial data; i is a positive integer;
[0055] The serial port baud rate detection module is further configured to match the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in a preset relationship table, and determine a target baud rate according to the matching result; wherein, the preset relationship table stores the preset sampling clock cycle number value ranges for receiving each of the sub-serial data at multiple preset baud rates;
[0056] The serial port data transceiver module is further configured to perform parameter configuration according to the target baud rate, so that the receiving end and the sending end perform serial port communication based on the target baud rate.
[0057] The present application also provides a storage medium, on which a computer program is stored, and when the computer program is executed, the steps performed by the above serial port communication method are implemented.
[0058] The present application also provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor calls the computer program in the memory, the steps performed by the above serial port communication method are implemented.
[0059] The present application provides a serial port communication method, including: receiving serial data; when an edge transition occurs in the serial data, starting a counter and recording the actual sampling clock cycle numbers of each sub-serial data; wherein, the sub-serial data is the data received between the i-th edge transition and the (i + 1)-th edge transition in the serial data; i is a positive integer; matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in a preset relationship table, and determining a target baud rate according to the matching result; wherein, the preset relationship table stores the preset sampling clock cycle number value ranges for receiving each of the sub-serial data at multiple preset baud rates; performing parameter configuration according to the target baud rate, so that the receiving end and the sending end perform serial port communication based on the target baud rate.
[0060] According to the present application, a corresponding counter is started according to the edge transition situation of the received serial data, and the actual sampling clock cycle numbers of the sub-serial data received between two adjacent edge transitions are obtained. The preset relationship table pre-stores the corresponding relationships between multiple preset baud rates and the preset sampling clock cycle number value ranges of each sub-serial data. The present application matches the actual sampling clock cycle numbers with the preset sampling clock cycle number value ranges, and then determines the target baud rate according to the matching result, so that the receiving end can also perform serial port communication with the sending end based on the target baud rate. Therefore, the present application can automatically set the baud rate of the receiving end and improve the working efficiency of serial port communication debugging. The present application also provides a serial port communication system, a storage medium and an electronic device at the same time, which have the above beneficial effects and will not be elaborated here. Description of the Drawings
[0061] To more clearly illustrate the embodiments of the present application, the following will briefly introduce the accompanying drawings required in the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.
[0062] Figure 1 It is a flowchart of a serial communication method provided by an embodiment of the present application;
[0063] Figure 2 It is a flowchart of a serial communication adaptive method based on FPGA provided by an embodiment of the present application;
[0064] Figure 3 It is a schematic diagram of the frame structure of serial data provided by an embodiment of the present application;
[0065] Figure 4 It is a schematic diagram of the segmentation result of serial data provided by an embodiment of the present application;
[0066] Figure 5 It is a schematic diagram of the structure of a serial communication system provided by an embodiment of the present application. Specific embodiments
[0067] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts fall within the scope of protection of the present application.
[0068] Please refer to the following Figure 1 , Figure 1 It is a flowchart of a serial communication method provided by an embodiment of the present application.
[0069] The specific steps may include:
[0070] S101: Receive serial data;
[0071] Among them, this embodiment can be applied to the receiving end, which can be an electronic device with serial communication function based on FPGA (Field Programmable Gate Array) or single-chip microcomputer. Specifically, the receiving end can be connected to the sending end through the IO pins. Before this step, the above-mentioned IO (Input / Output) pins can be set as serial input pins to receive the serial data transmitted by the sending end by using the serial input pins.
[0072] The above serial data is a binary string corresponding to the matching characters negotiated in advance between the sending end and the receiving end. The sending end sends the above serial data to the receiving end based on the target baud rate, and the receiving end constructs a preset relationship table according to the above serial data. In order to improve the accuracy of determining the target baud rate, the sending end and the receiving end can select the serial data with as many edge transitions (changing from 0 to 1 or from 1 to 0) as possible as the negotiated matching characters.
[0073] Specifically, the receiving end can solve the smallest value n that meets the preset conditions. The preset condition is to divide the serial data into n sub-serial data that only contain 0 and only contain 1. On this basis, the value range of the preset sampling clock cycle number for receiving each sub-serial data at multiple preset baud rates can be calculated, and a preset relationship table can be constructed according to the corresponding relationship between the above preset baud rate and the value range of the preset sampling clock cycle number.
[0074] The serial communication protocol that can be adopted by the above receiving end and sending end is UART (Universal Asynchronous Receiver / Transmitter). UART serial data communication is widely used in various control systems or data transmission systems with low requirements for data bandwidth because it occupies less IO resources, supports full-duplex communication, and has a relatively simple transmission protocol and is easy to implement. However, due to the low data transmission baud rate.
[0075] S102: When an edge transition occurs in the serial data, start a counter and record the actual sampling clock cycle number of each sub-serial data;
[0076] Among them, the receiving end can detect the edge transition of the serial data, that is, the character received by the serial input pin changes from 0 to 1, and the character received by the serial input pin changes from 1 to 0. This embodiment divides the serial data into n sub-serial data based on the edge transition, and starts the corresponding counter when an edge transition (including falling edge transition and rising edge transition) occurs in the serial data to obtain the actual sampling clock cycle number of each sub-serial data. The above sub-serial data is the data received between the i-th edge transition and the (i + 1)-th edge transition in the serial data; i is a positive integer.
[0077] S103: Match the actual number of sampling clock cycles of all the sub-serial data with the value range of the preset number of sampling clock cycles in the preset relationship table, and determine the target baud rate according to the matching result;
[0078] Among them, on the basis of obtaining the actual number of sampling clock cycles of the sub-serial data, the actual number of sampling clock cycles can be matched with the value range of the preset number of sampling clock cycles in the preset relationship table, and the target baud rate when the sending end transmits the serial data is determined according to the matching result. In this embodiment, the i-th actual number of sampling clock cycles can be matched with the value range of the i-th preset number of sampling clock cycles in the preset relationship table. When all the actual number of sampling clock cycles are within the corresponding value range of the preset number of sampling clock cycles, it can be determined that the matching is successful.
[0079] For example, the actual number of sampling clock cycles of the sub-serial data are: M1, M2, M3, ……, Mi, ……, Mn, that is, the actual number of sampling clock cycles of the i-th sub-serial data is Mi.
[0080] Please refer to Table 1. Table 1 is a preset relationship table provided by an embodiment of the present application;
[0081] Table 1 Preset relationship table
[0082]
[0083] Baud_q represents the q-th preset baud rate, 1 ≤ q ≤ h, and h is the total number of preset baud rates in the set of alternative baud rates. P(q, i) represents the value range of the preset number of sampling clock cycles of the i-th sub-serial data at the q-th preset baud rate.
[0084] If the actual number of sampling clock cycles Mi of all the sub-serial data are all within the value range P(q, i) of the preset number of sampling clock cycles, it is determined that the matching result is successful, and the preset baud rate Baud_q corresponding to the value range of the preset number of sampling clock cycles that is matched and hit is set as the target baud rate.
[0085] S104: Perform parameter configuration according to the target baud rate, so that the receiving end and the sending end perform serial port communication based on the target baud rate.
[0086] Among them, on the basis of obtaining the target baud rate, the serial port communication parameters of the sending end can be set based on the target baud rate, and then serial port communication is performed with the sending end based on the target baud rate. Specifically, in this embodiment, the serial port communication parameters of the serial port data transceiver module can be set according to the target baud rate, and the serial port data transceiver module is used to perform serial port communication with the sending end.
[0087] In this embodiment, a corresponding counter is started according to the edge transition of the received serial data, and the actual sampling clock cycle number of the sub-serial data received between two adjacent edge transitions is obtained. A plurality of corresponding relationships between preset baud rates and the value ranges of the preset sampling clock cycle numbers of each sub-serial data are pre-stored in a preset relationship table. In this embodiment, the actual sampling clock cycle number is matched with the value range of the preset sampling clock cycle number, and then the target baud rate is determined according to the matching result, so that the receiving end can also perform serial port communication with the sending end based on the target baud rate. Therefore, this embodiment can automatically set the baud rate of the receiving end and improve the efficiency of serial port communication debugging work.
[0088] As a further introduction to Figure 1 the corresponding embodiment, there are multiple IO pins in the receiving end connected to the sending end. Before receiving the serial data, all the IO pins in the receiving end connected to the sending end can be set as the serial port input pins. The IO pins connected to the sending pins of the sending end will receive the serial data, and the IO pins not connected to the sending pins of the sending end will not receive the serial data. Therefore, after receiving the serial data, in this embodiment, the IO pins that receive the serial data can be set as the serial port input pins; the IO pins that do not receive the serial data can be set as the serial port output pins, so as to perform serial port communication with the sending end based on the updated serial port input pins and serial port output pins and the target baud rate.
[0089] As a further introduction to Figure 1 the corresponding embodiment, before matching the actual sampling clock cycle numbers of all the sub-serial data with the value ranges of the preset sampling clock cycle numbers in the preset relationship table, this embodiment can construct the preset relationship table in the following manner:
[0090] Step A1: Determine the serial data through negotiation with the sending end.
[0091] Among them, the serial data is a binary string containing 0 and 1.
[0092] Step A2: Divide the serial data into n sub-serial data based on a preset rule;
[0093] Among them, the preset rule is that the jth sub-serial data is a string containing only 0, and the (j + 1)th sub-serial data is a string containing only 1, where 1 ≤ j ≤ n; j and n are positive integers.
[0094] For example, if the above serial data is 100011110111000, the serial data can be split into 6 sub-serial data, namely: the 1st sub-serial data "1", the 2nd sub-serial data "000", the 3rd sub-serial data "1111", the 4th sub-serial data "0", the 5th sub-serial data "111", and the 6th sub-serial data "000".
[0095] Step A3: Select a preset baud rate from the set of alternative baud rates.
[0096] There can be multiple preset baud rates in the above set of alternative baud rates, such as 1200, 2400, 4800, 9600, 19200, 38400, 56000, 115200.
[0097] Step A4: Calculate the value range of the preset sampling clock cycle number for each of the sub-serial data at the preset baud rate according to the error coefficient.
[0098] Considering the influence of the reference clock accuracy of the sending end and the receiving end and the environmental temperature, in this embodiment, the error coefficient (1-α, 1+α) is set, and then the value range of the preset sampling clock cycle number is calculated based on the error coefficient.
[0099] Step A5: Determine whether all the baud rates in the set of alternative baud rates have been selected; if so, go to step A6, if not, go to step A3;
[0100] Step A6: Construct the preset relationship table according to the corresponding relationship between the preset baud rate and the value range of the preset sampling clock cycle number.
[0101] Through the above method, a preset relationship table can be constructed in advance according to the serial data negotiated between the sending end and the receiving end, so as to determine the target baud rate of the sending end by looking up the table after receiving the serial data transmitted by the sending end.
[0102] Specifically, the target baud rate can be determined from the preset relationship table in the following way: select the current preset baud rate from the preset relationship table; match the actual sampling clock cycle numbers of all the sub-serial data with the value range of the preset sampling clock cycle number corresponding to the current preset baud rate; if the matching result is successful, determine that the current preset baud rate is the target baud rate; if the matching result is failed, go to the step of selecting the current preset baud rate from the preset relationship table.
[0103] As for Figure 1For further introduction of the corresponding embodiment, when an edge transition occurs in the serial data, the actual sampling clock cycle count can be recorded in the following manner: when an edge transition occurs in the serial data, update the edge transition count k; where k is a positive integer. If the updated edge transition count k is equal to 1, control the first cycle counter to start; if the updated edge transition count k is greater than 1 and the serial data has not been transmitted completely, control the (k - 1)-th cycle counter to stop and control the k-th cycle counter to start; if the serial data has been transmitted completely, control the k-th cycle counter to stop; set the count value of the k-th cycle counter as the actual sampling clock cycle count of the k-th sub-serial data. By the above method, a corresponding cycle counter can be set for each sub-serial data, improving the accuracy of recording the actual sampling clock cycle count.
[0104] In the above process, it can be determined whether the serial data has been transmitted completely according to whether the sending end continues to generate serial data at the current moment or in the current cycle, or it can also be determined according to the updated edge transition count k whether the serial data has been transmitted completely.
[0105] Specifically, in this embodiment, the preset quantity n of the sub-serial data can be determined according to the preset relation table; if the updated edge transition count k is equal to n + 1, it is determined that the serial data has been transmitted completely. By the above method, after detecting n + 1 edge transitions (i.e., n consecutive sub-serial data) each time, the count values of the first to n-th cycle counters can be used as the actual sampling clock cycle counts of the sub-serial data to be matched with the preset relation table.
[0106] As a feasible implementation manner, in this embodiment, the preset quantity n of the sub-serial data can be determined according to the preset relation table; when starting the first counter, the timeout counter can be started simultaneously; if the count value of the timeout calculator is greater than the preset value and the updated edge transition count k is less than n + 1, it is determined that the received serial data is abnormal, and all the counters, the timeout counter, and the actual sampling clock cycle count are reset to receive the new serial data transmitted by the sending end again. By the above method, the situation of data transmission error or interference signal at the sending end can be effectively avoided, improving the reliability of serial port parameter configuration.
[0107] As a feasible implementation manner, the actual sampling clock cycle count can be matched with the preset relation table in the following way:
[0108] Determine the preset quantity n of the sub-serial data according to the preset relation table; convert the actual sampling clock cycle counts of all the sub-serial data into a one-dimensional array in the generation order, and the one-dimensional array can include: N 1 , N 2 , …, N m, …, N k ; 1 ≤ m ≤ k, the m-th element N in the one-dimensional array m represents the count value of the m-th cycle counter, where m is a positive integer; select adjacent n count values from the one-dimensional array as the target count value combination, and match the target count value combination with the value range of the preset sampling clock cycle number in the preset relationship table. Specifically, the above one-dimensional array can be {N 1 , N 2 , …, N m , …, N k}.
[0109] The number k of count values in the above one-dimensional array is greater than n. After obtaining the one-dimensional array, adjacent n count values can be selected from the one-dimensional array according to a preset rule or randomly as the target count value combination, and then the count value combination is matched with the value range of the preset sampling clock cycle number in the preset relationship table. Specifically, in this embodiment, the first count value in the count value combination can be matched with the first value range of the preset sampling clock cycle number, the second count value in the count value combination can be matched with the second value range of the preset sampling clock cycle number, and so on.
[0110] As a feasible implementation manner, this embodiment can use a sliding window to select adjacent n count values from the one-dimensional array for matching with the preset relationship table until a successfully matched count value combination is obtained or the sliding window finishes traversing the one-dimensional array. The specific process is as follows:
[0111] Set the count value N of the first cycle counter in the one-dimensional array 1 as the starting position of the sliding window, and set the window size of the sliding window to n; use the n count values corresponding to the sliding window as the target count value combination; match the target count value combination with the value range of the preset sampling clock cycle number in the preset relationship table; if the target count value combination does not match the value range of the preset sampling clock cycle number, update the position of the sliding window according to a preset step size, and enter the step of using the n count values corresponding to the sliding window as the target count value combination. The successfully matched target count value combination in the above process is multiple consecutive actual sampling clock cycle numbers that meet the requirements of the preset relationship table. If there is still no successfully matched target count value after the sliding window finishes traversing the one-dimensional array, it is determined that the actual sampling clock cycle number fails to match the value range of the preset sampling clock cycle number corresponding to the current preset baud rate, and the value range of the preset sampling clock cycle number corresponding to the new current preset baud rate can be used for matching.
[0112] Illustrate the above process. If n = 5 and the one-dimensional array is {12, 15, 10, 18, 20, 12, 30, 23, 22, 20}, the target count value combination determined for the first time using the sliding window is {12, 15, 10, 18, 20}. If the sliding step size is 5, the target count value combination determined for the first time using the sliding window is {12, 30, 23, 22, 20}.
[0113] As a feasible implementation manner, before selecting adjacent n count values from the one-dimensional array as the target count value combination, count values less than the critical value in the one-dimensional array can also be removed to avoid the influence of interference signals. For example, if the one-dimensional array is {12, 1, 10, 18, 20, 1, 30, 1, 1, 20} and the critical value is 5, the one-dimensional array obtained after removing the count values less than the critical value in the one-dimensional array is {12, 10, 18, 20, 30, 20}.
[0114] Please refer to Figure 2 , Figure 2 The flowchart of an FPGA-based serial port communication adaptive method provided by an embodiment of this application includes the following steps:
[0115] S201: Enter the adaptive matching state and set two IO pins as serial port input pins.
[0116] S202: The baud rate detection module detects the edge transition of the serial port input pins.
[0117] S203: After detecting the first edge transition, start a counter to record the actual sampling clock cycle number of the first sub-serial port data, and start a timeout counter.
[0118] S204: After detecting the next edge transition, start the next counter to record the actual sampling clock cycle number of the next sub-serial port data.
[0119] S205: Determine whether n + 1 edge transitions are all completed; if so, enter S206; if not, enter S209.
[0120] S206: Determine whether the value of the counter matches the preset sampling clock cycle number value range; if so, enter S207; if not, enter S201.
[0121] S207: Set the target baud rate as the baud rate parameter of the serial port transceiver module.
[0122] S208; Configure the IO pin that receives data as the serial port input pin, configure the other IO pin as the serial port output pin, and end the process.
[0123] S209: Determine whether it times out. If it times out, enter S201; if not, enter S204.
[0124] The following uses examples in actual applications to illustrate the process described in the above embodiments.
[0125] During serial communication, both communication parties must set the same baud rate in advance, and the serial data transceiver pins (Rx / Tx) must be cross-connected. If the baud rate parameters of the devices at both ends of the communication are inconsistent, or the pin naming is not standardized during layout and wiring, resulting in the non-cross-connection of the transceiver pins at both ends, it will cause abnormal serial communication and increase the debugging workload of the serial communication system. Therefore, if the baud rate and pin self-adaptive matching of serial communication can be achieved, it will greatly reduce the workload of manually debugging the serial communication system, shorten the development and debugging cycle, and improve the convenience of using the serial communication module.
[0126] To solve the problem of abnormal serial communication caused by inconsistent serial baud rate parameters or reversed serial transceiver signals between the sending end and the receiving end in serial communication, this application provides a serial communication adaptive solution based on FPGA.
[0127] Before serial communication, the sending end sends a matching character negotiated in advance by both communication parties according to its own baud rate. The serial baud rate detection module at the receiving end oversamples the serial data using a high-speed sampling clock, uses a counter to respectively count the number of sampling clock cycles between adjacent edge transitions of the serial data during the serial data transmission process, and then calculates the serial baud rate of the sending end through matching calculations based on the matching character coding waveform output by the standard serial transmission protocol, the counting result of the counter, the common baud rate parameter range, etc.; the transceiver signal detection module first sets both serial transceiver pins at the receiving end to the input state before communication. After successful baud rate adaptive matching, the pin that receives the serial data is defined as the serial input pin, and the other pin is defined as the serial output pin.
[0128] In this embodiment, the sending end and the receiving end can adopt the asynchronous serial communication protocol UART. The sending end transmits each binary bit of the transmitted serial data one by one according to the baud rate (the number of data bits transmitted per second). The UART protocol stipulates that when the state on the signal line is high, it represents '1', and when the state on the signal line is low, it represents '0'. When the bus is in the idle state, the state of the signal line is '1' (i.e., high level), indicating that there is no data transmission on the current line. The frame structure of data transmission is as Figure 3 shown Figure 3A schematic diagram of the frame structure of serial data provided by an embodiment of the present application. The frame structure of serial data includes 1 start bit (fixed value '0'), 5 to 8 data bits (with the least significant bit in the front and the most significant bit in the back), 0 to 1 parity bit, and 1 to 2 stop bits (fixed value '1'). LSB (Least Significant Bit) represents the least significant bit, and MSB (Most Significant Bit) represents the most significant bit. The baud rate used by the sending end can be 1200, 2400, 4800, 9600, 19200, 38400, 56000, 115200, etc.
[0129] The implementation process of this embodiment includes the following steps:
[0130] Step B1: According to the matching character (i.e., serial data) pre-negotiated between the sending end and the receiving end, determine the frame structure timing of serial transmission according to the serial port transmission parameters. In this embodiment, taking 0x39 as an example, there is 1 start bit, 8 data bits, no parity bit, and 1 stop bit (the matching character data, data bit number, parity bit, stop bit parameters, etc. exemplified in this embodiment are not limited to the example characters). Then, determine that the matching character data frame format of serial transmission is "0100111001".
[0131] Step B2: Divide the above matching character data frame into "0" or "1" for single continuous transmission, and successively divide it into 6 sub-serial data: "0", "1", "00", "111", "00", "1". Please refer to Figure 4 , Figure 4 A schematic diagram of the segmentation result of serial data provided by an embodiment of the present application, Figure 4 showing the segmentation result of step B2.
[0132] Step B3: Use the formula to calculate the preset sampling clock cycle number S of S = F ÷ Baud.
[0133] F represents the sampling clock of the FPGA, Baud represents the common baud rate of the serial port, S represents the preset sampling clock cycle number for calculating a single bit '0' or '1' of serial port transmission, and Baud takes the standard baud rate values specified by the UART protocol, such as 1200, 2400, 4800, 9600, 19200, 38400, 56000, 115200, etc.
[0134] Step B4: According to the segmentation situation in Step B2, calculate the preset sampling clock cycle numbers for each segment of data in sequence. Considering the accuracy of the reference clocks used by the sending end and the receiving end and the influence of the ambient temperature, set a certain error value α, and calculate the value range of the preset sampling clock cycle numbers: [MIN1, MAX1], [MIN2, MAX2], …, [MIN6, MAX6]…
[0135] MINn = T·S·(1 - α);
[0136] MAXn = T·S·(1 + α);
[0137] Where, n represents the nth segment, T is the number of data bits transmitted in the nth segment. For example, in this embodiment, T is 2 for the 3rd segment and T is 3 for the 4th segment.
[0138] After determining parameters such as the number of data bits and the parity mode of the serial port transmission, the frame structure timing of the serial port data can be determined. In this embodiment, the sending end first sends a pre-negotiated matching character, and the frame structure timing of the character transmission can be determined and is unique by the UART protocol. The receiving end divides the high and low level changes in the data transmission into n segments according to the data transmission frame structure, and increases a certain baud rate error range according to the relationship between each common baud rate and the high-speed sampling clock F, and calculates the expected clock cycle number ranges [MIN1, MAX1], [MIN2, MAX2]…[MINn, MAXn] for the n segments of levels in sequence, and forms a corresponding lookup table. Then, starting from the first segment of low level on the serial port transmission data line detected by the high-speed sampling clock, detect the n segments of level changes, and use a counter to record the clock cycle numbers C 1 , C 2 , …, C n , and after the entire matching character is received, then look up the table C 1 , C 2 , …, C n to determine which baud rate range the corresponding clock cycle number is in, and the sending baud rate of the sending end can be determined. Finally, define the pin that correctly receives the data as the serial port receiving pin, and define the other pin as the serial port sending pin.
[0139] Step B5: According to the calculation results in Step B4, form the corresponding preset relationship table as follows:
[0140]
[0141]
[0142] [MINi, MAXi] 1200Represents the value range of the preset sampling clock cycle number of the i-th sub-serial data when the baud rate is 1200, [MINi, MAXi] 2400 Represents the value range of the preset sampling clock cycle number of the i-th sub-serial data when the baud rate is 2400, [MINi, MAXi] 4800 Represents the value range of the preset sampling clock cycle number of the i-th sub-serial data when the baud rate is 4800, [MINi, MAXi] 115200 Represents the value range of the preset sampling clock cycle number of the i-th sub-serial data when the baud rate is 115200; 1 ≤ i ≤ n.
[0143] Step B6: After the initialization of the receiving-end system is completed, enter the serial port adaptive matching reception state, and configure both serial port IO pins as serial port input pins.
[0144] Step B7: The baud rate detection module detects the data on the two input pins through the shift register and detects the falling edge transition of the serial data.
[0145] Step B8: After the baud rate detection module detects the first falling edge transition of the serial input data, start counter C 1 , which is used to record the sampling clock cycle number of the first segment of low-level data, and at the same time start the timeout counter C max .
[0146] Step B9: After the baud rate detection module detects the next edge transition of the serial input data, start counter C x , which is used to record the actual sampling clock cycle number of the transmission of the X-th sub-serial data.
[0147] Step B10: According to the segmentation n of the matching characters in step B2, repeat step B9, start n counters in sequence, and record the actual sampling clock cycle numbers C 1 , C 2 , …, C n .
[0148] Step B11: After n edge transitions of the serial data are completed and the n counters have all completed counting, perform table lookup and comparison in sequence. When C 1 , C 2 , …, C n all fall within the sampling clock cycle range of a certain baud rate segment, it is considered that the baud rate parameter adopted by the sending end is this one.
[0149] If there is no completely matching baud rate in the table lookup, it is judged that the received data is a wrong matching data or other interference signals, and return to step B6 to re-perform adaptive matching; if the number of detected transitions is less than n, but the timeout counter C maxIf the count exceeds the maximum value, it is determined that incorrect matching data or other interference signals have been received, and the process returns to step B6 to perform adaptive matching again.
[0150] Step B12: After receiving the correctly matched character, set the baud rate of the serial port transceiver module to the matched baud rate parameter, define the pin where the correctly matched character is received as the serial port receive pin Rx, and configure the other pin as the output mode and define it as the serial port transmit pin Tx.
[0151] The serial port receiving device designed by FPGA in this embodiment does not need to know the serial port baud rate parameter and the serial port transceiver pin definition of the sending end in advance. The receiving end can adaptively match the baud rate parameter and the transceiver pin definition of the sending end after receiving the matching character, and the adaptive matching efficiency is high. Only one matching character needs to be transmitted to complete the entire adaptive matching process. At the same time, the hardware-based description language is convenient for transplantation, greatly reducing the debugging workload between the docking devices in the serial port communication system and improving the convenience of using the serial port communication module.
[0152] Please refer to Figure 5 , Figure 5 FIG. 13 is a schematic structural diagram of a serial port communication system provided by an embodiment of the present application; the system is applied to a receiving end in communication connection with a sending end, and the serial port communication system includes: a transceiver signal detection module 501, a serial port data transceiver module 502, and a serial port baud rate detection module 503;
[0153] The serial port data transceiver module is used to receive serial data;
[0154] The serial port baud rate detection module is used to start a counter and record the actual sampling clock cycle number of each sub-serial data when an edge transition occurs in the serial data; wherein, the sub-serial data is the data received between the i-th edge transition and the (i + 1)-th edge transition in the serial data; i is a positive integer;
[0155] The serial port baud rate detection module is further used to match the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in a preset relationship table, and determine the target baud rate according to the matching result; wherein, the preset relationship table stores the preset sampling clock cycle number value ranges for receiving each sub-serial data at multiple preset baud rates;
[0156] The serial port data transceiver module is further used to perform parameter configuration according to the target baud rate, so that the receiving end and the sending end perform serial port communication based on the target baud rate.
[0157] In this embodiment, a corresponding counter is started according to the edge transition of the received serial data, and the actual sampling clock cycle number of the sub-serial data received between two adjacent edge transitions is obtained. A corresponding relationship between multiple preset baud rates and the value range of the preset sampling clock cycle number of each sub-serial data is pre-stored in a preset relationship table. In this embodiment, the actual sampling clock cycle number is matched with the value range of the preset sampling clock cycle number, and then the target baud rate is determined according to the matching result, so that the receiving end can also perform serial communication with the sending end based on the target baud rate. Therefore, this embodiment can automatically set the baud rate of the receiving end and improve the efficiency of serial communication debugging work.
[0158] Further, it further includes:
[0159] A transceiver signal detection module, configured to set all IO pins connected to the sending end in the receiving end as serial input pins before receiving the serial data; and further configured to, after receiving the serial data, before the receiving end and the sending end perform serial communication based on the target baud rate, set the IO pins that have received the serial data as the serial input pins; and set the IO pins that have not received the serial data as the serial output pins.
[0160] Further, it further includes:
[0161] A relationship table construction module, configured to determine the serial data by negotiating with the sending end; wherein the serial data is a binary string containing 0 and 1; and further configured to divide the serial data into n sub-serial data based on a preset rule; wherein the preset rule is that the j-th sub-serial data is a string containing only 0, and the (j + 1)-th sub-serial data is a string containing only 1, 1 ≤ j ≤ n; j and n are positive integers; and further configured to select a preset baud rate from a set of alternative baud rates; and further configured to calculate the value range of the preset sampling clock cycle number of each sub-serial data at the preset baud rate according to an error coefficient; and further configured to determine whether all the baud rates in the set of alternative baud rates have been selected; if so, construct the preset relationship table according to the corresponding relationship between the preset baud rate and the value range of the preset sampling clock cycle number; if not, enter the step of selecting a preset baud rate from the set of alternative baud rates.
[0162] Further, a serial port baud rate detection module is configured to update the number of edge transitions k when an edge transition occurs in the serial data; k is a positive integer; it is further configured to control the start of the first cycle counter if the updated number of edge transitions k is equal to 1; it is further configured to control the stop of the (k - 1)-th cycle counter and control the start of the k-th cycle counter if the updated number of edge transitions k is greater than 1 and the serial data has not been transmitted completely; it is further configured to control the stop of the k-th cycle counter if the serial data has been transmitted completely; it is further configured to set the count value of the k-th cycle counter as the actual sampling clock cycle number of the k-th sub-serial data.
[0163] Further, the process of the serial port baud rate detection module matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in the preset relationship table includes: determining the preset number n of the sub-serial data according to the preset relationship table; converting the actual sampling clock cycle numbers of all the sub-serial data into a one-dimensional array {N 1 , N 2 , …, N m , …, N k}, 1 ≤ m ≤ k, N m represents the count value of the m-th cycle counter, m is a positive integer; selecting adjacent n count values from the one-dimensional array as the target count value combination, and matching the target count value combination with the preset sampling clock cycle number value ranges in the preset relationship table.
[0164] Further, the process of the serial port baud rate detection module selecting adjacent n count values from the one-dimensional array as the target count value combination and matching the target count value combination with the preset sampling clock cycle number value ranges in the preset relationship table includes: setting the count value N 1 of the first cycle counter in the one-dimensional array as the starting position of the sliding window, and setting the window size of the sliding window as n; taking the n count values corresponding to the sliding window as the target count value combination; matching the target count value combination with the preset sampling clock cycle number value ranges in the preset relationship table; if the target count value combination does not match the preset sampling clock cycle number value ranges, updating the position of the sliding window according to a preset step size, and entering the step of taking the n count values corresponding to the sliding window as the target count value combination.
[0165] Further, it further includes:
[0166] A glitch removal module, configured to remove the count values less than the critical value in the one-dimensional array before selecting adjacent n count values from the one-dimensional array as the target count value combination.
[0167] Further, it further includes:
[0168] A transmission completion detection module, configured to determine a preset number n of the sub-serial data according to the preset relation table; and further configured to determine that the serial data transmission is completed if the updated number k of edge transitions is equal to n + 1.
[0169] Further, it further includes:
[0170] A timeout judgment module, configured to determine a preset number n of the sub-serial data according to the preset relation table; further configured to start a timeout counter when starting the first cycle counter; and further configured to determine that there is an abnormality in the received serial data and reset all the counters, the timeout counter, and the actual sampling clock cycle number if the count value of the timeout calculator is greater than a preset value and the updated number k of edge transitions is less than n + 1.
[0171] Further, the process of the serial port baud rate detection module matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value range in the preset relation table and determining the target baud rate according to the matching result includes: selecting the current preset baud rate from the preset relation table; matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value range corresponding to the current preset baud rate; if the matching result is successful, determining that the current preset baud rate is the target baud rate; if the matching result is failed, entering the step of selecting the current preset baud rate from the preset relation table.
[0172] Since the embodiments of the system part correspond to the embodiments of the method part, for the embodiments of the system part, please refer to the description of the embodiments of the method part, which will not be elaborated here temporarily.
[0173] The present application further provides a storage medium, on which a computer program is stored, and when the computer program is executed, the steps provided by the above embodiments can be implemented. The storage medium may include: various media such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disc that can store program codes.
[0174] The present application further provides an electronic device, which may include a memory and a processor. A computer program is stored in the memory, and when the processor calls the computer program in the memory, the steps provided by the above embodiments can be implemented. Of course, the electronic device may further include various network interfaces, power supplies and other components.
[0175] The various embodiments in the specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other. For the system disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple. For related parts, reference can be made to the description in the method section. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of this application, several improvements and modifications can be made to this application, and these improvements and modifications also fall within the protection scope of the claims of this application.
[0176] It should also be noted that in this specification, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including an..." does not exclude the existence of another identical element in the process, method, article or device including the said element.
Claims
1. A serial communication method, characterized in that, it includes: Receiving serial data; When an edge transition occurs in the serial data, starting a counter and recording the actual sampling clock cycle number of each sub-serial data; wherein, the sub-serial data is the data received between the i-th edge transition and the (i + 1)-th edge transition in the serial data; i is a positive integer; Matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in a preset relationship table, and determining a target baud rate according to the matching result; wherein, the preset relationship table stores the preset sampling clock cycle number value ranges for receiving each of the sub-serial data at multiple preset baud rates; Performing parameter configuration according to the target baud rate, so that the receiving end and the sending end perform serial communication based on the target baud rate.
2. The serial communication method according to claim 1, characterized in that, before receiving serial data, it further includes: Setting all the IO pins connected to the sending end in the receiving end as serial input pins; Correspondingly, after receiving serial data, before the receiving end and the sending end perform serial communication based on the target baud rate, it further includes: Setting the IO pin that has received the serial data as the serial input pin; Setting the IO pins that have not received the serial data as the serial output pins.
3. The serial communication method according to claim 1, characterized in that, before matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in the preset relationship table, it further includes: Negotiating with the sending end to determine the serial data; wherein, the serial data is a binary string containing 0 and 1; Dividing the serial data into n sub-serial data based on a preset rule; wherein, the preset rule is that the j-th sub-serial data is a string containing only 0, and the (j + 1)-th sub-serial data is a string containing only 1, 1 ≤ j ≤ n; j and n are positive integers; Selecting a preset baud rate from a set of alternative baud rates; Calculating the preset sampling clock cycle number value range for each of the sub-serial data at the preset baud rate according to an error coefficient; Judging whether all the baud rates in the set of alternative baud rates have been selected; If so, constructing the preset relationship table according to the corresponding relationship between the preset baud rate and the preset sampling clock cycle number value range; If not, entering the step of selecting a preset baud rate from the set of alternative baud rates.
4. The serial communication method according to claim 1, characterized in that, when an edge transition occurs in the serial data, starting a counter and recording the actual sampling clock cycle number of each sub-serial data, includes: When an edge transition occurs in the serial data, updating the edge transition count k; k is a positive integer; If the updated edge transition count k is equal to 1, controlling the first cycle counter to start; If the updated edge transition count k is greater than 1 and the serial data has not been transmitted completely, controlling the (k - 1)-th cycle counter to stop and controlling the k-th cycle counter to start; If the serial data transmission is completed, control the k-th cycle counter to stop; Set the count value of the k-th cycle counter as the actual sampling clock cycle number of the k-th sub-serial data.
5. The serial port communication method according to claim 4, characterized in that, Matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in the preset relationship table, including: Determining the preset number n of the sub-serial data according to the preset relationship table; Convert the actual sampling clock cycle numbers of all the sub-serial data into a one-dimensional array {N 1 , N 2 , …, N m , …, N k}, 1 ≤ m ≤ k, where N m represents the count value of the m-th cycle counter, and m is a positive integer; Selecting adjacent n count values from the one-dimensional array as the target count value combination, and matching the target count value combination with the preset sampling clock cycle number value ranges in the preset relationship table.
6. The serial port communication method according to claim 5, characterized in that, Selecting adjacent n count values from the one-dimensional array as the target count value combination, and matching the target count value combination with the preset sampling clock cycle number value ranges in the preset relationship table, including: Set the count value N of the first cycle counter in the one-dimensional array 1 as the starting position of the sliding window, and set the window size of the sliding window to n; Taking the n count values corresponding to the sliding window as the target count value combination; Matching the target count value combination with the preset sampling clock cycle number value ranges in the preset relationship table; If the target count value combination does not match the preset sampling clock cycle number value ranges, update the position of the sliding window according to a preset step size, and enter the step of taking the n count values corresponding to the sliding window as the target count value combination.
7. The serial port communication method according to claim 5, characterized in that, Before selecting adjacent n count values from the one-dimensional array as the target count value combination, further including: Removing the count values less than the critical value from the one-dimensional array.
8. The serial port communication method according to claim 4, characterized in that, further including: Determining the preset number n of the sub-serial data according to the preset relationship table; If the updated edge transition number k is equal to n + 1, it is determined that the serial data transmission is completed.
9. The serial port communication method according to claim 4, characterized in that, further including: Determining the preset number n of the sub-serial data according to the preset relationship table; When starting the first cycle counter, start the timeout counter; If the count value of the timeout calculator is greater than the preset value and the updated edge transition number k is less than n + 1, it is determined that the received serial data is abnormal, and all the counters, the timeout counter and the actual sampling clock cycle numbers are reset.
10. The serial port communication method according to claim 1, characterized in that, Matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in the preset relationship table, and determining the target baud rate according to the matching result, including: Selecting the current preset baud rate from the preset relationship table; Matching the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges corresponding to the current preset baud rate; If the matching result is successful, it is determined that the current preset baud rate is the target baud rate; If the matching result is a match failure, then proceed to the step of selecting the current preset baud rate from the preset relationship table.
11. A serial communication system Characterized in that Comprising: A serial port data transceiver module and a serial port baud rate detection module; The serial port data transceiver module is used to receive serial data; The serial port baud rate detection module is used to start a counter and record the actual sampling clock cycle number of each sub-serial data when an edge transition occurs in the serial data; wherein, the sub-serial data is the data received between the i-th edge transition and the (i + 1)-th edge transition in the serial data; i is a positive integer; The serial port baud rate detection module is further used to match the actual sampling clock cycle numbers of all the sub-serial data with the preset sampling clock cycle number value ranges in the preset relationship table, and determine the target baud rate according to the matching result; wherein, the preset relationship table stores the preset sampling clock cycle number value ranges for receiving each of the sub-serial data at multiple preset baud rates; The serial port data transceiver module is further used to perform parameter configuration according to the target baud rate, so that the receiving end and the sending end perform serial port communication based on the target baud rate.
12. An electronic device Characterized in that Comprising a memory and a processor, wherein a computer program is stored in the memory, and when the processor calls the computer program in the memory, the steps of the serial communication method according to any one of claims 1 to 10 are implemented.
13. A storage medium Characterized in that The storage medium stores computer-executable instructions, and when the computer-executable instructions are loaded and executed by a processor, the steps of the serial communication method according to any one of claims 1 to 10 are implemented.