Design method for simplifying linear term chaotic system containing corresponding positive

Abstract

The invention relates to simplified circuit implementation of a chaotic system, in particular to circuit implementation of a general simplified chaotic system, which can be implemented by adopting a voltage follower isolation method and can also be implemented by adopting an in-phase proportion circuit compensation method for a system without a corresponding negative linear term in an equation. A system with an equation containing a corresponding negative linear term can be realized by adopting a direct method and can also be realized by adopting voltage follower compensation, and a system with an equation containing a corresponding positive linear term can be realized by adopting an in-phase proportion circuit compensation method. The implementation method of the chaotic system without the corresponding negative term or with the corresponding positive term can be implemented, and the method has universality and can be used for implementing various chaotic systems.

Description

Technical Field

[0001] The present invention relates to a method for designing a simplified circuit of a chaotic system, and particularly to a method for simplifying the design of a chaotic system including a corresponding positive linear term. Background Art

[0002] Implementing a chaotic system using circuits is the basis for applying chaotic systems to practical engineering. The main method for implementing a chaotic system circuit is to use a multiplier to perform multiplication operations, and resistors and capacitors cooperate with operational amplifiers to perform addition, subtraction, integration, inversion, etc. operations. For example, Wang Fanzhen et al. implemented a three-dimensional chaotic system using 9 operational amplifiers in a paper published in the 8th issue of Acta Physica Sinica in 2006. Niu Yujian et al. implemented a four-dimensional hyperchaotic system using 12 operational amplifiers in a paper published in Volume 15 of Commun Nonlinear Sci Numer Simulat in 2010. Li Qingdu et al. implemented a hyperchaotic system using 4 operational amplifiers in Volume 42 of INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS in 2014. Generally, at least three or four operational amplifiers are required to implement a three-dimensional chaotic system, and the devices used are relatively numerous, and the frequency cannot be too high, which affects the functional application of the chaotic system. American scholars Jonathan N. Blakely et al. proposed a method in Volume 17, 023112 of Chaos in 2007 that does not use operational amplifiers to implement the chaotic system proposed by American scholar Lorenz in 1963 in J. Atmos. Sci.The method of the Lorenz chaotic system proposed in Volume 20 has increased the frequency of the chaotic system. Recently, Wu Junyao et al. proposed a method for modifying the Lorenz system in the 69th volume, issue 3 of "IEEE TRANSACTIOS ON CIRCUITS AND SYSTEM-II: EXPRESS BRIEFS" in 2022. These two methods can only implement systems in the form of equations such as the Lorenz type, that is, each equation of the system contains a negative linear term (for example, the first equation contains -x, the second equation contains -y, and the third equation contains -z). For chaotic systems where not all equations contain negative linear terms, they cannot be implemented. In 1999, Chen Guanrong et al. proposed the Chen system in the 9th issue of "International Journal of Bifrucation and Choas", and Lü Jinhu et al. proposed that the second equation of the Lü system in the 3rd issue of "International Journal of Bifrucation and Choas" in 2002 contains +y. In 2004, Liu Chongxin et al. proposed the Liu system in the 22nd volume of "Chaos, Solitons and Fractals", and in 2008, Yang Qigui et al. proposed that the second equation of the Yang-Cheng system in the 18th volume, issue 5 of "International Journal of Bifrucation and Choas" does not contain y. For these four types of systems, the existing methods can only be implemented by using at least three or four operational amplifiers. The present invention proposes a method that can implement the above five types of systems by using only one operational amplifier. This method is universal and can be used to implement other various chaotic systems. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a design method and implementation of a general simplified chaotic system circuit. The present invention adopts the following technical means to achieve the invention purpose:

[0004] 1. A design method and implementation of a general simplified chaotic system circuit, characterized in that: for systems with corresponding negative linear terms in the equations, it can be implemented by the direct method or by voltage follower compensation. For systems without corresponding negative linear terms in the equations, it can be implemented by the voltage follower isolation method, or by the in-phase proportional circuit compensation method, or by constructing a negative resistance circuit compensation method. For systems with corresponding positive linear terms in the equations, it can be implemented by the in-phase proportional circuit compensation method or by the method of constructing a negative resistance circuit.

[0005] 2. The design method and implementation of a general simplified chaotic circuit according to claim 1, characterized in that: for a system whose equation contains a corresponding negative linear term, it can be implemented by the direct method or the voltage follower method;

[0006] The equation of the Lorenz chaotic system is:

[0007] a, b, and c are positive numbers

[0008] The second equation of Equation i contains -y. The system i is implemented by the direct method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The multiplier obtains the output of the second equation by integrating on the capacitor through a resistor. The multiplier integrates on the capacitor through a resistor and is connected in parallel with the resistor and the capacitor to obtain the output of the third equation;

[0009] The second equation of Equation i contains -y. The system i is implemented by the voltage follower method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through a voltage follower. The multiplier obtains the output of the second equation by integrating on the capacitor through a resistor. The multiplier integrates on the capacitor through a resistor and is connected in parallel with the resistor and the capacitor to obtain the output of the third equation

[0010] 3. The design method and implementation of a general simplified chaotic circuit according to claim 1, characterized in that: for a system whose equation does not contain a corresponding negative linear term, it can be implemented by the voltage follower isolation method, the in-phase proportional circuit compensation method, or the negative resistance circuit compensation method;

[0011] Adding a coefficient d to -y in the second equation of the Lorenz chaotic system equation, the chaotic system equation can be obtained as:

[0012] When d = 0, the system ii is Yang-Chen

[0013] a, b, and c are positive numbers

[0014] The second equation of Equation iii does not contain y. The second equation is implemented by the voltage follower isolation method. The output of the second equation is connected to the output of the first equation through a voltage follower and a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The multiplier obtains the output of the second equation by integrating on the capacitor through a resistor. The multiplier integrates on the capacitor through a resistor and is connected in parallel with the resistor and the capacitor to obtain the output of the third equation;

[0015] The second equation of Equation iii does not contain y. The second equation is implemented using the in-phase proportional circuit compensation method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through an in-phase proportional circuit. The multiplier obtains the output of the second equation by integrating through a resistor on the capacitor. The multiplier integrates through a resistor on the capacitor and is connected in parallel with the resistor and capacitor to obtain the output of the third equation;

[0016] The second equation of Equation iii does not contain y. The second equation is implemented using the method of constructing a negative resistance circuit compensation. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through a negative resistance circuit. The multiplier obtains the output of the second equation by integrating through a resistor on the capacitor. The multiplier integrates through a resistor on the capacitor and is connected in parallel with the resistor and capacitor to obtain the output of the third equation.

[0017] 4. The design method and implementation of a general simplified chaotic circuit according to claim 1, characterized in that: for a system in which the equation contains a corresponding positive linear term, it can be implemented by the in-phase proportional circuit compensation method or by the method of constructing a negative resistance;

[0018] Adding a coefficient -d to -y in the second equation of the Lorenz chaotic system equation, the Chen-type and Lü-type chaotic system equations can be obtained as follows:

[0019]

[0020] When d > 0 and b < 0, System iv is a Chen-type system. When d > 0 and b = 0, System iv is a Lü-type system. When d > 0 and b > 0, System iv is a system v similar to the Chen-type and Lü-type systems;

[0021] a, c, d are positive numbers,

[0022] The second equation of Equation v contains +y. System v is implemented using the in-phase proportional circuit compensation method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through an in-phase proportional circuit. The multiplier obtains the output of the second equation by integrating through a resistor on the capacitor. The multiplier integrates through a resistor on the capacitor and is connected in parallel with the resistor and capacitor to obtain the output of the third equation;

[0023] The second equation of Equation v contains +y. The system v is implemented by constructing a negative resistance circuit. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of a multiplier through a negative resistance circuit. The multiplier integrates on the capacitor through a resistor to obtain the output of the second equation. The multiplier integrates on the capacitor through a resistor and is connected in parallel with the capacitor through a resistor to obtain the output of the third equation.

[0024] The beneficial effects of the present invention are as follows: A method for implementing a chaotic system that only uses one operational amplifier and can achieve a chaotic system without corresponding negative terms or with corresponding positive terms is proposed. This method is universal and can be used to implement various chaotic systems. Description of the Drawings

[0025] Figure 1 Circuit diagram, numerical simulation, and circuit simulation diagram for implementing chaotic system i by the direct method.

[0026] Figure 2 Circuit diagram, numerical simulation, and circuit simulation diagram for implementing chaotic system i by the voltage follower method.

[0027] Figure 3 Circuit diagram, numerical simulation, and circuit simulation diagram for implementing chaotic system iii by the voltage follower isolation method.

[0028] Figure 4 Circuit diagram, numerical simulation, and circuit simulation diagram for implementing chaotic system iii by the in-phase proportional circuit method.

[0029] Figure 5 Circuit diagram, numerical simulation, and circuit simulation diagram for implementing chaotic system iii by the negative resistance circuit method.

[0030] Figure 6 Circuit diagram, numerical simulation, and circuit simulation diagram for implementing chaotic system v by the in-phase proportional circuit method.

[0031] Figure 7 Circuit diagram, numerical simulation, and circuit simulation diagram for implementing chaotic system v by the negative resistance circuit method. Detailed Embodiments

[0032] The following further describes the present invention in detail with reference to the drawings and preferred embodiments. See Figures 1-7 .

[0033] 1. For a system whose equation contains a corresponding negative linear term, it can be implemented by the direct method or the voltage follower method;

[0034] The equations of the Lorenz chaotic system are:

[0035] a, b, and c are positive numbers

[0036] In the second equation of Equation i, -y is included. The system i is implemented using the direct method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The multiplier obtains the output of the second equation by integrating on the capacitor through a resistor. The multiplier integrates on the capacitor through a resistor and is connected in parallel with the capacitor through a resistor to obtain the output of the third equation;

[0037] According to Figure 1 the circuit diagram in 2 and taking R 1 we get:

[0038]

[0039] Taking the parameters a = 10, b = 40, c = 8 / 3, and choosing an appropriate scale change, numerical simulation diagrams and circuit simulation diagrams are obtained as shown in Figure 1 The numerical simulation diagram is consistent with the circuit simulation diagram. Therefore, the designed circuit can implement the system.

[0040] In the second equation of Equation i, -y is included. The system i is implemented using the voltage follower method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through a voltage follower. The multiplier obtains the output of the second equation by integrating on the capacitor through a resistor. The multiplier integrates on the capacitor through a resistor and is connected in parallel with the capacitor through a resistor to obtain the output of the third equation.

[0041] According to Figure 2 the circuit diagram in 2 and taking R 1 we get:

[0042]

[0043] Taking the parameters a = 10, b = 40, c = 8 / 3, and choosing an appropriate scale change, numerical simulation diagrams and circuit simulation diagrams are obtained as shown in Figure 5 The numerical simulation diagram is consistent with the circuit simulation diagram. Therefore, the designed circuit can implement the system.

[0044] 2. For a system where the corresponding negative linear term is not included in the equation, it can be implemented using the voltage follower isolation method or the in-phase proportional circuit compensation method;

[0045] Adding a coefficient d to -y in the second equation of the Lorenz chaotic system equation, the chaotic system equation can be obtained as:

[0046] When d = 0, system ii is Yang-Chen

[0047] a, b, and c are positive numbers

[0048] The second equation of Equation iii does not contain y. The isolation method using a voltage follower is used to implement the second equation. The output of the second equation is connected to the output of the first equation through a voltage follower and a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The multiplier obtains the output of the second equation by integrating on the capacitor through a resistor. The multiplier integrates on the capacitor through a resistor and is connected in parallel with the capacitor through a resistor to obtain the output of the third equation;

[0049] See Figure 3 in the circuit diagram shown:

[0050]

[0051] Take parameters a = 10, b = 40, c = 8 / 3, and select an appropriate scale change to obtain the numerical simulation diagram and the circuit simulation diagram as shown in Figure 3 shown. The numerical simulation diagram is consistent with the circuit simulation diagram. Therefore, the designed circuit can implement System iii.

[0052] The second equation of Equation iii does not contain y. The second equation is implemented using the in-phase proportional circuit compensation method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through an in-phase proportional circuit. The multiplier obtains the output of the second equation by integrating on the capacitor through a resistor. The multiplier integrates on the capacitor through a resistor and is connected in parallel with the capacitor through a resistor to obtain the output of the third equation.

[0053] See Figure 4 in the circuit diagram shown:

[0054]

[0055] where f(y) is the output of the in-phase proportional circuit Take R 2 = 100R 1 , and we can get:

[0056]

[0057] Take parameters a = 10, b = 40, c = 8 / 3, and select an appropriate scale change to obtain the numerical simulation diagram and the circuit simulation diagram as shown in Figure 4 shown. The numerical simulation diagram is consistent with the circuit simulation diagram. Therefore, the designed circuit can implement System iii.

[0058] The second equation of Equation iii does not contain y. The second equation is implemented using the negative resistance circuit compensation method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through a negative resistance circuit. The multiplier integrates on the capacitor through a resistor to obtain the output of the second equation. The multiplier integrates on the capacitor through a resistor and is connected in parallel with the capacitor to obtain the output of the third equation;

[0059] See Figure 5 the circuit diagram in

[0060]

[0061] where f(R) is the output of the negative resistance circuit, Take R 5 = R 6 = 100 kΩ, R 2 = 100R 1 We can get: f(R) = -R 7 ;

[0062]

[0063] Take the parameters a = 10, b = 40, c = 8 / 3, and select an appropriate scale change to obtain the numerical simulation diagram and the circuit simulation diagram as Figure 3 shown in. The numerical simulation diagram is consistent with the circuit simulation diagram. Therefore, the designed circuit can implement System iii.

[0064] 3. For a system with a corresponding positive linear term in the equation, it can be implemented by the in-phase proportional circuit compensation method or by constructing a negative resistance circuit;

[0065] Adding a coefficient -d to -y in the second equation of the Lorenz chaotic system equation gives the Chen-type and Lü-type chaotic system equations as:

[0066]

[0067] When d > 0, b < 0, System iv is a Chen-type system. When d > 0, b = 0, System iv is a Lü-type system. When d > 0, b > 0, System iv is a system v similar to the Chen-type and Lü-type systems;

[0068] a, c, d are positive numbers,

[0069] The second equation of Equation v contains +y. The system v is implemented using the in-phase proportional circuit compensation method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through an in-phase proportional circuit. The multiplier obtains the output of the second equation by integrating on the capacitor through a resistor, and the multiplier integrates on the capacitor through a resistor and is connected in parallel with the capacitor to obtain the output of the third equation.

[0070] According to Figure 6 the circuit diagram in, and taking d = 1, we get:

[0071]

[0072] where f(y) is the output of the in-phase proportional circuit. Taking R 2 = 100R 1 , we can obtain:

[0073]

[0074] Taking the parameters a = 10, b = 40, c = 8 / 3, and choosing an appropriate scale change, the numerical simulation diagram and the circuit simulation diagram are obtained as shown in Figure 6 . The numerical simulation diagram is consistent with the circuit simulation diagram. Therefore, the designed circuit can implement the system.

[0075] The second equation of Equation v contains +y. The system v is implemented using the method of constructing a negative resistance circuit. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through a negative resistance circuit. The multiplier obtains the output of the second equation by integrating on the capacitor through a resistor, and the multiplier integrates on the capacitor through a resistor and is connected in parallel with the capacitor to obtain the output of the third equation.

[0076] According to Figure 7 the circuit diagram in, and taking d = 2, we get:

[0077]

[0078] where f(R) is the output of the negative resistance circuit. Taking R 5 = R 6 = 100 kΩ, R 2 = 100R 1 we can obtain: f(R) = -R 7

[0079]

[0080] Take parameters a = 10, b = 40, c = 8 / 3, and select an appropriate scale change to obtain numerical simulation diagrams and circuit simulation diagrams as shown in Figure 7 shown. The numerical simulation diagrams are consistent with the circuit simulation diagrams. Therefore, the designed circuit can implement the system.

[0081] Of course, the above description is not a limitation of the present invention, and the present invention is not limited to the above examples. Changes, modifications, additions, or substitutions made by those of ordinary skill in the art within the scope of the essence of the present invention also fall within the protection scope of the present invention.

Claims

1. A design method for simplifying a chaotic system including a corresponding positive linear term, characterized in that: For a system with a corresponding positive linear term in the equation, it can be realized by the in-phase proportional circuit compensation method or by constructing a negative resistance method; The equation of the Yang-Chen chaotic system is: is a positive number By adding a corresponding positive linear term to the second equation of the Yang-Chen chaotic system, the equation of the Chen-type and Lü-type chaotic systems can be obtained as follows: is a positive number, Since the second equation of Equation v contains +y, the system v is realized by the in-phase proportional circuit compensation method. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through an in-phase proportional circuit. The multiplier obtains the output of the second equation by integrating through a resistor on the capacitor, and the multiplier obtains the output of the third equation by integrating through a resistor on the capacitor and connecting the resistor in parallel with the capacitor; Since the second equation of Equation v contains +y, the system v is realized by constructing a negative resistance circuit. The output of the second equation is connected to the output of the first equation through a resistor, and then the output of the first equation is obtained by integrating through a capacitor. The output of the second equation is connected to one input terminal of the multiplier through a negative resistance circuit. The multiplier obtains the output of the second equation by integrating through a resistor on the capacitor, and the multiplier obtains the output of the third equation by integrating through a resistor on the capacitor and connecting the resistor in parallel with the capacitor.

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