Extensible on-chip photoelectric neuron chip integrated with photon amplification function, module and photon neural network

Abstract

The invention provides an extensible on-chip photoelectric neuron chip integrated with a photon amplification function, a module and a photon neural network, and the chip comprises a preposed optical amplifier which is used for receiving an optical signal and carrying out the optical amplification of the optical signal; the multiplication and addition unit is used for carrying out multiplication and addition operation on the amplified optical signal output by the pre-optical amplifier and outputting an operation result, the multiplication and addition unit comprises a first optical splitter used for dividing the amplified optical signal into a first optical signal and a second optical signal, the first optical signal is input into a plurality of multiplication branches for carrying out multiplication and addition operation, and the second optical signal is input into a plurality of multiplication branches for carrying out multiplication and addition operation; the second optical signal is input into the reference branch as a reference optical signal; and the first beam combiner is used for combining the output signal of the multiplication branch and the output signal of the reference branch as an operation result, and an intermediate optical amplifier is arranged in the reference branch and is used for carrying out optical amplification on the second optical signal.

Description

Technical Field

[0001] The present disclosure relates to intelligent photon signal processing technology and photon neural network technology, and more particularly to a scalable on-chip optoelectronic neuron chip, module and photon neural network integrating photon amplification function. Background Art

[0002] In recent years, photon neural networks have become high-performance and high-efficiency alternative computing platforms dedicated to machine learning tasks. Since photon neural networks directly process analog signals on optical devices, photons can overcome the disadvantages of traditional electronic layouts and reach a working frequency of up to 100 GHz. Therefore, compared with deep learning implemented through computer programming, optical hardware platforms, due to their ultra-large signal bandwidth, low latency and reconfigurability, have raised people's expectations for breaking the barriers of Moore's Law in terms of computing efficiency in traditional computers.

[0003] On-chip optoelectronic neurons are important units that make up photon neural networks. Most current architectures are composed of multiplication-addition units and non-linear units. However, such optoelectronic neuron architectures have poor scalability, and limited injected optical power cannot support the continuous expansion of the input signal dimension. Although the dimension of the input signal can be further expanded by converting one of the optical signals into an electrical signal through optoelectronic conversion and then modulating the electrical signal onto another laser source, this method requires the setting of an additional off-chip laser source, making the system architecture complex. Therefore, in order to ensure that the computing chip has the performance of small size and high-dimensional scalability at the same time, there is an urgent need for an optoelectronic neuron architecture with on-chip photon amplification. Summary of the Invention

[0004] The object of the present disclosure is precisely to overcome the above and / or other problems in the prior art. It provides a scalable on-chip optoelectronic neuron integrating photon amplification function, which realizes double on-chip photon amplification by setting a pre-amplifier and an intermediate amplifier, can enable the signal of the on-chip optoelectronic neuron to achieve high-dimensional sustainable expansion, and at the same time can ensure that the on-chip optoelectronic neuron has a small chip size.

[0005] According to an exemplary embodiment of the present disclosure, there is provided a scalable on-chip optoelectronic neuron chip integrating photon amplification function, including:

[0006] A pre-amplifier for receiving an optical signal and optically amplifying the optical signal; and

[0007] A multiplication-addition unit for performing multiplication-addition operations on the amplified optical signal output by the pre-amplifier and outputting an operation result,

[0008] The multiplication-addition unit includes:

[0009] The first optical splitter is configured to split the amplified optical signal into a first optical signal and a second optical signal. Among them, the first optical signal is input into a plurality of multiplication branches that perform the multiplication and addition operations, and the second optical signal is input into the reference branch as a reference optical signal;

[0010] The first optical combiner is configured to combine the output signal of the multiplication branch and the output signal of the reference branch as the operation result,

[0011] An intermediate optical amplifier is provided in the reference branch for optically amplifying the second optical signal.

[0012] In the above-mentioned on-chip optoelectronic neuron chip, preferably,

[0013] The multiplication and addition unit further includes:

[0014] The second optical splitter is disposed at the input end of the multiplication branch, splits the first optical signal into n paths and inputs them into each of the multiplication branches, where n is a positive integer greater than or equal to 2;

[0015] The second optical combiner is disposed at the output end of the multiplication branch, combines the outputs of each multiplication branch and inputs them into the first optical combiner.

[0016] In the above-mentioned on-chip optoelectronic neuron chip, preferably,

[0017] An intensity modulator for adjusting the intensity of the optical signal input into the multiplication branch and a weight modulator for adjusting the weight of the multiplication branch are respectively provided on each of the multiplication branches.

[0018] In the above-mentioned on-chip optoelectronic neuron chip, preferably,

[0019] Phase shifters are provided in both the multiplication branch and the reference branch. By adjusting the phase shifters, the phases of the optical signals in each of the multiplication branches and the reference branch are made consistent.

[0020] In the above-mentioned on-chip optoelectronic neuron chip, preferably,

[0021] It further includes a post-stage optical amplifier disposed at the post-stage of the multiplication and addition unit for non-linearly amplifying the operation result output by the multiplication and addition unit.

[0022] In the above-mentioned on-chip optoelectronic neuron chip, preferably,

[0023] The on-chip optoelectronic neuron chip is connected to a drive circuit capable of realizing non-linear amplification.

[0024] In the above-mentioned on-chip optoelectronic neuron chip, preferably,

[0025] The pre - optical amplifier, the intermediate optical amplifier, and / or the post - optical amplifier is a semiconductor optical amplifier.

[0026] An integrated photon - amplification - function - enabled scalable on - chip optoelectronic neuron chip according to another aspect of the present invention includes:

[0027] A pre - optical amplifier for receiving an optical signal and optically amplifying the optical signal; and

[0028] A multiply - add unit for performing a multiply - add operation on the amplified optical signal output by the pre - optical amplifier and outputting an operation result.

[0029] The multiply - add unit includes:

[0030] A first optical splitter for splitting the amplified optical signal into a first optical signal and a second optical signal, wherein the first optical signal is input to a plurality of multiplication branches for performing the multiply - add operation, and the second optical signal is input to a reference branch as a reference optical signal;

[0031] A third optical splitter for receiving the output signals of the multiplication branches and the output signal of the reference branch and outputting two optical signals with the same energy but opposite phases as the operation result.

[0032] An intermediate optical amplifier is provided in the reference branch for optically amplifying the second optical signal.

[0033] In the above - mentioned on - chip optoelectronic neuron chip, preferably,

[0034] Phase shifters are provided in both the multiplication branches and the reference branch. By adjusting the phase shifters, the phases of the optical signals in each of the multiplication branches are made consistent, but opposite to the phase of the optical signal in the reference branch.

[0035] In the above - mentioned on - chip optoelectronic neuron chip, preferably,

[0036] The pre - optical amplifier and the intermediate optical amplifier are semiconductor optical amplifiers.

[0037] The present invention also provides an integrated photon - amplification - function - enabled scalable on - chip optoelectronic neuron module, including:

[0038] A photodetector for receiving a to - be - calculated optical signal from a previous on - chip optoelectronic neuron module and converting it into an electrical signal, thereby obtaining the calculation result of the previous on - chip optoelectronic neuron module;

[0039] The on - chip optoelectronic neuron chip of any one of the above for receiving the calculation result as an input signal; and

[0040] The driving control circuit is used to control and drive the on-chip optoelectronic neuron chip so that the on-chip optoelectronic neuron chip operates on the input signal and outputs an optical signal.

[0041] The present invention also provides a photonic neural network, comprising a plurality of the above-mentioned on-chip optoelectronic neuron modules.

[0042] The present invention can solve the problem that current photoelectric neurons cannot be expanded on a large scale, and can help existing photonic neural networks to achieve higher-dimensional multiplication operations and neural network construction. Higher-dimensional neural networks can serve large models like ChatGPT, achieve photon acceleration of large models, and reduce latency. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The present disclosure may be better understood by describing exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, in which:

[0044] Figure 1 is a schematic structural diagram of an optoelectronic neuron chip 100 according to exemplary embodiment 1 of the present disclosure;

[0045] Figure 2A , 2B is a schematic diagram of the specific structure of the optical splitter 122 in the optoelectronic neuron chip 100 of the first embodiment;

[0046] Figure 3 This is an example diagram of the post-optical amplifier 130 of the optoelectronic neuron chip 100 of the first embodiment;

[0047] Figure 4 is a schematic structural diagram of the optoelectronic neuron module 10 of the present embodiment 1;

[0048] Figure 5 is a schematic structural diagram of an optoelectronic neuron chip 200 according to an exemplary embodiment 2 of the present disclosure;

[0049] Figure 6 This is an example diagram of the post-optical amplifier 230 of the optoelectronic neuron chip 200 of the second embodiment;

[0050] Figure 7 is a schematic structural diagram of the optoelectronic neuron module 20 of the second embodiment;

[0051] Figure 8 Schematic diagram of a neural network architecture having optoelectronic neuron modules 10 and 20. DETAILED DESCRIPTION

[0052] Specific embodiments of the present disclosure will be described below. It should be noted that in the specific description of these embodiments, for the sake of concise description, this specification may not describe all features of the actual embodiments in detail. It should be understood that in the actual implementation of any embodiment, just as in the process of any engineering project or design project, various specific decisions are often made to achieve the specific goals of the developer and to meet system-related or business-related restrictions, and this may also change from one embodiment to another. In addition, it should also be understood that although the efforts made in such a development process may be complex and lengthy, for those of ordinary skill in the art related to the content disclosed in the present disclosure, some design, manufacturing, or production changes based on the technical content disclosed in the present disclosure are only conventional technical means and should not be understood as the content of the present disclosure being insufficient.

[0053] Unless otherwise defined, technical terms or scientific terms used in the claims and the specification shall have the ordinary meaning understood by those of ordinary skill in the technical field to which the present disclosure pertains. The terms "first", "second", and similar terms used in the specification and claims of the present patent application do not denote any order, quantity, or importance, but are only used to distinguish different components. The terms "a" or "an" and the like do not denote a quantity limitation, but rather denote the presence of at least one. The terms "comprising" or "including" and the like are intended to mean that the elements or items appearing before "comprising" or "including" cover the elements or items listed after "comprising" or "including" and their equivalent elements, without excluding other elements or items. The terms "connected" or "coupled" and the like are not limited to physical or mechanical connections, nor are they limited to direct or indirect connections.

[0054] In the present disclosure, if not otherwise specified, all the embodiments and preferred embodiments mentioned herein can be combined with each other to form new technical solutions. In the present disclosure, if not otherwise specified, all the technical features and preferred features mentioned herein can be combined with each other to form new technical solutions.

[0055] In the description of the embodiments of the present disclosure, the term "and / or" is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in this article generally represents an "or" relationship between the associated objects before and after.

[0056] <Example 1>

[0057] Figure 1FIG. 0 is a schematic structural diagram of the optoelectronic neuron chip 100 according to Embodiment 1 of the present disclosure. Shown in the figure is an optoelectronic neuron architecture of an integrated on-chip optical amplifier based on a direct detection single-wavelength coherent method.

[0058] The optoelectronic neuron chip 100 includes a preamplifier 110, a multiply-accumulate unit 120, and / or a non-linear unit (not shown). Among them, the multiply-accumulate unit 120 includes optical splitters 121, 122, intensity modulators 123, 124, a phase shifter 125, optical combiners 126, 127, and an intermediate optical amplifier 128.

[0059] The input light input to the optoelectronic neuron chip 100 (here taking the DC light input with the electric displacement vector denoted as E in1 as an example) is optically amplified by the preamplifier 110 to obtain the amplified DC light (with the electric displacement vector denoted as E in2 ), to ensure that there is sufficient optical power budget in each branch of the subsequent connected multiply-accumulate unit 120.

[0060] The amplified DC light E in2 is input to the optical splitter 121. In this Embodiment 1, taking the 1·2 vector inner product as an example. Therefore, the optical splitter 121 adopts a 1:2 optical splitter to split the DC light E in2 into two paths with equal power. One of the paths is further split into n paths with equal power by a 1:n optical splitter 122 (denoted as the multiplication branch), where n is a positive integer greater than 1. As Figure 1 shown, the outputs of the optical splitter 122 from top to bottom are Path 1, Path 2... Path n.

[0061] Figure 2A 、 2B shows Figure 1 two exemplary structures of the optical splitter 122. Figure 2A In , the optical splitter 122 is composed of a separately designed optical splitter that satisfies one input and n outputs. Figure 2B In , the optical splitter 122 is implemented by cascading m 1:2 optical splitters to achieve a 1:2m (m is a non-negative integer) splitting.

[0062] Returning to Figure 1 , in the output paths 1 to n of the optical splitter 122, each path is cascaded with two modulators 123, 124 and a phase shifter 125. The modulator 123 adopts, for example, a Mach-Zehnder modulator to perform intensity modulation on the signal output from the optical splitter 122. In the figure, the modulation coefficient is set as x k (k = 1, 2,..., n). The modulator 124 further modulates the signal output from the modulator 123. For example, it can be weighted, and the weight is set as w k ​, or by applying a bias voltage to adjust the bias point, the phase shifter 125 is used to change the phase on this path to ensure the coherence of n + 1 paths (the DC light E in2 After passing through the optical splitter 121 and the optical splitter 122, a total of n + 1 paths are obtained). The output light E 1 ~E n After the above-mentioned intensity modulation and phase modulation in each path 1 to n are input to the n:1 combiner 126, thus synthesizing a single path of light.

[0063] On the other hand, the other path of light (denoted as the reference branch) split by the optical splitter 121 from the DC light E in2 is input to the intermediate optical amplifier 128 for realizing photon amplification. After the light signal output by the intermediate optical amplifier 128 passes through the phase shifter 125, it is input to the combiner 127 together with the output of the combiner 126. Thus, the light on the n + 1 paths after splitting is synthesized into a single path of light again and is output from the multiplication and addition unit 122 as the output light Eout.

[0064] Figure 1 In, the combiners 126 and 127 respectively adopt 1:2 and n:1 combiner structures corresponding to the optical splitters 121 and 122. Of course, the splitting ratio in this Embodiment 1 is not limited to Figure 1 the 1:2 structure shown. As long as the splitting ratio of the pre-stage optical splitter and the post-stage combiner is the same, any splitting ratio can be set according to actual needs.

[0065] By adjusting each phase shifter 125 to make the phases of the optical paths on the n + 1 paths consistent, the optical field finally output by the multiplication and addition unit 122 can be obtained:

[0066]

[0067] where, G: the gain of the intermediate optical amplifier 128;

[0068] E ref : the output of the reference branch

[0069] x k : the intensity modulation coefficient in each multiplication branch

[0070] w k : the weight in each multiplication branch

[0071] E k : the output of each multiplication branch

[0072] k: the number of paths 1 to n.

[0073] In this Embodiment 1, by providing a pre - optical amplifier 110 in the on - chip optoelectronic neuron chip 100 and a middle optical amplifier 128 in the multiply - add unit 120, the input optical signal is power - amplified. Among them, the pre - optical amplifier 110 can increase the dimension of the multiply - add calculation vector by being coupled to the subsequent multiply - add unit 120. By providing the middle optical amplifier 128, not only can the numerical requirement for the coupling ratio of the coupler be reduced, but also the photon amplification function of the signal can be realized, increasing the signal - to - noise ratio and the dimension of the multiply - add calculation vector in the neuron. Moreover, the amplified optical signal can ensure that when it is transmitted to the next neuron, the input power of the next neuron is basically the same as that of the previous neuron, ensuring the scalability of neuron connection. The optical amplifiers 110 and 128 here can be semiconductor optical amplifiers, erbium - doped fiber amplifiers, etc., as long as they can achieve optical amplification, there is no special limitation.

[0074] In addition, a post - optical amplifier can be connected to the subsequent stage of the beam combiner 127, such as Figure 3 shown. Figure 3 An example of the post - optical amplifier 130 for optically amplifying the output of the multiply - add unit 120 is shown. The optical signal E out output from the beam combiner 127 is input to the post - optical amplifier 130, and the post - optical amplifier 130 is used to achieve the non - linear amplification of the optical signal and realize the function of non - linear activation. The post - optical amplifier 130 can be coupled to the previous - stage multiply - add unit 120 through hetero - integration or other means to achieve the optical amplification of the multiply - add result. The amplification gain of the post - optical amplifier 130 is controlled by the current source connected to it. Of course, this non - linear function does not necessarily have to be Figure 3 achieved by the post - optical amplifier 130 shown, and it can also be achieved by a non - linear circuit, that is, realized electrically.

[0075] Figure 4 is a schematic structural diagram of the optoelectronic neuron module 10 with the on - chip optoelectronic neuron chip 100 of this Embodiment 1. In the figure, the solid line represents the circuit structure, and the dotted line represents the optical path structure.

[0076] As Figure 4 shown, the to - be - calculated optical signals X 1 , X 2 ... X n received by the optoelectronic neuron module 10 are respectively converted into electrical signals by the photodiodes (PD) 101, and the calculation results of the previous neuron can be extracted from the electrical signals.

[0077] The electrical signal output from the photodiode 101 is input to the unit 102 composed of a non-linear circuit and a driving circuit, which performs non-linear activation and electrical domain amplification on the above-mentioned extracted calculation results. The output electrical signal is injected into the on-chip photonic neuron chip 100 as the input signal X of the chip. Here, the non-linear activation is realized by the non-linear circuit, but it can also be realized by non-linear processing in the optical domain, such as semiconductor optical amplifiers, etc. (as Figure 3 shown) before the detection of PD101.

[0078] The weight electrical signals W 1 , W 2 ……W n required by the on-chip photonic neuron chip 100 can be directly electrically injected into the on-chip photonic neuron chip 100 after being amplified by the driving circuit 103.

[0079] The clock and control circuit 104 mainly ensures the synchronization of the signal injection timing, and at the same time controls the constant bias voltage of the thermal tuning and optical amplification in the on-chip photonic neuron chip 100. The externally connected laser 105 of the chip is used for DC optical injection.

[0080] The photonic neuron module 10 with the above structure outputs the optical signal Tx as the calculation result of the module and inputs this calculation result to the next neuron.

[0081] Since the pre-amplifier 110, the intermediate optical amplifier 128, and / or the post-amplifier 130 are provided in the on-chip photonic neuron chip 100 of this Embodiment 1, it is possible to not only reduce the numerical requirements for the coupling ratio of the coupler, but also realize the photon amplification function of the signal, increase the signal-to-noise ratio and the dimension of the multiplication-addition calculation vector in the neuron. Therefore, the photonic neuron module with this chip 100 can enable the signal of the on-chip photonic neuron to achieve high-dimensional sustainable expansion, while ensuring a small chip size, solving the problem that the current photonic neurons cannot be expanded on a large scale, and can help the existing photonic neural network to realize higher-dimensional multiplication operations and neural network construction. The higher-dimensional neural network can serve large models such as ChatGPT, etc., to achieve photon acceleration of the large model and reduce the time delay.

[0082] <Embodiment 2>

[0083] In Embodiment 1, the structure of the on-chip photonic neuron chip 100 and its module 10 based on the direct detection architecture is described. In the following Embodiment 2, the on-chip photonic neuron chip 200 and its module 20 based on the balanced detection architecture are described.

[0084] Figure 5It is a schematic structural diagram of the optoelectronic neuron chip 200 according to Embodiment 2 of the present disclosure. Shown in the figure is an optoelectronic neuron architecture based on a balanced detection coherent integrated on-chip optical amplifier.

[0085] The basic structure of the optoelectronic neuron chip 200 is similar to that of the optoelectronic neuron chip 100 in Embodiment 1, and includes a preamplifier 210, a multiply-accumulate unit 220, and / or a non-linear unit (not shown). Among them, the multiply-accumulate unit 220 includes splitters 221, 222, modulators 223, 224, a phase shifter 225, a combiner 226, an intermediate optical amplifier 228, and a splitter 227.

[0086] Among them, the settings and functions of the preamplifier 210, the multiply-accumulate unit 220, the splitters 221, 222, the modulators 223, 224, the phase shifter 225, the combiner 226, and the intermediate optical amplifier 228 respectively correspond to those of the preamplifier 110, the multiply-accumulate unit 120, the splitters 121, 122, the modulators 123, 124, the phase shifter 125, the combiner 126, and the intermediate optical amplifier 128 in Embodiment 1, so they will not be elaborated here.

[0087] In this Embodiment 2, based on the balanced detection architecture, therefore, the output E of the reference branch after being amplified by the intermediate optical amplifier 228 ref and the output of the combiner 226 are input to the 50:50 splitter 227 together. By adjusting the phase shifter 225 on the reference branch, the multiply-accumulate unit 222 outputs two optical fields E out1 、E out2 as the output of the optoelectronic neuron chip 200.

[0088] Figure 5 In, taking the vector inner product of 1·2 as an example, therefore, the splitter 227 adopts, for example, the transmission matrix of, thus, the optical fields E out1 、E out2 output by the multiply-accumulate unit 222 can be expressed by the following formula.

[0089]

[0090]

[0091] Among them, G: the gain of the intermediate optical amplifier 228;

[0092] E ref : the output of the reference branch

[0093] x k : the intensity modulation coefficient in each multiplication branch

[0094] w k : the weight in each multiplication branch

[0095] E k : Output of each multiplication branch

[0096] k: Numbering of paths 1 to n.

[0097] In this Embodiment 2, by setting a pre - optical amplifier 210 in the on - chip optoelectronic neuron chip 200 and setting an intermediate optical amplifier 228 in the multiply - add unit 220, the input optical signal is power - amplified. Among them, the pre - optical amplifier 210 can increase the dimension of the multiply - add calculation vector by being coupled with the subsequent multiply - add unit 220. By setting the intermediate optical amplifier 228, not only can the numerical requirement for the coupling ratio of the coupler be reduced, but also the photon amplification function of the signal can be realized, increasing the signal - to - noise ratio and the dimension of the multiply - add calculation vector in the neuron. Moreover, the amplified optical signal can ensure that when it is transmitted to the next neuron, the input power of the next neuron is basically the same as that of the previous neuron, ensuring the scalability of neuron connection. The optical amplifiers 210 and 228 here can be semiconductor optical amplifiers, erbium - doped fiber amplifiers, etc., as long as they can achieve optical amplification, there is no special limitation.

[0098] In addition, a post - optical amplifier can be connected to the subsequent stage of the optical splitter 227, such as Figure 6 shown. Figure 6 An example of a post - optical amplifier 230 for optically amplifying the output of the multiply - add unit 220 is shown. The optical signals E out1 、E out2 output from the optical splitter 227 are input to the post - optical amplifier 230, and the post - optical amplifier 230 is used to realize the non - linear amplification of the optical signal and the function of non - linear activation. The post - optical amplifier 230 can be coupled with the previous - stage multiply - add unit 220 through hetero - integration and other means to realize the optical amplification of the multiply - add result. The amplification gain of the post - optical amplifier 230 is controlled by the current source connected to it. Of course, this non - linear function does not necessarily have to be realized by Figure 3 the post - optical amplifier 230 shown, and it can also be realized by a non - linear circuit, that is, realized electrically.

[0099] Figure 7 is a schematic structural diagram of the optoelectronic neuron module 20 of the on - chip optoelectronic neuron chip 200 with this Embodiment 2. In the figure, the solid line represents the circuit structure, and the dotted line represents the optical path structure.

[0100] Such as Figure 7 shown, the optical signals X 1 , X 2 ……X nThey are respectively converted into electrical signals by the balanced photodetector (BPD) 201, and the calculation results of the previous neuron can be extracted from the electrical signals.

[0101] The electrical signal output from the balanced photodetector 201 is input to the unit 202 composed of a non-linear circuit and a driving circuit, where non-linear activation and electrical domain amplification are performed on the extracted calculation results, and the output electrical signal is injected into the on-chip optoelectronic neuron chip 200 as the input signal X of the chip.

[0102] The weight electrical signals W 1 , W 2 ……W n required by the on-chip optoelectronic neuron chip 200 can be directly electrically injected into the on-chip optoelectronic neuron chip 200 after being amplified by the driving circuit 203.

[0103] The clock and control circuit 204, the laser 205 are the same as the clock and control circuit 104 and the laser 105 shown in Figure 4 Example 1, so their descriptions are omitted.

[0104] The optoelectronic neuron module 20 with the above structure outputs two optical signals Tx as the calculation results of the module, and inputs the calculation results into the next neuron.

[0105] Since the on-chip optoelectronic neuron chip 200 in this Example 2 is provided with a pre-amplifier 210, an intermediate optical amplifier 228 and / or a post-amplifier 230, it can not only reduce the numerical requirements for the coupling ratio of the coupler, but also realize the photon amplification function of the signal, increase the signal-to-noise ratio and the dimension of the multiplication and addition calculation vectors in the neuron. Therefore, the optoelectronic neuron module with this chip 200 can enable the signal of the on-chip optoelectronic neuron to achieve high-dimensional sustainable expansion, while ensuring a small chip size, solving the problem that the current optoelectronic neurons cannot be expanded on a large scale, and can help the existing photon neural network to realize higher-dimensional multiplication operations and neural network construction. Higher-dimensional neural networks can serve large models such as ChatGPT, realizing photon acceleration of large models and reducing latency.

[0106] The above has described the on-chip optoelectronic neuron chip 100 and its module 10 based on the direct detection architecture, as well as the on-chip optoelectronic neuron chip 200 and its module 20 based on the balanced detection architecture. In the direct detection-based architecture, n + 1 phase shifters 125 are adjusted by powering to ensure that the optical phases of n + 1 paths are consistent, and the bias points of each modulator 123, 124 are adjusted to the Null point, so that the multiply-accumulate result can be extracted from the current value after single photodiode detection. In the balanced detection-based architecture, n + 1 phase shifters 225 are adjusted by powering to ensure that the phase difference between the reference branch and all multiplication branches is 90°, and the phases of all multiplication branches are consistent, and the bias points of each modulator 223, 224 are adjusted to the null point, so that the multiply-accumulate result can be extracted from the current value after the balanced detector. Therefore, theoretically, the above architecture of the present invention can achieve the inner product operation result.

[0107] Figure 8 The neural network architecture of the optoelectronic neuron module based on the present invention is given. The optoelectronic neuron module shown in the figure can adopt the optoelectronic neuron module 10 of Embodiment 1 or the optoelectronic neuron module 20 of Embodiment 2. These neuron modules 10, 20 are directly connected by an optical path (shown by the dashed arrow), and the weight information is injected into each neuron module 10, 20 through a circuit (shown by the solid arrow). The number of neuron nodes supported by each layer depends on the n value of the neuron module used in this layer. As described above, since the neuron modules 10, 20 of the present invention can be continuously expanded in high dimensions, therefore, the neural network architecture of the optoelectronic neuron module based on the present invention can be in a higher dimension to serve large models such as ChatGPT, realize the photonic acceleration of the large model, and further realize high-performance and high-efficiency deep learning.

[0108] It should be understood that the above description is illustrative rather than restrictive. For example, the above embodiments (and / or aspects thereof) can be used in combination with each other. In addition, many modifications can be made without departing from the scope of the present invention to adapt a specific situation or material to the teachings of various embodiments of the present invention. Although the dimensions and types of the materials described herein are used to define the parameters of various embodiments of the present invention, each embodiment is not meant to be restrictive, but rather an exemplary embodiment. Many other embodiments will be apparent to those skilled in the art upon reading the above description. Therefore, the scope of each embodiment of the present invention should be determined with reference to the appended claims and the full scope of the equivalent forms claimed thereby.

Claims

1. A scalable on-chip optoelectronic neuron chip integrating photon amplification function, characterized in that, it includes: A pre-amplifier for receiving an optical signal and optically amplifying the optical signal; and A multiply-accumulate unit for performing a multiply-accumulate operation on the amplified optical signal output by the pre-amplifier and outputting an operation result, The multiply-accumulate unit includes: A first optical splitter for splitting the amplified optical signal into a first optical signal and a second optical signal, wherein the first optical signal is input to a plurality of multiplication branches for performing the multiply-accumulate operation, and the second optical signal is input to a reference branch as a reference optical signal; A first optical combiner for combining the output signals of the multiplication branches and the output signal of the reference branch as the operation result, An intermediate optical amplifier is provided in the reference branch for optically amplifying the second optical signal.

2. The on-chip optoelectronic neuron chip according to claim 1, characterized in that, The multiply-accumulate unit further includes: A second optical splitter provided at the input end of the multiplication branch for splitting the first optical signal into n paths and inputting them to each of the multiplication branches, where n is a positive integer greater than or equal to 2; A second optical combiner provided at the output end of the multiplication branch for combining the outputs of each multiplication branch and inputting them to the first optical combiner.

3. The on-chip optoelectronic neuron chip according to claim 1, characterized in that, An intensity modulator for adjusting the intensity of the optical signal input to the multiplication branch and a weight modulator for adjusting the weight of the multiplication branch are respectively provided on each of the multiplication branches.

4. The on-chip optoelectronic neuron chip according to claim 1, characterized in that, Phase shifters are provided in both the multiplication branch and the reference branch, and by adjusting the phase shifters, the phases of the optical signals in each multiplication branch and the reference branch are made consistent.

5. The on-chip optoelectronic neuron chip according to claim 1, characterized in that, It further includes a post-amplifier provided at the subsequent stage of the multiply-accumulate unit for non-linearly amplifying the operation result output by the multiply-accumulate unit.

6. The on-chip optoelectronic neuron chip according to claim 1, characterized in that, The on-chip optoelectronic neuron chip is connected to a drive circuit capable of realizing non-linear amplification.

7. The on-chip optoelectronic neuron chip according to claim 5, characterized in that, The pre-amplifier, the intermediate optical amplifier and / or the post-amplifier is a semiconductor optical amplifier.

8. A scalable on-chip optoelectronic neuron chip integrating photon amplification function, characterized in that, it includes: A pre-amplifier for receiving an optical signal and optically amplifying the optical signal; and A multiply-accumulate unit for performing a multiply-accumulate operation on the amplified optical signal output by the pre-amplifier and outputting an operation result, The multiply-accumulate unit includes: A first optical splitter for splitting the amplified optical signal into a first optical signal and a second optical signal, wherein the first optical signal is input to a plurality of multiplication branches for performing the multiply-accumulate operation, and the second optical signal is input to a reference branch as a reference optical signal; A third optical splitter, configured to receive the output signal of the multiplication branch and the output signal of the reference branch, and output two optical signal with the same energy but opposite phases as the operation result. An intermediate optical amplifier is provided in the reference branch for optically amplifying the second optical signal.

9. The on-chip optoelectronic neuron chip according to claim 8, characterized in that phase shifters are provided in both the multiplication branch and the reference branch. By adjusting the phase shifters, the phases of the optical signals in each multiplication branch are made consistent, but opposite to the phase of the optical signal in the reference branch.

10. The on-chip optoelectronic neuron chip according to claim 8, characterized in that the pre-stage optical amplifier and the intermediate optical amplifier are semiconductor optical amplifiers.

11. A scalable on-chip optoelectronic neuron module integrating a photon amplification function, characterized in that it includes: An optoelectronic detector, configured to receive a to-be-calculated optical signal from a previous on-chip optoelectronic neuron module and convert it into an electrical signal, so as to obtain the calculation result of the previous on-chip optoelectronic neuron module; The on-chip optoelectronic neuron chip according to any one of claims 1 to 10, configured to receive the calculation result as an input signal; and A drive control circuit, configured to control and drive the on-chip optoelectronic neuron chip, such that the on-chip optoelectronic neuron chip performs operations on the input signal and outputs an optical signal.

12. A photonic neural network, characterized in that it includes a plurality of on-chip optoelectronic neuron modules according to claim 11.

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