Quantum chip maintenance method and electronic equipment

Abstract

The invention provides a quantum chip maintenance method and electronic equipment, and relates to the technical field of quantum computing, and the method comprises the steps: firstly constructing a directed acyclic graph according to a topological structure of a quantum chip and a maintenance dependency relationship of each quantum bit in the quantum chip; determining a to-be-checked node set according to latest calibration time and drift time thresholds corresponding to each node in the directed acyclic graph, performing parameter check on each node in the to-be-checked node set to determine a to-be-calibrated node set, and finally calibrating the nodes in the to-be-calibrated node set. Wherein nodes in the directed acyclic graph are used for indicating maintenance parameters of the corresponding quantum bits, and directed edges among the nodes are used for indicating dependency relationships among the maintenance parameters. According to the technical scheme provided by the invention, the maintenance efficiency of the quantum chip can be improved.

Description

Technical Field

[0001] This application relates to the field of quantum computing technology, and in particular, to a method for maintaining a quantum chip and an electronic device. Background Art

[0002] Quantum computing is a new type of computing method that uses the principles of quantum mechanics for computing. This computing method uses quantum bits as carriers and operation units of quantum information; generally, a quantum processor using quantum computing needs to integrate a certain number (for example, more than a hundred bits) of quantum bits on a quantum chip.

[0003] Before a quantum chip works, a series of calibration operations need to be performed on the characterization parameters of each quantum bit, and calibration operations also need to be performed on the quantum instruction pulse parameters for quantum computing. Due to reasons such as the complex process of quantum bits and the immaturity of cryoelectronics, the characterization parameters of quantum bits and the quantum instruction pulse parameters will drift. Therefore, these parameters need to be continuously maintained.

[0004] However, with the improvement of chip technology, the number of quantum bits integrated on a quantum chip is increasing, which makes the maintenance efficiency of the quantum chip lower and lower. Summary of the Invention

[0005] In view of this, this application provides a method for maintaining a quantum chip and an electronic device to improve the maintenance efficiency of the quantum chip.

[0006] To achieve the above object, in a first aspect, an embodiment of this application provides a method for maintaining a quantum chip, including:

[0007] Construct a directed acyclic graph according to the topological structure of the quantum chip and the maintenance dependency relationship of each quantum bit in the quantum chip. Nodes in the directed acyclic graph are used to indicate the maintenance parameters of corresponding quantum bits, and directed edges between the nodes are used to indicate the dependency relationship between the maintenance parameters;

[0008] Determine a set of nodes to be inspected according to the latest calibration time and drift time threshold corresponding to each node in the directed acyclic graph;

[0009] Perform parameter inspection on each node in the set of nodes to be inspected to determine a set of nodes to be calibrated;

[0010] Calibrate the nodes in the set of nodes to be calibrated.

[0011] The quantum chip maintenance method provided by the embodiments of this application first determines all the nodes in the directed acyclic graph that need to be further inspected (i.e., the set of nodes to be inspected) according to the latest calibration time of each node in the directed acyclic graph. Then, parameter inspections are performed on each node in the set of nodes to be inspected, so as to determine all the nodes that need to be calibrated (i.e., the set of nodes to be calibrated). Finally, the nodes in the set of nodes to be calibrated are calibrated. Compared with the prior art in which time inspections, parameter inspections, and calibrations are sequentially performed on each node (in this case, for each node, when the time inspection of the node fails, communication with the parameter inspection-related module is required to perform parameter inspection on the node, and when the parameter inspection fails, communication with the calibration-related module is required to calibrate the node), the technical solution provided by this application uniformly performs time inspections on all nodes to obtain the set of nodes to be inspected, and then through one communication, enables the parameter inspection-related module to obtain all the nodes that have failed the time inspection at once and perform parameter inspections. Then, through one communication, enables the calibration-related module to obtain all the nodes that have failed the parameter inspection at once and perform calibrations, thereby reducing communication overhead and improving the maintenance efficiency of the quantum chip.

[0012] In a possible implementation manner of the first aspect, according to the node constraints, parameter inspections are performed on each node in the set of nodes to be inspected in parallel, and / or, according to the node constraints, the nodes in the set of nodes to be calibrated are calibrated in parallel, where the node constraints are the constraints when each node in the directed acyclic graph is maintained in parallel.

[0013] Through the above implementation manner, parallel inspections and / or calibrations are performed on each node that satisfies the node constraints. Compared with the prior art in which maintenance is performed only on a single node each time, the maintenance efficiency of the quantum chip can be further improved.

[0014] In a possible implementation manner of the first aspect, the node constraints include crosstalk constraints and non-overlap constraints;

[0015] The crosstalk constraint is used to limit the crosstalk influence on each qubit during parameter inspection and parameter calibration to be less than or equal to the crosstalk influence threshold; the non-overlap constraint is used to limit each qubit to perform only one corresponding parameter inspection or calibration at the same time.

[0016] Through the above implementation manner, while improving the maintenance efficiency of the quantum chip through parallel maintenance, the influence of crosstalk existing between each qubit on the maintenance result can be reduced.

[0017] In a possible implementation manner of the first aspect, the performing parameter inspections on each node in the set of nodes to be inspected in parallel according to the node constraints includes;

[0018] Determine a first executable node set according to the set of nodes to be inspected and the node constraints, where each first node in the first executable node set satisfies the node constraints;

[0019] Inspect each first node in the first executable node set in parallel;

[0020] For each first node, after inspecting the first node, delete the node corresponding to the first node in the set of nodes to be inspected, and return to execute the step of determining the set of nodes ready for inspection according to the set of nodes to be inspected until the set of nodes to be inspected is empty or each node in the set of nodes to be inspected is being inspected; and, when the absolute value of the difference between the inspection value of the maintenance parameter corresponding to the first node and the standard value of the maintenance parameter is greater than the first threshold, add the first node to the set of nodes to be calibrated.

[0021] Through the above implementation, it is possible to inspect each node that satisfies the node constraints in parallel. Compared with the prior art where only a single node is inspected each time, the inspection efficiency of each node in the quantum chip can be improved, thereby further improving the maintenance efficiency of the quantum chip.

[0022] In a possible implementation manner of the first aspect, the determining the first executable node set according to the set of nodes to be inspected and the node constraints includes:

[0023] Determine a set of nodes ready for inspection according to the set of nodes to be inspected, where each node in the set of nodes ready for inspection has no child nodes;

[0024] Determine a first executable node set that satisfies the node constraints according to the set of nodes ready for inspection.

[0025] Through the above implementation, it is possible to put all the leaf nodes that satisfy the node constraints in the set of nodes to be inspected into the first executable node set, so that all the nodes in the first executable node set can be directly inspected in parallel later.

[0026] In a possible implementation manner of the first aspect, the method further includes: for each first node, when the absolute value of the difference between the inspection value of the maintenance parameter corresponding to the first node and the standard value of the maintenance parameter is greater than the second threshold, add each parent node of the first node in the directed acyclic graph to the set of nodes to be inspected, and delete the parent nodes of each parent node of the first node in the set of nodes ready for inspection, where the second threshold is greater than the first threshold.

[0027] Through the above embodiments, when the maintenance parameter offset corresponding to a certain node is relatively large, each parent node of the node can also be added to the check node set for checking, thereby improving the accuracy of the check result.

[0028] In a possible implementation manner of the first aspect, the parallel checking of each first node in the first executable node set includes:

[0029] Based on a dynamic scheduling strategy, determine a target first node from the first executable node set, where the quantum bit corresponding to the target first node is in an idle state;

[0030] Check the target first node and delete the target first node from the first executable node set;

[0031] In the case where there are idle bits in the first executable node set, return to execute the step of determining the target first node from the first executable node set based on the dynamic scheduling strategy.

[0032] Through the above embodiments, it is possible to parallelly check each node that meets the node constraints. Compared with the prior art where only a single node is checked each time, the checking efficiency of each node in the quantum chip can be improved.

[0033] In a possible implementation manner of the first aspect, the parallel calibration of the nodes in the node set to be calibrated according to the node constraints includes:

[0034] According to the node set to be calibrated and the node constraints, determine a second executable node set, where each second node in the second executable node meets the node constraints;

[0035] Parallelly calibrate each second node in the second executable node set;

[0036] For each second node, after calibrating the second node, delete the node corresponding to the second node from the node set to be calibrated, and return to execute the step of determining the calibration-ready node set according to the node set to be calibrated until the node set to be calibrated is empty or each node in the node set to be calibrated is being calibrated.

[0037] Through the above embodiments, it is possible to parallelly calibrate each node that meets the node constraints. Compared with the prior art where only a single node is calibrated each time, the calibration efficiency of each node in the quantum chip can be improved, thereby further improving the maintenance efficiency of the quantum chip.

[0038] In a possible implementation manner of the first aspect, the determining of the second executable node set according to the node set to be calibrated and the node constraints includes:

[0039] Determine a set of nodes ready for calibration according to the set of nodes to be calibrated, where the maintenance of each node in the set of nodes ready for calibration does not depend on other nodes in the set of nodes to be calibrated;

[0040] Determine a second set of executable nodes that meet the node constraints according to the set of nodes ready for calibration.

[0041] Through the above implementation, all root nodes in the set of nodes to be calibrated that meet the node constraints can be put into the second set of executable nodes, so that all nodes in the second set of executable nodes can be directly calibrated in parallel during subsequent calibration.

[0042] In a possible implementation manner of the first aspect, the parallel calibration of each second node in the second set of executable nodes includes:

[0043] Based on a static scheduling strategy, determine a target second node from the second set of executable nodes, where the qubit corresponding to the target second node is in an idle state;

[0044] Calibrate the target second node and delete the target second node from the second set of executable nodes;

[0045] When there are idle qubits in the second set of executable nodes, return to execute the step of determining the target second node from the second set of executable nodes based on the static scheduling strategy.

[0046] Through the above implementation, each node that meets the node constraints can be calibrated in parallel. Compared with the prior art where only a single node is calibrated each time, the calibration efficiency of each node in the quantum chip can be improved.

[0047] In a possible implementation manner of the first aspect, for each node in the directed acyclic graph, if the time interval between the latest calibration time of the node and the current time is greater than the drift time threshold of the node, the set of nodes to be checked includes the node.

[0048] Through the above implementation, nodes that need to be checked in the quantum chip can be screened out through simple and efficient time verification.

[0049] In a second aspect, an embodiment of the present application provides a quantum chip maintenance device, and the device includes:

[0050] A construction module: used to construct a directed acyclic graph according to the topological structure of the quantum chip and the maintenance dependency relationship of each qubit in the quantum chip. Nodes in the directed acyclic graph are used to indicate the maintenance parameters of the corresponding qubits, and the directed edges between the nodes are used to indicate the dependency relationship between the maintenance parameters;

[0051] Determination module: configured to determine a set of nodes to be inspected according to the latest calibration time and drift time threshold respectively corresponding to each node in the directed acyclic graph;

[0052] Inspection module: configured to perform parameter inspection on each node in the set of nodes to be inspected to determine a set of nodes to be calibrated;

[0053] Calibration module: configured to calibrate the nodes in the set of nodes to be calibrated.

[0054] In a possible implementation manner of the second aspect, the inspection module is specifically configured to: perform parameter inspection on each node in the set of nodes to be inspected in parallel according to node constraints, and / or, the calibration module is specifically configured to: calibrate the nodes in the set of nodes to be calibrated in parallel according to the node constraints, where the node constraints are the constraints when each node in the directed acyclic graph is maintained in parallel.

[0055] In a possible implementation manner of the second aspect, the node constraints include crosstalk constraints and non-overlap constraints;

[0056] The crosstalk constraint is used to limit the crosstalk influence on each qubit during parameter inspection and parameter calibration to be less than or equal to the crosstalk influence threshold; the non-overlap constraint is used to limit each qubit to perform only one corresponding parameter inspection or calibration at the same time.

[0057] In a possible implementation manner of the second aspect, the inspection module is specifically configured to:

[0058] Determine a first set of executable nodes according to the set of nodes to be inspected and the node constraints, and each first node in the first set of executable nodes satisfies the node constraints;

[0059] Inspect each first node in the first set of executable nodes in parallel;

[0060] For each first node, after inspecting the first node, delete the node corresponding to the first node in the set of nodes to be inspected, and return to execute the step of determining the set of nodes ready for inspection according to the set of nodes to be inspected until the set of nodes to be inspected is empty or each node in the set of nodes to be inspected is being inspected; and, when the absolute value of the difference between the inspection value of the maintenance parameter corresponding to the first node and the standard value of the maintenance parameter is greater than the first threshold, add the first node to the set of nodes to be calibrated.

[0061] In a possible implementation manner of the second aspect, the determination module is specifically configured to:

[0062] Determine a set of nodes ready for inspection according to the set of nodes to be inspected, where each node in the set of nodes ready for inspection has no child nodes;

[0063] Determine a first set of executable nodes that meet the node constraints according to the set of nodes ready for inspection.

[0064] In a possible implementation manner of the second aspect, the inspection module is further configured to: for each first node, when the absolute value of the difference between the inspection value of the maintenance parameter corresponding to the first node and the standard value of the maintenance parameter is greater than a second threshold, add each parent node of the first node in the directed acyclic graph to the set of nodes to be inspected, and delete the parent nodes of each parent node of the first node in the set of nodes ready for inspection, where the second threshold is greater than the first threshold.

[0065] In a possible implementation manner of the second aspect, the inspection module is specifically configured to:

[0066] Based on a dynamic scheduling policy, determine a target first node from the first set of executable nodes, where the qubit corresponding to the target first node is in an idle state;

[0067] Inspect the target first node and delete the target first node from the first set of executable nodes;

[0068] When there are idle qubits in the first set of executable nodes, return to execute the step of determining a target first node from the first set of executable nodes based on the dynamic scheduling policy.

[0069] In a possible implementation manner of the second aspect, the calibration module is specifically configured to:

[0070] Determine a second set of executable nodes according to the set of nodes to be calibrated and the node constraints, where each second node in the second set of executable nodes meets the node constraints;

[0071] Calibrate each second node in the second set of executable nodes in parallel;

[0072] For each second node, after calibrating the second node, delete the node corresponding to the second node in the set of nodes to be calibrated, and return to execute the step of determining a set of nodes ready for calibration according to the set of nodes to be calibrated until the set of nodes to be calibrated is empty or each node in the set of nodes to be calibrated is being calibrated.

[0073] In a possible implementation manner of the second aspect, the determination module is specifically configured to:

[0074] Determine a set of nodes ready for calibration according to the set of nodes to be calibrated, where the maintenance of each node in the set of nodes ready for calibration does not depend on other nodes in the set of nodes to be calibrated;

[0075] Determine a second set of executable nodes that meet the node constraints according to the set of nodes ready for calibration.

[0076] In a possible implementation manner of the second aspect, the calibration module is specifically configured to:

[0077] Based on a static scheduling policy, determine a target second node from the second set of executable nodes, where the qubit corresponding to the target second node is in an idle state;

[0078] Calibrate the target second node and delete the target second node from the second set of executable nodes;

[0079] When there are idle qubits in the second set of executable nodes, return to execute the step of determining a target second node from the second set of executable nodes based on the static scheduling policy.

[0080] In a possible implementation manner of the second aspect, for each node in the directed acyclic graph, if the time interval between the latest calibration time of the node and the current time is greater than the drift time threshold of the node, the set of nodes to be checked includes the node.

[0081] In a third aspect, an embodiment of the present application provides an electronic device, including: a memory and a processor, where the memory is used to store a computer program; the processor is used to execute the method described in the first aspect or any implementation manner of the first aspect when calling the computer program.

[0082] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the method described in the first aspect or any implementation manner of the first aspect is implemented.

[0083] In a fifth aspect, an embodiment of the present application provides a computer program product, when the computer program product runs on an electronic device, it causes the electronic device to execute the method described in the first aspect or any implementation manner of the first aspect.

[0084] In a sixth aspect, an embodiment of the present application provides a chip system, including a processor, the processor is coupled to a memory, and the processor executes a computer program stored in the memory to implement the method described in the first aspect or any implementation manner of the first aspect. Wherein, the chip system can be a single chip or a chip module composed of multiple chips.

[0085] It is understandable that the beneficial effects of the second to sixth aspects described above can be referred to the relevant descriptions in the first aspect, and will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0086] Figure 1 FIG. is a schematic flowchart of a quantum chip maintenance method provided by an embodiment of the present application;

[0087] Figure 2 FIG. is a schematic diagram of a directed acyclic graph provided by an embodiment of the present application;

[0088] Figure 3 FIG. is a schematic diagram of a quantum chip provided by an embodiment of the present application;

[0089] Figure 4 FIG. is a schematic flowchart of the inspection process of each node in the set of nodes to be inspected provided by an embodiment of the present application;

[0090] Figure 5 FIG. is a schematic structural diagram of a neural network model provided by an embodiment of the present application;

[0091] Figure 6 FIG. is a schematic diagram of the specific implementation process of node inspection provided by an embodiment of the present application;

[0092] Figure 7 FIG. is a schematic flowchart of the calibration process of each node in the set of nodes to be calibrated provided by an embodiment of the present application;

[0093] Figure 8 FIG. is a schematic diagram of the specific implementation process of node calibration provided by an embodiment of the present application;

[0094] Figure 9 FIG. is a comparison diagram of the effects of node inspection and calibration using the RL scheduling strategy and the prior art provided by an embodiment of the present application;

[0095] Figure 10 FIG. is a comparison diagram of the effects of node inspection using the RL scheduling strategy and the Min-Min scheduling strategy provided by an embodiment of the present application;

[0096] Figure 11 FIG. is a comparison diagram of the effects of node calibration using the RL scheduling strategy and the CP scheduling strategy provided by an embodiment of the present application;

[0097] Figure 12 FIG. is a schematic structural diagram of a quantum chip maintenance device provided by an embodiment of the present application;

[0098] Figure 13 FIG. is a schematic structural diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0099] The embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application. The terms used in the implementation part of the embodiments of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0100] As a new computing method using the principles of quantum mechanics, quantum computing uses qubits as the carriers and operation units of quantum information. One of the main implementation methods of qubits is superconducting circuits. The quantum properties exhibited by superconducting circuits under ultra-low temperature conditions provide discrete energy levels for encoding information. At the same time, superconducting circuits can also complete relevant calculations through interactions with external fields (such as microwaves and direct currents).

[0101] Quantum processors using quantum computing usually integrate more than a hundred qubits on a quantum chip. Before the quantum chip works, a series of calibration work needs to be carried out on the characterization parameters of each qubit, and at the same time, calibration work needs to be carried out on the quantum instruction pulse parameters for quantum computing. However, due to reasons such as the complex qubit process and the immaturity of cryoelectronics, the characterization parameters of qubits and the quantum instruction pulse parameters will drift, and the characterization parameters of qubits and the quantum instruction pulse parameters need to be continuously maintained during actual application.

[0102] When maintaining a quantum chip, first, a directed acyclic graph (DAG) can be constructed according to the dependency relationships between the parameter calibration experiments of each qubit in the quantum chip. Then, according to the dependency relationships between the nodes in the DAG graph (that is, the dependency relationships between the parameter calibration experiments corresponding to each node), each node in the DAG graph is traversed, and each node is respectively subjected to status check, data check, and calibration.

[0103] The status check can be judged by the time interval between the current time and the last calibration time of the node. If the time interval is short, the probability that the parameters corresponding to the node drift is small, and the node does not need to be calibrated, and the status of the node can be marked as not requiring calibration; if the time interval is long, the probability that the parameters corresponding to the node drift is large, and the node needs to be calibrated, and the status of the node can be marked as pending calibration.

[0104] Data checking is to determine the fitting parameters by fitting the nodes marked as to be calibrated through a small number of partially sampled experiments, so as to further check the nodes with the status of to be calibrated. Data checking further classifies the status of the nodes to be calibrated into unbiased status, slightly biased status, and bad data status. Among them, if the absolute value of the difference between the fitting parameter of the node to be calibrated and the standard parameter of the node is less than or equal to the first fitting threshold (such as 0.1), then the node is in an unbiased status, and there is no need to calibrate the node, and continue to check the status and data of the next node; if the absolute value of the difference between the fitting parameter of the node to be calibrated and the standard parameter of the node is greater than the first fitting threshold and less than or equal to the second fitting threshold (such as 0.3), then the node is in a slightly biased status. After calibrating the node, continue to check the status and data of the next node; if the absolute value of the difference between the fitting parameter of the node to be calibrated and the standard parameter of the node is greater than the second fitting threshold, then the node is in a bad data status, and it is necessary to backtrack and nest to perform data checking on the parent nodes of the node.

[0105] However, with the improvement of chip technology, the number of qubits integrated in quantum chips is also increasing, which makes the maintenance efficiency of the above method lower and lower. Therefore, the embodiments of the present application provide a quantum chip maintenance method to improve the maintenance efficiency of quantum chips.

[0106] Figure 1 It is a schematic flowchart of the quantum chip maintenance method provided by the embodiments of the present application. As Figure 1 shown, the quantum chip maintenance method provided in this embodiment may include the following steps:

[0107] S110. Construct a directed acyclic graph according to the topological structure of the quantum chip and the maintenance dependency relationship of each qubit in the quantum chip.

[0108] The nodes in the directed acyclic graph (DAG) can be used to indicate the maintenance parameters of the corresponding qubits, and the directed edges between the nodes in the DAG graph can be used to indicate the dependency relationship between the maintenance parameters, where the maintenance of the parameters can include parameter checking and calibration.

[0109] Exemplarily, as Figure 2 shown, the DAG graph includes two qubits (Qubit0 and Qubit1), each qubit includes multiple nodes, each node represents a maintenance parameter of the corresponding qubit, and the directed edge between any two nodes represents the maintenance dependency relationship between these two nodes. Among them, the maintenance of the node pointed to by the directed edge depends on the maintenance of another node. For example, Figure 2 the node A corresponds to the power maintenance of Qubit0, the node B corresponds to the spectrum maintenance of Qubit0, and the directed edge between the node A and the node B points to the node B, that is, the spectrum maintenance corresponding to the node A depends on the power maintenance corresponding to the node B.

[0110] In some embodiments, after the DAG is constructed, a quantum bit operation status record table may be created to record the operation status of each quantum bit in the quantum chip. If any node corresponding to a certain quantum bit is being inspected or calibrated, the status of this quantum bit in the quantum bit operation status record table may be the running status; if there is no node being inspected or calibrated among the nodes corresponding to a certain quantum bit, the status of this quantum bit in the quantum bit operation status record table may be the idle status.

[0111] It can be understood that the operation status of each quantum bit in the newly created quantum bit operation status record table is the idle status.

[0112] S120. Determine the set of nodes to be inspected according to the latest calibration time and drift time threshold respectively corresponding to each node in the directed acyclic graph.

[0113] In the DAG, the drift time thresholds corresponding to the nodes indicating different parameters of the same quantum bit may be different; the drift time thresholds corresponding to the nodes indicating the same parameter of different quantum bits may be the same.

[0114] Exemplarily, as Figure 2 shown, node A indicates the power of Qubit0, and the corresponding drift time threshold may be 1 hour; node B indicates the spectrum of Qubit0, and the corresponding drift time threshold may be 3 hours; node A` indicates the power of Qubit1, and the corresponding drift time threshold may be 1 hour; node B` indicates the spectrum of Qubit1, and the corresponding drift time threshold may be 3 hours.

[0115] For each node in the DAG, if the time interval between the latest calibration time of this node and the current time is greater than the drift time threshold of this node, it means that this node needs to be further inspected, and this node can be added to the set of nodes to be inspected. In this way, through simple time verification, the nodes in the quantum chip that need to be further inspected can be screened out.

[0116] Exemplarily, if the time interval between the latest calibration time of node A and the current time is 1.5 hours, and the drift time threshold corresponding to node A is 1 hour, it means that node A needs to be further inspected, and node A can be added to the set of nodes to be inspected.

[0117] S130. Perform parameter inspection on each node in the set of nodes to be inspected to determine the set of nodes to be calibrated.

[0118] In some embodiments, when performing parameter checks on each node in the set of nodes to be checked, each node in the set of nodes to be checked can be checked sequentially in a serial manner. In other embodiments, it is also possible to concurrently check each node in the set of nodes to be checked that meets the node constraints to improve the check efficiency. In the following, the embodiments of the present application will take the concurrent check of each node in the set of nodes to be checked that meets the node constraints as an example for illustrative purposes.

[0119] The node constraints can be the constraints when each node in the DAG graph is maintained in parallel. The node constraints can include crosstalk constraints and non-overlap constraints, etc.

[0120] The crosstalk constraint can be used to limit the crosstalk impact on each qubit of the quantum chip during maintenance to be less than or equal to the crosstalk impact threshold, so as to reduce the impact of the crosstalk existing between qubits on the check result and the calibration result. The crosstalk impact between qubits is mainly related to the distance between qubits. The closer the distance, the greater the crosstalk impact.

[0121] Exemplarily, as Figure 3 shown, in the quantum chip, the crosstalk impact between qubit 2, 4, 6, 8 and qubit 5 is all 1, and the crosstalk impact between qubit 1, 3, 7, 9 and qubit 5 is all 1.4. If the crosstalk impact threshold is 1.2, then the parameters of qubit 5 cannot be maintained in parallel with the parameters of qubit 2, 4, 6, 8; if the crosstalk impact threshold is 1.5, then the parameters of qubit 5 cannot be maintained in parallel with the parameters of qubit 1-4 and qubit 6-9.

[0122] The non-overlap constraint can be used to limit that each qubit can only perform the maintenance of one parameter at the same time. For example, if qubit 1 is being used to check its corresponding parameter 1, then before the check of parameter 1 is completed, other parameters that depend on qubit 1 during the check cannot be checked.

[0123] Figure 4 FIG. is a schematic flowchart of the check process of each node in the set of nodes to be checked provided by the embodiments of the present application. As Figure 4 shown, the check process of each node can include the following steps:

[0124] S131. Determine the first executable node set according to the set of nodes to be checked and the node constraints.

[0125] First, an empty set of nodes ready for check can be created, and then each leaf node in the set of nodes to be checked is added to the set of nodes ready for check. Among them, the leaf node is each node in the set of nodes to be checked that does not have child nodes. For example, Figure 2 node F in. The set of nodes ready for check can be in the form of a list, a set, etc.

[0126] Next, an empty first set of executable nodes can be created, and each node in the set of ready-to-check nodes that satisfies the node constraints is added to the first set of executable nodes. The first set of executable nodes can include each qubit that satisfies the crosstalk constraint, and each node corresponding to each qubit that satisfies the non-overlap constraint. The first set of executable nodes can be in the form of a list, a set, etc.

[0127] S132. Check each node in the first set of executable nodes in parallel.

[0128] Specifically, nodes can be sequentially selected from the first set of executable nodes for checking within a short period of time. Since the time for selecting nodes is much shorter than the time for checking nodes, multiple nodes will be checked in parallel.

[0129] When selecting a node from the first set of executable nodes, based on the dynamic scheduling policy, first select an idle qubit from the first set of executable nodes, and then select a node from each node corresponding to the qubit in the first set of executable nodes.

[0130] The dynamic scheduling policy can be a scheduling policy based on reinforcement learning (RL), or a scheduling policy based on minimum deviation (Min-Min), etc. In this embodiment, the dynamic scheduling policy is taken as an example of a scheduling policy based on reinforcement learning for exemplary illustration.

[0131] The scheduling policy based on reinforcement learning can be modeled as a Markov decision process (MDP). The MDP can be defined as a quadruple (S, A, R, P), where S represents the state set, A represents the action set, R represents the reward function, and P represents the state transition equation.

[0132] Specifically, S can represent the states of each node in the quantum chip that satisfies the node constraints at the current moment, that is, the states of each node in the first set of executable nodes. The state information of each node can be represented by two data: the number of ancestors of the node (that is, the number of all nodes directly and indirectly dependent on the node, such as Figure 2 the number of ancestors of node B is 2 in ) and the duration required to check the node. The state of a node can satisfy the following formula (1):

[0133]

[0134] represents the state of the node, P(ij) represents the ancestor node of the node, p ij represents the duration required to check the node, i represents that the node belongs to the i-th qubit on the quantum chip, and j represents that the node is the j-th node on the qubit.

[0135] A can represent an action that is executed whenever an idle qubit appears. This action can include selecting a certain idle qubit and choosing an unchecked node that satisfies the node constraint from this idle qubit.

[0136] R can represent the reward function of the reinforcement learning-based scheduling policy at any given time. When there are still nodes that have not been checked, the value of the reward function can be set to 0. When all nodes are being checked or have been checked, the value of the reward function can represent the improvement of the reinforcement learning-based scheduling policy relative to the existing scheduling method.

[0137] The reward function can satisfy the following formula (2):

[0138]

[0139] Where Ra(s, s`) represents the value of the reward function, s represents the current state, s` represents the state after the transition, t represents the total duration required to schedule all nodes, CP represents the existing scheduling policy (i.e., serial scheduling), and RL represents the reinforcement learning-based scheduling policy.

[0140] Furthermore, a neural network model can be established to determine the minimum value of the makespan of the reinforcement learning-based scheduling policy under the condition of satisfying the node constraint.

[0141] The neural network model can include two parts of input, namely the observation and the eligible nums. Among them, the observation can include the states of the nodes in the set of nodes to be checked, and the eligible nums can represent the number of nodes in the first set of executable nodes. To reduce the computational amount and speed up the decision-making process, the observation can also only include the states of the nodes in the first set of executable nodes.

[0142] Since the number of nodes that satisfy the node constraint on each qubit may vary, -1 can be used to complete the dimension with insufficient length so that the lengths between different dimensions in a tensor are consistent.

[0143] For example, if Q 0 (i.e., qubit 0) includes two nodes that satisfy the node constraint, and Q 1 (i.e., qubit 1) includes one, then the observations of these two qubits can be represented as [[[|P(00)|, p 00 ], [|P(01)|, p 01 ] ], [[|P(10)|, p 10 ], [-1, -1] ] ].

[0144] Since there are placeholders in the tensor (i.e., -1 used to complement the length), a variable eligible_nums can be defined as a mask to directly represent the number of nodes satisfying the constraints on each qubit. For example, if is used to represent the number of nodes satisfying the constraints on Q i , and Q i is composed of True and False, where True represents the nodes satisfying the constraints on Q i , and False represents the nodes not satisfying the constraints on Q i , then the eligible_nums corresponding to Q 0 and Q 1 can be represented as [[True,True],[True,False]].

[0145] To further save the scheduling time, nodes can be selected from the first set of executable nodes by the machine-first-operation-second (MFOS) method. This method can calculate a value for each qubit in the first set of executable nodes to represent the goodness or badness of the current state of the qubit, and then use the value corresponding to each qubit as the probability of the qubit being selected, and select a qubit from the candidate qubits according to the probability. Then, one of the nodes satisfying the constraints corresponding to the selected qubit can be selected according to a certain rule for inspection. That is, first select an executable qubit (an idle qubit with nodes satisfying the constraints), and then select a node satisfying the constraints on this qubit. This method directly reduces the original computational complexity of O(MN) to O(M + N), significantly improving the speed of selecting nodes from the first set of executable nodes.

[0146] Figure 5 is a schematic structural diagram of the neural network model provided by the embodiment of the present application. As Figure 5 shown, the neural network may include three multi-layer perceptron (MLP) models: an embedding layer, an actor network, and a critic network. Among them, the embedding layer is used to perceive and extract the state information of each node input to the neural network model, the actor network is used to output the corresponding action at each moment t, and the critic network is used to output the corresponding value at moment t.

[0147] The data flow of the neural network model can be as follows: First, the states of the nodes in the first executable node set input into the neural network model (including the number of ancestors of each node and the duration used to check each node) can be concatenated to form a non-matrix feature vector. The embedding layer can sense and extract the features in this feature vector and pass them into the value network to generate the value corresponding to the qubit to which each node belongs. Then, the value corresponding to each qubit can be used as the probability that the qubit is selected. One qubit (which can be identified by the ID of the qubit, i.e., Qid) is selected from the qubits, and the features of the nodes corresponding to this qubit in the first executable node set are passed into the policy network. The policy network can select one of the nodes (which can be identified by the ID of the node, i.e., Nid) based on another parameter input into the neural network model (i.e., the number of nodes in the first executable node set) and the features of the nodes passed in, as the output of the neural network model. The information output by the neural network model can include the identifier of this node and the identifier of the qubit to which this node belongs.

[0148] After a node is selected from the first executable node set by the neural network model, the node can be checked and deleted from the first executable node set. At the same time, the state of the qubit corresponding to this node in the qubit operation status record table can be updated to the running state, and the node being checked on the corresponding qubit is recorded.

[0149] Next, when there are idle qubits in the first executable node set, based on the dynamic scheduling policy, new nodes are selected from the first executable node set for checking.

[0150] When there are no idle qubits in the first executable node set, it is possible to wait for any of the nodes being checked to complete the check.

[0151] When any of the nodes being checked completes the check, first, the running state of the qubit corresponding to this node in the qubit operation status record table can be updated to the idle state.

[0152] S133. For each node, when the node has been checked, compare the absolute value of the difference between the checked value of the maintenance parameter of this node and the standard value with the relationship between the first threshold and the second threshold.

[0153] After any node being inspected finishes the inspection, if the absolute value of the difference between the inspection value of the maintenance parameter corresponding to the inspected node and the standard value of the maintenance parameter is less than or equal to the first threshold, it indicates that the drift degree of the maintenance parameter corresponding to this node is small and calibration is not required, and step S136 can be directly executed. The first threshold can be determined according to the standard value of the maintenance parameter corresponding to this node. For example, if the standard value of the maintenance parameter corresponding to node A is 30, then the first threshold can be 30 * 10% = 3.

[0154] S134. For each node, when the absolute value of the difference between the inspection value of the maintenance parameter corresponding to this node and the standard value of the maintenance parameter is greater than the first threshold and less than or equal to the second threshold, add this node to the set of nodes to be calibrated.

[0155] After any node being inspected finishes the inspection, if the absolute value of the difference between the inspection value of the maintenance parameter corresponding to the inspected node and the standard value of the maintenance parameter is greater than the first threshold and less than or equal to the second threshold, it indicates that there is a certain degree of drift in the maintenance parameter corresponding to this node and calibration is required. Therefore, this node can be added to the set of nodes to be calibrated. The second threshold is greater than the first threshold, and the second threshold can also be determined according to the standard value of the maintenance parameter corresponding to this node. For example, if the standard value of the maintenance parameter corresponding to node A is 30, then the second threshold can be 30 * 30% = 9.

[0156] S135. For each node, when the absolute value of the difference between the inspection value of the maintenance parameter corresponding to this node and the standard value of the maintenance parameter is greater than the second threshold, add this node to the set of nodes to be calibrated, add each parent node of this node in the DAG graph to the set of nodes to be inspected, and at the same time delete the parent nodes of each parent node of this node in the inspection-ready node set.

[0157] After any node being inspected finishes the inspection, if the absolute value of the difference between the inspection value of the maintenance parameter corresponding to this node and the standard value of the maintenance parameter is greater than the second threshold, it indicates that the drift degree of the maintenance parameter corresponding to this node is very large. It may be due to the reason of the maintenance parameter itself or the influence of other maintenance parameters that this maintenance parameter depends on. Therefore, not only can this node be added to the set of nodes to be calibrated for calibration, but also each parent node of this node in the DAG graph can be added to the set of nodes to be inspected for inspection to improve the accuracy of the inspection result.

[0158] Since each node in the inspection-ready node set is a leaf node in the set of nodes to be inspected, it is necessary to delete the parent nodes of the newly added nodes in the inspection-ready node set.

[0159] S136. For each node, after checking the node, delete the corresponding node of the node in the set of nodes to be checked, and return to execute step S131 until the set of nodes to be checked is empty or all nodes in the set of nodes to be checked are being checked.

[0160] When any node being checked is completed, the corresponding node of the node can be deleted from the set of nodes to be checked. At this time, the parent node of the deleted node in the set of nodes to be checked becomes a leaf node, so it can be added to the set of nodes ready for inspection. And since the qubit corresponding to the deleted node also becomes idle, therefore, it is possible to return to execute step S131 to continue selecting other nodes for inspection until the set of nodes to be checked is empty or all nodes in the set of nodes to be checked are being checked (that is, all nodes in the set of nodes to be checked have been scheduled).

[0161] Figure 6 It is a schematic diagram of the specific implementation process of node inspection provided by the embodiment of the present application. As Figure 6 shown, first, the leaf nodes in the set of nodes to be checked can be added to the inspection ready list (that is, the set of nodes ready for inspection), and then the nodes that meet the node constraints are selected from the inspection ready list and added to the first executable list (that is, the first set of executable nodes). Then, based on the scheduling strategy of reinforcement learning, the scheduler selects a node from the first executable list for inspection. Then, the node can be deleted from the first executable list, and the running state of the qubit to which the node belongs in the qubit running state record table is updated to the running state. At the same time, the node being inspected on the corresponding qubit is recorded in the qubit running state record table.

[0162] Next, it can be detected first whether there are idle qubits in the first executable list. If there are, the scheduler can continue to select nodes from the first executable list for inspection; if not, it can wait for any node among the nodes being inspected to be completed.

[0163] When a node inspection is completed, first, the running state of the qubit corresponding to the node in the qubit running state record table is updated to the idle state. Then, according to the deviation degree of the inspection value of the maintenance parameter corresponding to the node with respect to the standard value, the inspection values are divided into unbiased data, slightly biased data, and bad data. Among them, unbiased data means that the node does not need calibration, slightly biased data means that the node needs calibration, and the node can be added to the set of nodes to be calibrated. Bad data means that not only the node needs calibration, but also the parent nodes of the node need to be inspected. The node can be added to the set of nodes to be calibrated, and each parent node of the node in the DAG graph is added to the set of nodes to be checked. At the same time, the parent nodes' parent nodes of the node in the inspection ready list are deleted.

[0164] Finally, the nodes that have been checked can be deleted from the set of nodes to be checked, and the step of adding the leaf nodes in the set of nodes to be checked to the check-ready list can be returned to select new nodes for checking until the number of scheduled nodes is the same as the number of nodes in the set of nodes to be checked, that is, all the nodes in the set of nodes to be checked have been scheduled.

[0165] S140. Calibrate the nodes in the set of nodes to be calibrated.

[0166] In some embodiments, when calibrating each node in the set of nodes to be calibrated, each node in the set of nodes to be calibrated can be calibrated sequentially in a serial manner. In other embodiments, the nodes in the set of nodes to be calibrated that meet the node constraints can also be calibrated in parallel to improve the calibration efficiency. In the embodiments of the present application, the subsequent calibration of the nodes in the set of nodes to be calibrated that meet the node constraints in parallel will be taken as an example for illustrative description.

[0167] Figure 7 It is a schematic flowchart of the calibration process of each node in the set of nodes to be calibrated provided by the embodiments of the present application. As Figure 7 shown, the calibration process of each node can include the following steps:

[0168] S141. Determine the second set of executable nodes according to the set of nodes to be calibrated and the node constraints.

[0169] First, an empty set of calibration-ready nodes can be created, and then each root node in the set of nodes to be calibrated is added to the set of calibration-ready nodes. Among them, in the set of nodes to be calibrated, the maintenance of the root node does not depend on other nodes. For example, Figure 2 nodes C, D, E, C`, D`, and E` in. The set of calibration-ready nodes can be in the form of a list, a set, etc.

[0170] Then, an empty second set of executable nodes can be created, and the nodes in the set of calibration-ready nodes that meet the node constraints are added to the second set of executable nodes. The second set of executable nodes can include each qubit that meets the crosstalk constraint, and each node corresponding to each qubit that meets the non-overlap constraint. The second set of executable nodes can be in the form of a list, a set, etc.

[0171] S142. Calibrate the nodes in the second set of executable nodes in parallel.

[0172] Specifically, nodes can be sequentially selected from the second set of executable nodes for calibration in a short time. Since the time for selecting nodes is very short compared to the time for calibrating nodes, multiple nodes will be calibrated in parallel.

[0173] When selecting a node from the second set of executable nodes, based on a static scheduling policy, a qubit in an idle state can be first selected from the second set of executable nodes, and then a node can be selected from the nodes corresponding to the qubit in the second set of executable nodes.

[0174] The static scheduling policy can be a scheduling policy based on reinforcement learning (RL), or a scheduling policy based on a heuristic algorithm (CP), etc. In this embodiment, an example is given where the dynamic scheduling policy is a scheduling policy based on reinforcement learning for illustrative purposes.

[0175] For the process of selecting a node from the second set of executable nodes according to the scheduling policy based on reinforcement learning, reference can be made to the relevant description of selecting a node from the first set of executable nodes according to the scheduling policy based on reinforcement learning in step S132 of the above Figure 4 illustrated embodiment, which will not be elaborated here.

[0176] S143. For each node, after calibrating the node, delete the node corresponding to the node in the set of nodes to be calibrated, and return to execute step S141 until the set of nodes to be calibrated is empty or all the nodes in the set of nodes to be calibrated are being calibrated.

[0177] When any node being calibrated is calibrated, the node corresponding to the node can be deleted from the set of nodes to be calibrated. At this time, the child node of the deleted node in the set of nodes to be calibrated becomes the new root node, so it can be added to the set of calibrated ready nodes. And since the qubit corresponding to the deleted node also becomes idle, therefore, it is possible to return to execute step S141 to continue selecting other nodes for calibration until the set of nodes to be calibrated is empty or all the nodes in the set of nodes to be calibrated are being calibrated (that is, all the nodes in the set of nodes to be calibrated are scheduled).

[0178] Figure 8 is a schematic diagram of the specific implementation process of node calibration provided by the embodiment of the present application. As Figure 8 shown, first, the root node in the set of nodes to be calibrated can be added to the calibrated ready list (i.e., the set of calibrated ready nodes), and then nodes that meet the node constraints are screened from the calibrated ready list and added to the second executable list (i.e., the second set of executable nodes). Then, based on the scheduling policy based on reinforcement learning, a node is selected from the second executable list by the scheduler for calibration. Then, the node is deleted from the second executable list, and the running state of the qubit to which the node belongs in the qubit running state record table is updated to the running state. At the same time, the node being calibrated on the corresponding qubit is recorded in the qubit running state record table.

[0179] Next, it is possible to first detect whether there are idle qubits in the second executable list. If there are, the scheduler can continue to select nodes from the second executable list for calibration; if not, it is possible to wait for any of the nodes being calibrated to complete calibration.

[0180] In the case where a node has completed calibration, it is possible to first update the running state of the qubit corresponding to this node in the qubit running state record table to the idle state, then delete this node from the set of nodes to be calibrated, and return to execute the step of adding the root node in the set of nodes to be calibrated to the calibration ready list, so as to select a new node for calibration until the number of nodes that have been scheduled is the same as the number of nodes in the set of nodes to be calibrated, that is, all the nodes in the set of nodes to be calibrated have been scheduled.

[0181] To demonstrate the effect of the technical solution of this application, taking a 7*7 quantum chip as an example, 10 single-bit node and 3 two-bit node DAG pattern examples are randomly generated and iterated 1000 times. Experiments are carried out using different topological structures (4*4, 6*6, 6*9, 8*8, 10*10). Among them, the number of single-bit experiments N1 ∈ {11, 13, 15}, and the number of two-bit experiments N2 ∈ {3, 4, 5}. The test examples are all composed of the above hyperparameter combinations.

[0182] Figure 9 This is a comparison chart of the effects of node inspection and calibration using the RL scheduling strategy and the prior art provided by the embodiments of this application. Among them, the improvement ratio = (prior art time - RL scheduling strategy time) / prior art time. As Figure 9 shown in (a) of Figure 9 below, for different qubits, the time taken to schedule all nodes using the RL scheduling strategy is on average about 1 / 10 of the time taken by the prior art, and the efficiency improvement is very obvious. As

[0183] Figure 10 This is a comparison chart of the effects of node inspection using the RL scheduling strategy and the Min-Min scheduling strategy provided by the embodiments of this application. Among them, the improvement ratio = (Min-Min scheduling strategy time - RL scheduling strategy time) / Min-Min scheduling strategy time. As Figure 10 shown in (a) and (b) of

[0184] Figure 11This is a comparison chart of the effects of node calibration using the RL scheduling strategy and the CP scheduling strategy provided by the embodiments of the present application. Among them, the improvement ratio = (time taken by the CP scheduling strategy - time taken by the RL scheduling strategy) / time taken by the CP scheduling strategy. As Figure 11 shown in (a) and (b) therein, under different numbers of qubits, single-qubit gates, and two-qubit gates for calibration, the efficiency of using the RL scheduling strategy is approximately 9 times that of using the CP scheduling strategy.

[0185] The quantum chip maintenance method provided by the embodiments of the present application first determines all the nodes that need to be further inspected in the directed acyclic graph (i.e., the set of nodes to be inspected) according to the latest calibration time of each node in the directed acyclic graph. Then, parameter checks are performed on each node in the set of nodes to be inspected, so as to determine all the nodes that need to be calibrated (i.e., the set of nodes to be calibrated). Finally, the nodes in the set of nodes to be calibrated are calibrated. Compared with the prior art in which time checks, parameter checks, and calibrations are sequentially performed on each node (in this case, for each node, when the time check of the node fails, it is necessary to communicate with the parameter check-related module to perform parameter checks on the node, and when the parameter check fails, it is necessary to communicate with the calibration-related module to perform calibration on the node), the technical solution provided by the present application uniformly performs time checks on all nodes to obtain the set of nodes to be inspected, and then through one communication, enables the parameter check-related module to obtain all the nodes that have failed the time check at one time and perform parameter checks. Then, through one communication, enables the calibration-related module to obtain all the nodes that have failed the parameter check at one time and perform calibration, thereby reducing communication overhead and improving the maintenance efficiency of the quantum chip.

[0186] Those skilled in the art can understand that the above embodiments are exemplary and are not used to limit the present application. Where possible, the execution order of one or several of the above steps can be adjusted, or selective combinations can be made to obtain one or more other embodiments. For example, in some embodiments, step S134 may not be executed. In some embodiments, step S135 may also not be executed. In some embodiments, both step S134 and step S135 may not be executed. Those skilled in the art can arbitrarily select and combine from the above steps. All those that do not depart from the essence of the present application's solution fall within the protection scope of the present application.

[0187] Based on the same concept, as an implementation of the above method, the embodiments of the present application provide a quantum chip maintenance device. The device embodiments correspond to the foregoing method embodiments. For the convenience of reading, the details of the foregoing method embodiments will not be described one by one in the device embodiments of the present application. However, it should be clear that the device in this embodiment can correspondingly implement all the contents of the foregoing method embodiments.

[0188] Figure 12The structural schematic diagram of the quantum chip maintenance device provided by the embodiments of the present application is as follows: Figure 12 As shown, the device provided by this embodiment includes:

[0189] A construction module 210: configured to construct a directed acyclic graph according to the topological structure of the quantum chip and the maintenance dependency relationships of the qubits in the quantum chip, where the nodes in the directed acyclic graph are used to indicate the maintenance parameters corresponding to the qubits, and the directed edges between the nodes are used to indicate the dependency relationships between the maintenance parameters;

[0190] A determination module 220: configured to determine a set of nodes to be inspected according to the latest calibration time and drift time threshold respectively corresponding to each node in the directed acyclic graph;

[0191] An inspection module 230: configured to perform parameter inspection on each node in the set of nodes to be inspected to determine a set of nodes to be calibrated;

[0192] A calibration module 240: configured to calibrate the nodes in the set of nodes to be calibrated.

[0193] In a possible implementation manner of the second aspect, the inspection module 230 is specifically configured to: perform parameter inspection on each node in the set of nodes to be inspected in parallel according to node constraints, and / or, the calibration module 240 is specifically configured to: calibrate the nodes in the set of nodes to be calibrated in parallel according to the node constraints, where the node constraints are the constraints when each node in the directed acyclic graph is maintained in parallel.

[0194] In a possible implementation manner of the second aspect, the node constraints include crosstalk constraints and non-overlap constraints;

[0195] The crosstalk constraint is used to limit the crosstalk influence on each qubit during parameter inspection and parameter calibration to be less than or equal to the crosstalk influence threshold; the non-overlap constraint is used to limit each qubit to perform only one corresponding parameter inspection or calibration at the same time.

[0196] In a possible implementation manner of the second aspect, the inspection module 230 is specifically configured to:

[0197] Determine a first set of executable nodes according to the set of nodes to be inspected and the node constraints, and each first node in the first set of executable nodes satisfies the node constraints;

[0198] Inspect each first node in the first set of executable nodes in parallel;

[0199] For each first node, after checking the first node, delete the node corresponding to the first node in the set of nodes to be checked, and return to execute the step of determining the set of nodes ready for inspection according to the set of nodes to be checked until the set of nodes to be checked is empty or each node in the set of nodes to be checked is being inspected; and, when the absolute value of the difference between the inspection value of the maintenance parameter corresponding to the first node and the standard value of the maintenance parameter is greater than the first threshold, add the first node to the set of nodes to be calibrated.

[0200] In a possible implementation manner of the second aspect, the determining module 220 is specifically configured to:

[0201] Determine a set of nodes ready for inspection according to the set of nodes to be checked, and each node in the set of nodes ready for inspection has no child nodes;

[0202] Determine a first set of executable nodes that meet the node constraints according to the set of nodes ready for inspection.

[0203] In a possible implementation manner of the second aspect, the inspection module 230 is further configured to: for each first node, when the absolute value of the difference between the inspection value of the maintenance parameter corresponding to the first node and the standard value of the maintenance parameter is greater than the second threshold, add each parent node of the first node in the directed acyclic graph to the set of nodes to be checked, and delete the parent nodes of each parent node of the first node in the set of nodes ready for inspection, where the second threshold is greater than the first threshold.

[0204] In a possible implementation manner of the second aspect, the inspection module 230 is specifically configured to:

[0205] Based on a dynamic scheduling policy, determine a target first node from the first set of executable nodes, where the qubit corresponding to the target first node is in an idle state;

[0206] Inspect the target first node and delete the target first node from the first set of executable nodes;

[0207] When there are idle qubits in the first set of executable nodes, return to execute the step of determining a target first node from the first set of executable nodes based on the dynamic scheduling policy.

[0208] In a possible implementation manner of the second aspect, the calibration module 240 is specifically configured to:

[0209] Determine a second set of executable nodes according to the set of nodes to be calibrated and the node constraints, and each second node in the second set of executable nodes meets the node constraints;

[0210] Calibrate each second node in the second executable node set in parallel;

[0211] For each second node, after calibrating the second node, delete the node corresponding to the second node in the node set to be calibrated, and return to execute the step of determining the calibrated ready node set according to the node set to be calibrated until the node set to be calibrated is empty or each node in the node set to be calibrated is being calibrated.

[0212] In a possible implementation manner of the second aspect, the determining module 220 is specifically configured to:

[0213] Determine a calibrated ready node set according to the node set to be calibrated, and the maintenance of each node in the calibrated ready node set does not depend on other nodes in the node set to be calibrated;

[0214] Determine a second executable node set that meets the node constraints according to the calibrated ready node set.

[0215] In a possible implementation manner of the second aspect, the calibration module 240 is specifically configured to:

[0216] Based on a static scheduling policy, determine a target second node from the second executable node set, and the qubit corresponding to the target second node is in an idle state;

[0217] Calibrate the target second node, and delete the target second node from the second executable node set;

[0218] When there are idle qubits in the second executable node set, return to execute the step of determining a target second node from the second executable node set based on the static scheduling policy.

[0219] In a possible implementation manner of the second aspect, for each node in the directed acyclic graph, if the time interval between the latest calibration time of the node and the current time is greater than the drift time threshold of the node, the node to be checked set includes the node.

[0220] The device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be elaborated here.

[0221] Those skilled in the art can clearly understand that, for the convenience and conciseness of description, only the above division of each functional unit and module is used as an example. In actual applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiments can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit. In addition, the specific names of each functional unit and module are only for the convenience of mutual distinction and do not limit the protection scope of this application. The specific working processes of the units and modules in the above system can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated here.

[0222] Based on the same concept, an embodiment of this application further provides an electronic device. Figure 13 As shown in the structural schematic diagram of the electronic device provided in the embodiment of this application, Figure 13 the electronic device provided in the embodiment of this application may include: a memory 310 and a processor 320. The memory 310 is used to store a computer program; the processor 320 is used to implement the method described in the foregoing method embodiments when calling the computer program.

[0223] The electronic device provided in this embodiment can execute the foregoing method embodiment, and its implementation principle and technical effects are similar and will not be elaborated here.

[0224] An embodiment of this application further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the method described in the foregoing method embodiments is implemented.

[0225] An embodiment of this application further provides a computer program product. When the computer program product runs on an electronic device, the electronic device is enabled to implement the method described in the foregoing method embodiments when executed.

[0226] An embodiment of this application further provides a chip system, including a processor. The processor is coupled to a memory, and the processor executes a computer program stored in the memory to implement the method described in the foregoing method embodiments. Wherein, the chip system can be a single chip or a chip module composed of multiple chips.

[0227] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in the form of a computer program product in whole or in part. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this specification are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (such as coaxial cable, optical fiber, digital subscriber line) or wirelessly (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or a data center that includes one or more integrated available media. The available medium can be a magnetic medium (such as a floppy disk, hard disk, or magnetic tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid state disk (SSD)), etc.

[0228] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware with a computer program. The program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the above method embodiments. The foregoing storage medium can include: various media that can store program codes such as ROM or random access memory RAM, magnetic disks, or optical discs.

[0229] The naming or numbering of steps that appear in this specification does not mean that the steps in the method process must be executed in the time / logical sequence indicated by the naming or numbering. The already named or numbered process steps can be changed in the order of execution according to the technical purpose to be achieved, as long as the same or similar technical effects can be achieved.

[0230] In the above embodiments, the descriptions of each embodiment have their own emphases. For parts not detailed or recorded in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0231] In the embodiments provided in this specification, it should be understood that the disclosed devices / equipment and methods can be implemented in other ways. For example, the device / equipment embodiments described above are merely illustrative. For example, the division of the modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection to each other can be through some interfaces. The indirect coupling or communication connection of the devices or units can be in electrical, mechanical or other forms.

[0232] It should be understood that in the description of this application's specification and the appended claims, the terms "including", "comprising", "having" and any variations thereof are intended to cover non-exclusive inclusion, all meaning "including but not limited to", unless otherwise specifically emphasized in other ways. For example, a process, method, system, product or equipment that includes a series of steps or modules does not have to be limited to those steps or modules clearly listed, but may include other steps or modules not clearly listed or inherent to these processes, methods, products or equipment.

[0233] In the description of this specification, unless otherwise stated, " / " means that the objects associated before and after are in an "or" relationship. For example, A / B can mean A or B; the "and / or" in this specification is used to describe the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone. Among them, A and B can be singular or plural.

[0234] Moreover, in the description of this specification, unless otherwise stated, "a plurality of" means two or more than two. "At least one of the following" or its similar expressions refer to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can mean: a, b, c, a - b, a - c, b - c, or a - b - c, where a, b, c can be single or multiple.

[0235] As used in this application's specification and the appended claims, the term "if" can be interpreted as "when...", "once", "in response to determining", or "in response to detecting" depending on the context. Similarly, the phrase "if determined" or "if [the described condition or event] is detected" can be interpreted as meaning "once determined", "in response to determining", "once [the described condition or event] is detected", or "in response to detecting [the described condition or event]" depending on the context.

[0236] In addition, in the description of the specification and the appended claims of this application, terms such as "first", "second", etc. are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence, nor can they be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments described herein can be implemented in an order other than that illustrated or described herein; features defined with "first" and "second" may explicitly or implicitly include at least one such feature.

[0237] In the embodiments of this specification, words such as "exemplarily" or "for example" are used to give examples, illustrations or explanations. Any embodiment or design solution described as "exemplarily" or "for example" in the embodiments of this specification should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Rather, the use of words such as "exemplarily" or "for example" is intended to present relevant concepts in a specific manner.

[0238] The reference to "one embodiment" or "some embodiments" etc. described in this application specification means that a specific feature, structure or characteristic described in connection with that embodiment is included in one or more embodiments of this specification. Thus, statements such as "in one embodiment", "in some embodiments", "in other some embodiments", "in still other embodiments" etc. that appear in different places in this specification do not necessarily all refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways.

[0239] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of this specification, and are not intended to limit them; although this specification has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this specification.

Claims

1. A method for maintaining a quantum chip, characterized in that, it includes: Constructing a directed acyclic graph according to the topological structure of the quantum chip and the maintenance dependency relationships of each qubit in the quantum chip, where the nodes in the directed acyclic graph are used to indicate the maintenance parameters corresponding to the qubits, and the directed edges between the nodes are used to indicate the dependency relationships between the maintenance parameters; Determining a set of nodes to be checked according to the latest calibration time and drift time threshold respectively corresponding to each node in the directed acyclic graph; Performing parameter checks on each node in the set of nodes to be checked to determine a set of nodes to be calibrated; Calibrating the nodes in the set of nodes to be calibrated.

2. The method according to claim 1, characterized in that, According to node constraints, parameter checks are performed on each node in the set of nodes to be checked in parallel, and / or, according to the node constraints, the nodes in the set of nodes to be calibrated are calibrated in parallel, where the node constraints are the constraints for parallel maintenance of each node in the directed acyclic graph.

3. The method according to claim 2, characterized in that, The node constraints include crosstalk constraints and non-overlap constraints; The crosstalk constraint is used to limit the crosstalk influence on each qubit during parameter check and parameter calibration to be less than or equal to the crosstalk influence threshold; the non-overlap constraint is used to limit each qubit to perform only one corresponding parameter check or calibration at the same time.

4. The method according to claim 2 or 3, characterized in that, The performing parameter checks on each node in the set of nodes to be checked according to node constraints includes; Determining a first set of executable nodes according to the set of nodes to be checked and the node constraints, where each first node in the first set of executable nodes satisfies the node constraints; Checking each first node in the first set of executable nodes in parallel; For each first node, after checking the first node, deleting the node corresponding to the first node in the set of nodes to be checked, and returning to execute the step of determining the set of nodes ready for check according to the set of nodes to be checked until the set of nodes to be checked is empty or each node in the set of nodes to be checked is being checked; and, when the absolute value of the difference between the checked value of the maintenance parameter corresponding to the first node and the standard value of the maintenance parameter is greater than the first threshold, adding the first node to the set of nodes to be calibrated.

5. The method according to claim 4, characterized in that, The determining a first set of executable nodes according to the set of nodes to be checked and the node constraints includes: Determining a set of nodes ready for check according to the set of nodes to be checked, where each node in the set of nodes ready for check has no child nodes; Determining a first set of executable nodes that satisfy the node constraints according to the set of nodes ready for check.

6. The method according to claim 4 or 5, characterized in that, The method further includes: for each first node, when the absolute value of the difference between the check value of the maintenance parameter corresponding to the first node and the standard value of the maintenance parameter is greater than a second threshold, adding each parent node of the first node in the directed acyclic graph to the set of nodes to be checked, and deleting the parent nodes of each parent node of the first node in the set of nodes ready for checking, where the second threshold is greater than the first threshold.

7. The method according to any one of claims 4-6, wherein, the parallel checking of each first node in the first set of executable nodes includes: determining a target first node from the first set of executable nodes based on a dynamic scheduling policy, where the qubit corresponding to the target first node is in an idle state; checking the target first node and deleting the target first node from the first set of executable nodes; when there are idle qubits in the first set of executable nodes, returning to execute the step of determining a target first node from the first set of executable nodes based on the dynamic scheduling policy.

8. The method according to any one of claims 2-7, wherein, the parallel calibration of the nodes in the set of nodes to be calibrated according to the node constraints includes: determining a second set of executable nodes according to the set of nodes to be calibrated and the node constraints, where each second node in the second set of executable nodes satisfies the node constraints; parallelly calibrating each second node in the second set of executable nodes; for each second node, after calibrating the second node, deleting the node corresponding to the second node in the set of nodes to be calibrated, and returning to execute the step of determining the set of nodes ready for calibration according to the set of nodes to be calibrated until the set of nodes to be calibrated is empty or each node in the set of nodes to be calibrated is being calibrated.

9. The method according to claim 8, wherein, the determining of the second set of executable nodes according to the set of nodes to be calibrated and the node constraints includes: determining a set of nodes ready for calibration according to the set of nodes to be calibrated, where the maintenance of each node in the set of nodes ready for calibration does not depend on other nodes in the set of nodes to be calibrated; determining a second set of executable nodes that satisfy the node constraints according to the set of nodes ready for calibration.

10. The method according to claim 8 or 9, wherein, the parallel calibration of each second node in the second set of executable nodes includes: determining a target second node from the second set of executable nodes based on a static scheduling policy, where the qubit corresponding to the target second node is in an idle state; calibrating the target second node and deleting the target second node from the second set of executable nodes; when there are idle qubits in the second set of executable nodes, returning to execute the step of determining a target second node from the second set of executable nodes based on the static scheduling policy.

11. The method according to any one of claims 1-10, wherein, For each node in the directed acyclic graph, if the time interval between the latest calibration time of the node and the current time is greater than the drift time threshold of the node, the node to be checked set includes the node.

12. An electronic device, characterized in that it includes: a memory and a processor, the memory is used for storing a computer program; the processor is used for executing the method according to any one of claims 1-11 when calling the computer program.

13. A computer-readable storage medium, on which a computer program is stored, characterized in that the computer program, when executed by a processor, implements the method according to any one of claims 1-11.

14. A computer program product, characterized in that when the computer program product runs on an electronic device, the electronic device is caused to execute the method according to any one of claims 1-11.

15. A chip system, characterized in that the chip system includes a processor, the processor is coupled to a memory, and the processor executes a computer program stored in the memory to implement the method according to any one of claims 1-11.

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