Driving method and system of display panel and display panel

Abstract

The invention provides a driving method and system of a display panel and the display panel, and belongs to the technical field of display driving, and the method comprises the steps: firstly, obtaining a refresh enable signal used for controlling to-be-displayed image data of each pixel line in each frame of to-be-displayed image to be refreshed or not refreshed; and then, when the display panel is judged to be in the target refresh state according to the refresh enable signal, stopping outputting the clock signal. Since the refresh enable signal can determine whether the to-be-displayed image data of each pixel row in each frame of to-be-displayed image needs to be refreshed or not, the refresh condition of the data of the pixel rows can be accurately acquired. Therefore, when the display panel is judged to be in the target refresh state according to the refresh enable signal, the output of the clock signal can be stopped without influencing the normal function of the display panel, and meanwhile, after the output of the clock signal is stopped, a circuit related to the clock signal also stops working, so that the display panel is in the target refresh state. And the power consumption of the display panel in the partition frequency division application is further reduced.

Description

Technical Field

[0001] This application relates to the field of display driving technology, and particularly to a driving method, system and display panel for a display panel. Background Art

[0002] As the core innovation of a new generation of display systems, the Multi-Area Frequency Refresh (MAFR) technology controls the display by dynamically dividing the display area and assigning independent refresh rates to different areas. For example, based on human visual characteristics and the characteristics of the picture content, this technology can divide the screen into static, low-dynamic and high-dynamic areas, and drive them with different refresh rates (such as 1Hz, 60Hz, 120Hz) respectively. In the scenario of the screen-off display of mobile devices, the MAFR technology can maintain the display of static information such as clocks and notifications at an ultra-low refresh rate, while the dynamic content area still maintains smooth refreshing. In theory, it can significantly reduce the overall power consumption of the screen while ensuring basic interaction requirements.

[0003] Currently, to implement the multi-area frequency division function, it is necessary to control the refresh timing of each area through independent clock signals and data signals, and it is also necessary for the timing controller to coordinate the refresh cycles of each area, and use the vertical blanking period and the horizontal blanking period to achieve synchronization to ensure that the picture has no tearing or flickering. Finally, it is also necessary to combine the partition management algorithm to dynamically divide the area and assign the refresh rate based on the picture content, and work together through the above technologies to realize the operation of the multi-area frequency division function.

[0004] However, in the process of implementing the multi-area frequency division technology, circuit processes such as each timing controller and display driver chip still maintain a normal working state, resulting in a relatively high power consumption required for the display panel to adopt the multi-area frequency division technology. Summary of the Invention

[0005] In view of the deficiencies in the prior art, this application provides a driving method, system and display panel for a display panel.

[0006] In a first aspect, a driving method for a display panel provided by this application includes:

[0007] Obtain a refresh enable signal; wherein, the refresh enable signal is used to control the refresh or non-refresh of the image data to be displayed for each pixel row in each frame of the image to be displayed;

[0008] When it is determined that the display panel is in the target refresh state according to the refresh enable signal, stop outputting the clock signal.

[0009] Optionally, before obtaining the refresh enable signal, it further includes:

[0010] According to the image data to be displayed in the next frame of the display panel, determine in sequence whether each pixel row in the image to be displayed needs to be refreshed;

[0011] For the pixel rows that need to be refreshed, control the refresh enable signal corresponding to the pixel row to be output in the first level state;

[0012] For the pixel rows that do not need to be refreshed, control the refresh enable signal corresponding to the pixel row to be output in the second level state.

[0013] Optionally, when determining that the display panel is in the target refresh state according to the refresh enable signal, stopping outputting the clock signal includes:

[0014] Within the frame duration corresponding to each frame of the image to be displayed on the display panel, if the refresh enable signal maintains the second level state, stop outputting the clock signal within the frame duration of the frame of the image to be displayed.

[0015] Optionally, it further includes:

[0016] Within the frame duration corresponding to the image to be displayed, if the refresh enable signal corresponding to any pixel row is in the first level state, continuously output the clock signal within the frame duration of the frame of the image to be displayed.

[0017] Optionally, when determining that the display panel is in the target refresh state according to the refresh enable signal, stopping outputting the clock signal includes:

[0018] Within the frame duration corresponding to the image to be displayed, if the refresh enable signal includes the first level state and the second level state, divide the frame duration of the image to be displayed into several display time periods according to the first level state and the second level state;

[0019] Obtain the signal-level transfer partition of the display panel, and determine the partition time periods of each signal-level transfer partition within the frame duration;

[0020] Control the clock signal to stop according to the display time periods and the partition time periods.

[0021] Optionally, the display time periods include a refresh interval and a non-refresh interval; the dividing the frame duration of the image to be displayed into several display time periods according to the first level state and the second level state includes:

[0022] Within the frame duration, respectively use the time periods when the refresh enable signal is continuously in the first level state as the refresh intervals;

[0023] During the frame duration, each time period when the refresh enable signal is continuously in the second level state is used as the non-refresh interval.

[0024] Optionally, obtaining the signal-level transmission partitions of the display panel and determining the partition time periods of each of the signal-level transmission partitions within the frame duration includes:

[0025] Obtaining the starting pixel row and the ending pixel row of each of the signal-level transmission partitions;

[0026] Taking the refresh moment of the starting pixel row within the frame duration as the starting refresh moment, and taking the refresh moment of the ending pixel row within the frame duration as the ending refresh moment;

[0027] According to the starting refresh moment and the ending refresh moment, obtaining the partition time period of the corresponding signal-level transmission partition within the frame duration.

[0028] Optionally, controlling the clock signal to stop according to the display time period and the partition time period includes:

[0029] If all of the display time period within the partition time period is a non-refresh interval, controlling the clock signal to stop within the partition time period;

[0030] If part of the display time period within the partition time period is a non-refresh interval, controlling the clock signal to stop outputting between the end moment of the non-refresh interval and the ending refresh moment corresponding to the partition time period.

[0031] In a second aspect, in an embodiment, the present application provides a driving system for a display panel, including:

[0032] A signal acquisition unit, configured to acquire a refresh enable signal; wherein, the refresh enable signal is used to control the refresh or non-refresh of the to-be-displayed image data of each pixel row in each frame of the to-be-displayed image;

[0033] A control unit, when determining that the display panel is in a target refresh state according to the refresh enable signal, stops outputting the clock signal.

[0034] In a third aspect, in an embodiment, the present application provides a display panel, including a memory and a processor; the memory stores a computer program, and the processor is configured to run the computer program in the memory to execute the steps in the above-mentioned driving method for a display panel.

[0035] In summary, in the present application, the refresh enable signal can determine whether the image data to be displayed for each pixel row in each frame of the image to be displayed needs to be refreshed or not, so as to accurately obtain the refresh status of the pixel row data. When it is determined according to the refresh enable signal that the display panel is in the target refresh state, the output clock signal can be stopped without affecting the normal function of the display panel. At the same time, after the output clock signal is stopped, the circuit related to the clock signal will also stop working, thereby further reducing the power consumption of the display panel in the partitioned and frequency-divided application. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0037] Figure 1 It is a timing control diagram of a display panel in the related art;

[0038] Figure 2 It is a flowchart of a display panel driving method in an embodiment of the present application;

[0039] Figure 3 It is a timing control diagram of a display panel in an embodiment of the present application;

[0040] Figure 4 It is a schematic diagram of an application scenario of a display panel driving method in an embodiment of the present application;

[0041] Figure 5 It is a flowchart of a display panel driving method in another embodiment of the present application;

[0042] Figure 6 It is a timing control diagram of a display panel in another embodiment of the present application;

[0043] Figure 7 It is a schematic diagram of an application scenario of a display panel driving method in another embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0044] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the present application.

[0045] In the description of the present application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present application, "a plurality of" means two or more, unless otherwise specifically defined. In the present application, the term "exemplary" is used to mean "serving as an example, illustration, or explanation". Any embodiment described as "exemplary" in the present application is not necessarily to be construed as more preferred or advantageous than other embodiments. In order for any person skilled in the art to implement and use the present application, the following description is given. In the following description, details are set forth for purposes of explanation. It should be understood that those of ordinary skill in the art can recognize that the present application can be implemented without using these specific details. In other instances, well-known structures and processes are not elaborated in detail to avoid obscuring the description of the present application with unnecessary details. Therefore, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed in the present application.

[0046] First, based on the content in the foregoing background art of the present application, the background for the proposal of the present application is further elaborated. In the zoned and frequency-divided display technology, a Timing Controller (TCON) generates a high-frequency clock signal to drive a Gate Driver to sequentially transmit scan signals to gate thin-film transistors of each row of pixels, and at the same time controls a Source Driver to inject voltage data into data lines. During this process, the Timing Controller also outputs a refresh enable signal SEN as a dynamic control unit to control the clock signal CK of the corresponding row to be activated when a specific area needs to be refreshed, thereby achieving zoned and frequency-divided control. Combining Figure 1 the refresh enable signal SEN and the clock signal CK in the exemplary frames Frame1-Frame5, for example, in the first-frame picture Frame1, the refresh enable signal SEN is at a low level, indicating that the corresponding frame needs to be refreshed; in the second-frame picture Frame2, the refresh enable signal SEN is at a high level, indicating that the corresponding frame does not need to be refreshed; in the third-frame picture Frame3, the refresh enable signal SEN has both high and low levels, indicating that a part of the corresponding frame needs to be refreshed and another part does not need to be refreshed. However, regardless of whether each frame needs to be refreshed, the clock signal CK will be continuously output, that is, the clock signal CK is always in a high-frequency toggle state, resulting in a power consumption benefit far lower than the theoretical expectation.

[0047] In a first aspect, as Figure 2As shown, in one embodiment, the present application provides a driving method for a display panel. The driving method of the display panel includes step S101-step S102, which will be introduced in detail below.

[0048] Step S101: Obtain a refresh enable signal.

[0049] Among them, the refresh enable signal is used to control whether the image data to be displayed in each pixel row of each frame to be displayed is refreshed or not.

[0050] Step S102: When it is determined that the display panel is in the target refresh state according to the refresh enable signal, stop outputting the clock signal.

[0051] As an example, the refresh state of the display panel can be determined according to the state of the refresh enable signal. The target refresh state can be a state where all areas of the display panel in a frame of the image to be displayed do not need to be refreshed, or a state where some areas of the display panel need to be refreshed.

[0052] In the above embodiment, the refresh enable signal can determine whether the image data to be displayed in each pixel row of each frame to be displayed needs to be refreshed or not, so as to accurately obtain the refresh situation of the pixel row data. When it is determined that the display panel is in the target refresh state according to the refresh enable signal, the clock signal can be stopped from being output, which will not affect the normal function of the display panel. At the same time, after the clock signal is stopped from being output, the circuit related to the clock signal will also stop working, thereby further reducing the power consumption of the display panel in the application of partition frequency division.

[0053] As a further embodiment of the driving method of the display panel, before step S101, it further includes step S201-step S203, which will be introduced in detail below.

[0054] Step S201: According to the image data to be displayed in the next frame of the display panel, sequentially determine whether each pixel row in the image to be displayed needs to be refreshed.

[0055] As an example, the data of the image to be displayed in the next frame can be scanned row by row and analyzed for content by a timing controller or a display processor. For example, when the image to be displayed is a static display (such as a screen-off clock, a notification bar), the content of the pixel row may not change for several consecutive frames, so there is no need to refresh; while when the image to be displayed is a dynamic display area (such as video playback, game screen), the content of the pixel row changes frequently and needs to be updated at a high refresh rate.

[0056] Step S202: For the pixel rows that need to be refreshed, control the refresh enable signal corresponding to the pixel row to be output in the first level state.

[0057] Step S203: For the pixel rows that do not need to be refreshed, control the refresh enable signal corresponding to the pixel row to be output in the second level state.

[0058] As an example, the timing controller can generate a refresh enable signal corresponding to each pixel row based on the determined first level state and second level state, that is, in the time domain of the refresh enable signal, each moment corresponds to controlling a pixel row. The first level state can be a low level state, such as 0V; the second level state can be a high level state, such as 5V, etc.

[0059] In the above embodiment, first, according to the image data of the next frame to be displayed on the display panel, it is sequentially determined whether each pixel row in the image to be displayed needs to be refreshed. If the image data of a certain pixel row is updated in the next frame, the corresponding refresh enable signal will be set to the first level state, indicating that the pixel row needs to be refreshed; conversely, if the image data of a certain pixel row has not changed, the corresponding refresh enable signal is set to the second level state, indicating that it does not need to be refreshed. In this way, the refresh requirement of the pixel row can be known through the level state of the refresh enable signal.

[0060] Refer to Figure 3 , as an embodiment of step S102, step S102 may include: within the frame duration corresponding to each frame of the image to be displayed on the display panel, if the refresh enable signal maintains the second level state, it indicates that the refresh state of the display panel is the target refresh state, and at this time, the clock signal can be stopped from being output within the frame duration of the frame of the image to be displayed.

[0061] As an example, within the frame duration corresponding to each frame of the image to be displayed on the display panel, if the refresh enable signal maintains the second level state, it means that all pixel rows in the display panel do not need to be refreshed within this frame duration, then the clock signal is stopped from being output within the frame duration of the frame of the image to be displayed. For example, in a specific display scenario, the display panel can be divided into three regions, which are refreshed at refresh rates of 30Hz, 60Hz, and 10Hz respectively. When the refresh enable signals of all pixel rows corresponding to all regions are in the second level state within a certain frame duration, the entire display panel does not need to perform image refresh within the current frame duration, and at this time, the clock signal output is stopped, thereby avoiding the power consumption waste caused by the clock signal still flipping when there is no need to refresh.

[0062] As a further embodiment of the driving method of the display panel, the driving method of the display panel may further include: within the frame duration corresponding to the image to be displayed, if the refresh enable signal corresponding to any pixel row is in the first level state, then the clock signal is continuously output within the frame duration of the frame of the image to be displayed.

[0063] As an example, within the frame duration corresponding to the image to be displayed, if the refresh enable signal corresponding to any pixel row is in the first-level state, it indicates that there is data of some pixel rows in the image to be displayed that need to be refreshed during the frame duration. Since the scan signal of the display panel is transmitted step by step, the clock signal needs to be continuously output within this frame duration to ensure that the pixel rows that need to be refreshed can update the image data normally.

[0064] Referring to Figure 4 , as an example of the first application scenario, the display panel may include a source driver 200 (Source Driver), a gate driver 300, a timing controller 100, and a display area 400. Among them, the source driver 200 is responsible for converting image data into pixel voltages and injecting them into the pixels through data lines (D1 - Dm). First, the source driver 200 receives the data signal (including grayscale value information) from the timing controller 100, converts it into an analog voltage through an internal digital-to-analog converter. According to the control signals provided by the timing controller 100 (such as data latch signals, polarity inversion signals), the voltage values are stored in the internal registers, and when the gate driver 300 selects the corresponding scan line, the data is synchronously output to the data lines. The gate driver adopts a cascaded architecture and controls the selection of each pixel row in the display area 400 by transmitting the scan signal step by step. Specifically, the gate driver 300 is composed of multiple levels of gate driving circuits connected in series, and each level of gate driving circuit can correspond to a scan line (G1 - Gn). When the clock signal and the start pulse are input, the first-level gate driving circuit generates a scan pulse to drive the G1 line to be selected, and then sequentially triggers the subsequent levels of circuits through the cascade link, selecting the G2 to Gn lines row by row. Due to the physical dependence of the cascade link, if a certain level of gate driving circuit does not receive the clock signal or interrupts its operation, the subsequent cascaded gate driving circuits will not be able to complete the signal transmission, resulting in the failure of the scan line selection. Therefore, even if only some pixel rows need to be refreshed in a certain frame, that is, within the frame duration corresponding to the image to be displayed, the refresh enable signal corresponding to any pixel row is in the first-level state. At this time, regardless of the actual number of pixel rows to be updated, the gate driver 300 must complete the full-screen scan from G1 to Gn level by level. For example, if only the bottom 10% area of the screen needs to be refreshed (such as the status bar update), the gate driving circuit still needs to transmit the scan signal sequentially from the first-level gate driving circuit to the nth-level gate driving circuit, and all cascaded gate driving circuits still need to work throughout the process to maintain the continuity of signal transmission. Therefore, the clock signal still needs to be continuously output within this frame duration so that all cascaded gate driving circuits can work normally.

[0065] As an example, such as Figure 4As shown in the figure, the display panel may further include a refresh control circuit, which is located between the gate driving circuit and the display area and is used to control the on / off between the scan signal and each pixel unit according to the refresh enable signal. The refresh control circuit receives the refresh enable signal from the timing controller, and the refresh enable signal is used to indicate the pixel rows that need to be refreshed in the current frame. For the pixel rows that need to be refreshed, the refresh control circuit allows the scan signal output by the gate driving circuit to be transmitted to the corresponding pixel rows, driving the thin film transistors (TFTs) to turn on and receive the new data injected by the source driving circuit; while for the pixel rows that do not need to be refreshed, the refresh control circuit blocks the transmission of the scan signal, keeping the pixel rows in the state of the previous frame and avoiding invalid power consumption. In this way, the refresh control circuit realizes the multi-area frequency reduction (MAFR) function, that is, only part of the area is refreshed within the same frame, and at the same time, the signal transmission in the inactive area is blocked. In this embodiment, the output of the clock signal is also controlled to stop within the frame duration according to the level state of the refresh enable signal, further saving power consumption.

[0066] Refer to Figure 3 , Figure 3 FIG. is a waveform schematic diagram of the refresh enable signal and the clock signal. In the first frame of the image to be displayed, the refresh enable signal SEN is in the first level state, indicating that the image to be displayed needs to be refreshed within the first frame duration Frame1. At this time, the clock signal is continuously output within the first frame duration Frame1. In the second frame of the image to be displayed Frame2, the refresh enable signal SEN is in the second level state, indicating that the image to be displayed does not need to be refreshed. At this time, the output of the clock signal stops within the second frame duration Frame2; in the third frame of the image to be displayed, the refresh enable signal has both the first level state and the second level state, indicating that within the third frame duration Frame3, the picture needs to be refreshed in some frame durations and does not need to be refreshed in other frame durations. However, since the refresh enable signal has the first level state within the third frame duration, the clock signal still needs to be continuously output within the third frame duration Frame3. The fourth frame duration Frame4 and the fifth frame duration Frame5 are the same and will not be elaborated here.

[0067] Refer to Figure 5 As another implementation manner of step S102, step S102 may include steps S1021 - S1023, which will be introduced in detail below.

[0068] Step S1021: Within the frame duration corresponding to the image to be displayed, if the refresh enable signal includes the first level state and the second level state, divide the frame duration of the image to be displayed into several display periods according to the first level state and the second level state.

[0069] Among them, the display period is used to characterize the period distribution of refreshing and non-refreshing of each pixel row within the frame duration. It includes a non-refresh interval and a refresh interval, and the display period is determined according to the requirements of the to-be-displayed image to be displayed. As an example, in a certain display scenario, the display panel can be divided into three regions according to the refresh requirements. For example, for on-demand refreshing, the three regions are refreshed at 30Hz, 60Hz, and 10Hz respectively. The refresh period of each region within the frame duration is the display period.

[0070] Step S1022: Obtain the signal-level transmission partitions of the display panel and determine the partition periods of each signal-level transmission partition within the frame duration.

[0071] Among them, the signal-level transmission partition is the pixel row region corresponding to each gate driver in the display panel. In a display panel, there can be multiple gate drivers obtained by connecting gate drive circuits in series. The gate drivers are not cascaded and can work independently to control the display of the corresponding signal-level transmission partitions, that is, the latter gate driver does not depend on the signal of the previous gate driver to work.

[0072] Step S1023: Control the clock signal to stop according to the display period and the partition period.

[0073] In the above embodiment, within the frame duration corresponding to the to-be-displayed image, if the refresh enable signal includes a first level state and a second level state, it indicates that some pixel rows in the display panel need to be refreshed and some do not. At this time, it is necessary to divide the frame duration of the to-be-displayed image into several display periods according to the first level state and the second level state. At the same time, obtain the signal-level transmission partitions of the display panel and determine the partition periods of each signal-level transmission partition within the frame duration. Finally, control the clock signal to stop according to the display period and the partition period, so that the clock signal can stop within some periods of the frame cycle, rather than stopping with a frame duration as a cycle, thereby further saving power consumption.

[0074] As another embodiment of step S1021, step S1021 may include steps S10211 - S10212, which will be introduced in detail below.

[0075] Step S10211: Within the frame duration, each period during which the refresh enable signal is continuously at the first level state is used as a refresh interval.

[0076] Step S10211: Within the frame duration, each period during which the refresh enable signal is continuously at the second level state is used as a non-refresh interval.

[0077] Among them, there can be multiple refresh intervals and non-refresh intervals within the frame duration.

[0078] Combined with Figure 6, for example, since within each frame duration, the pixel rows need to be scanned and refreshed row by row. For example, in the fourth frame duration Frame4, the first 40% of the duration within the frame is the refresh interval. Taking the display panel refreshing from top to bottom as an example, it means that the pixel rows in the upper half (about 40%) of the display panel need to be refreshed within this frame duration; while the last 60% of the duration within the frame is the non-refresh interval, which means that the pixel rows in the lower half (about 60%) of the display panel do not need to be refreshed within this frame duration.

[0079] Referring to Figure 7 , as an example of the second application scenario, the display panel may include a source driver 200, a gate driver 300, a timing controller 100, and a display area 400. Different from the example of the first application scenario, there are multiple gate drivers in the second application scenario. The display area is divided into several independent signal-level transmission areas, and each signal-level transmission area corresponds to an independent gate driver. Each gate driver internally contains several serially connected gate driving circuits, which are responsible for generating and transmitting the scanning signals within their respective signal-level transmission areas. For example, the gate driver of the first signal-level transmission area only drives the scanning lines G11 - G1n of this signal-level transmission area, while the gate driver of the second signal-level transmission area drives the scanning lines G21 - G2n, and so on. The gate driving circuits of each signal-level transmission area operate independently, and the clock signal and the start pulse are only transmitted within the current signal-level transmission area. When a certain signal-level transmission area does not need to be refreshed, the timing controller can turn off the clock signal input of this signal-level transmission area to avoid ineffective power consumption.

[0080] In the above embodiments, within the frame duration, each period during which the refresh enable signal is continuously at the first level state is respectively used as a refresh interval, and the corresponding pixel rows need to perform the image data refresh operation within the refresh interval. While within the frame duration, each period during which the refresh enable signal is continuously at the second level state is respectively used as a non-refresh interval, that is, the corresponding pixel rows do not need to be refreshed within the non-refresh period. By dividing the refresh interval and the non-refresh interval, the pixel rows in the display panel that need to be refreshed and those that do not need to be refreshed can be converted into the corresponding refresh states within the frame duration, so as to analyze the refresh requirements in different periods within the frame duration, and thus more accurately control the stop of the clock signal.

[0081] As another implementation manner of step S1022, step S1022 may include steps S10221 - S10223, which will be introduced in detail below.

[0082] Step S10221: Obtain the starting pixel row and the ending pixel row of each signal-level transmission area.

[0083] Step S10222: Use the refresh time of the starting pixel row within the frame duration as the starting refresh time, and use the refresh time of the ending pixel row within the frame duration as the ending refresh time.

[0084] Step S10223: Based on the starting refresh time and the ending refresh time, obtain the partition period of the corresponding signal-level transmission area within the frame duration.

[0085] As an example, in the display panel, a certain signal-level transmission area is from pixel row 100 to pixel row 200. The time when pixel row 100 starts to refresh is the starting refresh time of the current signal-level transmission area, and the time when pixel row 200 starts to refresh is the ending refresh time. In this way, the partition period of the signal-level transmission area within the entire frame duration can be determined through the starting refresh time and the ending refresh time, so as to control the clock signal more accurately.

[0086] As another implementation manner of step S1023, step S1023 may include step S10231 - step S10232, which will be introduced in detail below.

[0087] Step S10231: If all the display periods within the partition period are non-refresh intervals, then control the clock signal to stop within the partition period.

[0088] Step S10232: If part of the display periods within the partition period are non-refresh intervals, then control the clock signal to stop output between the end time of the non-refresh interval and the ending refresh time corresponding to the partition period.

[0089] Among them, the partition period refers to the refresh period of each signal-level transmission area within the frame duration, so the partition period is determined based on the hardware of the display panel.

[0090] As an example, since within each partition period, the current-level scan signal does not depend on the previous-level scan signal generated in other partition periods. Therefore, taking one partition period as a unit, when all the display periods within the partition period are non-refresh intervals, it means that the pixel rows in the signal-level transmission area corresponding to the partition period do not need to be refreshed, so control the clock signal to stop within the partition period, and at this time, the scan signals in other partition periods will not be affected. And within one partition period, the current-level scan signal needs to be output based on the previous-level scan signal. Therefore, if part of the display periods within the partition period are non-refresh intervals, then only control the clock signal to stop output between the end time of the non-refresh interval and the ending refresh time corresponding to the partition period, that is, within the refresh interval and the partition periods before the refresh interval, the clock signal needs to be kept output normally so that the scan signal can be output normally within the refresh interval.

[0091] Combined with Figure 6, taking the example that there are two partition periods with equal durations within a frame duration, in the fourth frame of the image to be displayed, the display period within the first partition period of the fourth frame duration Frame4 is the refresh interval. Then, within the refresh interval, the clock signal needs to continuously flip. While within the second partition period of the fourth frame duration Frame4, the display period is the non-refresh interval, and the output of the clock signal can be stopped, so that the clock signal can be turned off during part of the frame period. In the third frame of the image to be displayed, although the third frame duration Frame3 starts as a non-refresh interval and there is no need to refresh the pixel rows, there is a refresh interval within the same partition period, so the clock signal needs to be continuously output from the start stage of the third frame duration Frame3 to avoid the problem that the scan signal cannot be cascaded within the same partition period.

[0092] In the above embodiment, if all the display periods within the partition period are non-refresh intervals, it means that all the pixel rows corresponding to the partition period do not need to be refreshed, and the scan signals within each partition period can be independently controlled. Therefore, the clock signal within the partition period of the frame duration can be controlled to stop. If part of the display period within the partition period is a non-refresh interval, then the output of the clock signal is controlled to stop between the end moment of the non-refresh interval and the termination refresh moment corresponding to the partition period, which not only avoids the ineffective flipping of the clock signal when there is no need to refresh but also ensures the normal operation of the clock signal when refreshing the pixel rows that need to be refreshed.

[0093] In a second aspect, in an embodiment, the present application provides a driving system for a display panel, including a signal acquisition unit and a control unit. Among them, the signal acquisition unit is used to acquire a refresh enable signal; among them, the refresh enable signal is used to control whether to refresh or not the image data to be displayed for each pixel row in each frame of the image to be displayed; when the control unit determines that the display panel is in the target refresh state according to the refresh enable signal, it stops outputting the clock signal.

[0094] In a third aspect, in an embodiment, the present application provides a display panel, including a memory and a processor; the memory stores a computer program, and the processor is used to run the computer program in the memory to execute the steps in the above-mentioned driving method for a display panel.

[0095] In a fourth aspect, in an embodiment, the present application provides a storage medium, which stores multiple computer programs, and these computer programs can be loaded by a processor to execute the steps of the above method.

[0096] Those of ordinary skill in the art can understand that any reference to a memory, storage, database, or other medium used in the embodiments provided in this application may include non-volatile and / or volatile memories. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

[0097] Since the computer program stored in the storage medium can execute the steps in the driving method of the display panel in any of the embodiments provided in this application, the beneficial effects achievable by the driving method of the display panel in any of the embodiments provided in this application can be realized. For details, refer to the previous embodiments and will not be elaborated herein.

[0098] For the specific implementation of each of the above operations, refer to the previous embodiments and will not be elaborated herein.

[0099] In the above embodiments, the descriptions of the respective embodiments have their own focuses. For the parts not elaborated in a certain embodiment, refer to the detailed descriptions of other embodiments above. This will not be elaborated herein.

[0100] The above provides a detailed introduction to Replacement 1 of this application. Specific examples are used in this article to elaborate on the principle and implementation manner of this application. The description of the above embodiments is only used to help understand the method and its core idea of this application; at the same time, for those skilled in the art, based on the idea of this application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to this application.

[0101] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as falling within the scope described in this specification.

Claims

1. A method for driving a display panel, characterized in that: include: Obtaining a refresh enable signal; wherein the refresh enable signal is used to control whether to refresh or not refresh the image data to be displayed of each pixel row in each frame of the image to be displayed; When it is determined according to the refresh enable signal that the display panel is in a target refresh state, outputting the clock signal is stopped.

2. The method for driving a display panel according to claim 1, wherein: Before obtaining the refresh enable signal, the method further includes: According to the next frame of image data to be displayed on the display panel, determining in sequence whether each pixel row in the image to be displayed needs to be refreshed; For a pixel row that needs to be refreshed, controlling the refresh enable signal corresponding to the pixel row to be output in a first level state; For a pixel row that does not need to be refreshed, the refresh enable signal corresponding to the pixel row is controlled to be output in a second level state.

3. The method for driving a display panel according to claim 2, wherein: When it is determined according to the refresh enable signal that the display panel is in the target refresh state, stopping the output of the clock signal comprises: During the frame duration corresponding to each frame of the image to be displayed on the display panel, if the refresh enable signal maintains the second level state, the clock signal is stopped from being output during the frame duration of the frame of the image to be displayed.

4. The method for driving a display panel according to claim 3, wherein: Also includes: During the frame duration corresponding to the image to be displayed, if the refresh enable signal corresponding to any pixel row is in the first level state, the clock signal is continuously output during the frame duration of the frame image to be displayed.

5. The method for driving a display panel according to claim 2, wherein: When it is determined according to the refresh enable signal that the display panel is in the target refresh state, stopping the output of the clock signal comprises: Within the frame duration corresponding to the image to be displayed, if the refresh enable signal includes the first level state and the second level state, dividing the frame duration of the image to be displayed into a plurality of display time periods according to the first level state and the second level state; Acquire signal level transmission partitions of the display panel, and determine a partition period of each of the signal level transmission partitions within the frame duration; The clock signal is controlled to stop according to the display period and the partition period.

6. The method for driving a display panel according to claim 5, characterized in that: The display period includes a refresh interval and a non-refresh interval; the frame duration of the image to be displayed is divided into a plurality of display periods according to the first level state and the second level state, including: Within the frame duration, each time period during which the refresh enable signal is continuously in the first level state is respectively used as the refresh interval; Within the frame duration, each time period during which the refresh enable signal is continuously in the second level state is used as the non-refresh interval.

7. The method for driving a display panel according to claim 6, wherein: The acquiring of the signal level transmission partitions of the display panel and determining the partition time periods of each of the signal level transmission partitions within the frame duration includes: Obtaining a starting pixel row and an ending pixel row of each of the signal level transmission subareas; The refresh time of the starting pixel row within the frame duration is used as the starting refresh time, and the refresh time of the ending pixel row within the frame duration is used as the ending refresh time; According to the start refresh time and the end refresh time, the partition time period of the corresponding signal level transmission partition within the frame duration is obtained.

8. The method for driving a display panel according to claim 7, wherein: The step of controlling the clock signal to stop according to the display period and the partition period comprises: If the display period is entirely a non-refresh interval within the partition period, controlling the clock signal to stop within the partition period; If part of the display period is a non-refresh interval within the partition period, the clock signal is controlled to stop being output between the end time of the non-refresh interval and the end refresh time corresponding to the partition period.

9. A display panel driving system, characterized in that: include: A signal acquisition unit, used to acquire a refresh enable signal; wherein the refresh enable signal is used to control whether to refresh or not refresh the image data to be displayed of each pixel row in each frame of the image to be displayed; The control unit stops outputting the clock signal when determining that the display panel is in a target refresh state according to the refresh enable signal.

10. A display panel, characterized in that: It comprises a memory and a processor; the memory stores a computer program, and the processor is used to run the computer program in the memory to execute the steps in the method for driving a display panel as described in any one of claims 1 to 8.

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