Semiconductor laser structure and preparation method

Abstract

The invention discloses a semiconductor laser structure and a preparation method, a quantum well structure is formed on the surface of a first semiconductor layer, a surface plasmon structure is further formed on the quantum well structure, and near-field optical enhancement of a quantum dot laser formed by the semiconductor laser structure is realized based on surface plasmon. The emission power and luminous efficiency of the laser can be improved, and the threshold current is reduced, so that the comprehensive performance of the quantum dot laser is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor laser processes, and particularly relates to a germanium-silicon quantum well electrically pumped laser structure based on surface plasmons and a preparation method thereof. Background Art

[0002] A quantum well is a multi-layer structure formed by alternately growing thin layers of two different semiconductor materials with different band gaps. The thin semiconductor layer with a small band gap is the well layer. The thickness of the well layer is less than the de Broglie wavelength, and the thickness of the barrier material can prevent electrons in two adjacent well materials from tunneling through each other. Therefore, compared with other types of lasers, quantum well lasers perform better in terms of input current, luminous power, and photoelectric conversion.

[0003] The emergence of strained germanium / silicon-germanium-tin quantum well lasers has attracted extensive attention to germanium quantum well lasers. However, since the solid solubility of tin in germanium is only 1% (when the component of tin reaches 6.5 - 11.0%, the energy band structure of the germanium-tin alloy will transform into a direct band gap, but the lattice mismatch between germanium and tin is as high as 15%), it is very challenging to grow high-quality germanium-tin alloys with a high tin content. With the continuous maturity and development of germanium epitaxial technology on silicon, germanium / germanium-silicon quantum wells once became the main materials to replace the active regions of germanium-tin quantum well-based lasers. However, due to their indirect band gap affecting the luminous efficiency and threshold current, the rapid development of germanium / germanium-silicon quantum wells has been hindered.

[0004] Surface plasmons are electromagnetic modes generated at the metal / dielectric interface by the interaction between free electrons on the metal surface and the incident light field. This electromagnetic mode can only be transmitted along the flat and smooth metal / dielectric interface, and its intensity decays exponentially with the increase of distance in the direction perpendicular to the interface. Generally, it is based on the interaction process between electromagnetic radiation and conduction electrons in the metal-dielectric interface or metal nanostructures, and this interaction can produce a near-field optical enhancement effect at the sub-wavelength scale. A nano-laser based on surface plasmons can generate a coherent light source with a femtosecond time scale at a nano-scale much smaller than the diffraction limit, which is of great significance for promoting the development of nano-scale lasers. Summary of the Invention

[0005] The purpose of the present invention is to overcome the above-mentioned defects existing in the prior art, and provide a semiconductor laser structure and a preparation method thereof.

[0006] To achieve the above purpose, the technical solution of the present invention is as follows:

[0007] The present invention provides a semiconductor laser structure, including:

[0008] A quantum well structure disposed on the surface of a first semiconductor layer;

[0009] A surface plasmon structure disposed on the surface of the quantum well structure away from the first semiconductor layer.

[0010] Further, the quantum well structure includes a potential well region on the surface of the first semiconductor layer, and potential barrier regions on the surfaces of the first semiconductor layer on both sides of the potential well region; the surface plasmon structure includes a dielectric layer and a metal layer sequentially disposed on the surface of the quantum well structure away from the first semiconductor layer.

[0011] Further, contact regions of different conductivity types are respectively provided on the bottoms of the potential barrier regions on both sides facing the first semiconductor layer, the contact regions have protrusions in the direction outward from the potential barrier regions, the dielectric layer covers the top surfaces of the potential barrier regions and the potential well region away from the first semiconductor layer, and the outer side surfaces of the potential barrier regions, the metal layer is disposed on the region of the dielectric layer located on the top surfaces of the potential barrier regions and the potential well region, lead electrodes are provided on the protrusions, and the lead electrodes are separated from the potential barrier regions through the dielectric layer covering the outer side surfaces of the potential barrier regions.

[0012] Further, the material of the potential well region includes a second semiconductor, and the material of the potential barrier region includes a solid solution formed by the second semiconductor and the first semiconductor; and / or, the material of the dielectric layer includes silicon nitride with tensile stress; and / or, the material of the metal layer includes gold, silver, copper or aluminum.

[0013] Further, the first semiconductor includes silicon; and / or, the second semiconductor includes germanium; and / or, the semiconductor laser structure is disposed on an SOI substrate, and the SOI substrate includes a bottom silicon layer, a buried oxide layer and a top silicon layer sequentially arranged, and the top silicon layer is the first semiconductor layer.

[0014] The present invention also provides a method for manufacturing a semiconductor laser structure, including:

[0015] Providing a substrate with a first semiconductor layer on its surface;

[0016] Forming a quantum well structure on the surface of the first semiconductor layer;

[0017] Forming a surface plasmon structure on the surface of the quantum well structure away from the first semiconductor layer.

[0018] Further, forming a quantum well structure on the surface of the first semiconductor layer includes forming a potential well region on the surface of the first semiconductor layer, and forming potential barrier regions on the surfaces of the first semiconductor layer on both sides of the potential well region; forming a surface plasmon structure on the surface of the quantum well structure away from the first semiconductor layer includes sequentially forming a dielectric layer and a metal layer on the top surfaces of the potential well region and the potential barrier region away from the first semiconductor layer.

[0019] Further, the method for forming the potential well region and the potential barrier regions specifically includes:

[0020] Forming a first window on the surface of the first semiconductor layer, and forming a first epitaxial layer of a solid solution of a second semiconductor and the first semiconductor in the first window;

[0021] Forming a second window on the surface of the first semiconductor layer on one side of the first window, and forming a second epitaxial layer of a solid solution of a second semiconductor and the first semiconductor in the second window;

[0022] Forming a third window on the surface of the first semiconductor layer located between the first window and the second window;

[0023] Forming a third epitaxial layer of a second semiconductor material in the third window to form a potential well region;

[0024] Removing part of the materials outside the first epitaxial layer and the second epitaxial layer, respectively forming two potential barrier regions with reduced and consistent widths on the upper parts of the first epitaxial layer and the second epitaxial layer, and respectively forming two lateral protrusions on the lower parts of the first epitaxial layer and the second epitaxial layer;

[0025] The method for forming the dielectric layer and the metal layer specifically includes:

[0026] Forming a tensile stress-bearing dielectric layer on the surface of the first semiconductor layer to cover the exposed surfaces of the potential well region and the potential barrier regions;

[0027] Forming a patterned metal layer on the surface of the dielectric layer located in the top surface regions of the potential well region and the potential barrier regions.

[0028] Further, when forming the first epitaxial layer and the second epitaxial layer, it further includes:

[0029] Respectively forming a first doping region of P-type conductive type and a second doping region of N-type conductive type as contact regions on the lower parts of the first epitaxial layer and the second epitaxial layer, and making the formed protrusions located in the contact regions;

[0030] Before forming the metal layer, it further includes:

[0031] An extraction electrode passing through the dielectric layer is formed on the protrusion.

[0032] Furthermore, the contact region is formed by direct doping during the epitaxial process of forming the first epitaxial layer and the second epitaxial layer; alternatively, the contact region is formed by implanting and doping the lower portions of the first epitaxial layer and the second epitaxial layer after forming the first epitaxial layer and the second epitaxial layer.

[0033] It can be seen from the above technical solutions that the present invention forms a laterally disposed quantum well structure on a first semiconductor layer serving as a substrate, and forms a surface plasmon structure composed of a metal layer - dielectric layer on the quantum well structure, and realizes near-field optical enhancement of a quantum dot laser formed by a semiconductor laser structure based on surface plasmons, thereby improving the comprehensive performance of the quantum dot laser. Moreover, by introducing a dielectric layer with tensile stress that coats the quantum well structure into the surface plasmon structure, the quantum well can be transformed into a quasi-direct bandgap, thereby further enhancing the emission power and luminous efficiency of the laser and reducing the threshold current. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a schematic diagram of a semiconductor laser structure according to a preferred embodiment of the present invention.

[0035] Figures 2 - 11 It is a schematic diagram of process steps of a preparation method of a semiconductor laser structure according to a preferred embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0036] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein shall have the ordinary meanings understood by those of ordinary skill in the art in the field to which the present invention belongs. The words such as "including" used herein mean that the elements or items appearing before this word cover the elements or items listed after this word and their equivalents, without excluding other elements or items.

[0037] To solve the problem of high threshold current in existing germanium / germanium-silicon quantum well lasers, based on the surface plasmon polariton (SPP) theory, a semiconductor laser structure is designed, which can be used to form, for example, a germanium-silicon quantum well electrically pumped laser structure based on surface plasmon polaritons. The semiconductor laser structure of the present invention can largely optimize the manufacturing process of the laser (for example, the traditional multi-quantum well structure can be simplified to a single quantum well structure), and while reducing the manufacturing difficulty, enhance the emission power of the germanium quantum dot laser (Ge QDs laser) formed by the semiconductor laser structure and reduce the laser threshold current.

[0038] The following further elaborates on the specific embodiments of the present invention in conjunction with the accompanying drawings.

[0039] Reference Figure 1 . A semiconductor laser structure of the present invention includes a quantum well structure 16 disposed on the upper surface of a first semiconductor layer 11, and a surface plasmon polariton structure 13 disposed on the top surface of the quantum well structure 16.

[0040] Among them, the quantum well structure 16 includes a potential well region 20 on the surface of the first semiconductor layer 11, and two potential barrier regions 19 on the surface of the first semiconductor layer 11 on both sides of the potential well region 20. The surface plasmon polariton structure 13 includes a dielectric layer 14 and a metal layer 15 sequentially disposed on the top surface of the quantum well structure 16.

[0041] Furthermore, contact regions 18 of different conduction types are separately provided at the bottoms of the two potential barrier regions 19 on both sides of the potential well region 20. For example, a first contact region 181 of P-type conduction type is provided at the bottom of the first potential barrier region 191 on the right side of the illustrated potential well region 20, and a second contact region 182 of N-type conduction type is provided at the bottom of the second potential barrier region 192 on the left side of the illustrated potential well region 20. It can be understood that the mutual positions of the first potential barrier region 191 and the second potential barrier region 192 can be interchanged. The mutual positions of the first contact region 181 of P-type conduction type and the second contact region 182 of N-type conduction type can also be interchanged.

[0042] In some embodiments, each contact region 18 is integrally connected to the potential barrier region 19 above it. And each contact region 18 has a protrusion 17 in the outer direction away from the potential well region 20 of the corresponding potential barrier region 19. For example, the first contact region 181 has a first protrusion 171 in the outer direction of the first potential barrier region 191, and the second contact region 182 has a second protrusion 172 in the outer direction of the second potential barrier region 192.

[0043] Furthermore, a lead electrode 12 is provided on the protrusion 17. For example, a negative electrode 121 serving as a lead electrode 12 is provided on the first protrusion 171, and a positive electrode 122 serving as another lead electrode 12 is provided on the second protrusion 172.

[0044] In some embodiments, the dielectric layer 14 covers the top surfaces of the two barrier regions 19 and the well region 20, as well as the left and right outer side surfaces of the two barrier regions 19 that face away from each other. Moreover, both ends of the dielectric layer 14 respectively rest on the first protrusion 171 and the second protrusion 172. The two lead electrodes 12 are respectively disposed on the protrusions 17 outside both ends of the dielectric layer 14 and are separated from the barrier region 19 by the dielectric layer 14.

[0045] The metal layer 15 is disposed on the upper surface of the dielectric layer 14 and is located in the regions corresponding to the top surfaces of the two barrier regions 19 and the well region 20.

[0046] In some embodiments, the material of the well region 20 includes a second semiconductor that is heteroepitaxial with the first semiconductor.

[0047] The material of the barrier region 19 includes a solid solution formed by the second semiconductor material and the first semiconductor material.

[0048] In some embodiments, the first semiconductor includes silicon. The second semiconductor includes germanium. The material of the barrier region 19 includes a germanium-silicon solid solution (germanium-silicon alloy). Thus, a germanium / germanium-silicon quantum well (Ge / Ge x Si quantum well) is formed, and an integrated germanium-silicon contact region 18 (a P-type germanium-silicon first contact region 181 and an N-type germanium-silicon second contact region 182) is formed under each germanium-silicon barrier region 19.

[0049] The width of the well region 20 in the transverse direction is less than the de Broglie wavelength; the width of the first barrier region 191 in the transverse direction is the same as the width of the second barrier region 192 in the transverse direction and is less than the Bohr radius of the material of the barrier region 19 (Ge x Si).

[0050] In some embodiments, the material of the dielectric layer 14 includes silicon nitride with tensile stress, which can introduce tensile stress in germanium and germanium-silicon, reduce the indirect bandgap of germanium, convert germanium into a quasi-direct bandgap, and can further improve the emission efficiency of the formed laser and reduce its threshold current.

[0051] The material of the metal layer 15 includes gold, silver, copper or aluminum. Precious metals such as gold, silver, copper, and aluminum in metal materials are commonly used in the research of surface plasmons, mainly because these materials can excite the SPP mode in the visible-near infrared region, which can coincide with the exciton resonance band in the semiconductor cavity. In addition, the imaginary part of the dielectric constant of these precious metal materials is much smaller than that of other metal materials. The smaller the imaginary part of the dielectric constant, the smaller the optical loss corresponding to the waveguide propagation mode. Therefore, the less semiconductor gain is required to compensate for these optical losses, which is more conducive to the realization of laser. However, among many metal materials, due to the good stability of gold and other excellent properties, gold can be preferentially used as the material of the metal layer 15.

[0052] In some embodiments, the above semiconductor laser structure is disposed on the SOI substrate 100. The SOI substrate 100 includes a bottom silicon layer 103, a buried oxide layer 102, and a top silicon layer 101 arranged in sequence. The top silicon layer 101 therein is the first semiconductor layer 11.

[0053] The above semiconductor laser structure further forms a quantum well electrically pumped laser structure.

[0054] The innovation of the present invention lies in that a germanium-silicon quantum well electrically pumped laser structure based on surface plasmon polaritons (SPP) is proposed according to the SPP theory. In the process of laser generation, after current injection in the semiconductor, the gain medium is externally excited to radiate electron-hole pairs. After these non-equilibrium carriers enter the active region, they are confined in the well layer and emit photons, and relax to the exciton state. When the gain medium is located on the resonant metal surface, the exciton energy will be resonantly coupled to the SPP mode in the metal layer through resonance coupling. This coupling behavior can provide another recombination channel for the laser. When the electrons localized in the SPP mode state satisfy the population inversion condition, they will radiate laser. In this process, the surface plasmon polaritons are generated by the metal structure, and the gain material around the medium amplifies the surface plasmon polaritons and resonates in the nanoscale resonator, which can reduce the mode size and physical size of the laser to below half wavelength at the same time, thus constituting a nanoscale coherent light source far beyond the diffraction limit and having ultrafast dynamics characteristics.

[0055] The following is a further detailed description of a manufacturing method of the present invention through specific embodiments and in conjunction with the drawings.

[0056] Reference Figures 2 - 11 A method for preparing a semiconductor laser structure of the present invention can be used to prepare a semiconductor laser structure of the present invention shown above Figure 1 For example, a germanium-silicon quantum well electrically pumped laser structure based on surface plasmon polaritons (SPP), and includes the following steps:

[0057] Step S1: Provide a substrate with a first semiconductor layer 11 on its surface.

[0058] As Figure 2 shown, a cleaned SOI substrate 100 is used. The SOI substrate 100 is sequentially provided with a bottom silicon layer 103, a buried oxide layer 102, and a top silicon layer 101 from bottom to top. The top silicon layer 101 is used as the first semiconductor layer 11 to further fabricate other constituent structures in the semiconductor laser structure on the top silicon layer 101.

[0059] In some embodiments, a cleaning treatment method such as ultrasonic cleaning plus soaking in an organic solvent is used to remove contaminants such as particles and organic substances on the surface of the SOI substrate 100, and gas purging and drying are performed.

[0060] Step S2: Form a quantum well structure 16 on the surface of the first semiconductor layer 11.

[0061] A quantum well structure 16 is formed on the surface of the top silicon layer 101 (the first semiconductor layer 11), including forming a potential well region 20 on the surface of the top silicon layer 101, and forming potential barrier regions 19 on the surfaces of the top silicon layer 101 on both sides of the potential well region 20.

[0062] As Figure 2 shown, a photolithography and etching process is used to form a first window 21 on the surface of the top silicon layer 101.

[0063] In some embodiments, a plasma enhanced chemical vapor deposition (PECVD) process can be used. First, a stable silicon dioxide layer (not shown) is grown on the surface of the top silicon layer 101 as a photolithography mask layer. Then, a photolithography pattern of the first window is formed on the mask layer through photolithography, and then the top silicon layer 101 is etched through an etching process to form the first window 21 on the surface of the top silicon layer 101.

[0064] In some embodiments, after the photolithography treatment of the first window 21 on the surface of the top silicon layer 101, in order to fabricate a window region with high steepness, uniform width, and smoothness, an ICP etching process with high selectivity and directionality is selected to etch the surface of the photolithographed top silicon layer 101 for the first window 21. Not only can good etching directionality be obtained, but the etching speed is also greatly improved. After etching and removing the photoresist, cleaning is performed to remove the residual photoresist and residual particles to prepare for the next silicon-based germanium-silicon epitaxy.

[0065] As Figure 3As shown, an epitaxial process is used to form a first epitaxial layer 22 of a germanium-silicon solid solution in the first window 21. Among them, since germanium-silicon epitaxial growth belongs to the selective (SEG) growth mode, a certain overgrowth phenomenon will occur on the surfaces of the top silicon layers 101 on both sides of the first window 21 for the first epitaxial layer 22.

[0066] When epitaxially growing the first epitaxial layer 22 of germanium-silicon, it is necessary to define a P-type first doping region as the P-type first contact region 181. A heavily doped P-type first doping region as the P-type first contact region 181 can be formed in the germanium-silicon first epitaxial layer 22 by directly performing P-type doping of boron elements during the process of epitaxially growing the first epitaxial layer 22 of germanium-silicon.

[0067] Alternatively, after completing the epitaxial growth of the intrinsic germanium-silicon first epitaxial layer 22, a large beam current ion implantation method can be used to heavily dope boron in the defined region (lower part) of the germanium-silicon first epitaxial layer 22 to form a heavily doped P-type first doping region as the P-type first contact region 181. After implantation, rapid thermal annealing (RTP) is used to repair the damaged lattice by ion implantation and activate the electrical activity.

[0068] As Figure 4 shown, next, a photolithography and etching process is used to form a second window 23 on the surface of the top silicon layer 101 on one side (shown as the left side) of the first window 21.

[0069] A highly selective and directional ICP etching process can be used to etch the surface of the top silicon layer 101 after photolithography to form the second window 23. After etching and removing the photoresist, cleaning is performed.

[0070] As Figure 5 shown, an epitaxial process is used to form a second epitaxial layer 24 of a germanium-silicon solid solution in the second window 23. Among them, since germanium-silicon epitaxial growth belongs to the selective growth mode, a certain overgrowth phenomenon will also occur on the surfaces of the top silicon layers 101 on both sides of the second window 23 for the second epitaxial layer 24, such that the second epitaxial layer 24 may come into contact with the first epitaxial layer 22 that overgrows at the top.

[0071] Similarly, when epitaxially growing the second epitaxial layer 24 of germanium-silicon, it is necessary to define an N-type second doping region as the N-type second contact region 182. A heavily doped N-type second doping region as the N-type second contact region 182 can be formed in the germanium-silicon first epitaxial layer 22 by directly performing N-type doping of arsenic elements during the process of epitaxially growing the second epitaxial layer 24 of germanium-silicon. Alternatively, after completing the epitaxial growth of the intrinsic germanium-silicon second epitaxial layer 24, a large beam current ion implantation method can be used to heavily dope arsenic in the defined region (lower part) of the germanium-silicon second epitaxial layer 24 to form a heavily doped N-type second doping region as the N-type second contact region 182. After implantation, rapid thermal annealing (RTP) is used to repair the damaged lattice by ion implantation and activate the electrical activity.

[0072] As shown Figure 6 in the figure, then, a photolithography and etching process is adopted, and through the top between the first epitaxial layer 22 and the second epitaxial layer 24, etching is carried out downward to form a third window 25 on the surface of the top silicon layer 101 with the bottom located between the first window 21 and the second window 23.

[0073] A high-selectivity and high-directionality ICP etching process can be used to etch the top surface between the first epitaxial layer 22 and the second epitaxial layer 24 after photolithography to form the third window 25. After etching and removing the photoresist, cleaning is carried out.

[0074] When defining the third window 25 through photolithography, a partial overlap in the lateral position is formed between the defined boundary of the third window 25 and the inner sidewalls opposite to the first window 21 and the second window 23. In this way, when etching the third window 25, etching is generated on the inner sidewalls of the first epitaxial layer 22 and the second epitaxial layer 24 located in the first window 21 and the second window 23. The two sidewalls of the etched third window 25 are respectively formed by the material surfaces of the first epitaxial layer 22 and the second epitaxial layer 24, and the bottom surface of the etched third window 25 is formed by the exposed surface of the top silicon layer 101. The purpose of doing this is to ensure that the sidewalls of the potential well region 20 formed subsequently in the third window 25 can be closely attached to the sidewalls of the potential barrier regions 19 formed in the first window 21 and the second window 23 on both sides.

[0075] As shown Figure 7 in the figure, then, an epitaxial process is adopted to perform epitaxial growth of intrinsic germanium in the third window 25 to form a third epitaxial layer 26 of germanium material in the third window 25.

[0076] The two-step method of high and low temperatures and cyclic annealing can be selected to epitaxially grow the third epitaxial layer 26 of single-crystal germanium layer in the third window 25.

[0077] Since germanium epitaxial growth belongs to a selective growth mode, there will be a certain overgrowth phenomenon on the top surfaces of the first epitaxial layer 22 and the second epitaxial layer 24 on both sides of the third window 25 for the germanium third epitaxial layer 26. Therefore, after epitaxially forming the germanium third epitaxial layer 26, CMP can be selected for planarization treatment of the top surface to expose the tops of the first epitaxial layer 22 and the second epitaxial layer 24, forming a top flat surface of the first epitaxial layer 22, the second epitaxial layer 24, and the third epitaxial layer 26. In this way, the potential well region 20 is formed by the planarized third epitaxial layer 26.

[0078] As shown Figure 8As shown, next, using photolithography and etching processes, through the top surfaces of the first epitaxial layer 22 and the second epitaxial layer 24, part of the materials outside the first epitaxial layer 22 and the second epitaxial layer 24 are removed downward, and two barrier regions 19 (the first barrier region 191 and the second barrier region 192) with reduced and consistent widths are respectively formed on the upper parts of the first epitaxial layer 22 and the second epitaxial layer 24, and two lateral protrusions 17 (the first protrusion 171 and the second protrusion 172) are respectively formed on the lower parts of the first epitaxial layer 22 and the second epitaxial layer 24. By etching the first epitaxial layer 22 and the second epitaxial layer 24, the widths of the two formed barrier regions 19 are made smaller than the Bohr radius of Ge x Si.

[0079] By etching and patterning the outer sides of the upper parts of the first epitaxial layer 22 and the second epitaxial layer 24, a first doped region of P-type conductivity type and a second doped region of N-type conductivity type, which serve as the contact region 18, are respectively formed on the lower parts of the first epitaxial layer 22 and the second epitaxial layer 24, and the formed first protrusion 171 and second protrusion 172 are correspondingly located in the P-type first doped region and the N-type second doped region.

[0080] Through the above steps, a single quantum well structure 16 including a potential well region 20 and two barrier regions 19 located on both sides of the potential well region 20 is formed on the surface of the top silicon layer 101 (the first semiconductor layer 11), realizing the simplification of the traditional multi-quantum well structure form and optimizing the preparation process flow of the laser to a large extent.

[0081] Step S3: Form a surface plasmon polariton structure 13 on the surface of the quantum well structure 16 away from the top silicon layer 101.

[0082] Forming a surface plasmon polariton structure 13 on the quantum well structure 16 includes sequentially forming a dielectric layer 14 and a metal layer 15 on the top surfaces of the potential well region 20 and the barrier region 19 to form a surface plasmon polariton (SPP) composed of metal-dielectric.

[0083] As Figure 9 shown, using a deposition process, a silicon nitride dielectric layer 14 with tensile stress is formed on the surface of the top silicon layer 101, and the deposited dielectric layer 14 covers all the exposed surfaces of the potential well region 20 and the barrier region 19, including the top surface, the side surface, and the surface of the protrusion 17.

[0084] The plasma enhanced chemical vapor deposition (PECVD) process can be used to grow a stable silicon nitride dielectric layer 14, which can introduce tensile stress in the germanium potential well region 20 and the germanium-silicon barrier region 19, reduce the indirect bandgap of germanium, and make it a quasi-direct bandgap.

[0085] As Figure 10As shown, using photolithography and etching processes, electrode windows 27 that are bottom-connected to the two protrusions 17 are respectively formed on the surface of the dielectric layer 14 corresponding to the positions of the two protrusions 17.

[0086] As Figure 11 shown, using a PVD process, such as sputtering or evaporation, etc., electrode metal deposition and patterning are carried out in the electrode windows 27, and the negative electrode 121 of the lead electrode 12 serving as the P-type first contact region 181 and the positive electrode 122 of the lead electrode 12 serving as the N-type second contact region 182 that penetrate through the dielectric layer 14 are respectively formed in the two electrode windows 27.

[0087] After that, using a deposition process, the material of the metal layer 15 is deposited on the dielectric layer 14. Due to the good stability of gold and other excellent properties, gold can be preferentially used as the material of the metal layer 15 for deposition. A PVD process, such as sputtering or evaporation, etc., can be used to deposit a gold layer as the material of the metal layer 15 on the dielectric layer 14.

[0088] Finally, using photolithography and etching processes, the gold layer is etched and patterned to form a patterned gold material metal layer 15 on the surface of the dielectric layer 14 in the top surface regions of the potential well region 20 and the potential barrier region 19. Thus, a surface plasmon structure 13 composed of a stack of the patterned gold layer and the silicon nitride dielectric layer 14 is formed.

[0089] In summary, the present invention forms a laterally arranged quantum well structure 16 on the top silicon layer 101 (the first semiconductor layer 11) serving as a substrate, and forms a surface plasmon structure 13 composed of a metal layer 15 - dielectric layer 14 on the quantum well structure 16, and realizes the near-field optical enhancement of the quantum dot laser formed by the semiconductor laser structure based on surface plasmons, thereby improving the comprehensive performance of the quantum dot laser. And, by introducing a dielectric layer 14 with tensile stress that wraps the quantum well structure 16 into the surface plasmon structure 13, the quantum well can be transformed into a quasi-direct bandgap, thereby further improving the emission power and luminous efficiency of the laser and reducing the threshold current.

[0090] Although the embodiments of the present invention have been described in detail above, it is obvious to those skilled in the art that various modifications and changes can be made to these embodiments. However, it should be understood that such modifications and changes all fall within the scope and spirit of the present invention described in the claims. Moreover, the present invention described herein can have other embodiments and can be implemented or realized in various ways.

Claims

1. A semiconductor laser structure, characterized in that, comprising: a quantum well structure disposed on the surface of a first semiconductor layer; a surface plasmon structure disposed on the surface of the quantum well structure away from the first semiconductor layer.

2. The semiconductor laser structure according to claim 1, characterized in that, the quantum well structure includes a potential well region on the surface of the first semiconductor layer, and potential barrier regions on the surface of the first semiconductor layer on both sides of the potential well region; the surface plasmon structure includes a dielectric layer and a metal layer sequentially disposed on the surface of the quantum well structure away from the first semiconductor layer.

3. The semiconductor laser structure according to claim 2, characterized in that, contact regions of different conductive types are respectively disposed on the bottoms of the potential barrier regions on both sides facing the first semiconductor layer, the contact regions have protrusions in the direction away from the potential barrier regions, the dielectric layer covers the tops and the outer side surfaces of the potential barrier regions and the potential well region away from the first semiconductor layer, the metal layer is disposed on the region of the dielectric layer on the tops of the potential barrier regions and the potential well region, lead electrodes are disposed on the protrusions, and the lead electrodes are separated from the potential barrier regions through the dielectric layer covering the outer side surfaces of the potential barrier regions.

4. The semiconductor laser structure according to claim 2, characterized in that, the material of the potential well region includes a second semiconductor, and the material of the potential barrier region includes a solid solution formed by the second semiconductor and the first semiconductor; and / or, the material of the dielectric layer includes silicon nitride with tensile stress; and / or, the material of the metal layer includes gold, silver, copper or aluminum.

5. The semiconductor laser structure according to claim 4, characterized in that, the first semiconductor includes silicon; and / or, the second semiconductor includes germanium; and / or, the semiconductor laser structure is disposed on an SOI substrate, and the SOI substrate includes a bottom silicon layer, a buried oxide layer and a top silicon layer sequentially disposed, and the top silicon layer is the first semiconductor layer.

6. A method for fabricating a semiconductor laser structure, characterized in that, comprising: providing a substrate with a first semiconductor layer on its surface; forming a quantum well structure on the surface of the first semiconductor layer; forming a surface plasmon structure on the surface of the quantum well structure away from the first semiconductor layer.

7. The method for fabricating a semiconductor laser structure according to claim 6, characterized in that, forming the quantum well structure on the surface of the first semiconductor layer includes forming a potential well region on the surface of the first semiconductor layer and forming potential barrier regions on the surface of the first semiconductor layer on both sides of the potential well region; forming the surface plasmon structure on the surface of the quantum well structure away from the first semiconductor layer includes sequentially forming a dielectric layer and a metal layer on the tops of the potential well region and the potential barrier region away from the first semiconductor layer.

8. The method for fabricating a semiconductor laser structure according to claim 7, characterized in that, the method for forming the potential well region and the potential barrier regions specifically includes: A first window is formed on the surface of the first semiconductor layer, and a first epitaxial layer of a solid solution of a second semiconductor and the first semiconductor is formed in the first window; A second window is formed on the surface of the first semiconductor layer on one side of the first window, and a second epitaxial layer of a solid solution of a second semiconductor and the first semiconductor is formed in the second window; A third window is formed on the surface of the first semiconductor layer located between the first window and the second window; A third epitaxial layer of a second semiconductor material is formed in the third window to form a potential well region; Portions of the materials outside the first epitaxial layer and the second epitaxial layer are removed, two barrier regions with reduced and consistent widths are respectively formed on the upper portions of the first epitaxial layer and the second epitaxial layer, and two lateral protrusions are respectively formed on the lower portions of the first epitaxial layer and the second epitaxial layer; The method for forming the dielectric layer and the metal layer specifically includes: A tensile-stress dielectric layer covering the exposed surfaces of the potential well region and the barrier region is formed on the surface of the first semiconductor layer; A patterned metal layer is formed on the surface of the dielectric layer located in the top surface regions of the potential well region and the barrier region.

9. The method for manufacturing a semiconductor laser structure according to claim 8, wherein, when forming the first epitaxial layer and the second epitaxial layer, it further includes: a first doping region of P-type conductive type and a second doping region of N-type conductive type serving as contact regions are respectively formed on the lower portions of the first epitaxial layer and the second epitaxial layer, and the formed protrusions are located in the contact regions; before forming the metal layer, it further includes: a lead electrode passing through the dielectric layer is formed on the protrusion.

10. The method for manufacturing a semiconductor laser structure according to claim 9, wherein, the contact region is formed by direct doping during the epitaxial process when forming the first epitaxial layer and the second epitaxial layer; or, the contact region is formed by implanting and doping the lower portions of the first epitaxial layer and the second epitaxial layer after forming the first epitaxial layer and the second epitaxial layer.

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