Boost circuit with large step-up ratio and high power density

Abstract

The invention discloses a large step-up ratio and high power density boost circuit, which comprises m stages of power modules, each power module comprises a Boost topology circuit and a full-bridge rectifier transformer circuit which are fused, and each power module is controlled to work in a Boost circuit mode or a full-bridge rectifier transformer circuit mode through a driving signal; the input ends of the m stages of power modules are connected in parallel, and the output ends of the m stages of power modules are connected in series. According to the invention, the Boost topology circuit and the full-bridge rectifier transformer circuit are fused, so that the step-up ratio of the circuit is greatly improved, and the flexibility and expansibility of design parameters of the large step-up ratio circuit are improved; therefore, the system can be suitable for redundant backup power supply, high-voltage low-current low-power-loss transmission and the like in airborne, shipborne, ground and other occasions, and has a wide application space.

Description

Technical Field

[0001] The present invention belongs to the field of boost circuits, and particularly relates to a boost circuit with a large boost ratio and high power density. Background Art

[0002] In an airborne power supply system, the power output by an aircraft engine is generally converted to 270V output after passing through a PFC device. Therefore, the airborne power supply backend devices generally convert the 270V input voltage to different output voltages such as 28V, 12V, 5V, 3.3V, 1.8V, etc. This power supply system is a 270V power supply system, and the general battery voltage is 28V or 48V. The output voltage of a UAV engine is 28V. However, the actual UAV electronic payload is far from the 28V output voltage and has a large power, with a power between 1000W - 2000W. Directly powering with 28V will generate a large power transmission loss with a large current of about 100A, and the required transmission cable is also thick. Therefore, it is necessary to first convert the low voltage to a high voltage of 270V or 400V for long-distance transmission to achieve the purpose of long-distance transmission. However, the existing low-voltage to high-voltage circuits will cause a large output ripple current and high-order harmonics, or have large losses, and still need further improvement. Summary of the Invention

[0003] Aiming at the deficiencies of the above-mentioned prior art, the technical problem to be solved by the present invention is: to provide a boost circuit with a large boost ratio and high power density.

[0004] To solve the above technical problem, the present invention provides the following technical solution:

[0005] A boost circuit with a large boost ratio and high power density includes m power modules, where m≥2. The power module includes a fused Boost topology circuit and a full-bridge rectifier transformer circuit. Each power module is controlled by a drive signal to operate in the Boost circuit mode or the full-bridge rectifier transformer circuit mode; the input ends of the m power modules are connected in parallel, and the output ends of the m power modules are connected in series.

[0006] Further, the Boost topology circuit is the first-stage amplification circuit of the power module, and the full-bridge rectifier transformer circuit is the second-stage amplification circuit of the power module.

[0007] Further, the Boost topology circuit includes a power inductor, a ninth switching MOS transistor, a tenth switching MOS transistor, and a first output capacitor. The gates of the ninth switching MOS transistor and the tenth switching MOS transistor are respectively used to connect corresponding control timing signals. The first end of the power inductor serves as the first input end of the power module and is electrically connected to the first input end of the boost circuit. The second end of the power inductor is respectively electrically connected to the source of the ninth switching MOS transistor and the drain of the tenth switching MOS transistor. The drain of the ninth switching MOS transistor is electrically connected to the first end of the first output capacitor. The first end of the first output capacitor and the source of the tenth switching MOS transistor serve as the second input end of the power module and are electrically connected to the second input end of the boost circuit.

[0008] Further, the full-bridge rectifier transformer circuit includes a first switching MOS transistor, a second switching MOS transistor, a third switching MOS transistor, a fourth switching MOS transistor, a fifth switching MOS transistor, a sixth switching MOS transistor, a seventh switching MOS transistor, an eighth switching MOS transistor, a transformer, and a second output capacitor. The gates of the first switching MOS transistor, the second switching MOS transistor, the third switching MOS transistor, the fourth switching MOS transistor, the fifth switching MOS transistor, the sixth switching MOS transistor, the seventh switching MOS transistor, and the eighth switching MOS transistor are respectively used to connect corresponding control timing signals. The drains of the first switching MOS transistor and the second switching MOS transistor are both electrically connected to the first end of the first output capacitor. The source of the first switching MOS transistor is respectively electrically connected to the drain of the third switching MOS transistor and the first input end of the transformer. The source of the second switching MOS transistor is respectively electrically connected to the drain of the fourth switching MOS transistor and the second input end of the transformer. The sources of the third switching MOS transistor and the fourth switching MOS transistor are both electrically connected to the second end of the first output capacitor.

[0009] The drains of the fifth switching MOS transistor and the sixth switching MOS transistor are both electrically connected to the first end of the second output capacitor. The source of the fifth switching MOS transistor is respectively electrically connected to the drain of the seventh switching MOS transistor and the first output end of the transformer. The source of the sixth switching MOS transistor is respectively electrically connected to the drain of the eighth switching MOS transistor and the second output end of the transformer. The sources of the seventh switching MOS transistor and the eighth switching MOS transistor are both electrically connected to the second end of the second output capacitor. The first end of the second output capacitor serves as the first output end of the power module, and the second end of the second output capacitor serves as the second output end of the power module.

[0010] Further, the first switching MOS transistor, the second switching MOS transistor, the third switching MOS transistor, the fourth switching MOS transistor, the fifth switching MOS transistor, the sixth switching MOS transistor, the seventh switching MOS transistor, and the eighth switching MOS transistor are all N-type MOS transistors.

[0011] Furthermore, the switching MOS transistors and output capacitors of the Boost topology circuit of the power module are reused with those of the full-bridge rectifier transformer circuit.

[0012] Furthermore, the power module includes a power inductor, a first switching MOS transistor, a second switching MOS transistor, a third switching MOS transistor, a fourth switching MOS transistor, a fifth switching MOS transistor, a seventh switching MOS transistor, a transformer, a first voltage-doubling capacitor, a second voltage-doubling capacitor, and a second output capacitor. The gates of the first switching MOS transistor, the second switching MOS transistor, the third switching MOS transistor, the fourth switching MOS transistor, the fifth switching MOS transistor, and the seventh switching MOS transistor are respectively used to connect corresponding control timing signals. The first end of the power inductor serves as the first input end of the power module. The second end of the power inductor is electrically connected to the drain of the first switching MOS transistor and the drain of the second switching MOS transistor respectively. The source of the first switching MOS transistor is electrically connected to the drain of the third switching MOS transistor and the first input end of the transformer respectively. The source of the second switching MOS transistor is electrically connected to the drain of the fourth switching MOS transistor and the second input end of the transformer respectively. After the sources of the third switching MOS transistor and the fourth switching MOS transistor are electrically connected, they serve as the second input end of the power module.

[0013] The drain of the fifth switching MOS transistor and the first end of the first voltage-doubling capacitor are both electrically connected to the first end of the second output capacitor. The source of the fifth switching MOS transistor is electrically connected to the drain of the seventh switching MOS transistor and the first output end of the transformer respectively. The second end of the first voltage-doubling capacitor is electrically connected to the first end of the second voltage-doubling capacitor and the second output end of the transformer respectively. The source of the seventh switching MOS transistor and the second end of the second voltage-doubling capacitor are both electrically connected to the second end of the second output capacitor. The first end of the second output capacitor serves as the first output end of the power module, and the second end of the second output capacitor serves as the second output end of the power module.

[0014] Further, the periods of all the control timing signals are the same as the period of the input voltage signal. Each period is divided into four equal time intervals, and each time interval corresponds to a 90° phase change of the input signal. In the first and second time intervals, the control timing signals turn on the first switch MOS transistor, the second switch MOS transistor, the third switch MOS transistor, and the fourth switch MOS transistor, and turn off the fifth switch MOS transistor and the seventh switch MOS transistor. In the third time interval, the control timing signals turn on the first switch MOS transistor, the fourth switch MOS transistor, and the fifth switch MOS transistor, and turn off the second switch MOS transistor, the third switch MOS transistor, and the seventh switch MOS transistor. In the fourth time interval, the control timing signals turn on the second switch MOS transistor, the third switch MOS transistor, and the seventh switch MOS transistor, and turn off the first switch MOS transistor, the fourth switch MOS transistor, and the fifth switch MOS transistor.

[0015] Further, the phases of the corresponding control timing signals of the m-stage power modules are phase-shifted in the manner of 360° / m.

[0016] Further, the calculation formula for the output voltage Vout of the boost circuit is

[0017] Vout = 1 / (1 - D) * n * 2 * m * Vin

[0018] where D represents the duty cycle; n represents the turns ratio of the coils on the input side and the output side of the transformer; Vin represents the input voltage.

[0019] In the present invention, the Boost topology circuit and the full-bridge rectifier transformer circuit are integrated, and a two-stage boost method is adopted. It does not rely solely on single-stage boost, greatly improving the boost ratio of the circuit, overcoming the disadvantage that the Boost topology circuit cannot achieve input and output isolation, and at the same time overcoming the limitation that the duty cycle D of the full-bridge rectifier transformer circuit cannot be greater than 1, reducing the coil loss of the full-bridge rectifier transformer circuit, enabling voltage conversion with higher power and efficiency, increasing the flexibility and expandability of the design parameters of the large-boost-ratio circuit. And low-voltage power devices can be used to replace high-voltage power devices, overcoming the disadvantage of weak performance of the output high-voltage power devices. At the same time, a large boost ratio between input and output can be achieved, enabling the conversion of unstable low-voltage input in the power supply system into stable high-voltage output, meeting the power supply requirements of the subsequent high-voltage power supply equipment and systems, and at the same time enabling low-loss transmission of high voltage and small current. Description of the Drawings

[0020] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation of the present application. In the drawings:

[0021] Figure 1 It is a circuit diagram of a Boost boost topology.

[0022] Figure 2 It is a circuit diagram of a flyback boost topology.

[0023] Figure 3 It is a circuit diagram of a full-bridge rectifier transformer circuit.

[0024] Figure 4 It is a circuit diagram of an embodiment of the high step-up ratio and high power density boost circuit of the present invention.

[0025] Figure 5 It is a circuit diagram of a power module formed by directly splicing a Boost topology circuit and a full-bridge rectifier transformer circuit.

[0026] Figure 6 It is a circuit diagram of a power module formed after deep integration of a Boost topology circuit and a full-bridge rectifier transformer circuit.

[0027] Figure 7 It is a schematic diagram of an example layout of a high step-up ratio and high power density boost circuit including two power modules.

[0028] Figure 8 It is a current flow diagram in the first time interval when two power modules are adopted.

[0029] Figure 9 It is a current flow diagram in the second time interval when two power modules are adopted.

[0030] Figure 10 It is a current flow diagram in the third time interval when two power modules are adopted.

[0031] Figure 11 It is a current flow diagram in the fourth time interval when two power modules are adopted. Detailed implementation manners

[0032] The following uses specific specific examples to illustrate the implementation manners of the present invention. The diagrams provided in the following embodiments only illustrate the basic concept of the present invention in a schematic manner. Without conflict, the following embodiments and the features in the embodiments can be combined with each other.

[0033] There are several common ways to realize low voltage to high voltage:

[0034] 1) Use a Boost boost topology circuit to realize the boost function. Please refer to Figure 1, The Boost boost topology circuit includes a power inductor La, switching MOS transistors Sa1, Sa2, and an output capacitor Ca1, which has a boost function. The proportional relationship between the input voltage and the output voltage is 1 / (1-D). Here, D is the duty cycle. If a boost ratio of dozens of times is to be achieved, the duty cycle D needs to be very large, which in turn results in a relatively narrow output ripple current pulse, higher harmonic components, larger ripple voltage and ripple current. Moreover, Boost is a non-isolated topology and cannot achieve isolation between the input and the output, thus having significant application limitations.

[0035] 2) Use a flyback boost topology circuit to achieve the boost function. Please refer to Figure 2 , The flyback boost topology circuit includes switching MOS transistors Sa3, Sa4, a transformer Ta, and an output capacitor Ca2. The proportional relationship between its input voltage and output voltage is n / (1 / D - 1). Here, n is the turns ratio of the coils on the input side and the output side. Although it can achieve isolation between the input and the output, in order to achieve the function of a large boost ratio, a relatively large flyback duty cycle D is required, which, like the Boost topology, causes a large output ripple current and high-order harmonics. Or if n is large, it will bring a large voltage stress to the power transistor on the output side, and due to its own characteristics, the flyback topology cannot perform efficient high-power conversion.

[0036] 3) Use a full-bridge rectifier transformer circuit to achieve the boost function. Please refer to Figure 3 , The full-bridge rectifier transformer circuit includes switching MOS transistors Sb1, Sb2, Sb3, Sb4, Sb5, Sb6, Sb7, Sb8, a transformer Tb, a power inductor Lb, and an output capacitor Cb. The full-bridge rectifier transformer circuit is suitable for high-power conversion and can achieve isolation between the input and the output. The proportional relationship between its input voltage and output voltage is n*D. Here, due to the limitation of the topology, the maximum value of the duty cycle D can only be 1. At the same time, due to the instability of the input voltage range, to ensure the stability of the output voltage under both high and low input voltages, the value of D will be less than 1. Then, to achieve a large boost ratio, the value of n must be increased, which will bring more winding coils and more coil losses.

[0037] Please refer to Figure 4 , Figure 4This is the topology circuit diagram of an embodiment of the high step-up ratio and high power density boost circuit of the present invention. The high step-up ratio and high power density boost circuit of this embodiment includes m power modules, where m≥2. The power module includes a fused Boost topology circuit and a full-bridge rectifier transformer circuit, that is, the power module includes two-stage amplification circuits. In this embodiment, the Boost topology circuit is the first-stage amplification circuit of the power module, that is, the structure of the Boost topology circuit is close to the input side of the power module; the full-bridge rectifier transformer circuit is the second-stage amplification circuit of the power module, that is, the structure of the full-bridge rectifier transformer circuit is close to the output side of the power module. Each of the power modules is controlled by a drive signal to operate in the Boost circuit mode or the full-bridge rectifier transformer circuit mode.

[0038] The input ends of the m power modules are connected in parallel, and the output ends of the m power modules are connected in series. Specifically, on the input side, the first input end of each power module is electrically connected to the first input end of the boost circuit, and the second input end of each power module is electrically connected to the second input end of the boost circuit. On the output side, the positive output end of the first-stage power module is electrically connected to the positive output end of the boost circuit, the negative output ends of the first-stage to the (m-1)-th stage power modules are respectively electrically connected to the positive output end of the next-stage power module, and the negative output end of the m-th stage power module is electrically connected to the negative output end of the boost circuit.

[0039] Please refer to Figure 5 , the power module can be formed by simply fusing (i.e., directly splicing) the Boost topology circuit and the full-bridge rectifier transformer circuit. The Boost topology circuit includes a power inductor L1, a ninth switching MOS transistor S9, a tenth switching MOS transistor S10, and a first output capacitor C4. The gates of the ninth switching MOS transistor S9 and the tenth switching MOS transistor S10 are respectively used to connect corresponding control timing signals. The first end of the power inductor L1 serves as the first input end of the power module and is electrically connected to the first input end of the boost circuit. The second end of the power inductor L1 is respectively electrically connected to the source of the ninth switching MOS transistor S9 and the drain of the tenth switching MOS transistor S10. The drain of the ninth switching MOS transistor S9 is electrically connected to the first end of the first output capacitor C4. The first end of the first output capacitor C4 and the source of the tenth switching MOS transistor S10 serve as the second input end of the power module and are electrically connected to the second input end of the boost circuit.

[0040] The full-bridge rectifier transformer circuit includes a first switching MOS transistor S1, a second switching MOS transistor S2, a third switching MOS transistor S3, a fourth switching MOS transistor S4, a fifth switching MOS transistor S5, a sixth switching MOS transistor S6, a seventh switching MOS transistor S7, an eighth switching MOS transistor S8, a transformer T1, and a second output capacitor C3. The gates of the first switching MOS transistor S1, the second switching MOS transistor S2, the third switching MOS transistor S3, the fourth switching MOS transistor S4, the fifth switching MOS transistor S5, the sixth switching MOS transistor S6, the seventh switching MOS transistor S7, and the eighth switching MOS transistor S8 are respectively used to connect corresponding control timing signals. In this embodiment, the first switching MOS transistor S1, the second switching MOS transistor S2, the third switching MOS transistor S3, the fourth switching MOS transistor S4, the fifth switching MOS transistor S5, the sixth switching MOS transistor S6, the seventh switching MOS transistor S7, and the eighth switching MOS transistor S8 are all preferably N-type MOS transistors.

[0041] The drains of the first switching MOS transistor S1 and the second switching MOS transistor S2 are both electrically connected to the first end of a first output capacitor C4. The source of the first switching MOS transistor S1 is respectively electrically connected to the drain of the third switching MOS transistor S3 and the first input terminal of the transformer T1. The source of the second switching MOS transistor S2 is respectively electrically connected to the drain of the fourth switching MOS transistor S4 and the second input terminal of the transformer T1. The sources of the third switching MOS transistor S3 and the fourth switching MOS transistor S4 are both electrically connected to the second end of the first output capacitor C4.

[0042] The drains of the fifth switching MOS transistor S5 and the sixth switching MOS transistor S6 are both electrically connected to the first end of the second output capacitor C3. The source of the fifth switching MOS transistor S5 is respectively electrically connected to the drain of the seventh switching MOS transistor S7 and the first output terminal of the transformer T1. The source of the sixth switching MOS transistor S6 is respectively electrically connected to the drain of the eighth switching MOS transistor S8 and the second output terminal of the transformer T1. The sources of the seventh switching MOS transistor S7 and the eighth switching MOS transistor S8 are both electrically connected to the second end of the second output capacitor C3. The first end of the second output capacitor C3 serves as the first output terminal of the power module, and the second end of the second output capacitor C3 serves as the second output terminal of the power module.

[0043] Please refer to Figure 6 In this embodiment, Figure 5Based on this, two switching MOS transistors (i.e., the ninth switching MOS transistor S9 and the tenth switching MOS transistor S10) of the Boost topology circuit of the power module and the output capacitor (i.e., the first output capacitor C4) are multiplexed with the switching MOS transistors and output capacitors of the full-bridge rectifier transformer circuit, so as to realize the deep integration of the Boost topology circuit and the full-bridge rectifier transformer circuit. Through deep integration, the number of components can be reduced, the component cost can be lowered, the volume of the converter can be reduced, and the power density can be increased. At the same time, in this embodiment, the sixth switching MOS transistor S6 and the eighth switching MOS transistor S8 of the full-bridge rectifier transformer circuit are replaced with the first voltage-doubling capacitor C1 and the second voltage-doubling capacitor C2. The series output of the first voltage-doubling capacitor C1 and the second voltage-doubling capacitor C2 can increase the boost ratio, thereby reducing the turns ratio of the transformer T1 and making the transformer T1 easier to design.

[0044] Specifically, the power module after deep integration may include a power inductor L1, a first switching MOS transistor S1, a second switching MOS transistor S2, a third switching MOS transistor S3, a fourth switching MOS transistor S4, a fifth switching MOS transistor S5, a seventh switching MOS transistor S7, a transformer, a first voltage-doubling capacitor C1, a second voltage-doubling capacitor C2, and a second output capacitor C3. The gates of the first switching MOS transistor S1, the second switching MOS transistor S2, the third switching MOS transistor S3, the fourth switching MOS transistor S4, the fifth switching MOS transistor S5, and the seventh switching MOS transistor S7 are respectively used to connect corresponding control timing signals. The capacitance values of the first voltage-doubling capacitor C1 and the second voltage-doubling capacitor C2 are generally equal, and the capacitance value of the second output capacitor C3 is generally much larger than the capacitance values of the first voltage-doubling capacitor C1 and the second voltage-doubling capacitor C2.

[0045] The first end of the power inductor L1 serves as the first input end of the power module. The second end of the power inductor L1 is electrically connected to the drain of the first switching MOS transistor S1 and the drain of the second switching MOS transistor S2 respectively. The source of the first switching MOS transistor S1 is electrically connected to the drain of the third switching MOS transistor S3 and the first input end of the transformer T1 respectively. The source of the second switching MOS transistor S2 is electrically connected to the drain of the fourth switching MOS transistor S4 and the second input end of the transformer T1 respectively. After the sources of the third switching MOS transistor S3 and the fourth switching MOS transistor S4 are electrically connected, they serve as the second input end of the power module.

[0046] The drain of the fifth switching MOS transistor S5 and the first end of the first voltage-doubling capacitor C1 are both electrically connected to the first end of the second output capacitor C3. The source of the fifth switching MOS transistor S5 is respectively electrically connected to the drain of the seventh switching MOS transistor S7 and the first output terminal of the transformer T1. The second end of the first voltage-doubling capacitor C1 is respectively electrically connected to the first end of the second voltage-doubling capacitor C2 and the second output terminal of the transformer T1. The source of the seventh switching MOS transistor S7 and the second end of the second voltage-doubling capacitor C2 are both electrically connected to the second end of the second output capacitor C3. The first end of the second output capacitor C3 serves as the first output terminal of the power module, and the second end of the second output capacitor C3 serves as the second output terminal of the power module.

[0047] The periods of all the control timing signals are the same as the period of the input voltage signal. Each period is divided into four time intervals, and each time interval corresponds to a 90° phase change of the input signal. In the first time interval and the second time interval, the power module operates in the Boost circuit mode, and the control timing signals turn on the first switching MOS transistor S1, the second switching MOS transistor S2, the third switching MOS transistor S3, and the fourth switching MOS transistor S4, and turn off the fifth switching MOS transistor S5 and the seventh switching MOS transistor S7. In the third time interval and the fourth time interval, the power module operates in the full-bridge rectifier transformer circuit mode. Among them, in the third time interval, the control timing signals turn on the first switching MOS transistor S1, the fourth switching MOS transistor S4, and the fifth switching MOS transistor S5, and turn off the second switching MOS transistor S2, the third switching MOS transistor S3, and the seventh switching MOS transistor S7; in the fourth time interval, the control timing signals turn on the second switching MOS transistor S2, the third switching MOS transistor S3, and the seventh switching MOS transistor S7, and turn off the first switching MOS transistor S1, the fourth switching MOS transistor S4, and the fifth switching MOS transistor S5.

[0048] The phases of the corresponding control timing signals of the m-stage power modules are generally phase-shifted in the manner of 360° / m to reduce the current ripple at the input and output ends and increase the ripple frequency at the input and output ends. Please continue to refer to Figure 4, assume that the m - level power modules are power module 1, power module 2, …, power module x, …, power module m respectively. Among them, power module 1 includes power inductor L11, first switching MOS transistor S11, second switching MOS transistor S12, third switching MOS transistor S13, fourth switching MOS transistor S14, fifth switching MOS transistor S15, seventh switching MOS transistor S17, transformer T11, first voltage - doubling capacitor C11, second voltage - doubling capacitor C12, and second output capacitor C13. Power module 2 includes power inductor L21, first switching MOS transistor S21, second switching MOS transistor S22, third switching MOS transistor S23, fourth switching MOS transistor S24, fifth switching MOS transistor S25, seventh switching MOS transistor S27, transformer T21, first voltage - doubling capacitor C21, second voltage - doubling capacitor C22, and second output capacitor C23. ……. Power module x includes power inductor Lx1, first switching MOS transistor Sx1, second switching MOS transistor Sx2, third switching MOS transistor Sx3, fourth switching MOS transistor Sx4, fifth switching MOS transistor Sx5, seventh switching MOS transistor Sx7, transformer Tx1, first voltage - doubling capacitor Cx1, second voltage - doubling capacitor Cx2, and second output capacitor Cx3. ……. Power module m includes power inductor Lm1, first switching MOS transistor Sm1, second switching MOS transistor Sm2, third switching MOS transistor Sm3, fourth switching MOS transistor Sm4, fifth switching MOS transistor Sm5, seventh switching MOS transistor Sm7, transformer Tm1, first voltage - doubling capacitor Cm1, second voltage - doubling capacitor Cm2, and second output capacitor Cm3. Then, the m control timing signals respectively connected to the gates of the first switching MOS transistors S11, S21, …, Sx1, …, Sm1 are obtained by phase - shifting the same signal in a 360° / m manner. The m control timing signals respectively connected to the gates of the second switching MOS transistors S12, S22, …, Sx2, …, Sm2 are obtained by phase - shifting the same signal in a 360° / m manner. And so on, the m control timing signals respectively connected to the gates of the seventh switching MOS transistors S17, S27, …, Sx7, …, Sm7 are obtained by phase - shifting the same signal in a 360° / m manner.

[0049] Using the above circuit structure, the calculation formula for the output voltage Vout of the boost circuit is

[0050] Vout = 1 / (1 - D)*n*2*m*Vin

[0051] Among them, D represents the duty cycle; n represents the coil turn ratio between the input side and the output side of the transformer; Vin represents the input voltage.

[0052] The working principle of this embodiment will be described below by taking a high step-up ratio and high power density boost circuit including two-stage power modules as an example:

[0053] Please refer to Figures 7 to 11 , the high step-up ratio and high power density boost circuit includes two-stage power modules, namely power module 1 and power module 2, so as to form a module with an input of 28V and an output of 1000W / 270V with m = 2. The example layout diagram is as Figure 7 shown (the first switching MOS transistor S1, the second switching MOS transistor S2, the third switching MOS transistor S3, and the fourth switching MOS transistor S4 are all formed by paralleling two PMOS transistors). Its external dimensions are small, and the power devices are distributed dispersedly, which is convenient for heat dissipation. The structures of power module 1 and power module 2 are exactly the same, and both adopt the Figure 6 topological circuit of the power module in; and the phases of the control signals connected to the gates of the same switching MOS transistor in power module 1 and power module 2 differ by 360° / 2 = 180°. Assuming that the starting moment of a cycle in power module 1 (i.e., the moment with a phase of 0) is t0, the moment with a phase of 90° is t1, the moment with a phase of 180° is t2, the moment with a phase of 270° is t3, and the moment with a phase of 360° is t4.

[0054] Please refer to Figure 8 , in the interval [t0, t1], the control timing signal of power module 1 is in the first time interval, and the control timing signal of power module 2 is in the third time interval. At this time, the input side of the transformer T11 of power module 1 works in the Boost circuit mode, and the current flows through the power inductor L11, the first switching MOS transistor S11, the second switching MOS transistor S12, the third switching MOS transistor S13, and the fourth switching MOS transistor S14. The output side and the input side of the transformer T11 are disconnected, realizing the isolation between the output end and the input end of the Boost circuit; the output is powered by relying on the first voltage doubling capacitor C11 and the second voltage doubling capacitor C12. Since the first voltage doubling capacitor C11 and the second voltage doubling capacitor C12 are connected in series at this time, the output voltage can be doubled. Power module 2 works in the full-bridge rectifier transformer circuit mode, and the power inductor L21 charges the first voltage doubling capacitor C21 through the full bridge. The current flows through the power inductor L21, the first switching MOS transistor S21, the fourth switching MOS transistor S24, the transformer T21, the fifth switching MOS transistor S25, and the first voltage doubling capacitor C21. The input side and the output side of the transformer T21 are connected together through the transformer, and the second output capacitor C23 is used as the output power supply. Since the capacitance value of the second output capacitor C23 is much larger than that of the second voltage doubling capacitor C22, the current on the second voltage doubling capacitor C22 can be ignored at this time.

[0055] Please refer to Figure 9 During the time interval [t1, t2], the control timing signal of power module 1 is in the second time interval, and the control timing signal of power module 2 is in the fourth time interval. At this time, power module 1 is still operating in Boost mode, and the working process is the same as that in the interval [t0, t1]. The power inductor L21 of power module 2 charges the second voltage-doubling capacitor C22 through a full bridge. The current flows through the power inductor L21, the second switching MOS transistor S22, the third switching MOS transistor S23, the transformer T21, the seventh switching MOS transistor S27, and the second voltage-doubling capacitor C22. The input side and the output side of the transformer T21 are connected together, and the second output capacitor C23 is used as the output power supply. Since the capacitance value of the second output capacitor C23 is much larger than that of the first voltage-doubling capacitor C21, the current on the first voltage-doubling capacitor C21 can be ignored at this time.

[0056] Please refer to Figure 10 During the time interval [t2, t3], the control timing signal of power module 1 is in the third time interval, and the control timing signal of power module 2 is in the first time interval. At this time, the working process of power module 1 is the same as that of power module 2 in the interval [t0, t1], and the working process of power module 2 is the same as that of power module 1 in the interval [t0, t1], which will not be elaborated here.

[0057] Please refer to Figure 11 During the time interval [t3, t4], the control timing signal of power module 1 is in the fourth time interval, and the control timing signal of power module 2 is in the second time interval. At this time, the working process of power module 1 is the same as that of power module 2 in the interval [t1, t2], and the working process of power module 2 is the same as that of power module 1 in the interval [t1, t2], which will not be elaborated here.

[0058] The high step-up ratio and high power density boost circuit of this embodiment has the following advantages:

[0059] 1) This embodiment integrates a Boost topology circuit and a full-bridge rectifier transformer circuit, and adopts a two-stage step-up method, rather than relying solely on a single-stage step-up. This greatly improves the step-up ratio of the circuit, overcomes the drawback that the Boost topology circuit cannot achieve input and output isolation, and at the same time overcomes the limitation that the duty cycle D of the full-bridge rectifier transformer circuit cannot be greater than 1, reducing the coil loss of the full-bridge rectifier transformer circuit, and enabling higher-power and higher-efficiency voltage conversion. It increases the flexibility and expandability of the design parameters of the high step-up ratio circuit.

[0060] 2) This embodiment further integrates the first-stage Boost topology circuit and the second-stage full-bridge rectifier transformer circuit, removes the output capacitor of the first-stage Boost topology circuit, and reuses the switching MOS transistors of the second-stage full-bridge rectifier transformer circuit, thereby reducing the number of components, reducing the probability of failures, improving the fault-free operation time and reliability of the entire system, reducing the component cost, decreasing the volume of the converter, and increasing the power density. At the same time, reusing the switching MOS transistors can also reduce the number of driver circuits, simplify the design of the driver circuits, improve the reliability and stable operation ability of the drive, and reduce the drive loss.

[0061] 3) This embodiment uses multiple power modules with the same electrical characteristics. The required power and the required high-voltage output are evenly distributed to each power module, so that the power of a single power module will not be too large, and thus each power module only needs to meet a relatively small power requirement. This facilitates the modular implementation of a large step-up ratio circuit with different output powers and different high-voltage outputs. According to different power requirements or output voltages, the number of power modules can be increased or decreased, ultimately meeting the requirements of the power supply system. The design process is convenient, easy to expand the product line, form products of different models and varieties, and at the same time quickly meet different user needs, reducing the design time and increasing the success rate of the design. The implementation method of the power module also makes the main heat-generating components such as inductors, transformers, and power MOS transistors in the switching converter circuit more dispersed, dispersing the heat loss, facilitating heat dissipation and the design of the radiator, and further reducing the size, volume and weight of the entire power supply system. In particular, the implementation method of small-size power inductors and power transformers can reduce the changes in the design parameters and performance parameters of large-size power inductors and power transformers.

[0062] 4) The 360 / m interleaved Boost topology working mode of the power module in this embodiment reduces the input and output current ripples, increases the ripple frequency of the input and output, is more conducive to passing the electromagnetic compatibility test, and facilitates the design of the EMI filters for the input and output of the power supply system.

[0063] 5) The second-stage full-bridge rectifier transformer circuit uses the series output of the first voltage-doubling capacitor and the second voltage-doubling capacitor, and the power module uses the series output method to increase the output voltage, thereby increasing the step-up ratio. This method reduces the maximum voltage stress of the switching MOS transistors for output rectification, and low-voltage SIMOS transistors can be used. For example, for a 270V output, when m = 2, that is, 2 power modules, MOS transistors with a voltage greater than 135V can be selected, increasing the range of MOS transistor options. Through the excellent parameter performance of low-voltage SIMOS transistors, the efficiency and performance of the system can be greatly improved, and at the same time, the reliability of the system can be improved.

[0064] 6) The characteristics of the output power, output voltage, and large boost ratio in this embodiment greatly enhance the versatility, so that it can be applied to redundant backup power supply, high-voltage small-current and low-high-power-loss transmission in airborne, shipborne, ground and other scenarios, and has a wide application space.

[0065] The above embodiments only represent the preferred embodiments of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several deformations and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the invention patent should be subject to the appended claims.

Claims

1. A high-boost ratio and high-power density boost circuit, characterized in that: It comprises m-level power modules, m≥2, and the power modules comprise a fused Boost topology circuit and a full-bridge rectifier transformer circuit. Each of the power modules operates in a Boost circuit mode or a full-bridge rectifier transformer circuit mode through a driving signal control; the input ends of the m-level power modules are connected in parallel, and the output ends of the m-level power modules are connected in series.

2. The high power density boost circuit with large boost ratio as claimed in claim 1, characterized in that: The Boost topology circuit is the first-stage amplifier circuit of the power module, and the full-bridge rectifier transformer circuit is the second-stage amplifier circuit of the power module.

3. The high power density boost circuit with a large boost ratio as claimed in claim 2, characterized in that: The Boost topology circuit includes a power inductor, a ninth switch MOS tube, a tenth switch MOS tube and a first output capacitor, wherein the gates of the ninth switch MOS tube and the tenth switch MOS tube are respectively used to connect corresponding control timing signals; the first end of the power inductor is electrically connected to the first input end of the boost circuit as the first input end of the power module, the second end of the power inductor is electrically connected to the source of the ninth switch MOS tube and the drain of the tenth switch MOS tube respectively, the drain of the ninth switch MOS tube is electrically connected to the first end of the first output capacitor, and the first end of the first output capacitor and the source of the tenth switch MOS tube are electrically connected to the second input end of the boost circuit as the second input end of the power module.

4. The high power density boost circuit with a large boost ratio as claimed in claim 3, characterized in that: The full-bridge rectifier transformer circuit includes a first switch MOS transistor, a second switch MOS transistor, a third switch MOS transistor, a fourth switch MOS transistor, a fifth switch MOS transistor, a sixth switch MOS transistor, a seventh switch MOS transistor, an eighth switch MOS transistor, a transformer and a second output capacitor. The gates of the first switch MOS transistor, the second switch MOS transistor, the third switch MOS transistor, the fourth switch MOS transistor, the fifth switch MOS transistor, the sixth switch MOS transistor, the seventh switch MOS transistor and the eighth switch MOS transistor are respectively used to connect corresponding control timing signals; the drain of the first switch MOS transistor and the drain of the second switch MOS transistor are both electrically connected to the first end of the first output capacitor, the source of the first switch MOS transistor is respectively electrically connected to the drain of the third switch MOS transistor and the first input end of the transformer, the source of the second switch MOS transistor is respectively electrically connected to the drain of the fourth switch MOS transistor and the second input end of the transformer, and the source of the third switch MOS transistor and the source of the fourth switch MOS transistor are both electrically connected to the second end of the first output capacitor; The drain of the fifth switch MOS tube and the drain of the sixth switch MOS tube are both electrically connected to the first end of the second output capacitor, the source of the fifth switch MOS tube is respectively electrically connected to the drain of the seventh switch MOS tube and the first output end of the transformer, the source of the sixth switch MOS tube is respectively electrically connected to the drain of the eighth switch MOS tube and the second output end of the transformer, and the source of the seventh switch MOS tube and the source of the eighth switch MOS tube are both electrically connected to the second end of the second output capacitor; the first end of the second output capacitor serves as the first output end of the power module, and the second end of the second output capacitor serves as the second output end of the power module.

5. The high-power-density boost circuit with a large boost ratio as claimed in claim 4, characterized in that: The first switch MOS transistor, the second switch MOS transistor, the third switch MOS transistor, the fourth switch MOS transistor, the fifth switch MOS transistor, the sixth switch MOS transistor, the seventh switch MOS transistor and the eighth switch MOS transistor are all N-type MOS transistors.

6. The high power density boost circuit with a large boost ratio as claimed in claim 1, characterized in that: The switch MOS tube and the output capacitor of the Boost topology circuit of the power module are reused with the switch MOS tube and the output capacitor of the full-bridge rectifier transformer circuit.

7. The high power density boost circuit with a large boost ratio as claimed in claim 1, characterized in that: The power module includes a power inductor, a first switch MOS transistor, a second switch MOS transistor, a third switch MOS transistor, a fourth switch MOS transistor, a fifth switch MOS transistor, a seventh switch MOS transistor, a transformer, a first voltage doubling capacitor, a second voltage doubling capacitor and a second output capacitor. The gates of the first switch MOS transistor, the second switch MOS transistor, the third switch MOS transistor, the fourth switch MOS transistor, the fifth switch MOS transistor and the seventh switch MOS transistor are respectively used to connect corresponding control timing signals; the first end of the power inductor serves as the first input end of the power module, the second end of the power inductor is respectively electrically connected to the drain of the first switch MOS transistor and the drain of the second switch MOS transistor, the source of the first switch MOS transistor is respectively electrically connected to the drain of the third switch MOS transistor and the first input end of the transformer, the source of the second switch MOS transistor is respectively electrically connected to the drain of the fourth switch MOS transistor and the second input end of the transformer, and the source of the third switch MOS transistor and the source of the fourth switch MOS transistor are electrically connected to serve as the second input end of the power module; The drain of the fifth switch MOS tube and the first end of the first voltage doubling capacitor are both electrically connected to the first end of the second output capacitor, the source of the fifth switch MOS tube is respectively electrically connected to the drain of the seventh switch MOS tube and the first output end of the transformer, the second end of the first voltage doubling capacitor is respectively electrically connected to the first end of the second voltage doubling capacitor and the second output end of the transformer, the source of the seventh switch MOS tube and the second end of the second voltage doubling capacitor are both electrically connected to the second end of the second output capacitor; the first end of the second output capacitor serves as the first output end of the power module, and the second end of the second output capacitor serves as the second output end of the power module.

8. The high power density boost circuit with a large boost ratio as claimed in claim 7, characterized in that: The cycle of each of the control timing signals is the same as the cycle of the input voltage signal, and each of the cycles is divided into four equal time intervals, and each time interval corresponds to a 90° phase change of the input signal; in the first time interval and the second time interval, the control timing signal turns on the first switch MOS tube, the second switch MOS tube, the third switch MOS tube and the fourth switch MOS tube, and turns off the fifth switch MOS tube and the seventh switch MOS tube; in the third time interval, the control timing signal turns on the first switch MOS tube, the fourth switch MOS tube and the fifth switch MOS tube, and turns off the second switch MOS tube, the third switch MOS tube and the seventh switch MOS tube; in the fourth time interval, the control timing signal turns on the second switch MOS tube, the third switch MOS tube and the seventh switch MOS tube, and turns off the first switch MOS tube, the fourth switch MOS tube and the fifth switch MOS tube.

9. The high boost ratio and high power density boost circuit according to any one of claims 1 to 8, characterized in that: The phases between the corresponding control timing signals of the power modules of level m are staggered in a manner of 360° / m.

10. The high-power-density boost circuit with a large boost ratio as claimed in claim 9, characterized in that: The calculation formula of the output voltage Vout of the boost circuit is: Vout=1 / (1-D)*n*2*m*Vin Wherein, D represents the duty cycle; n represents the ratio of the number of turns of the transformer coils on the input side and the output side; Vin represents the input voltage.

Images