Method for optimizing parameters of buffer circuit of alternating current chopping voltage regulator
By optimizing the buffer circuit parameters, the problem of voltage spikes in the high-frequency switching of traditional AC chopper voltage regulating power supplies is solved, and peak suppression and circuit reliability are improved. It is suitable for the engineering practice of AC chopper voltage regulating power supplies.
Patent Information
- Application Number
- CN202510268289.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-07
- Publication Date
- 2025-05-30
AI Technical Summary
The voltage spikes and electromagnetic harmonic interference caused by traditional AC chopper voltage regulation power supplies during high-frequency switching are difficult to achieve accurate matching of existing RC buffer circuits, resulting in strong working conditions dependence on the peak suppression effect and deterioration of energy loss.
By optimizing the buffer circuit parameters, using the double-pulse test method to measure stray inductors, combined with the parasitic capacitance and shutdown time provided by the device manual, the parameter selection principle of buffer capacitor Cs and buffer resistor Rs is determined to ensure that the buffer circuit quickly releases energy during the switching cycle and achieves impedance matching with the load.
Effectively suppress voltage spikes, improve the reliability of AC chopper voltage regulation power supply, take into account theoretical analysis and experimental verification, and provide reference for engineering practice.
Smart Images
Figure CN120074208A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an AC voltage regulation system, specifically an AC chopper voltage regulation power supply with optimized buffer circuit parameters. This power supply suppresses voltage spikes by optimizing the design of the buffer circuit and improves the reliability of the system. Background Art
[0002] As a type of switch-mode voltage modulation device, the AC chopper voltage regulation power supply realizes continuous regulation of the AC output voltage by periodically controlling the conduction duty cycle of the power switch device. Compared with traditional transformer voltage regulation or thyristor phase control technology, this scheme abandons magnetic components and the phase lag regulation mechanism, achieving significant improvements in key performance such as power density, dynamic response speed, and energy conversion efficiency. It has been widely applied in industrial drives, power electronics converters, and precision dimming and speed regulation fields. However, while its high-frequency switching characteristics promote system miniaturization, they also exacerbate transient voltage spike and electromagnetic harmonic interference problems due to the inherent characteristics of parasitic parameters (such as junction capacitance and lead inductance). Although the currently widely used RC buffer circuit can suppress such phenomena, its parameter design relies on a trial-and-error method driven by empirical formulas, making it difficult to achieve precise matching with dynamic parasitic parameters. As a result, the spike suppression effect shows significant operating condition dependence and is accompanied by the deterioration of additional energy loss.
[0003] The traditional buffer circuit design has the following limitations:
[0004] 1. The capacitance value selected empirically is mismatched with the energy release requirement of the inductor, often resulting in an energy storage imbalance problem such as an overly large capacitor volume or insufficient voltage suppression.
[0005] 2. When selecting the resistance value, two issues of time constant and impedance matching need to be considered simultaneously. The traditional buffer circuit design only considers the time constant and does not consider the matching relationship between the buffer resistance and the load resistance. When the buffer resistance value is higher than the load resistance (i.e., impedance mismatch), the following problems will occur: the energy release path is blocked, and the energy stored in the buffer capacitor cannot be released through the resistor in time, causing energy to flow back to the front-stage circuit; increasing the input impedance of the rear-stage circuit and reducing the system pole frequency, affecting the circuit stability (such as generating self-excited oscillation).
[0006] 3. The existing methods lack consideration of the coupling relationship between the inductor, load, switching frequency, and buffer components, resulting in the inability to establish a multi-parameter collaborative optimization mechanism in the design process and making it difficult to meet the adaptive requirements of different application scenarios. Summary of the Invention
[0007] Aiming at the voltage spike problem generated during the high-frequency switching process of traditional AC chopper voltage regulators, the solution of the present invention is to provide a method for optimizing the parameters of the buffer circuit of an AC chopper voltage regulator to achieve theoretical guidance for parameter selection and performance optimization. In the main circuit, two back-to-back IGBTs with anti-parallel diodes are connected in series as the chopping switch, two back-to-back IGBTs with anti-parallel diodes are connected in parallel at both ends of the load as the freewheeling switch, and finally an RC buffer circuit is connected in parallel across the chopping switch.
[0008] The rationality verification of the buffer circuit parameters needs to be completed through systematic measurement, calculation, and on-site adjustment. First, the stray inductance in the circuit is accurately measured using the double-pulse test method. During the test, it is necessary to ensure that the IGBT junction temperature is stable to avoid parameter drift of the device caused by temperature changes. By setting different pulse widths and dead times, observe the linear rise and fall characteristics of the current, and select the highest point of the voltage spike (avoiding oscillation interference) as the key measurement value. At the same time, take the average value through three tests to eliminate the influence of individual device differences.
[0009] In the parameter calculation stage, it is necessary to combine the parasitic capacitance and turn-off time provided in the device manual to determine the buffer capacitance C s and the buffer resistance R s The parameter selection principles are as follows:
[0010] 1) The capacitance of the buffer capacitor C s should satisfy that the buffer capacitor C s should be greater than or equal to the equivalent inductance L m divided by the square of the load resistance R.
[0011] 2) The time constant of the buffer resistance R s and the buffer capacitor C s should satisfy that the buffer resistance R s multiplied by the buffer capacitor C s should be less than or equal to the switching frequency f divided by thirty; this constraint ensures that the buffer circuit can quickly release energy within the switching period.
[0012] 3) The resistance value of the buffer resistance R s should satisfy that the buffer resistance R s is less than or equal to the load resistance R, this constraint ensures impedance matching between the buffer circuit and the load and avoids energy reflux delay.
[0013] After the parameter design is completed, actual measurement verification is required: Connect the buffer element to the circuit, measure the amplitude of the voltage spike during the switching process, and compare it with the input voltage. If the waveform is abnormal, the parameters need to be dynamically adjusted according to the phenomenon. For example, if the spike amplitude is too low and the voltage rising edge has a tail, it indicates that the buffer capacitor is too large; if the spike is too high and steep, it means the capacitor is too small; if the ringing amplitude is large or there is a residual step voltage, the buffer resistance needs to be reduced; and if the rising edge is dull accompanied by current spikes, the resistance needs to be increased. When adjusting, the capacitor parameters should be optimized first. If the effect is insufficient, then adjust the resistance. After each modification, the waveform needs to be re-verified, and it is necessary to ensure that the power loss of the resistance is within a safe range to avoid the risk of overheating. The entire process combines theoretical guidance with actual measurement iteration to ultimately achieve the goal of suppressing voltage spikes and reducing ringing, while ensuring the efficiency and reliability of the circuit.
[0014] Advantageous Effects
[0015] The advantageous effects of the present invention are: By optimizing the buffer circuit design, the voltage spike problem is effectively suppressed, and the reliability of the AC chopper voltage regulator power supply is improved; the proposed buffer circuit design scheme takes into account both theoretical analysis and experimental verification, providing a reference for engineering practice. Description of the Drawings
[0016] Figure 1 Topological diagram of the AC chopper voltage regulator power supply; Detailed Implementation Manner
[0017] The implementation basis of the present invention is that on one side of the input voltage source U s a pair of back-to-back IGBTs (S 1 and S 2 ) with anti-parallel diodes are connected in series as the chopping switch, then a load R is connected in series, and a pair of back-to-back IGBTs with anti-parallel diodes are connected in parallel at both ends of the load R as the freewheeling switch. At the same time, an RC buffer circuit is connected in parallel at both ends of the chopping switch S 1 and S 2 , which includes a buffer capacitor C s and a buffer resistor R s . Let the equivalent inductance L m after synthesizing the stray inductance and inductive load in the circuit.
[0018] The selection of the buffer capacitor C s and the buffer resistor R s needs to meet the following three principles:
[0019] 1) Considering from the perspective of energy storage, the buffer capacitor C s needs to store the energy released by the inductor, and its minimum value is determined by the stray inductance L m in the circuit and the load resistance R. The buffer capacitor C sThe capacitance must be able to store all the energy released by the inductor at the moment when the switch turns off. Specifically, the buffer capacitor C s should be greater than or equal to the ratio of the inductance to the square of the load resistance, and a certain margin (such as 10%-20%) is allowed to adapt to the actual device error.
[0020] 2) Considering from the perspective of the time constant, the buffer resistor R s and the buffer capacitor C s constitute an RC circuit with a specific time constant, which is the product of the resistance value and the capacitance value. During the operation of the circuit, the switch will turn on and off according to a certain cycle. It is required that the time constant of the buffer resistor R s and the buffer capacitor C s must be less than one-thirtieth of the switch cycle to ensure that the buffer circuit can quickly complete the energy release process within one switch cycle.
[0021] 3) Considering from the perspective of impedance matching, the resistance value of the buffer resistor R s should not exceed the load resistance R. This is mainly to ensure good impedance matching between the buffer circuit and the load. When the resistance value of the buffer resistor R s exceeds the load resistance R, the impedance of the buffer circuit is too high, which will cause the energy to flow back with a delay. During the operation of the circuit, the transfer of energy between the buffer circuit and the load will be hindered, making the circuit unable to distribute and regulate the energy in a timely and effective manner.
[0022] The verification steps for the rationality of the selection of buffer circuit parameters are as follows:
[0023] 1) Stray inductance L m Measurement (double-pulse test method)
[0024] Maintain the IGBT junction temperature stable to avoid parameter drift of the device caused by temperature rise (such as the change of on-resistance affecting current measurement). The differential probe connection method is used for testing. The first pulse width T1 = 100 us: According to I top = U s × T1 / L m the theoretical formula, ensure that the current can linearly rise to the target value under the inductive load. The dead time T dead = 2 us: Ensure that the current freewheeling diode is fully turned on to form a clear turn-off waveform. The second pulse width T2 = 10 us: Generate a clear current falling edge for di / dt calculation. The selection position of ΔU measurement: Take the highest point of the voltage spike (usually at the midpoint of the current falling edge), avoiding the local extreme values caused by oscillation. The di / dt calculation method: Take the absolute value of the maximum section after differentiating the current waveform, reflecting the instantaneous power density of the inductive energy release. Take the average of three tests: Eliminate the dispersion of the switching devices.
[0025] 2) Calculate the buffer capacitor Cs With the buffer resistor R s Value:
[0026] Read the parasitic capacitance C from the device manual CE and the turn-off time t of the IGBT f . Calculate the buffer capacitance C s and the buffer resistor R s values. First, the capacitance of the buffer capacitor C s should be slightly greater than or equal to the ratio of the inductance L in the circuit m to the square of the load resistance R.
[0027] The buffer resistor R s value needs to satisfy the following two restrictions simultaneously: The time constant set in the specific specification does not exceed one-thirtieth of the switching period, and the resistance value of the buffer resistor must always be less than or equal to the load equivalent impedance.
[0028] 3) Actual measurement and verification:
[0029] Connect the calculated buffer capacitor and resistor to the circuit, and measure the peak voltage amplitude (denoted as U top ) during the switching process and compare it with the input voltage (U s ).
[0030] If there are large distortions and spikes in the waveform, continue to adjust: If the peak amplitude is low and the voltage rising edge becomes slow (trailing), it means the buffer capacitor is too large. If the peak amplitude is extremely high and there is a steep spike at the turn-off instant, it means the buffer capacitor is too small. If the ringing amplitude after the spike is large and there is a residual step voltage, it means the buffer resistor is too large. If the voltage rising edge becomes dull, the ringing disappears but there are obvious current spikes, it means the buffer resistor is too small.
[0031] Precautions for adjustment: First, prefer to adjust the buffer capacitor. If the effect is insufficient, then adjust the resistor. After each adjustment, re-verify the peak voltage until the requirements are met. Ensure that the power loss of the buffer resistor is within the safe range (avoid overheating due to too small a resistance value).
[0032] The present invention will be further described below with reference to the accompanying drawings.
[0033] The topology of the AC chopper voltage regulation device is as Figure 1 shown. Analyzing from the structural characteristics, this topology consists of a composite switch group formed by four independent IGBTs and freewheeling diodes connected in anti-parallel. Among them, the chopping switches are S 1 and S 2 , and the freewheeling switches are S F1 and S F2 respectively achieve energy path switching through different combinations. In addition, the circuit also includes R s and C s forming an RC buffer circuit. Lm It is the equivalent inductance after synthesizing the stray inductance and inductive load in the circuit. The output of the device is the resistive load R, and the input is the AC voltage source U s .
Claims
1. A method for optimizing parameters of a buffer circuit of an AC chopper voltage-regulated power supply, characterized in that: Snubber capacitor C s With the snubber resistor R s The selection must meet the following three principles: 1) From the perspective of energy storage, the buffer capacitor C s The energy released by the inductor needs to be stored, and its minimum value is determined by the stray inductance L in the circuit. m and load resistance R; buffer capacitor C s The capacity must be able to store all the energy released by the inductor at the moment the switch is turned off; specifically, the snubber capacitor C s The capacitance should be greater than or equal to the ratio of the inductance to the square of the load resistance, and a certain margin (such as 10%-20%) should be allowed to adapt to the actual device error; 2) From the perspective of time constant, the buffer resistor R s With buffer capacitor C s The RC circuit has a specific time constant, which is the product of the resistance and capacitance. During the operation of the circuit, the switch will be turned on and off according to a certain cycle. The buffer resistor R s With buffer capacitor C s The time constant must be less than one-thirtieth of the switching cycle to ensure that the snubber circuit can quickly complete the energy release process within one switching cycle; 3) From the perspective of impedance matching, the buffer resistor R s The resistance value cannot exceed the load resistance R, which is mainly to ensure good impedance matching between the buffer circuit and the load; when the buffer resistor R s When the resistance value exceeds the load resistance R, the impedance of the buffer circuit is too high, which will cause energy return delay; during circuit operation, the transfer of energy between the buffer circuit and the load will be hindered, making the circuit unable to distribute and regulate energy in a timely and effective manner.
2. A method for optimizing buffer circuit parameters of an AC chopper voltage regulator according to claim 1, characterized in that: The steps to verify the rationality of buffer circuit parameter selection are as follows: 1) Stray inductance L m Measurement Maintain the IGBT junction temperature stable to avoid device parameter drift caused by temperature rise (such as on-resistance change affecting current measurement); use differential probe connection method for testing, the first pulse width T1 = 100us: according to I top =U s ×T1 / L m Theoretical formula to ensure that the current can rise linearly to the target value under inductive load; dead time T dead =2us: ensure that the current freewheeling diode is fully turned on to form a clear turn-off waveform; the second pulse width T2 = 10us: generate a clear current falling edge for di / dt calculation; ΔU measurement position selection: take the highest point of the voltage spike (usually at the midpoint of the current falling edge) to avoid the local extreme value di / dt calculation method caused by oscillation, take the absolute maximum value segment after derivative of the current waveform, and reflect the instantaneous power density of the inductor energy storage release. Take the average of three tests to eliminate the dispersion of switching devices; 2) Calculate the buffer capacitance C s With the snubber resistor R s Value Read the device manual to get the parasitic capacitance C CE and IGBT turn-off time t f ; The buffer capacitance C is calculated according to the following formula s and snubber resistor R s The value of buffer capacitor C s The capacity should be slightly greater than or equal to the inductance L in the circuit. m Ratio to the square of the load resistance R; buffer resistance R s The value must meet the following two restrictions at the same time. The specific specification sets the time constant to not exceed one thirtieth of the switching period, and the resistance of the snubber resistor must always be less than or equal to the equivalent impedance of the load; 3) Actual measurement verification Connect the calculated buffer capacitor and resistor to the circuit and test the voltage spike amplitude (denoted as U top ) and the input voltage (U s ) comparison; if the waveform shows large distortion and spikes, continue to adjust; if the peak amplitude is low and the voltage rising edge becomes slow (tailing), it means that the buffer capacitor is too large; if the peak amplitude is too high and there is a steep spike at the turn-off moment, it means that the buffer capacitor is too small; if the ringing amplitude is large after the spike and there is a residual step voltage, it means that the buffer resistance is too large; if the voltage rising edge is passivated, the ringing disappears but the current burrs are obvious, it means that the buffer resistance is too small; Adjustment precautions: Give priority to adjusting the buffer capacitor, and adjust the resistance if the effect is not enough; After each adjustment, the spike voltage must be re-verified until the requirements are met; Ensure that the power loss of the buffer resistor is within a safe range to avoid overheating due to too small resistance.