Push-pull primary side controller and output voltage control method

Abstract

The invention provides a push-pull primary side controller and an output voltage control method. The push-pull primary side controller comprises a constant pin, an input pin, an output pin, a comparison module and a driving module, the constant pin is used for inputting threshold voltage, and the input pin is used for connecting input voltage; the comparison module is used for comparing a difference value between a conduction voltage and an input voltage of a high-voltage MOS tube in the driving module and then comparing the difference value with a threshold voltage, when the difference value meets a preset condition, the voltage of the output pin is kept constant, and the output end of the comparison module controls the conduction or cut-off of the high-voltage MOS tube; on or off of the high-voltage MOS tube is controlled through an output result of the comparison module, the output voltage is not affected by the input voltage any more, stress and potential fault points caused by voltage change are reduced by maintaining the constant output voltage, and therefore the reliability of the whole system is improved, and the service life of the whole system is prolonged. And the stable output voltage is beneficial to reducing the distortion of the current waveform, and the occurrence probability of electromagnetic interference is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply circuits, and particularly to a push-pull primary controller and an output voltage control method. Background Art

[0002] A push-pull primary controller is a common power management device widely used in switching power supplies. The push-pull topology is a common switching power supply topology. By alternately turning on two power switches, the current in the transformer has two directions within a cycle, thereby improving efficiency and reducing electromagnetic interference. Open-loop and closed-loop control are its two main operating modes. Open-loop control is a control method without a feedback mechanism. In this mode, the controller directly controls the output according to preset parameters without considering the actual output result.

[0003] For a constant-voltage input primary forward push-pull controller with an open-loop design, the output voltage varies with the input voltage, which may cause the output voltage to be unstable and easily damage the subsequent circuit. For electronic devices relying on a stable voltage supply, the unstable output voltage may cause their working performance to deteriorate or even be unable to work properly. Summary of the Invention

[0004] The present invention provides a push-pull primary controller and an output voltage control method to solve the defect that the output voltage of the push-pull primary controller in the prior art continuously changes with the input voltage, which easily damages the subsequent circuit.

[0005] In a first aspect, the present invention provides a push-pull primary controller, including: a constant pin, an input pin, an output pin, a comparison module, and a driving module;

[0006] The constant pin, the input pin, and the output pin are all connected to the input end of the comparison module. The output end of the comparison module is connected to the driving module, and the driving module is also connected to the output pin;

[0007] The constant pin is used to input a threshold voltage, and the input pin is used to connect the input voltage. The comparison module is used to compare the difference between the conduction voltage of the high-voltage MOS transistor in the driving module and the input voltage, and then compare the size of the difference with the threshold voltage. When the size meets a preset condition, the voltage of the output pin remains constant, and the output end of the comparison module controls the conduction or cut-off of the high-voltage MOS transistor.

[0008] According to a push-pull primary controller provided by the present invention, the comparison module includes: a sampling unit, a subtraction unit, and a comparison unit;

[0009] The input end of the sampling unit is connected to the high-voltage MOS transistor in the driving module. The output end of the sampling unit is connected to the input end of the subtraction unit. The input end of the subtraction unit is also connected to the input pin. The output end of the subtraction unit is connected to the input end of the comparison unit. The input end of the comparison unit is also connected to the constant pin;

[0010] The sampling unit is used to collect the voltage of the drain of the high-voltage MOS transistor relative to GND when it is turned on. The subtraction unit is used to subtract the sampling voltage from the input voltage to obtain a difference voltage. The comparison unit is used to compare the difference voltage with the threshold voltage. When the difference voltage and the threshold voltage meet the preset conditions, the voltage of the output pin remains constant, and the output end of the comparison module controls the conduction or cut-off of the high-voltage MOS transistor.

[0011] According to a push-pull primary controller provided by the present invention, the preset conditions are:

[0012] VIN>1 / k*VSET+VDSON;

[0013] Wherein, VIN represents the input voltage, k represents the sampling signal voltage division coefficient of sampling VIN and when the high-voltage MOS transistor is turned on, VSET represents the threshold voltage, and VDSON represents the potential of the drain of the high-voltage MOS transistor relative to GND when it is turned on.

[0014] According to a push-pull primary controller provided by the present invention, the output pin includes a first output pin and a second output pin. The sampling unit includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first voltage regulator tube, a second voltage regulator tube, a first transmission gate, a second transmission gate, a third transmission gate, a first capacitor and a voltage follower;

[0015] The first end of the first resistor is connected to the first output pin, and the second end is connected to the first end of the second resistor. The second end of the second resistor is grounded. The positive electrode of the first voltage regulator tube is grounded, and the negative electrode is connected to the second end of the first resistor. The first end of the third resistor is connected to the second output pin, and the second end is connected to the first end of the fourth resistor. The second end of the fourth resistor is grounded. The positive electrode of the second voltage regulator tube is grounded, and the negative electrode is connected to the second end of the third resistor;

[0016] The input end of the first transmission gate is connected to the second end of the first resistor, and the output end is connected to the input end of the third transmission gate. The input end of the second transmission gate is connected to the second end of the third resistor, and the output end is connected to the input end of the third transmission gate. The output end of the third transmission gate is connected to the input end of the voltage follower, and the output end of the voltage follower is connected to the subtraction unit;

[0017] The output terminal of the first transmission gate, the output terminal of the second transmission gate, and the input terminal of the third transmission gate are all connected to the first terminal of the first capacitor, and the second terminal of the first capacitor is grounded.

[0018] According to a push-pull primary controller provided by the present invention, the control signals of the first transmission gate, the second transmission gate, and the third transmission gate are controlled by a gate circuit;

[0019] The first transmission gate is used to transmit the sampling signal when the high-voltage MOS transistor corresponding to the first output pin is turned on, the second transmission gate is used to transmit the sampling signal when the high-voltage MOS transistor corresponding to the second output pin is turned on, and the third transmission gate is used to transmit the signal when the high-voltage MOS transistor corresponding to the first output pin or the second output pin is turned on.

[0020] According to a push-pull primary controller provided by the present invention, the gate circuit includes: a NAND gate and a NOT gate;

[0021] The input terminals of the NAND gate are the control signals of the first transmission gate and the second transmission gate, the output terminal of the NAND gate is connected to the input terminal of the NOT gate, and the output terminal of the NOT gate is the control signal of the third transmission gate.

[0022] According to a push-pull primary controller provided by the present invention, the subtraction unit includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a third zener diode, and a subtractor;

[0023] The first terminal of the fifth resistor is connected to the sampling unit, the second terminal is respectively connected to the first terminal of the sixth resistor and the input terminal of the subtractor, and the second terminal of the sixth resistor is connected to the output terminal of the subtractor;

[0024] The first terminal of the seventh resistor is connected to the input pin, the second terminal of the seventh resistor is grounded through the eighth resistor, and the second terminal of the seventh resistor is also connected to the input terminal of the subtractor;

[0025] The positive electrode of the third zener diode is grounded, the negative electrode is connected to the input terminal of the subtractor, and the output terminal of the subtractor is connected to the comparison unit.

[0026] According to a push-pull primary controller provided by the present invention, the comparison unit includes a comparator;

[0027] The input terminal of the comparator is connected to the output terminal of the subtraction unit, the input terminal of the comparator is also connected to the constant pin, and the output terminal of the comparator is connected to the output pin.

[0028] According to a push-pull primary controller provided by the present invention, the output pin includes a third output pin;

[0029] The third output pin is used to externally connect a capacitor to reduce the oscillation of the gate signal of the high-voltage MOS transistor in the driving module.

[0030] According to a push-pull primary controller provided by the present invention, the output end of the comparison module controls the conduction or cut-off of the high-voltage MOS transistor by adjusting the voltage difference between the gate and the source of the high-voltage MOS transistor.

[0031] The present invention also provides an output voltage control method, which is applied to the push-pull primary controller described in any one of the above, and the method includes:

[0032] Comparing the difference between the conduction voltage of the high-voltage MOS transistor in the driving module and the input voltage from the input pin;

[0033] Comparing the magnitude of the difference with the threshold voltage from the constant pin;

[0034] When the magnitude satisfies a preset condition, the voltage of the output pin remains constant, and the conduction or cut-off of the high-voltage MOS transistor is controlled;

[0035] The preset condition is:

[0036] VIN > 1 / k * VSET + VDSON;

[0037] Wherein, VIN represents the input voltage, k represents the sampling signal voltage division coefficient when sampling VIN and the high-voltage MOS transistor conducts, VSET represents the threshold voltage, and VDSON represents the potential of the drain of the high-voltage MOS transistor relative to GND when it conducts.

[0038] A push-pull primary controller and an output voltage control method provided by the present invention include: a constant pin, an input pin, an output pin, a comparison module, and a driving module; the constant pin, the input pin, and the output pin are all connected to the input end of the comparison module, the output end of the comparison module is connected to the driving module, and the driving module is also connected to the output pin; the constant pin is used to input the threshold voltage, and the input pin is used to connect the input voltage; the comparison module is used to compare the difference between the conduction voltage of the high-voltage MOS transistor in the driving module and the input voltage, and then compare the magnitude of the difference with the threshold voltage. When the magnitude satisfies the preset condition, the voltage of the output pin remains constant, and the output end of the comparison module controls the conduction or cut-off of the high-voltage MOS transistor. By controlling the conduction or cut-off of the high-voltage MOS transistor through the output result of the comparison module, the output voltage is no longer affected by the input voltage. By maintaining a constant output voltage, the stress and potential failure points caused by voltage changes are reduced, thereby improving the reliability and service life of the entire system. Stabilizing the output voltage helps to reduce the distortion of the current waveform and reduces the occurrence probability of electromagnetic interference. Description of the Drawings

[0039] To more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the accompanying drawings required in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on these drawings.

[0040] Figure 1 is a schematic structural diagram of the push - pull primary - side controller provided in this embodiment;

[0041] Figure 2 is a schematic application diagram of the push - pull primary - side controller provided in this embodiment;

[0042] Figure 3 is Figure 1 the circuit schematic diagram of the comparison module in

[0043] Figure 4 is a schematic diagram of the working waveform of the comparison module provided in this embodiment;

[0044] Figure 5 is the Figure 2 schematic diagram of the working waveform of the application of the push - pull primary - side controller in Detailed implementation manners

[0045] To make the purpose, technical solutions, and advantages of the present invention clearer, the following will clearly and completely describe the technical solutions in the present invention in conjunction with the accompanying drawings in the present invention. Obviously, the described embodiments are some embodiments of the present invention, rather than all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0046] Figure 1 is a schematic structural diagram of the push - pull primary - side controller provided in this embodiment.

[0047] Such as Figure 1As shown, the push-pull primary controller provided by the embodiment of the present invention includes: a constant pin SET, an input pin VIN, an output pin, a comparison module COMP, and a drive module; the constant pin SET, the input pin VIN, and the output pin are all connected to the input end of the comparison module COMP, the output end of the comparison module COMP is connected to the drive module, and the drive module is also connected to the output pin; the constant pin SET is used to input a threshold voltage, and the input pin VIN is used to connect an input voltage; the comparison module COMP is used to compare the difference between the conduction voltage of the high-voltage MOS transistor in the drive module and the input voltage, and then compare the size of the difference with the threshold voltage. When the size meets the preset condition, the voltage of the output pin remains constant, and the output end of the comparison module controls the conduction or cut-off of the high-voltage MOS transistor. It also includes a ground pin GND.

[0048] In a specific implementation process, the SET pin is a constant pin, an external resistor is connected, and the reference current inside the chip generates a constant voltage VSET on the external resistor. The output pins include a first output pin VD1, a second output pin VD2, and a third output pin GATE. The first output pin VD1 and the second output pin VD2 are the drains of two built-in high-voltage MOS transistors; GATE is the gate of the two built-in high-voltage MOS transistors (M1 and M2) of the chip, and an external capacitor is connected to reduce the oscillation of the gate signal.

[0049] The drive module includes BGAP, LDO, OSC, Driver, M1, M2, M3, and M4; BGAP is a reference module, mainly used to generate a reference voltage, a reference current, and an enable signal, namely Vref, Iref, and ENP, etc.; LDO is a low-dropout regulator, mainly used to generate the DC power supply required by each module inside the chip, namely VDD; OSC is an oscillator, mainly used to generate the clock signal required by the drive module; Driver is a drive module, mainly used to control the conduction and turn-off of the switching transistors M3 and M4, and M3 and M4 conduct alternately, serving as two switches for conduction or turn-off; M1 and M2 are high-voltage MOS transistors inside the chip, equivalent to variable resistors during operation, and can be used to adjust the size of VDSON. When the input voltage VIN increases, the difference between VIN and VDONS is kept relatively unchanged, so that the output voltage VOUT tends to be stable.

[0050] The comparison module includes: a sampling unit 1, a subtraction unit 2, and a comparison unit 3; the input end of the sampling unit 1 is connected to the high-voltage MOS transistor in the driving module, the output end of the sampling unit 1 is connected to the input end of the subtraction unit 2, the input end of the subtraction unit 2 is also connected to the input pin, the output end of the subtraction unit 2 is connected to the input end of the comparison unit 3, and the input end of the comparison unit 3 is also connected to the constant pin; the sampling unit 1 is used to collect the voltage of the drain relative to GND when the high-voltage MOS transistor is conducting, the subtraction unit 2 is used to subtract the sampling voltage from the input voltage to obtain a difference voltage, the comparison unit 3 is used to compare the difference voltage with the threshold voltage, and when the difference voltage and the threshold voltage meet the preset conditions, the voltage of the output pin remains constant, and the output end of the comparison module controls the conduction or cut-off of the high-voltage MOS transistor.

[0051] Figure 2 It is a schematic diagram of the application of the push-pull primary controller provided in this embodiment.

[0052] As Figure 2 shown, the output of the entire circuit is (1):

[0053]

[0054] Among them, the constant threshold voltage of the SET pin is VSET, the value of VOUT depends on the change of VIN - VDSON, VIN is the input voltage of the VIN pin, VDSON is the voltage of the drain relative to GND when the high-voltage MOS transistor is conducting, NS and NP are the number of turns of the primary and secondary sides of the transformer respectively, VF is the forward conduction voltage of diodes D0 and D1, the voltage magnitudes of VIN and VDSON are compared by a comparator, and when the preset condition: VIN > 1 / k * VSET + VDSON is satisfied, VOUT does not increase with the increase of VIN and VOUT tends to be stable, where k is the sampling signal voltage division coefficient when sampling VIN and the conduction of VD1 and VD2.

[0055] Figure 3 is Figure 1 the circuit schematic diagram of the comparison module in

[0056] As Figure 3 shown, D0, D1, and D2 are voltage stabilizing diodes. AMP0 is a voltage follower, which transmits the sampling signal and plays an isolation role. AMP1 is a subtractor, which is used to output k(VIN - VDSON). COMP0 is a comparator, which compares the constant threshold SET with k(VIN - VDSON), and the output result adjusts the magnitude of Vgs, where Vgs represents the voltage difference between the gate and the source of the high-voltage MOS transistor.

[0057] The input terminals of the sampling unit 1 are respectively connected to the VD1 pin and the VD2 pin, and the output terminal is connected to the input terminal of the subtraction unit 2. The sampling unit 1 is used to sample the voltage when the high-voltage MOS transistor M1 or M2 is conducting and store it. The output terminal of the subtraction unit 2 is connected to the first input terminal of the comparison unit 3. The subtraction unit 2 is used to subtract the divided voltage VINCS of the VIN pin from the sampled voltage VDCS of the sampling unit 1 to obtain k(VIN - VDSON). The second input terminal of the comparison unit 3 is connected to the SET pin. The comparison unit 3 is used to compare k(VIN - VDSON) obtained by the subtraction unit 2 with the constant threshold voltage input from the SET pin. When the comparison result meets the preset condition: VIN > 1 / k * VSET + VDSON, VOUT does not increase with the increase of VIN and VOUT tends to be stable. The output terminal of the comparison unit 3 is connected to the high-voltage MOS transistor inside the chip and is used to control its conduction and cut-off.

[0058] Among them, as Figure 3 shown, the specific circuit connection relationship of the sampling unit 1 is as follows: The output pins include the first output pin VD1 and the second output pin VD2. The sampling unit 1 includes: the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the first voltage regulator diode D1, the second voltage regulator diode D2, the first transmission gate TG1, the second transmission gate TG2, the third transmission gate TG12, the first capacitor C1, and the voltage follower AMP0; The first end of the first resistor R1 is connected to the first output pin, and the second end is connected to the first end of the second resistor R2. The second end of the second resistor R2 is grounded; The positive electrode of the first voltage regulator diode D1 is grounded, and the negative electrode is connected to the second end of the first resistor R1; The first end of the third resistor R3 is connected to the second output pin, and the second end is connected to the first end of the fourth resistor R4. The second end of the fourth resistor R4 is grounded; The positive electrode of the second voltage regulator diode D2 is grounded, and the negative electrode is connected to the second end of the third resistor R3; The input terminal of the first transmission gate TG1 is connected to the second end of the first resistor R1, and the output terminal is connected to the input terminal of the third transmission gate TG12. The input terminal of the second transmission gate TG2 is connected to the second end of the third resistor R3, and the output terminal is connected to the input terminal of the third transmission gate TG12. The output terminal of the third transmission gate TG12 is connected to the input terminal of the voltage follower AMP0. The output terminal of the voltage follower AMP0 is connected to the subtraction unit 2; The output terminal of the first transmission gate TG1, the output terminal of the second transmission gate TG2, and the input terminal of the third transmission gate TG12 are all connected to the first end of the first capacitor C1. The second end of the first capacitor C1 is grounded.

[0059] The control signals of the first transmission gate TG1, the second transmission gate TG2, and the third transmission gate TG12 are controlled by a gate circuit; the first transmission gate TG1 is used to transmit the sampling signal VDCS when the high-voltage MOS transistor corresponding to the first output pin is turned on, the second transmission gate TG2 is used to transmit the sampling signal VDCS when the high-voltage MOS transistor corresponding to the second output pin is turned on, and the third transmission gate TG12 is used to transmit the signal when the high-voltage MOS transistor corresponding to the first output pin or the second output pin is turned on. The gate circuit includes: a NAND gate and a NOT gate; the input terminals of the NAND gate are the control signals gdk1 and gdk2 of the first transmission gate TG1 and the second transmission gate TG2, the output terminal of the NAND gate is connected to the input terminal of the NOT gate, and the output terminal of the NOT gate is the control signal gdk12A of the third transmission gate TG12. gdk1 is the control signal of the transmission gate TG1, gdk2 is the control signal of the transmission gate TG2, gdk12A is the control signal of the transmission gate TG12, gdk1 controls TG1 to open and transmit the signal VDCS sampled when M1 is turned on, gdk2 controls TG2 to open and transmit the signal VDCS sampled when M2 is turned on, stores the signals when the two high-voltage MOS transistors are turned on on the first capacitor C1, and gdk12A controls TG12 to open and transmit the signal when M1 is turned on or M2 is turned on.

[0060] As Figure 3 shown, the subtraction unit 2 includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a third zener diode D3, and a subtractor AMP1; the first end of the fifth resistor R5 is connected to the sampling unit 1, the second end is respectively connected to the first end of the sixth resistor R6 and the input terminal of the subtractor AMP1, and the second end of the sixth resistor R6 is connected to the output terminal of the subtractor AMP1; the first end of the seventh resistor R7 is connected to the input pin, the second end of the seventh resistor R7 is grounded through the eighth resistor R8, and the second end of the seventh resistor R7 is also connected to the input terminal of the subtractor AMP1; the positive electrode of the third zener diode D3 is grounded, the negative electrode is connected to the input terminal of the subtractor AMP1, and the output terminal of the subtractor AMP1 is connected to the comparison unit 3.

[0061] As Figure 3 shown, the comparison unit 3 includes a comparator CMP0; the input terminal of the comparator CMP0 is connected to the output terminal of the subtraction unit 2, the input terminal of the comparator CMP0 is also connected to the constant pin, and the output terminal of the comparator CMP0 is connected to the output pin.

[0062] As Figure 3As shown in the figure, the working principle of the comparison module is as follows: The voltage divider resistors R1 and R2 sample the voltage when M1 is conducting, and store it on the first capacitor C1 through the transmission gate TG1. When M1 is not conducting, the voltage divider resistors R3 and R4 sample the voltage when M2 is conducting, and store it on the first capacitor C1 through the transmission gate TG2. The voltage stored on C0 is transmitted through the transmission gate TG12. The VDSON values of M1 and M2 when conducting are equal. The sampled voltage VDCS and the divided voltage VINCS of VIN are subtracted by the subtractor AMP1 to obtain k(VIN - VDSON). k(VIN - VDSON) is then compared with the constant threshold SET by the comparator CMP0. The change in the output result GATE of the comparator CMP0 will affect the change in the Vgs of the high-voltage MOS transistors M1 and M2. The change in Vgs will cause a change in VDSON, which will further cause a change in VIN - VDSON. And the value of VOUT depends on Therefore, when VIN increases by a certain value, VDSON will also increase, VIN - VDSON remains relatively unchanged, and the output VOUT remains unchanged. The solution of this embodiment reduces the stress and potential failure points caused by voltage changes by maintaining a constant output voltage, thereby improving the reliability and service life of the entire system. The stable output voltage helps to reduce the distortion of the current waveform and reduces the occurrence probability of electromagnetic interference.

[0063] Figure 4 is the schematic diagram of the working waveform of the comparison module provided in this embodiment. In the figure, VINCS is the signal sampling the VIN pin, VDCS is the VDSON signal of the built-in high-voltage MOS when M1 or M2 is conducting, VDCS = k * VDSON, INVD is the value obtained after the signals VDCS and VINCS pass through the subtractor AMP1; SET is a constant value. The signal SET and INVD pass through the comparator CMP0, and the output GATE further changes the Vgs of the built-in MOS.

[0064] Figure 5 is provided in this embodiment Figure 2 is the schematic diagram of the working waveform of the push-pull primary controller application in this embodiment. When the M1 channel is conducting, VD1 is at a low level. When the M2 channel is conducting, VD2 is at a low level. The sampled conduction signal VDCS is the signal when VD1 and VD2 are at a low level. INVD is k(VIN - VDSON). The red dotted line represents the INVD signal. When VIN increases to a certain value, INVD is equal to the SET value, and the output VOUT is stable. It can be seen from the output voltage waveform that when VIN increases to VIN3, the output VOUT voltage value no longer increases with the increase of VIN. At this time, the output VOUT voltage remains stable, avoiding the problem of damaging the subsequent circuit due to unstable output voltage and eliminating the current waveform distortion caused by unstable voltage.

[0065] Based on the same general inventive concept, a method for controlling the output voltage in this embodiment is applied to the push-pull primary controller in any of the above embodiments. The method includes:

[0066] Comparing the difference between the conduction voltage of the high-voltage MOS transistor in the driving module and the input voltage from the input pin;

[0067] Comparing the magnitude of the difference with the threshold voltage from the constant pin;

[0068] When the magnitude meets the preset condition, the voltage of the output pin remains constant, and the conduction or cut-off of the high-voltage MOS transistor is controlled;

[0069] The preset condition is:

[0070] VIN > 1 / k * VSET + VDSON;

[0071] Wherein, VIN represents the input voltage, k represents the sampling signal voltage division coefficient when sampling VIN and the high-voltage MOS transistor conducts, VSET represents the threshold voltage, and VDSON represents the potential of the drain of the high-voltage MOS transistor relative to GND when it conducts.

[0072] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art can understand and implement it without creative labor.

[0073] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus the necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solution, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0074] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A push-pull primary side controller, characterized in that: include: Constant pins, input pins, output pins, comparison modules and driver modules; The constant pin, the input pin and the output pin are all connected to the input end of the comparison module, the output end of the comparison module is connected to the driving module, and the driving module is also connected to the output pin; The constant pin is used to input a threshold voltage, and the input pin is used to connect an input voltage; the comparison module is used to compare the difference between the on-voltage of the high-voltage MOS tube in the driving module and the input voltage, and then compare the difference with the magnitude of the threshold voltage. When the magnitude meets a preset condition, the voltage of the output pin remains constant, and the output end of the comparison module controls the on or off of the high-voltage MOS tube.

2. The push-pull primary side controller according to claim 1, characterized in that: The comparison module includes: a sampling unit, a subtraction unit and a comparison unit; The input end of the sampling unit is connected to the high-voltage MOS tube in the driving module, the output end of the sampling unit is connected to the input end of the subtraction unit, the input end of the subtraction unit is also connected to the input pin, the output end of the subtraction unit is connected to the input end of the comparison unit, and the input end of the comparison unit is also connected to the constant pin; The sampling unit is used to collect the voltage of the drain relative to GND when the high-voltage MOS tube is turned on, the subtraction unit is used to obtain a difference voltage by subtracting the sampling voltage from the input voltage, and the comparison unit is used to compare the difference voltage with the threshold voltage. When the difference voltage and the threshold voltage meet a preset condition, the voltage of the output pin remains constant, and the output end of the comparison module controls the conduction or cutoff of the high-voltage MOS tube.

3. The push-pull primary side controller according to claim 2, characterized in that: The preset conditions are: VIN>1 / k*VSET+VDSON; Among them, VIN represents the input voltage, k represents the sampling signal voltage division coefficient when sampling VIN and the high-voltage MOS tube is turned on, VSET represents the threshold voltage, and VDSON represents the potential of the drain of the high-voltage MOS tube relative to GND when the high-voltage MOS tube is turned on.

4. The push-pull primary side controller according to claim 2, characterized in that: The output pins include a first output pin and a second output pin, and the sampling unit includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first voltage regulator tube, a second voltage regulator tube, a first transmission gate, a second transmission gate, a third transmission gate, a first capacitor and a voltage follower; The first end of the first resistor is connected to the first output pin, the second end is connected to the first end of the second resistor, and the second end of the second resistor is grounded; the positive electrode of the first voltage regulator is grounded, and the negative electrode is connected to the second end of the first resistor; the first end of the third resistor is connected to the second output pin, and the second end is connected to the first end of the fourth resistor, and the second end of the fourth resistor is grounded; the positive electrode of the second voltage regulator is grounded, and the negative electrode is connected to the second end of the third resistor; The input end of the first transmission gate is connected to the second end of the first resistor, and the output end is connected to the input end of the third transmission gate; the input end of the second transmission gate is connected to the second end of the third resistor, and the output end is connected to the input end of the third transmission gate; the output end of the third transmission gate is connected to the input end of the voltage follower, and the output end of the voltage follower is connected to the subtraction unit; The output end of the first transmission gate, the output end of the second transmission gate and the input end of the third transmission gate are all connected to the first end of the first capacitor, and the second end of the first capacitor is grounded.

5. The push-pull primary side controller according to claim 4, characterized in that: Control signals of the first transmission gate, the second transmission gate and the third transmission gate are controlled by a gate circuit; The first transmission gate is used to transmit a sampling signal when the high-voltage MOS tube corresponding to the first output pin is turned on, the second transmission gate is used to transmit a sampling signal when the high-voltage MOS tube corresponding to the second output pin is turned on, and the third transmission gate is used to transmit a signal when the high-voltage MOS tube corresponding to the first output pin or the second output pin is turned on.

6. The push-pull primary side controller according to claim 5, characterized in that: The gate circuit includes: a NAND gate and a NOT gate; The input end of the NAND gate is the control signal of the first transmission gate and the second transmission gate, the output end of the NAND gate is connected to the input end of the NOT gate, and the output end of the NOT gate is the control signal of the third transmission gate.

7. The push-pull primary side controller according to claim 2, characterized in that: The subtraction unit includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a third voltage regulator tube and a subtractor; The first end of the fifth resistor is connected to the sampling unit, the second end is connected to the first end of the sixth resistor and the input end of the subtractor respectively, and the second end of the sixth resistor is connected to the output end of the subtractor; A first end of the seventh resistor is connected to the input pin, a second end of the seventh resistor is grounded through the eighth resistor, and a second end of the seventh resistor is also connected to the input end of the subtractor; The positive electrode of the third voltage regulator tube is grounded, the negative electrode is connected to the input end of the subtractor, and the output end of the subtractor is connected to the comparison unit.

8. The push-pull primary side controller according to claim 2, characterized in that: The comparison unit includes a comparator; The input end of the comparator is connected to the output end of the subtraction unit, the input end of the comparator is also connected to the constant pin, and the output end of the comparator is connected to the output pin.

9. The push-pull primary side controller according to any one of claims 1 to 8, characterized in that: The output pins include a third output pin; The third output pin is used to connect an external capacitor to reduce the gate signal oscillation of the high-voltage MOS tube in the driving module; The output end of the comparison module controls the conduction or cutoff of the high-voltage MOS tube by adjusting the voltage difference between the gate and the source of the high-voltage MOS tube.

10. An output voltage control method, applied to the push-pull primary side controller according to any one of claims 1 to 9, the method comprising: Compare the difference between the on-state voltage of the high-voltage MOS tube in the driving module and the input voltage from the input pin; comparing the difference with a threshold voltage from a constant pin; When the magnitude satisfies a preset condition, the voltage of the output pin is kept constant, and the high-voltage MOS tube is controlled to be turned on or off; The preset conditions are: VIN>1 / k*VSET+VDSON; Among them, VIN represents the input voltage, k represents the sampling signal voltage division coefficient when sampling VIN and the high-voltage MOS tube is turned on, VSET represents the threshold voltage, and VDSON represents the potential of the drain of the high-voltage MOS tube relative to GND when the high-voltage MOS tube is turned on.

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