Current-sharing control method, device and storage medium for modular parallel inverter system

Abstract

The present invention relates to a current sharing control method, device and storage medium for an inverter modular parallel system. The method includes: determining one inverter as the master and the others as slaves, wherein information interaction between the master and the slaves is carried out through a current sharing bus and a synchronization bus; each inverter collects grid-side voltage and current and inductor current, and performs PQ droop control to obtain its own voltage droop amount, amplitude reference value and phase reference value; the master determines an amplitude calibration amount according to its own voltage droop amount and amplitude compensation amount, and sends it to each slave via the current sharing bus, and generates a square wave signal according to its own phase reference value and sends it to each slave via the synchronization bus; after receiving the amplitude calibration amount, the slave obtains its own corrected voltage reference value, and determines a phase signal according to the square wave signal to obtain its own corrected phase reference value. Compared with the prior art, the present invention has the advantages of reducing the communication frequency requirement and improving the anti-interference ability, etc.

Description

Technical Field

[0001] The present invention relates to the field of current sharing control for parallel systems, and in particular to a current sharing control method, device and storage medium for an inverter modular parallel system. Background Art

[0002] In the application of high-power inverters, a single inverter usually cannot meet the power requirements of the system. Therefore, increasing the number of inverters and operating them in parallel has become an effective way to improve the system power and reliability. However, the inverter parallel system faces a series of challenges in practical applications. For example, there are deviations in the adoption accuracy of each inverter, resulting in differences in the sampled voltages and thus circulating currents between modules; differences in output lines or device parameters are also the main factors for uneven current sharing in the parallel system.

[0003] To solve these problems, current patents mostly consider control without interconnection lines and with interconnection lines based on droop control, such as centralized control, master-slave control, and distributed control. Chinese invention patent CN117394354A proposes to classify the difference between the bus voltage and the reference voltage, and then adopt power regulation or PWM pulse width modulation for current sharing control respectively. This method is difficult to ensure the dynamic performance of parallel modules. Chinese invention patent CN117748588A proposes that in a three-phase three-wire system, the host transmits the output of the voltage loop to the slave as the current reference quantity, and the transmitted quantity is an alternating quantity, which requires a high frequency and occupies a large amount of resources. This method pre-assigns the host and the slave. Once data is lost during transmission or the host fails, the system will not be able to operate stably. Chinese invention patent CN106849186A proposes a master-slave control method for an energy storage inverter based on a virtual synchronous generator for a three-phase three-wire system. This method also fixes the master and the slave, and the host sends current commands to the slave for control. Chinese invention patent CN112165243A discloses a master-slave automatic current sharing method, in which the host sends the calculated droop coefficient to the slave for control. The calculation of the droop coefficient is related to the number of operating inverters. Once one or more inverters are connected or disconnected, it will affect the current sharing control effect. At the same time, this method depends on the host, and the system cannot operate once a failure occurs. Chinese invention patent CN112165244A mentions that the host performs voltage control and transmits the current dq-axis reference value to the slave through the CAN bus. The transmitted DC signal has a small amount of computation, but it is only applicable to single-phase inverters and cannot guarantee the stability of the system when the host fails. Chinese invention patent CN104914908A discloses an autonomous current sharing digital control method based on CAN bus communication. This method avoids system collapse caused by host failure, but the proposed master-slave competition mechanism occupies a large amount of computing resources.

[0004] In the prior art, most designs are for three-phase three-wire systems, and the reference quantity of the current loop is transmitted using master-slave control. On the one hand, if the AC reference quantity of the transmitted current is used, a relatively high communication frequency is required to ensure accuracy, and once data is lost, it will seriously affect the stability of the system; on the other hand, traditional master-slave control depends on the existence of the host. If the host fails, the system will collapse. Summary of the Invention

[0005] The purpose of the present invention is to provide a current sharing control method, device and storage medium for an inverter modular parallel system to improve stability under low communication quality conditions.

[0006] The purpose of the present invention can be achieved through the following technical solutions:

[0007] A current sharing control method for an inverter modular parallel system includes:

[0008] When the system starts up, one inverter is determined as the host, and the remaining inverters are used as slaves. Among them, both the host and the slaves are connected to the current sharing bus and the synchronization bus;

[0009] Each inverter collects the grid-side voltage and current and the inductor current, and performs PQ droop control to obtain its own voltage droop amount, amplitude reference value and phase reference value;

[0010] The host determines the amplitude calibration amount according to its own voltage droop amount, and sends it to each slave via the current sharing bus, and generates a square wave signal according to its own phase reference value, and sends it to each slave via the synchronization bus;

[0011] After receiving the amplitude calibration amount, the slave adds it to its own voltage reference value and subtracts its own voltage droop amount to obtain its own corrected voltage reference value, and determines the phase signal according to the square wave signal, and adds the phase signal to its own phase reference value to obtain its own corrected phase reference value;

[0012] The slave performs voltage-current double-loop control based on its own corrected voltage reference value and phase reference value, and the host performs voltage-current double-loop control based on its own amplitude reference value and phase reference value.

[0013] In the process of determining one inverter as the host: the host is determined based on the module number of the inverter.

[0014] The process of determining the phase signal according to the square wave signal includes:

[0015] Detect the rising edge of the square wave signal;

[0016] Calculate the difference between the phase of the rising edge and the local phase as the phase signal.

[0017] The host determines the amplitude calibration amount according to its own voltage droop amount, specifically:

[0018] The host sums its own voltage droop amount and the voltage amplitude compensation amount to obtain the amplitude calibration amount, where the voltage amplitude compensation amount is proportional to the product of the virtual impedance and the effective value of the grid-side current collected;

[0019] A virtual impedance is introduced into the control loop of the voltage-current double-loop control.

[0020] The method further includes:

[0021] When a new inverter is connected, the information of the current-sharing bus and the synchronization bus is obtained. If there is information sent by the host, the new inverter becomes a slave, otherwise, an inverter is determined as the host and the rest of the inverters are used as slaves.

[0022] The method further includes:

[0023] When the host fails or is removed, an inverter is determined as the host among the remaining slaves.

[0024] A current-sharing control method for an inverter modular parallel system includes:

[0025] Collect the grid-side voltage and current and the inductor current, and perform PQ droop control to obtain their respective voltage droop amounts, amplitude reference values, and phase reference values;

[0026] Receive the information of the current-sharing bus and the synchronization bus, and determine whether information from the host is detected. If so, receive the amplitude calibration amount from the current-sharing bus, sum it with its own voltage reference value and subtract its own voltage droop amount to obtain its own corrected voltage reference value, and receive the square-wave signal from the synchronization bus to determine the phase signal, and sum the phase signal and its own phase reference value to obtain its own corrected phase reference value. Otherwise, determine the amplitude calibration amount according to its own voltage droop amount, and send it to each slave via the current-sharing bus, and generate a square-wave signal according to its own phase reference value, and send it to each slave via the synchronization bus.

[0027] The information of the host is the amplitude calibration amount and the square-wave signal.

[0028] An inverter modular parallel system current-sharing control device includes a memory, a processor, and a program stored in the memory. When the processor executes the program, the above method is implemented.

[0029] A storage medium stores a program, and when the program is executed, the above method is implemented.

[0030] Compared with the prior art, the present invention has the following beneficial effects:

[0031] 1. The current sharing control is carried out by using a current sharing bus to transfer the voltage calibration quantity. The transferred current sharing calibration quantity is a direct current quantity, and the communication frequency is relatively low. Even if some information is lost during the communication process, it will not affect the current sharing stability. At the same time, the synchronous bus is used to synchronize the phases between the master and the slave, and the currents among the inverter modules can be evenly distributed, avoiding the circulating current caused by voltage differences, significantly improving the operation stability of the parallel system, and enhancing the anti-interference ability.

[0032] 2. Introducing virtual impedance can further improve the current sharing effect, but it will cause the drop of the output voltage. The traditional amplitude compensation based on the voltage difference is difficult to accurately and quickly raise the voltage to the rated value. Using the amplitude compensation based on the effective value of the current and virtual impedance, and through the current sharing bus, each module uniformly performs the amplitude compensation calculated based on the host, so as to improve the voltage compensation speed and solve the potential problem caused by the imbalance of the compensation quantity due to the output difference.

[0033] 3. The master-slave-free control adopted can effectively avoid the problem that the system crashes due to the failure or removal of the host. The host is automatically generated through competition and automatically switched during faults, and the inverter can still operate stably when performing master-slave switching or when each module is cut in and cut out, thus improving the reliability of the system. Description of the Drawings

[0034] Figure 1 It is the overall topology diagram and control framework of the parallel system of the present invention;

[0035] Figure 2 It is the flow chart of the master-slave-free control of the present invention;

[0036] Figure 3 It is the schematic diagram of the principle of the synchronous bus part of the present invention;

[0037] Figure 4 It is the schematic diagram of the principle of the current sharing bus part of the present invention;

[0038] Figure 5 It is the experimental waveform diagram of the parallel system of the present invention without current sharing control;

[0039] Figure 6 It is the experimental waveform diagram of the parallel system of the present invention with current sharing control;

[0040] Among them: 1. Synchronous bus, 2. Current sharing bus, 3. AC bus, 4. Inverter, 5. EMI filter, 4-1. Host, 4-2. Slave. Detailed Embodiment

[0041] The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. This embodiment is implemented on the premise of the technical solution of the present invention, and gives the detailed implementation manners and specific operation processes, but the protection scope of the present invention is not limited to the following embodiments.

[0042] Embodiment 1

[0043] As shown in Figure 1 the figure, multiple inverters are all connected to the current-sharing bus and the synchronization bus. After the output of each inverter passes through a filter inductor, a filter capacitor, an EMI filter, and a current-sharing inductor, it is connected to the AC bus. Among them, in this embodiment, the inverter adopts a three-phase four-wire T-type three-level inverter, a current-sharing bus based on the CAN bus, and a power-frequency synchronization bus. Of course, in other embodiments, other types of buses can also be used for the current-sharing bus and the synchronization bus, as long as they can implement the communication function.

[0044] The present application provides a current-sharing control method for an inverter modular parallel system, including:

[0045] (1) When the system starts up, determine one inverter as the master and the remaining inverters as slaves. Among them, both the master and the slaves are connected to the current-sharing bus and the synchronization bus;

[0046] Specifically, in this embodiment, in the process of determining one inverter as the master: determine the master based on the module number of the inverter. Since the module number is unique, the only master can be obtained without any dispute, improving the efficiency. Of course, in other embodiments, other methods can also be used to determine which inverter is the master, such as determining by network delay, voting, etc., or determining by device information.

[0047] In addition, it should be noted that the master and slaves of the present application are generated autonomously inside the system without external setting, so in fact it has the effect of a hostless system and can achieve the function of plug-and-play.

[0048] For example, as shown in Figure 2 the figure, when a new inverter is connected, obtain the information of the current-sharing bus and the synchronization bus. If there is information sent by the master, the new inverter becomes a slave; otherwise, determine one inverter as the master and the remaining inverters as slaves. Another example is that when the master fails or is removed, determine one inverter as the master among the remaining slaves.

[0049] Specifically, inverter access generally refers to the inverter being powered on. At this time, it will first monitor the information on the current sharing bus and the synchronization bus. If the information sent by the host already exists on the current sharing bus and the synchronization bus, the inverter will become a slave. If the system does not contain a host, it will compete to generate a host based on the module number code, etc. After the competition, it will become the host after another judgment. When the host fails or is removed from the system, the existing slaves will re-select the host through this process.

[0050] The master-slave-free control adopted can effectively avoid the problem of system crash caused by host failure or removal. The host is automatically generated through competition and automatically switched in case of failure. The inverter can still maintain stable operation when performing master-slave switching or cutting in and out of each module, thereby improving the reliability of the system.

[0051] Among them, the synchronous bus and the current-sharing bus are used for communication between the inverters. The synchronous bus is used to transmit the industrial frequency square wave signal, and all inverters are synchronized according to the rising edge. The current-sharing bus is responsible for transmitting the current-sharing signal, which is received by the inverter module for subsequent local control.

[0052] (ii) Each inverter collects grid-side voltage and current and inductor current, performs PQ droop control to obtain its own voltage droop amount, amplitude reference value and phase reference value;

[0053] This process is applicable to all inverters. When collecting grid-side voltage, current and inductor current, first, each inverter calculates the three-phase active power through PQ. P abc And three-phase reactive power Q abc , and then use droop control to obtain the respective voltage droop, amplitude reference value and phase reference value:

[0054]

[0055] in: is the voltage droop, is the active power droop control coefficient, is the amplitude reference value, is the initial voltage reference value, is the phase reference value, is the initial phase angle, is the reactive power droop control coefficient.

[0056] Those skilled in the art should understand that the subscripts of the above voltage droop, amplitude reference value, etc. include abc The specific form of the parameters is a three-phase data group, which represents the data of the three phases A, B, and C respectively.

[0057] (3) The master determines the amplitude calibration amount based on its own voltage droop amount and amplitude compensation amount, and sends it to each slave via the current sharing bus. In addition, the master generates a square wave signal based on its own phase reference value and sends it to each slave via the synchronization bus;

[0058] Specifically, in this embodiment, the master directly uses its own voltage droop amount and routine as the amplitude calibration amount, and this amplitude calibration amount is sent to the current sharing bus, and then received by each slave. Since the transmitted current sharing calibration amount is a direct current, the communication frequency is low. Even if some information is lost during the communication process, it will not affect the current sharing stability. In the prior art, the amount transmitted on the communication line is an alternating current. On the one hand, the communication frequency needs to be large enough, and on the other hand, the communication stability requirement is very high. If the communication information is lost due to a master failure or signal disturbance, the current sharing stability will be seriously affected.

[0059] In addition, for the square wave signal, specifically, as Figure 3 shown, taking the zero point of the master's own phase reference value as the rising edge of the square wave signal and the π point as the falling edge of the square wave signal, the original sine signal can be converted into a square wave signal with stronger anti-interference ability for transmission.

[0060] (4) After receiving the amplitude calibration amount, the slave adds it to its own voltage reference value and subtracts its own voltage droop amount to obtain its own corrected voltage reference value. In addition, the slave determines the phase signal according to the square wave signal, and adds the phase signal to its own phase reference value to obtain its own corrected phase reference value;

[0061] In this embodiment, the process of determining the phase signal according to the square wave signal includes: detecting the rising edge of the square wave signal; calculating the phase difference between the phase zero point and the rising edge as the phase signal. In this way, phase synchronization can be achieved.

[0062] In addition, in this embodiment, the corrected voltage reference value and phase reference value are respectively:

[0063]

[0064] Among them: is the corrected voltage reference value, is the corrected phase reference value, is the phase signal.

[0065] (5) The slave performs voltage-current double-loop control based on its own corrected voltage reference value and phase reference value, and the master performs voltage-current double-loop control based on its own amplitude reference value and phase reference value.

[0066] During the voltage-current double-loop control, the output three-phase modulation wave signal After passing through the SPWM module, drive signals for each switch tube of the inverter are generated.

[0067] Embodiment 2

[0068] This embodiment is generally the same as Embodiment 1. To avoid ambiguity in the key points described in this embodiment, the same parts as in Embodiment 1 will not be elaborated here, and only the differences will be described. In this embodiment, as Figure 1 and Figure 4 shown, a virtual impedance is introduced to improve the overall performance. The host determines the amplitude calibration amount based on its own voltage droop amount and amplitude compensation amount. Specifically:

[0069] The host sums its own voltage droop amount and voltage amplitude compensation amount to obtain the amplitude calibration amount. Among them, the voltage amplitude compensation amount is proportional to the product of the virtual impedance and the effective value of the grid-side current collected:

[0070]

[0071] Where: k is the voltage amplitude compensation coefficient, is the effective value of the grid-side current, is the voltage amplitude compensation amount, is the virtual impedance.

[0072] Figure 1 and Figure 4 in, U dc is the DC voltage, O 1 is the neutral point of the inverter numbered 1, L a 、 L b 、 L c 、 L n are respectively A 、 B 、 C 、 N phase filter inductors, C is the filter capacitor, L sa 、 L sb 、 L sc are respectively A 、 B 、 C phase current sharing inductors, S x is the switch tube signal, v sabc is the output voltage, i sabc is the output current, ∠θ abc For A 、 B 、 C the phase angles of the phases, i Labc For A 、 B 、 C the inductor currents of the phases, u * abc are the three-phase modulation waves.

[0073] Similarly, in the control loop of the voltage-current double-loop control, a virtual impedance is introduced. To improve the balance of the module output, a virtual impedance is introduced into the voltage-current double-closed-loop control loop. By means of the virtual impedance, the equivalent output impedance of the inverter is improved, which helps the current sharing control of each module.

[0074] In this embodiment, a virtual impedance is introduced, and a voltage amplitude compensation amount based on the virtual impedance and the current effective value is added. This compensation method enables the voltage to recover faster, and then together with the phase signal obtained from the power frequency synchronous bus, the voltage reference value is corrected.

[0075] Furthermore, in this embodiment, by introducing the virtual impedance, the current sharing effect can be further improved, but it will cause a drop in the output voltage. It is difficult for the traditional amplitude compensation based on the voltage difference to accurately and quickly raise the voltage to the rated value. By using the amplitude compensation based on the current effective value and the virtual impedance, and through the current sharing bus, each module uniformly performs the amplitude compensation calculated based on the host, thereby improving the voltage compensation speed and solving the potential problems caused by the imbalance of the compensation amount due to the output difference.

[0076] To verify the effectiveness of the above control method, a specific experimental example is given in this embodiment.

[0077] This experimental example takes two modular inverters in parallel as an example. When the current sharing control is not added, that is, without the droop control, virtual impedance control and voltage compensation based on the synchronous bus and the current sharing bus, even when not loaded, there is a large circulating current in the system. As Figure 5 shown, C2 is the B-phase line voltage channel, and C4 is the A-phase line voltage channel of a certain module. After loading, the in-phase currents of the two inverters are significantly non-uniform, and there is a large circulating current in the system. Long-term operation will affect the system stability. After adding the current sharing control, that is, adding the droop control, virtual impedance control and voltage compensation based on the synchronous bus and the current sharing bus, there is almost no circulating current before and after loading. As Figure 6 shown, C2 is the B-phase line voltage channel, and C4 is the A-phase line voltage channel of a certain module. The transient stability of the current sharing control can also be ensured at the moment of loading. After loading, the output currents of the two inverters almost overlap, achieving a good current sharing effect.

[0078] Through embodiments and experimental examples, the feasibility and effectiveness of the current-sharing control strategy for an inverter modular parallel system based on a current-sharing bus and a synchronization bus proposed in this application are verified.

[0079] Embodiment 3

[0080] This embodiment is specifically a form of Embodiment 1 deployed on a single inverter. Specifically, a current-sharing control method for an inverter modular parallel system includes:

[0081] Collect the grid-side voltage and current and the inductor current, and perform PQ droop control to obtain their respective voltage droop amounts, amplitude reference values, and phase reference values.

[0082] Receive the information of the current-sharing bus and the synchronization bus, and determine whether information from the master is detected. If so, receive the amplitude calibration amount from the current-sharing bus, sum it with its own voltage reference value and subtract its own voltage droop amount to obtain its own corrected voltage reference value, and receive the square-wave signal from the synchronization bus to determine the phase signal, and sum the phase signal and its own phase reference value to obtain its own corrected phase reference value. Otherwise, determine the amplitude calibration amount according to its own voltage droop amount and send it to each slave via the current-sharing bus, and generate a square-wave signal according to its own phase reference value and send it to each slave via the synchronization bus.

[0083] In this embodiment, the information of the master is the amplitude calibration amount and the square-wave signal. In this way, the amount of information on the bus can be reduced. Of course, in other embodiments, it can also be other information.

[0084] If the above functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. And the aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs that can store program codes.

Claims

1. A current sharing control method for an inverter modular parallel system, characterized in that Including: When the system starts up, determine one inverter as the host and the remaining inverters as slaves. Among them, both the host and the slaves are connected to the current sharing bus and the synchronization bus; Each inverter collects the grid-side voltage and current and the inductor current, and performs PQ droop control to obtain its own voltage droop amount, amplitude reference value, and phase reference value; The host determines the amplitude calibration amount according to its own voltage droop amount, and sends it to each slave via the current sharing bus, and generates a square wave signal according to its own phase reference value, and sends it to each slave via the synchronization bus; After receiving the amplitude calibration amount, the slave adds it to its own voltage reference value, subtracts its own voltage droop amount to obtain its own corrected voltage reference value, and determines the phase signal according to the square wave signal, and adds the phase signal and its own phase reference value to obtain its own corrected phase reference value; The slave performs voltage-current double-loop control based on its own corrected voltage reference value and phase reference value, and the host performs voltage-current double-loop control based on its own amplitude reference value and phase reference value; The host determines the amplitude calibration amount according to its own voltage droop amount, specifically: The host adds its own voltage droop amount to the voltage amplitude compensation amount to obtain the amplitude calibration amount, where the voltage amplitude compensation amount is proportional to the product of the virtual impedance and the effective value of the collected grid-side current; In the control loop of the voltage-current double-loop control, a virtual impedance is introduced.

2. The current sharing control method for an inverter modular parallel system according to claim 1, characterized in that, In the process of determining one inverter as the host: determine the host based on the module number of the inverter.

3. A current sharing control method for an inverter modular parallel system according to claim 1, characterized in that, The process of determining the phase signal according to the square wave signal includes: Detect the rising edge of the square wave signal; Calculate the difference between the phase of the rising edge and the local phase as the phase signal.

4. A current sharing control method for an inverter modular parallel system according to claim 1, characterized in that The method further includes: When a new inverter is connected, obtain the information of the current sharing bus and the synchronization bus. If there is information sent by the host, the new inverter becomes a slave. Otherwise, determine one inverter as the host and the remaining inverters as slaves.

5. A current sharing control method for an inverter modular parallel system according to claim 1, characterized in that, The method further includes: When the host fails or is removed, determine one inverter as the host among the remaining slaves.

6. A current sharing control method for an inverter modular parallel system, characterized in that Including: Collect the grid-side voltage and current and the inductor current, and perform PQ droop control to obtain its own voltage droop amount, amplitude reference value, and phase reference value; Receive the information of the current sharing bus and the synchronization bus, and judge whether information from the host is detected. If so, receive the amplitude calibration amount from the current sharing bus, add it to its own voltage reference value, subtract its own voltage droop amount to obtain its own corrected voltage reference value, and receive the square wave signal from the synchronization bus to determine the phase signal, and add the phase signal and its own phase reference value to obtain its own corrected phase reference value. Otherwise, determine the amplitude calibration amount according to its own voltage droop amount, and send it to each slave via the current sharing bus, and generate a square wave signal according to its own phase reference value, and send it to each slave via the synchronization bus; The host determines the amplitude calibration amount according to its own voltage droop amount, specifically: The host adds its own voltage droop amount to the voltage amplitude compensation amount to obtain the amplitude calibration amount, where the voltage amplitude compensation amount is proportional to the product of the virtual impedance and the effective value of the collected grid-side current; In the control loop of the voltage-current double-loop control, a virtual impedance is introduced.

7. A current sharing control method for an inverter modular parallel system according to claim 6, characterized in that The information of the host is the amplitude calibration quantity and the square wave signal.

8. A current sharing control device for an inverter modular parallel system, comprising a memory, a processor, and a program stored in the memory, characterized in that, When the processor executes the program, the method described in any one of claims 1-7 is implemented.

9. A storage medium, on which a program is stored, characterized in that, When the program is executed, the method described in any one of claims 1-7 is implemented.

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