A radio frequency quadrature switched capacitor transmitter

Abstract

The application discloses a radio frequency quadrature switched capacitor transmitter, comprising an up-conversion circuit, a Doherty stage switched capacitor array and an output matching circuit, wherein the Doherty stage switched capacitor array comprises an amplification unit; the up-conversion circuit is used for up-converting a first baseband phase signal and a second baseband phase signal to obtain a radio frequency phase signal; the Doherty stage switched capacitor array is used for controlling the number of the opened amplification units according to the baseband amplitude signal and the radio frequency phase signal to obtain a radio frequency amplification signal, realizing power amplification and digital-to-analog conversion; and the output matching circuit is used for impedance matching the radio frequency amplification signal. The application directly modulates the carrier in amplitude by controlling the number of the opened amplification units, thereby realizing the functions of digital-to-analog conversion and power amplification, improving the system efficiency, reducing the circuit power consumption, and being widely applicable to the field of wireless communication technology.

Description

Technical Field

[0001] This invention relates to the field of wireless communication technology, and in particular to a radio frequency quadrature switched capacitor transmitter. Background Technology

[0002] Wireless transmitter systems are a crucial component of wireless communication equipment. Traditional transmitters are analog circuits, consisting of a local oscillator, mixer, analog filter, and linear power amplifier. This type of transmitter is complex and functionally limited, unable to meet the requirements of integrating multiple functions. Therefore, previous technologies proposed implementing the local oscillator and mixer using digital circuits, and using a digital-to-analog converter (DAC) and switching power amplifier to achieve signal transmission. This integrates the digital intermediate frequency (IF) and digital radio frequency (RF) units, and then uses a small number of analog components for transmission and reception. However, such a wireless transmitter architecture requires a separate DAC module, which introduces additional power consumption and system efficiency limitations. Summary of the Invention

[0003] To address the aforementioned technical problems, the present invention aims to provide an RF quadrature switched capacitor transmitter that can improve system efficiency and reduce power consumption.

[0004] To achieve the above objectives, one aspect of this application proposes a radio frequency quadrature switched capacitor transmitter, including an upconversion circuit, a Doherty-level switched capacitor array, and an output matching circuit. The input terminal of the upconversion circuit is used to input a baseband phase signal, and the input terminal of the Doherty-level switched capacitor array is used to input a baseband amplitude signal. The Doherty-level switched capacitor array includes an amplification unit. The output terminal of the upconversion circuit is connected to the input terminal of the amplification unit, and the output terminal of the amplification unit is connected to the input terminal of the output matching circuit. The output terminal of the output matching circuit is used to connect to an external antenna. The upconversion circuit upconverts the baseband phase signal to obtain a radio frequency phase signal. The Doherty-level switched capacitor array controls the number of amplification units turned on based on the baseband amplitude signal and the radio frequency phase signal to obtain a radio frequency amplified signal, achieving power amplification and digital-to-analog conversion. The output matching circuit performs impedance matching on the radio frequency amplified signal and then transmits the impedance-matched radio frequency amplified signal through the external antenna. The baseband phase signal includes a first orthogonal baseband phase signal and a second orthogonal baseband phase signal.

[0005] In some embodiments, the radio frequency phase signal includes a first positive radio frequency phase signal, a first negative radio frequency phase signal, a second positive radio frequency phase signal, and a second negative radio frequency phase signal. The phase difference between the first positive radio frequency phase signal and the first negative radio frequency phase signal is 180°, the phase difference between the second positive radio frequency phase signal and the second negative radio frequency phase signal is 180°, the phase difference between the first positive radio frequency phase signal and the second positive radio frequency phase signal is 90°, and the phase difference between the first negative radio frequency phase signal and the second negative radio frequency phase signal is 90°.

[0006] In some embodiments, the upconversion circuit includes a first upconversion circuit. The input terminal of the first upconversion circuit is used to input the first baseband phase signal, the first positive local oscillator phase signal, and the first negative local oscillator phase signal. The output terminal of the first upconversion circuit is connected to the input terminal of the amplification unit. The first upconversion circuit is used to modulate the first baseband phase signal according to the first positive local oscillator phase signal and the first negative local oscillator phase signal to obtain the first positive radio frequency phase signal and the first negative radio frequency phase signal.

[0007] In some embodiments, the upconversion circuit includes a second upconversion circuit. The input terminal of the second upconversion circuit is used to input the second baseband phase signal, the second positive local oscillator phase signal, and the second negative local oscillator phase signal. The output terminal of the second upconversion circuit is connected to the input terminal of the amplification unit. The second upconversion circuit is used to modulate the second baseband phase signal according to the second positive local oscillator phase signal and the second negative local oscillator phase signal to obtain the second positive radio frequency phase signal and the second negative radio frequency phase signal.

[0008] In some embodiments, the Doherty-level switched capacitor array further includes a non-overlapping clock signal generation unit. The output terminal of the upconversion circuit is connected to the input terminal of the non-overlapping clock signal generation unit, and the output terminal of the non-overlapping clock signal generation unit is connected to the clock input terminal of the amplification unit. The non-overlapping clock signal generation unit is used to convert the radio frequency phase signal to obtain a non-overlapping first positive radio frequency phase signal, a non-overlapping first negative radio frequency phase signal, a non-overlapping second positive radio frequency phase signal, and a non-overlapping second negative radio frequency phase signal.

[0009] In some embodiments, the amplification unit includes a main power amplifier circuit and an auxiliary power amplifier circuit. The clock input terminals of both the main power amplifier circuit and the auxiliary power amplifier circuit are connected to the output terminal of the non-overlapping clock signal generation unit, and the output terminals of both the main power amplifier circuit and the auxiliary power amplifier circuit are connected to the input terminal of the output matching circuit.

[0010] In some embodiments, the Doherty-level switched capacitor array further includes a logic control unit. The input terminal of the logic control unit is used to input the baseband amplitude signal. The amplitude input terminals of the main power amplifier circuit and the auxiliary power amplifier circuit are respectively connected to the output terminal of the logic control unit. The logic control unit is used to control the main power amplifier circuit and the auxiliary power amplifier circuit to turn on or off according to the baseband amplitude signal, so as to realize amplitude modulation and power amplification.

[0011] In some embodiments, the main power amplifier circuit includes a first switched capacitor array and a second switched capacitor array. The output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the first switched capacitor array, and the output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the second switched capacitor array. The output terminals of the first switched capacitor array and the second switched capacitor array are both connected to the input terminal of the output matching circuit. The first switched capacitor array uses a non-overlapping first positive radio frequency phase signal as its clock signal input, and the second switched capacitor array uses a non-overlapping second positive radio frequency phase signal as its clock signal input. The first switched capacitor array and the second switched capacitor array include multiple switched capacitor units, and the number of switched capacitor units turned on is determined by the baseband amplitude signal.

[0012] In some embodiments, the auxiliary power amplifier circuit includes a third switched capacitor array and a fourth switched capacitor array. The output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the third switched capacitor array, and the output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the fourth switched capacitor array. The output terminals of the third switched capacitor array and the fourth switched capacitor array are both connected to the input terminal of the output matching circuit. The third switched capacitor array uses the non-overlapping first negative radio frequency phase signal as the clock signal input, and the fourth switched capacitor array uses the non-overlapping second negative radio frequency phase signal as the clock signal input. The third switched capacitor array and the fourth switched capacitor array include multiple switched capacitor units, and the number of switched capacitor units turned on is determined by the baseband amplitude signal.

[0013] In some embodiments, the output matching circuit includes a first inductor, a second inductor, and a transformer. One end of the first inductor is connected to the output terminal of the main power amplifier circuit, one end of the second inductor is connected to the output terminal of the auxiliary power amplifier circuit, the other ends of the first inductor and the second inductor are connected to one end of the transformer, and the other end of the transformer is connected to the external antenna. The first inductor, the second inductor, and the transformer are used for impedance matching with the external antenna.

[0014] The beneficial effects of this invention are as follows: This invention provides a radio frequency quadrature switched capacitor transmitter, comprising an up-conversion circuit, a Doherty-level switched capacitor array, and an output matching circuit. The Doherty-level switched capacitor array includes an amplification unit. Frequency modulation is achieved through the up-conversion circuit, which up-converts the quadrature first baseband phase signal and the second baseband phase signal to obtain a radio frequency phase signal. The baseband amplitude signal and the radio frequency phase signal modulated by the up-conversion circuit are then input together into the Doherty-level switched capacitor array. The number of amplification units activated by the Doherty-level switched capacitor array directly modulates the carrier amplitude, thereby achieving power amplification and digital-to-analog conversion functions. This improves system efficiency, simplifies circuit structure, and reduces circuit power consumption. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the embodiments of the present invention are described below. It should be understood that the drawings described below are only for the convenience of clearly describing some embodiments of the technical solutions of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a structural block diagram of a radio frequency quadrature switched capacitor transmitter provided in an embodiment of the present invention;

[0017] Figure 2 A schematic diagram of the top-level circuit structure of a radio frequency quadrature switched capacitor transmitter provided in an embodiment of the present invention;

[0018] Figure 3 The circuit structure diagram of the up-conversion circuit provided in the embodiment of the present invention is shown.

[0019] Reference numerals: L1, first inductor; L2, second inductor; U1, transformer. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit it. In the following description, when referring to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this application; they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this application as detailed in the appended claims.

[0021] It is understood that the terms “first,” “second,” etc., used in this application may be used herein to describe various concepts, but unless otherwise stated, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another. For example, without departing from the scope of the embodiments of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the words “if,” “when,” or “in response to a determination” as used herein may be interpreted as “when…” or “when…” or “in response to a determination.”

[0022] As used in this application, the terms "at least one", "multiple", "each", "any", etc., "at least one" includes one, two or more, "multiple" includes two or more, "each" refers to each of the corresponding multiples, and "any" refers to any one of the multiples.

[0023] Before providing a detailed description of the embodiments of this application, some of the nouns and terms involved in the embodiments of this application will be explained first. The nouns and terms involved in the embodiments of this application are subject to the following interpretations.

[0024] SCPA (Switched Capacitor Power Amplifiers): Switched capacitor power amplifiers.

[0025] Cascode: Common source, common gate.

[0026] AM (Amplitude Modulation): Amplitude modulation.

[0027] PM (Phase Modulation): Phase modulation.

[0028] DAC (Digital-to-Analog Converter): A digital-to-analog converter.

[0029] I: In-Phase; Q: Quadrature (90-degree phase shift): This represents two signals that are 90 degrees out of phase.

[0030] LO (Local Oscillator): The local oscillator signal is the intermediate frequency signal used to generate the modulation signal.

[0031] RF (Radio Frequency): Electromagnetic frequencies that can be radiated into space.

[0032] Wireless transmitter systems are a crucial component of wireless communication equipment. Traditional transmitters are analog circuits, consisting of a local oscillator, mixer, analog filter, and linear power amplifier. This type of transmitter is complex and functionally limited, unable to meet the requirements of integrating multiple functions. Therefore, previous technologies proposed implementing the local oscillator and mixer using digital circuits, and using a digital-to-analog converter (DAC) and switching power amplifier to achieve signal transmission. This integrates the digital intermediate frequency (IF) and digital radio frequency (RF) units, and then uses a small number of analog components for transmission and reception. However, such a wireless transmitter architecture requires a separate DAC module, which introduces additional power consumption and system efficiency limitations.

[0033] To address this, this invention proposes a radio frequency quadrature switched capacitor transmitter, comprising an up-conversion circuit, a Doherty-level switched capacitor array, and an output matching circuit. The Doherty-level switched capacitor array includes an amplification unit. Frequency modulation is achieved through the up-conversion circuit, which up-converts the quadrature first baseband phase signal and the second baseband phase signal to obtain a radio frequency phase signal. The baseband amplitude signal and the radio frequency phase signal modulated by the up-conversion circuit are then input together into the Doherty-level switched capacitor array. The number of amplification units turned on is controlled by the Doherty-level switched capacitor array to directly modulate the carrier amplitude, thereby achieving power amplification and digital-to-analog conversion functions. This improves system efficiency, simplifies circuit structure, and reduces circuit power consumption.

[0034] Reference Figure 1 , Figure 1This is a structural block diagram of an RF quadrature switched capacitor transmitter provided in an embodiment of the present invention. The RF quadrature switched capacitor transmitter includes an up-conversion circuit, a Doherty-level switched capacitor array, and an output matching circuit. The input terminal of the up-conversion circuit is used to input a baseband phase signal, and the input terminal of the Doherty-level switched capacitor array is used to input a baseband amplitude signal. The Doherty-level switched capacitor array includes an amplification unit. The output terminal of the up-conversion circuit is connected to the input terminal of the amplification unit, and the output terminal of the amplification unit is connected to the input terminal of the output matching circuit. The output terminal of the output matching circuit is used to connect to an external antenna. The up-conversion circuit up-converts the baseband phase signal to obtain an RF phase signal. The Doherty-level switched capacitor array controls the number of amplification units turned on based on the baseband amplitude signal and the RF phase signal to obtain an RF amplified signal, achieving power amplification and digital-to-analog conversion. The output matching circuit performs impedance matching on the RF amplified signal and then transmits the impedance-matched RF amplified signal through an external antenna. The baseband phase signal includes a first orthogonal baseband phase signal and a second orthogonal baseband phase signal.

[0035] Specifically, the upconversion circuit is used to modulate the first baseband phase signal and the second baseband phase signal (i.e., PM-I signal and PM-Q signal) using the local oscillator signal, thereby raising the signal frequency to the sum of the frequencies of the baseband signal and the local oscillator signal to obtain the radio frequency phase signal. Finally, the baseband amplitude signal (AM signal) and the modulated baseband phase signal (PM signal) are input into the Doherty-level switched capacitor array.

[0036] Doherty-level switched-capacitor arrays are used to selectively switch a set of integrated capacitors on or off at the FR carrier frequency using a baseband amplitude signal (AM signal) to provide linear output characteristics. The number of amplifier units that are turned on determines the amplitude of the output signal; therefore, controlling the number of amplifier units turned on means directly modulating the carrier amplitude, thereby achieving power amplification.

[0037] As a further optional implementation, the radio frequency phase signal includes a first positive radio frequency phase signal, a first negative radio frequency phase signal, a second positive radio frequency phase signal, and a second negative radio frequency phase signal. The phase difference between the first positive radio frequency phase signal and the first negative radio frequency phase signal is 180°, the phase difference between the second positive radio frequency phase signal and the second negative radio frequency phase signal is 180°, the phase difference between the first positive radio frequency phase signal and the second positive radio frequency phase signal is 90°, and the phase difference between the first negative radio frequency phase signal and the second negative radio frequency phase signal is 90°.

[0038] Reference Figure 2 and Figure 3 , Figure 2This is a schematic diagram of the top-level circuit structure of the radio frequency quadrature switched capacitor transmitter provided in an embodiment of the present invention. Figure 3 The circuit structure diagram of the upconversion circuit provided in the embodiment of the present invention is shown. Further, as an optional implementation, the upconversion circuit includes a first upconversion circuit. The input terminal of the first upconversion circuit is used to input a first baseband phase signal, a first positive local oscillator phase signal, and a first negative local oscillator phase signal. The output terminal of the first upconversion circuit is connected to the input terminal of the amplification unit. The first upconversion circuit is used to modulate the first baseband phase signal according to the first positive local oscillator phase signal and the first negative local oscillator phase signal to obtain a first positive radio frequency phase signal and a first negative radio frequency phase signal.

[0039] Reference Figure 2 and Figure 3 As an optional implementation, the upconversion circuit includes a second upconversion circuit. The input terminal of the second upconversion circuit is used to input a second baseband phase signal, a second positive local oscillator phase signal, and a second negative local oscillator phase signal. The output terminal of the second upconversion circuit is connected to the input terminal of the amplification unit. The second upconversion circuit is used to modulate the second baseband phase signal according to the second positive local oscillator phase signal and the second negative local oscillator phase signal to obtain a second positive radio frequency phase signal and a second negative radio frequency phase signal.

[0040] Specifically, the input I and Q baseband signals are first decomposed into AM-I, PM-I, AM-Q and PM-Q signals, respectively, corresponding to the amplitude and phase signals of I and Q. The orthogonal first baseband phase signal (PM-I signal) and second baseband phase signal (PM-Q signal) are input to the EN ports of two upconverter circuits, respectively. At the same time, the differential first positive local oscillator phase signal (LO_I+) and first negative local oscillator phase signal (LO_I-) corresponding to the first baseband phase signal (PM-I signal) are input to one upconverter circuit through the LO_N and LO_P ports, and the differential second positive local oscillator phase signal (LO_Q+) and second negative local oscillator phase signal (LO_Q-) corresponding to the second baseband phase signal (PM-Q signal) are input to another upconverter circuit through the LO_N and LO_P ports. Finally, the signals output from the OUT_N and OUT_P ports of the circuit correspond to the modulated first positive radio frequency phase signal (I+ phase signal), second positive radio frequency phase signal (Q+ phase signal), first negative radio frequency phase signal (I- phase signal), and second negative radio frequency phase signal (Q- phase signal), respectively.

[0041] It should be noted that this upconversion circuit mainly modulates the baseband phase signal (PM signal). After passing through the upconversion circuit, the output signal becomes differential, and its frequency is also raised to the sum of the frequencies of the baseband signal and the local oscillator signal. This circuit achieves signal modulation while maintaining a relatively simple structure. Furthermore, the symmetrical input structure improves output efficiency and power, and facilitates layout design.

[0042] Reference Figure 1 and Figure 2 As an optional implementation, the Doherty-level switched capacitor array further includes a non-overlapping clock signal generation unit. The output terminal of the upconversion circuit is connected to the input terminal of the non-overlapping clock signal generation unit, and the output terminal of the non-overlapping clock signal generation unit is connected to the clock input terminal of the amplification unit. The non-overlapping clock signal generation unit is used to convert the radio frequency phase signal to obtain a non-overlapping first positive radio frequency phase signal, a non-overlapping first negative radio frequency phase signal, a non-overlapping second positive radio frequency phase signal, and a non-overlapping second negative radio frequency phase signal.

[0043] Specifically, the four PM components (first positive RF phase signal I+, second positive RF phase signal Q+, first negative RF phase signal I-, and second negative RF phase signal Q-) after up-conversion to the RF carrier frequency are converted into non-overlapping clock signals through multiple non-overlapping clock signal generation circuits. This reduces the crowbar current generated during the switching process of the cascode output stage. The resulting non-overlapping clock signal serves as the clock signal for the Doherty-level switched capacitor array (also known as the Doherty-level SCPA module). The baseband amplitude signal (AM signal) input to the Doherty-level SCPA module is a sampled value of the envelope amplitude.

[0044] Reference Figure 2 As an optional implementation, the amplification unit includes a main power amplifier circuit and an auxiliary power amplifier circuit. The clock input terminals of both the main power amplifier circuit and the auxiliary power amplifier circuit are connected to the output terminal of the non-overlapping clock signal generation unit, and the output terminals of both the main power amplifier circuit and the auxiliary power amplifier circuit are connected to the input terminal of the output matching circuit.

[0045] Specifically, the embodiments of the present invention use Doherty technology to implement SCPA, that is, to use a combination of main power amplifier and auxiliary power amplifier to achieve power back-off, and the opening and closing of the main and auxiliary power amplifier circuits are controlled by the logic control unit.

[0046] Reference Figure 1 and Figure 2As an optional implementation, the Doherty-level switched capacitor array also includes a logic control unit. The input terminal of the logic control unit is used to input the baseband amplitude signal. The amplitude input terminals of the main power amplifier circuit and the auxiliary power amplifier circuit are respectively connected to the output terminal of the logic control unit. The logic control unit is used to control the main power amplifier circuit and the auxiliary power amplifier circuit to turn on or off according to the baseband amplitude signal, so as to realize amplitude modulation and power amplification.

[0047] In some optional embodiments, the baseband amplitude signal (AM signal), the non-overlapping first positive RF phase signal, the first negative RF phase signal, the second positive RF phase signal, and the second negative RF phase signal are used as inputs to control the on and off of the main power amplifier circuit and the auxiliary power amplifier circuit. When the output power is low, the auxiliary power amplifier circuit is off and the main power amplifier circuit is on; when the output power is high, the main power amplifier circuit is saturated and the auxiliary power amplifier circuit is on, so that high efficiency can be exhibited even at low output power, achieving power back-off.

[0048] Specifically, the logic control unit is divided into a main power amplifier logic control circuit and an auxiliary power amplifier logic control circuit. The baseband amplitude signal (AM signal) is used as input. When the normalized output voltage is less than 50%, i.e., the most significant bit of the baseband amplitude signal (AM signal) is 0, the auxiliary power amplifier circuit is turned off, and the main power amplifier circuit is turned on. The number of switched capacitor units turned on is determined by the lower 6 bits of the baseband amplitude signal (AM signal). When the normalized output voltage is greater than 50%, i.e., the most significant bit of the baseband amplitude signal (AM signal) is 1, the main power amplifier circuit is saturated, all switched capacitor units are turned on, and the auxiliary power amplifier circuit is turned on. The number of switched capacitor units turned on is determined by the lower 6 bits of the baseband amplitude signal (AM signal). The logic control unit consists of a level shifter circuit, a driver unit, several logic gates, and a cascode output stage. It controls the cascode output stage voltage to switch between 2VDD and GND modes, based on capacitor voltage division.

[0049]

[0050] Reference Figure 2As a further optional implementation, the main power amplifier circuit includes a first switched capacitor array and a second switched capacitor array. The output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminals of the first switched capacitor array, and the output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminals of the second switched capacitor array. The output terminals of the first switched capacitor array and the second switched capacitor array are both connected to the input terminals of the output matching circuit. The first switched capacitor array uses a non-overlapping first positive radio frequency phase signal as the clock signal input, and the second switched capacitor array uses a non-overlapping second positive radio frequency phase signal as the clock signal input. The first switched capacitor array and the second switched capacitor array include multiple switched capacitor units, and the number of switched capacitor units turned on is determined by the baseband amplitude signal.

[0051] Reference Figure 2 As a further optional implementation, the auxiliary power amplifier circuit includes a third switched capacitor array and a fourth switched capacitor array. The output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the third switched capacitor array, and the output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the fourth switched capacitor array. The output terminals of the third switched capacitor array and the fourth switched capacitor array are both connected to the input terminal of the output matching circuit. The third switched capacitor array uses a non-overlapping first negative radio frequency phase signal as the clock signal input, and the fourth switched capacitor array uses a non-overlapping second negative radio frequency phase signal as the clock signal input. The third switched capacitor array and the fourth switched capacitor array include multiple switched capacitor units, and the number of switched capacitor units turned on is determined by the baseband amplitude signal.

[0052] Specifically, both the main power amplifier circuit and the auxiliary power amplifier circuit consist of two identical switched capacitor arrays. The two switched capacitor arrays in the main power amplifier circuit (i.e., the first and second switched capacitor arrays) use orthogonal radio frequency (RF) PM components (first positive RF phase signal I+ and second positive RF phase signal Q+) as clock signal inputs. The clock signal inputs of the two switched capacitor arrays in the auxiliary power amplifier circuit (i.e., the third and fourth switched capacitor arrays) form differential signals with the clock signal input of the main power amplifier circuit (first negative RF phase signal I- and second negative RF phase signal Q-). To comprehensively consider output power and efficiency, each switched capacitor array consists of 64 switched capacitor units, with one switched capacitor unit used to improve resolution.

[0053] It should be noted that this embodiment of the invention proposes a switched-capacitor digital power amplifier (SCPA). As a voltage-type digital power amplifier, it provides linear output characteristics by selectively switching or not switching a set of integrated capacitors at the RF carrier frequency using a baseband amplitude signal (AM signal). For the SCPA, the number of amplification units turned on determines the amplitude of the output signal. Therefore, controlling the number of amplification units turned on means directly performing amplitude modulation on the carrier, thereby realizing the conversion from digital signal to analog signal. At the same time, the SCPA can also perform power amplification, making the transmitter architecture simpler.

[0054] Reference Figure 2 As a further optional implementation, the output matching circuit includes a first inductor L1, a second inductor L2, and a transformer U1. One end of the first inductor L1 is connected to the output terminal of the main power amplifier circuit, one end of the second inductor L2 is connected to the output terminal of the auxiliary power amplifier circuit, and the other ends of the first inductor L1 and the second inductor L2 are connected to one end of the transformer U1. The other end of the transformer U1 is connected to an external antenna. The first inductor L1, the second inductor L2, and the transformer U1 are used for impedance matching with the external antenna.

[0055] Specifically, the output ports of the two switched capacitor arrays in the main power amplifier circuit are connected to the first inductor L1 of the output matching circuit, and the output ports of the two switched capacitor arrays in the auxiliary power amplifier circuit are also connected to the second inductor L2 of the output matching circuit. The output matching circuit consists of the first inductor L1, the second inductor L2, and a transformer U1, with a 50Ω antenna as the load. At the carrier frequency, the two inductors resonate with the total capacitance of the main and auxiliary power amplifier circuits, respectively, reducing energy loss and improving transmitter efficiency. Utilizing the resonance of the inductors and capacitors, the transmitter operates at a specific frequency, improving stability. Simultaneously, the load RL = 50Ω is transformed by the transformer U1 into the optimal terminating resistance Ropt required for the output, at which point the output reaches maximum power.

[0056] The above description illustrates the structure and working principle of an RF quadrature switched capacitor transmitter according to an embodiment of the present invention. It can be understood that, compared to traditional transmitters, traditional analog transmitters are complex in structure, have limited functionality, poor flexibility, and low integration. Furthermore, the combined analog and digital transmitter structure requires independent DAC modules, filters, up-converters, and other modules, leading to additional power consumption and system efficiency limitations. The present invention includes an up-conversion circuit, a Doherty-level switched capacitor array, and an output matching circuit. It decomposes the baseband I and Q quadrature signals into baseband amplitude signals (AM signals) and baseband phase signals (PM signals), respectively. The up-conversion circuit is used in the circuit architecture to achieve phase modulation. The AM signal and the PM signal modulated by the up-conversion circuit are input together to the Doherty-level SCPA module. Simultaneously, the Doherty-level SCPA module performs power amplification and digital-to-analog conversion. The structure is optimized to consist only of the up-conversion circuit, the Doherty-level SCPA module, and the output matching circuit, replacing the original transmitter structure's DAC and mixer, filter, and power amplifier structures. This simplifies the circuit structure, saves unnecessary circuit power consumption, and improves system efficiency.

[0057] In the foregoing description of this specification, references to terms such as "one embodiment," "another embodiment," or "some embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of the present invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0058] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

[0059] The above is a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A radio frequency quadrature switched capacitor transmitter, characterized in that, The system includes an up-conversion circuit, a Doherty-level switched capacitor array, and an output matching circuit. The input terminal of the up-conversion circuit is used to input a baseband phase signal, and the input terminal of the Doherty-level switched capacitor array is used to input a baseband amplitude signal. The Doherty-level switched capacitor array includes an amplification unit. The output terminal of the up-conversion circuit is connected to the input terminal of the amplification unit, and the output terminal of the amplification unit is connected to the input terminal of the output matching circuit. The output terminal of the output matching circuit is used to connect to an external antenna. The up-conversion circuit is used to up-convert the baseband phase signal to obtain a radio frequency (RF) phase signal. The Doherty-level switched capacitor array is used to control the number of amplification units turned on based on the baseband amplitude signal and the RF phase signal to obtain an RF amplified signal, thereby achieving power amplification. The output matching circuit is used to perform digital-to-analog conversion and impedance matching on the RF amplified signal, and then transmit the impedance-matched RF amplified signal through the external antenna. The baseband phase signal includes a first orthogonal baseband phase signal and a second orthogonal baseband phase signal. The Doherty-level switched capacitor array further includes a non-overlapping clock signal generation unit. The amplification unit includes a main power amplifier circuit and an auxiliary power amplifier circuit. The clock input terminals of the main power amplifier circuit and the auxiliary power amplifier circuit are both connected to the output terminal of the non-overlapping clock signal generation unit. The output terminals of the main power amplifier circuit and the auxiliary power amplifier circuit are both connected to the input terminal of the output matching circuit. The Doherty-level switched capacitor array also includes a logic control unit. The input terminal of the logic control unit is used to input the baseband amplitude signal. The amplitude input terminals of the main power amplifier circuit and the auxiliary power amplifier circuit are respectively connected to the output terminal of the logic control unit. The logic control unit is used to control the main power amplifier circuit and the auxiliary power amplifier circuit to turn on or off according to the baseband amplitude signal, so as to realize amplitude modulation and power amplification.

2. The radio frequency quadrature switched capacitor transmitter according to claim 1, characterized in that, The radio frequency phase signal includes a first positive radio frequency phase signal, a first negative radio frequency phase signal, a second positive radio frequency phase signal, and a second negative radio frequency phase signal. The phase difference between the first positive radio frequency phase signal and the first negative radio frequency phase signal is 180°, the phase difference between the second positive radio frequency phase signal and the second negative radio frequency phase signal is 180°, the phase difference between the first positive radio frequency phase signal and the second positive radio frequency phase signal is 90°, and the phase difference between the first negative radio frequency phase signal and the second negative radio frequency phase signal is 90°.

3. The radio frequency quadrature switched capacitor transmitter according to claim 2, characterized in that, The upconversion circuit includes a first upconversion circuit. The input terminal of the first upconversion circuit is used to input the first baseband phase signal, the first positive local oscillator phase signal, and the first negative local oscillator phase signal. The output terminal of the first upconversion circuit is connected to the input terminal of the amplification unit. The first upconversion circuit is used to modulate the first baseband phase signal according to the first positive local oscillator phase signal and the first negative local oscillator phase signal to obtain the first positive radio frequency phase signal and the first negative radio frequency phase signal.

4. The radio frequency quadrature switched capacitor transmitter according to claim 2, characterized in that, The upconversion circuit includes a second upconversion circuit. The input terminal of the second upconversion circuit is used to input the second baseband phase signal, the second positive local oscillator phase signal, and the second negative local oscillator phase signal. The output terminal of the second upconversion circuit is connected to the input terminal of the amplification unit. The second upconversion circuit is used to modulate the second baseband phase signal according to the second positive local oscillator phase signal and the second negative local oscillator phase signal to obtain the second positive radio frequency phase signal and the second negative radio frequency phase signal.

5. The radio frequency quadrature switched capacitor transmitter according to claim 1, characterized in that, The output terminal of the upconversion circuit is connected to the input terminal of the non-overlapping clock signal generation unit, and the output terminal of the non-overlapping clock signal generation unit is connected to the clock input terminal of the amplification unit. The non-overlapping clock signal generation unit is used to convert the radio frequency phase signal to obtain a non-overlapping first positive radio frequency phase signal, a non-overlapping first negative radio frequency phase signal, a non-overlapping second positive radio frequency phase signal, and a non-overlapping second negative radio frequency phase signal.

6. The radio frequency quadrature switched capacitor transmitter according to claim 1, characterized in that, The main power amplifier circuit includes a first switched capacitor array and a second switched capacitor array. The output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the first switched capacitor array. The output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the second switched capacitor array. The output terminals of the first switched capacitor array and the second switched capacitor array are both connected to the input terminal of the output matching circuit. The first switched capacitor array uses the non-overlapping first positive radio frequency phase signal as the clock signal input, and the second switched capacitor array uses the non-overlapping second positive radio frequency phase signal as the clock signal input. The first switched capacitor array and the second switched capacitor array include multiple switched capacitor units, and the number of switched capacitor units turned on is determined by the baseband amplitude signal.

7. The radio frequency quadrature switched capacitor transmitter according to claim 1, characterized in that, The auxiliary power amplifier circuit includes a third switched capacitor array and a fourth switched capacitor array. The output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the third switched capacitor array. The output terminals of the non-overlapping clock signal generation unit and the logic control unit are both connected to the input terminal of the fourth switched capacitor array. The output terminals of the third and fourth switched capacitor arrays are both connected to the input terminal of the output matching circuit. The third switched capacitor array uses the non-overlapping first negative radio frequency phase signal as the clock signal input, and the fourth switched capacitor array uses the non-overlapping second negative radio frequency phase signal as the clock signal input. The third and fourth switched capacitor arrays include multiple switched capacitor units, and the number of switched capacitor units that are turned on is determined by the baseband amplitude signal.

8. A radio frequency quadrature switched capacitor transmitter according to claim 1, characterized in that, The output matching circuit includes a first inductor, a second inductor, and a transformer. One end of the first inductor is connected to the output terminal of the main power amplifier circuit, one end of the second inductor is connected to the output terminal of the auxiliary power amplifier circuit, the other ends of the first inductor and the second inductor are connected to one end of the transformer, and the other end of the transformer is connected to the external antenna. The first inductor, the second inductor, and the transformer are used for impedance matching with the external antenna.

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