Centralized cache allocation method and equipment for time-sensitive network switching chip, and chip

Abstract

The invention discloses a time-sensitive network switching chip centralized cache distribution method, equipment and a chip. The method comprises the following steps: receiving and recording idle cache thresholds and used cache thresholds of different traffic categories; receiving a cache application request at an entrance of the centralized cache of the controlled switching chip; when a cache application request is received, extracting a request traffic category; obtaining a current used cache amount corresponding to the request traffic category, and calculating a current free cache space amount; respectively comparing the size of the current idle cache space and the current used cache amount corresponding to the request flow type with threshold values, and judging whether the cache needs to be allocated or not according to a comparison result; when the cache needs to be allocated, one idle cache address is taken out, and the current idle cache space amount and the corresponding current used cache value are updated. The method can flexibly adapt to centralized caching of different types of traffic sharing time-sensitive network switching chips, and the sharing degree and reliability of the centralized caching are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of time-sensitive networks (TSN), and particularly to a method, device, and chip for centralized buffer allocation of a time-sensitive network switching chip. Background Art

[0002] Time-sensitive networks enhance traditional Ethernet and achieve the planning and scheduling of traffic in the network through time synchronization and traffic shaping mechanisms, thereby providing excellent quality of service assurance. Therefore, they have characteristics such as low latency, low jitter, and high reliability. Time-sensitive networks are particularly prominent technologies in the field of deterministic Ethernet and are gradually being applied to various scenarios such as industrial control networks and vehicle networks.

[0003] In a time-sensitive network switching chip, traffic backlog occurs due to contention for traffic shaping and output interfaces. To reduce traffic packet loss, a storage space is designed in the switching chip to buffer traffic that cannot be sent in a timely manner. Considering performance and complexity, centralized buffering is usually adopted in current switching chips, that is, a storage space with a slightly larger capacity is dedicated to storing all buffered traffic, which is the centralized buffer. Due to cost and power consumption reasons, the size of the centralized buffer is limited, and all traffic needs to contend for the centralized buffer. If the use of the centralized buffer is not controlled, uncertainty will be introduced during the data frame buffering process. And the traffic in time-sensitive networks has certain reliability requirements, and different types of traffic have differences in traffic characteristics and reliability requirements. The centralized buffer allocation strategy in time-sensitive networks optimizes the buffer resources in the network through centralized control to ensure that data can be efficiently transmitted according to requirements such as delay and bandwidth.

[0004] Regarding the centralized buffer allocation in time-sensitive networks, the prior art usually adopts an allocation strategy based on statically specifying buffer addresses or an allocation strategy based on priorities. Among them, the allocation strategy based on statically specifying buffer addresses configures specific storage locations for corresponding types of traffic (such as time-sensitive processes) to avoid buffer contention problems; while the buffer allocation method based on priorities sets different priorities for different types of traffic in time-sensitive networks, and allocates buffer resources according to the priorities of the traffic. Higher-priority traffic is allocated more buffer space to ensure its timely transmission, while lower-priority traffic is allocated less buffer space. However, the storage utilization rate of the above-mentioned allocation strategy based on statically specifying buffer addresses is low, and its flexibility and scalability are poor, and it will also weaken the sharing degree of the centralized buffer. The allocation strategy based on priorities also has problems of poor flexibility and scalability, and is prone to insufficient buffer for low-priority data and waste of buffer resources. At the same time, it is difficult to cope with sudden data traffic changes, and the actual reliability is not high. Summary of the Invention

[0005] The technical problem to be solved by the present invention lies in: aiming at the technical problems existing in the prior art, the present invention provides a method, device and chip for centralized cache allocation of a time-sensitive network switching chip, which has a simple implementation method, strong flexibility and scalability, and high sharing degree and reliability of centralized cache, and can flexibly adapt to different types of traffic to share the centralized cache of the time-sensitive network switching chip, improving the utilization rate and reliability of the centralized cache.

[0006] To solve the above technical problems, the technical solution proposed by the present invention is: A method for centralized cache allocation of a time-sensitive network switching chip, the steps including: Receiving and recording the free cache threshold values and the used cache threshold values of different traffic classes; Receiving a cache application request at the entrance of the centralized cache of the controlled switching chip, wherein the cache application request carries a requested traffic class; When receiving the cache application request, extracting the requested traffic class carried in the cache application request; Obtaining the current used cache amount corresponding to the requested traffic class, and calculating the current free cache space amount in the centralized cache of the controlled switching chip; Respectively comparing the current free cache space size and the current used cache amount corresponding to the requested traffic class with the free cache threshold value and the used cache threshold value corresponding to the requested traffic class, and judging whether to allocate cache according to the comparison result; When it is judged that cache needs to be allocated for the current cache application request, taking out a free cache address in the centralized cache as the allocated cache address for caching the data frame of the request, and updating the current free cache space amount and the current used cache value corresponding to the requested traffic class.

[0007] Further, the step of respectively comparing the current free cache space size and the current used cache amount corresponding to the requested traffic class with the free cache threshold value and the used cache threshold value corresponding to the requested traffic class, and judging whether to allocate cache according to the comparison result includes: judging whether it simultaneously satisfies that the current free cache space size is greater than the free cache threshold value corresponding to the requested traffic class, and the current used cache amount corresponding to the requested traffic class is less than the used cache threshold value corresponding to the requested traffic class. If it is judged that both are satisfied, it is determined that cache needs to be allocated for the requested traffic class corresponding to the current cache application request, otherwise it is determined not to allocate cache.

[0008] Further, a two-round comparison method is adopted to determine whether to allocate cache. In the first round, it is judged whether the currently used cache amount corresponding to the request traffic category is less than the used cache threshold value corresponding to the request traffic category. If so, the second round of judgment is carried out; otherwise, it is determined that no cache is allocated. When carrying out the second round of judgment, it is judged whether the current free cache space size is greater than the free cache threshold value corresponding to the request traffic category. If so, it is determined that cache needs to be allocated; otherwise, it is determined that no cache is allocated.

[0009] Further, it further includes: receiving a cache release request generated when the controlled switching chip finishes sending a data frame. When receiving the cache release request, extracting the released traffic category carried in the cache release request, updating the current free cache space amount, and updating the used cache value of the corresponding category according to the extracted released traffic category. The cache release request is generated when the switching chip releases the cache space of the data frame after sending the data frame.

[0010] Further, when configuring the free cache threshold value, the free cache threshold value corresponding to the corresponding category is determined according to the priority level of the traffic category. By configuring the used cache threshold value, the cache quantity used by the traffic of the category with the upper bound of cache requirement is limited. By configuring the free cache threshold value, the cache quantity used by the traffic without the upper bound of cache requirement is restricted. When configuring the used cache threshold value, by estimating the upper bound of the cache requirement of the category traffic with the upper bound of cache requirement, the corresponding used cache threshold value is configured according to the estimated upper bound of the cache requirement. For the category traffic without the upper bound of cache requirement, the corresponding used cache threshold value is configured as the total cache amount of the centralized cache.

[0011] Further, the traffic categories include time-sensitive traffic, audio-video traffic, high-priority best-effort traffic, and best-effort traffic. The best-effort traffic is ordinary traffic without priority requirements or quality-of-service requirements. The high-priority best-effort traffic is best-effort traffic with high priority. Among them, the free cache threshold value TL_L[ST] of the time-sensitive traffic is configured as r 1 D, the free cache threshold value TL_L[AVB] of the audio-video traffic is set to r 2 D, the free cache threshold value TL_L[HBE] of the high-priority best-effort traffic is set to r 3 D, the free cache threshold value TL_L[BE] of the best-effort traffic is set to r 4 D, where D represents the total cache amount of the centralized cache, r 1 <r 2 <r 3 <r 4 。

[0012] A cache allocation device for implementing the above-mentioned centralized cache allocation method of the time-sensitive network switching chip includes: A threshold recording module, configured to receive and record the idle buffer threshold values and the used buffer threshold values of different traffic classes; A used buffer counting module, configured to count the used buffer amounts of different traffic classes, and respectively provide the count values to an idle buffer space calculation module and an allocated buffer control module; An idle buffer space calculation module, configured to calculate the current idle buffer space amount in the centralized buffer of the controlled switching chip according to the used buffer amounts of different traffic classes; A buffer allocation control module, when receiving a buffer application request, is configured to respectively compare the current idle buffer space size and the current used buffer amount corresponding to the requested traffic class with the idle buffer threshold value and the used buffer threshold value corresponding to the requested traffic class, and determine whether to allocate a buffer according to the comparison result; when it is determined that a buffer needs to be allocated for the current buffer application request, generate an allocated buffer signal to control taking out an idle buffer address in the centralized buffer as the allocated buffer address, and feedback an allocated buffer success signal to an update control module; An update control module, configured to update the current idle buffer space amount and the current used buffer value corresponding to the requested traffic class according to the received allocated buffer success signal.

[0013] Further, the buffer allocation control module is further configured to receive a buffer release request, and update the used buffer count value corresponding to the released process class when receiving the buffer release request.

[0014] Further, it further includes an idle buffer address pool module, configured to record the addresses of the current idle buffer space in the centralized buffer, and receive the released buffer addresses to add them to the idle buffer address pool. If receiving the allocated buffer signal from the buffer allocation control module, take out an idle buffer address for buffer allocation and output it, and delete the corresponding address from the idle buffer address pool. The released buffer address is output by the controlled switching chip when releasing the buffer after outputting the data frame, simultaneously with the buffer release request.

[0015] An electronic device, including a processor and a memory, where the memory is used to store a computer program, and the processor is used to execute the computer program to execute the method as described above.

[0016] A time-sensitive network switching chip, including a switching chip, and further including the buffer allocation device as described above connected to the switching chip.

[0017] Compared with the prior art, the beneficial effects of the present invention are as follows: By setting two threshold values, namely the idle cache threshold value and the used cache threshold value, for different traffic categories respectively, at the entrance of the centralized cache, the application cache request is received, the traffic category in the application cache request is obtained, and the discrimination of both the idle cache and the used cache is performed in combination with the threshold values of the current traffic category to determine whether to allocate cache, so as to flexibly control whether to allocate cache to the data frame applying for cache before the data frame enters the centralized cache. By setting the threshold values of different traffic categories, different priorities can be flexibly set for different traffic categories, improving the flexibility and scalability of cache allocation. At the same time, by combining the judgments of both the idle cache and the used cache to comprehensively judge whether to allocate memory, the use of the centralized cache by different types of traffic can be restricted, the contention problem of traffic with different reliability requirements for the centralized cache can be solved, and the sharing degree of the centralized cache can be improved, minimizing the waste of forwarding pipeline processing resources as much as possible. Thus, a centralized cache allocation control with a high sharing degree, high reliability and elimination of waste of logical processing resources can be flexibly realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a schematic flowchart of the implementation process of the centralized cache allocation method for the time-sensitive network switching chip in this embodiment.

[0019] Figure 2 is a schematic structural diagram of the cache allocation device in this embodiment.

[0020] Figure 3 is a schematic flowchart of the process of performing used cache counting in this embodiment.

[0021] Figure 4 is a schematic flowchart of the process of performing cache allocation control in this embodiment.

[0022] Figure 5 is a schematic flowchart of the process of controlling the cache allocation enable in this embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] The present invention will be further described below in conjunction with the accompanying drawings of the specification and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0024] As disclosed in the present invention, unless the context clearly indicates otherwise, words such as "a", "an", "one", and / or "the" are not specifically singular and may also include the plural. The terms "first", "second", and similar terms used in the disclosure of the present invention do not denote any order, quantity, or importance, but are merely used to distinguish different components. Similarly, words such as "comprising" or "including" mean that the elements or items appearing before the word cover the elements or items listed after the word and their equivalents, without excluding other elements or items. The terms "connected" or "coupled" and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0025] For ease of understanding, first, the relevant technical background related to the present invention will be introduced by way of example.

[0026] In time-sensitive networks, traffic can generally be classified into time-sensitive traffic, audio-visual traffic, high-priority best-effort traffic, and low-priority best-effort traffic in descending order of reliability requirements. Among them, best-effort traffic is ordinary traffic without priority requirements or quality-of-service requirements, and high-priority best-effort traffic is best-effort traffic with high priority. When exchanging traffic with higher reliability requirements, such as time-sensitive traffic and audio-visual traffic, the uncertainty introduced during the caching process is usually intolerable.

[0027] Taking the above-mentioned types of traffic as examples, in order to solve the problem of contention for the centralized cache between time-sensitive traffic and best-effort traffic, the following two main centralized cache allocation strategies are adopted in the prior art: One is the allocation strategy based on statically specifying cache addresses. It takes the cache location of time-sensitive traffic as the problem to be solved by scheduling, and obtains the cache space for time-sensitive traffic through scheduling. The specific storage location of time-sensitive traffic is specified in the switching chip, and the remaining space is used by best-effort traffic. Since the scheduling is executed offline, it is a method of statically specifying the cache address of time-sensitive traffic. However, the allocation strategy based on statically specifying cache addresses, because it needs to rely on traffic scheduling as the cache allocation strategy, has a relatively high storage utilization rate, but the cache allocation control on the switching chip is relatively simple, and it can only support the control of specifying the cache address of specific traffic, and needs to be coupled with traffic scheduling, resulting in poor flexibility and scalability. In addition, due to the statically specified cache space, the cache space allocated to different traffic can only be used by the specified traffic, which also weakens the sharing degree of the centralized cache.

[0028] Second, it is an allocation strategy based on high-priority preemption. The core idea of this type of preemptive strategy is that when there is free cache space, time-sensitive traffic and best-effort traffic can enter the centralized cache arbitrarily. However, when the free cache space is insufficient, best-effort traffic cannot enter the centralized cache, and time-sensitive traffic can overwrite the cache space of best-effort traffic that has entered but not been sent yet. However, this type of high-priority preemption allocation strategy requires time-sensitive traffic to preempt the cached best-effort traffic when the cache is insufficient. In a switching chip, a parallel method of cache and forwarding pipeline is usually adopted. Although preempting the cache of best-effort data frames can improve the utilization rate of cache space, the preempted data frames will enter the forwarding pipeline, resulting in waste of forwarding pipeline processing resources.

[0029] In addition, the above two allocation strategies can only consider the cache of two traffic types, namely time-sensitive traffic and best-effort traffic. In an actual network, there are usually other traffic types such as audio and video traffic. Audio and video traffic often has a certain degree of burstiness and also has relatively high reliability requirements. The existing centralized cache allocation strategies in the prior art cannot flexibly cope with such bursty traffic changes and are difficult to meet the high-reliability requirements.

[0030] The present invention first sets two threshold values, namely a free cache threshold value and an occupied cache threshold value, for different traffic categories respectively. At the entrance of the centralized cache, by receiving a cache application request and obtaining the traffic category in the cache application request, the current free cache space amount and the current occupied cache amount of the corresponding traffic category are obtained accordingly. By combining the threshold values of the current traffic category, a determination is made on both the free cache and the occupied cache to determine whether to allocate cache, so as to flexibly control whether to allocate cache to the data frames applying for cache before the data frames enter the centralized cache. By setting the threshold values of different traffic categories, different priorities can be flexibly set for different traffic categories, achieving the effect of preferentially allocating cache to high-priority traffic. At the same time, the flexibility and scalability of cache allocation are improved. At the same time, by combining the judgments of both the free cache and the occupied cache to comprehensively determine whether to allocate memory, the use of the centralized cache by different types of traffic can be restricted, the cache space allocation of multiple types of traffic can be controlled simultaneously, the contention problem of traffic with different reliability requirements for the centralized cache can be solved, and the sharing degree of the centralized cache can be improved, and the waste of forwarding pipeline processing resources can be reduced as much as possible. Thus, a centralized cache allocation control with high sharing degree, high reliability and elimination of waste of logical processing resources can be flexibly realized.

[0031] The present invention will be further described below in conjunction with specific embodiments.

[0032] As Figure 1 shown, the steps of the centralized cache allocation method for a time-sensitive network switching chip in this embodiment include: Step S01. Receive and record the idle cache threshold values and used cache threshold values for different traffic categories.

[0033] In this embodiment, the traffic in the time-sensitive network is divided into four categories: the traffic categories include but are not limited to time-sensitive traffic (ST traffic), audio-video traffic (AVB traffic), high-priority best-effort traffic (HBE traffic), and best-effort traffic (BE traffic). The characteristics of each category are as follows: (1) Time-sensitive traffic, which is traffic that has undergone time-aware shaping and has high requirements for latency, jitter, and determinism; (2) Audio-video traffic, which usually needs to undergo credit-based shaping and has bandwidth requirements and burstiness; (3) High-priority best-effort traffic, whose traffic category is best-effort traffic but has a higher priority. The time synchronization messages in the time-sensitive network are this type of traffic and have a certain degree of reliability requirements; (4) Best-effort traffic, whose traffic category is best-effort traffic and has a lower priority.

[0034] Assume that the size of the centralized cache is S. Two threshold values are set for the above four types of traffic according to the reliability requirements and traffic characteristics for the subsequent judgment of whether to allow caching to be allocated to the corresponding traffic categories. One group is the idle cache threshold value, that is, the threshold based on the number of idle spaces in the centralized cache, and the other group is the used cache threshold value, that is, the threshold based on the used cache quantity of different traffic categories. Specifically, the threshold record includes the threshold values of time-sensitive traffic (ST), audio-video traffic (AVB), high-priority best-effort traffic (HBE), and best-effort traffic (BE). Optionally, the threshold values of each traffic category can be configured externally to provide an implementation interface for the cache allocation policy, and each group of thresholds can be organized in the form of a threshold record.

[0035] In a specific application embodiment, the storage unit size of the centralized cache is specifically 2KB (configurable), that is, each storage unit can store one data frame. Therefore, the value of the used cache count increases and decreases by 1.

[0036] The idle cache threshold values for each traffic category can be configured according to the priorities of each traffic category in a hierarchical manner. The idle cache threshold value corresponding to the traffic category with a higher priority is smaller, and the idle cache threshold value corresponding to the traffic category with a lower priority is larger. This enables the cache to be preferentially allocated to the traffic category with a higher priority while also ensuring that other traffic categories with lower priorities can be flexibly allocated a certain amount of cache when the idle cache is sufficient, effectively improving the sharing degree of the centralized cache. As a preferred implementation, the idle cache threshold values for each traffic category can be set according to the following rules: The idle cache threshold value TL_L[ST] for time-sensitive traffic is configured as r 1 D, the idle cache threshold value TL_L[AVB] for audio and video traffic is set as r 2 D, the idle cache threshold value TL_L[HBE] for high-priority best-effort traffic is set as r 3 D, the idle cache threshold value TL_L[BE] for best-effort traffic is set as r 4 D, where D represents the total cache capacity of the centralized cache, r 1 <r 2 <r 3 <r 4 . For example, the idle cache threshold value TL_L[ST] for time-sensitive traffic is configured as 0, the idle cache threshold value TL_L[AVB] for audio and video traffic is set as (1 / 4)D, the idle cache threshold value TL_L[HBE] for high-priority best-effort traffic is set as (1 / 2)D, and the idle cache threshold value TL_L[BE] for best-effort traffic is set as (3 / 4)D. D represents the total cache capacity of the centralized cache, and the specific value can be taken as the sum of the used cache count values of all types of traffic when the centralized cache is full. By configuring in the above manner, when the occupancy rate of the centralized cache is lower than 1 / 4, all four types of traffic can share the centralized cache. When the occupancy rate of the centralized cache is higher than 1 / 4, three types of traffic except for the low-priority best-effort traffic can share the centralized cache. When the occupancy rate of the centralized cache reaches half, the audio and video traffic and the time-sensitive traffic can share the centralized cache.

[0037] In this embodiment, the used cache threshold value is configured to limit the specific cache quantity that a certain type of traffic can use, which can be specifically used to limit the traffic for which the upper bound of the cache requirement can be clearly calculated, such as ST and AVB traffic. The idle cache threshold value is configured to limit the traffic with unclear cache requirements, such as BE and HBE traffic. When configuring the used cache threshold value, the upper bound of the cache requirement for the category traffic with a clear upper bound of the cache requirement can be estimated, and the corresponding used cache threshold value can be configured according to the estimated upper bound of the cache requirement. For the category traffic without a clear upper bound of the cache requirement, the corresponding used cache threshold value is configured as the total cache capacity of the centralized cache, which means that it is not restricted by the used cache threshold value but is restricted by the idle cache threshold value.

[0038] For example, if the ST and AVB streams have clear upper bounds on buffer requirements, the upper bounds on the buffer requirements of the ST and AVB streams can be estimated. Assume that the estimated upper bounds on the buffer requirements of the ST and AVB streams are (1 / 4)D and (1 / 2)D respectively. Then, the used buffer threshold TL_U[ST] of the ST stream can be configured accordingly as (1 / 4)D, and the used buffer threshold TL_U[AVB] of the AVB stream can be configured as (1 / 2)D. The used buffer thresholds of the BE and HBE traffic are configured as the total buffer size D of the centralized buffer, that is, TL_U[BE]=D, TL_U[HBE]=D, so that the ST stream can use at most 1 / 4 of the total buffer size, the AVB stream can use at most 1 / 2 of the total buffer size, and the BE and HBE can use up the centralized buffer. In the hardware, a buffer management interface is reserved to implement the configuration of specific thresholds for the upper-layer buffer allocation algorithm.

[0039] It can be understood that the thresholds of each traffic class can of course also be configured in other more flexible ways according to actual needs. The traffic classes include but are not limited to the above-mentioned time-sensitive traffic (ST stream), audio-visual traffic (AVB stream), high-priority best-effort traffic (HBE stream), and best-effort traffic (BE stream). In actual applications, the thresholds of other traffic classes can also be flexibly configured by increasing the length of the threshold record to support the buffer allocation control of more traffic types.

[0040] Step S02. Receive a buffer application request at the entrance of the centralized buffer of the controlled switching chip. The buffer application request carries the requested traffic class.

[0041] When a data frame needs to enter the centralized buffer of the controlled switching chip, a buffer application request will be generated before entering. The buffer application request includes the requested traffic class, that is, the class of the data frame that needs to be buffered, which is also the traffic class. It can be understood that in addition to the traffic class, the buffer application request can also include other types of information related to the required buffered traffic according to actual needs, such as the required buffer amount, etc.

[0042] Step S03. When receiving the buffer application request, extract the requested traffic class carried in the buffer application request.

[0043] After receiving the buffer application request, extract the traffic class information from the buffer application request, so that the current free buffer space and the used buffer amount can be judged doubly according to the traffic class subsequently.

[0044] Step S04. Obtain the currently used buffer amount corresponding to the requested traffic class, and calculate the current free buffer space amount in the centralized buffer of the controlled switching chip.

[0045] Specifically, the current cache space LEF can be calculated based on the total cache capacity S of the centralized cache and the cache capacity already used by each current process category. For example, the used cache count values of four traffic types, i.e., time-sensitive traffic (ST flow), audio-visual traffic (AVB flow), high-priority best-effort traffic (HBE flow), and best-effort traffic (BE flow), namely ST used cache, AVB used cache, HBE used cache, and BE used cache, can be obtained. According to the formula: free cache space LEF = S - ST used cache - AVB used cache - HBE used cache - BE used cache, the current free cache space LEF can be calculated.

[0046] Step S05. Compare the current size of the free cache space and the currently used cache amount corresponding to the requested traffic category with the free cache threshold value and the used cache threshold value corresponding to the requested traffic category respectively, and determine whether to allocate cache according to the comparison results.

[0047] In this embodiment, comparing the current size of the free cache space and the currently used cache amount corresponding to the requested traffic category with the free cache threshold value and the used cache threshold value corresponding to the requested traffic category respectively, and determining whether to allocate cache according to the comparison results includes: determining whether both the current size of the free cache space is greater than the free cache threshold value corresponding to the requested traffic category and the currently used cache amount corresponding to the requested traffic category is less than the used cache threshold value corresponding to the requested traffic category. If it is determined that both are satisfied, it is determined that cache needs to be allocated for the requested traffic category corresponding to the current cache application request; otherwise, it is determined not to allocate cache. That is, by comprehensively making a dual judgment on the current size of the free cache space and the currently used cache amount corresponding to the requested traffic category through the threshold values of different traffic categories, it is determined whether to allow cache to be allocated for the current traffic category. Cache allocation is only allowed when both the free cache space and the used cache of the current traffic category meet the conditions, which can not only ensure the flexibility and reliability of cache allocation, but also improve the sharing degree and resource utilization rate of the centralized cache.

[0048] Preferably, a two-round comparison method can be used to determine whether to allocate cache. In the first round, it is determined whether the currently used cache amount corresponding to the requested traffic category is less than the used cache threshold value corresponding to the requested traffic category. If so, the second round of judgment is carried out; otherwise, it is determined not to allocate cache. When carrying out the second round of judgment, it is determined whether the current size of the free cache space is greater than the free cache threshold value corresponding to the requested traffic category. If so, it is determined that cache needs to be allocated; otherwise, it is determined not to allocate cache.

[0049] For example, when adopting a two-round comparison method, in the first round, the used cache quantities of different types of traffic and the thresholds based on the used cache quantities are compared. If the comparison result shows that the used cache quantity is less than the threshold value, the first-round comparison passes; in the second round, the thresholds based on the free cache space quantities of different types of traffic and the current free cache space quantity are compared. If the comparison result shows that the free cache space quantity is greater than the threshold value, the second-round comparison passes; if both rounds of comparisons pass, the corresponding traffic class allocation enable is output as valid, otherwise the corresponding traffic class allocation enable is output as invalid.

[0050] Step S06. When it is judged that a cache needs to be allocated for the current cache request, a free cache address in the centralized cache is taken out as the allocated cache address for caching the data frame of the cache request, and the current free cache space amount and the current used cache value corresponding to the requested traffic class are updated.

[0051] The cache release request is specifically generated by the switching chip when it releases the cache space of the data frame after sending the data frame. The cache release request also includes traffic class information. When the cache release request is received, the current free cache space amount and the current used cache value corresponding to the released request traffic class are updated accordingly.

[0052] This embodiment further includes step S07: receiving the cache release request generated when the controlled switching chip finishes sending the data frame, extracting the released traffic class carried in the cache release request when the cache release request is received, updating the current free cache space amount and updating the used cache value of the corresponding class according to the extracted released traffic class. The cache release request is generated by the switching chip when it releases the cache space of the data frame after sending the data frame.

[0053] As Figure 2 shown, the cache allocation device for implementing the above-mentioned centralized cache allocation method of the time-sensitive network switching chip in this embodiment includes: A threshold recording module, configured to receive and record the free cache thresholds and used cache thresholds of different traffic classes; A used cache counting module, configured to count the used cache quantities of different traffic classes and respectively provide the count values to the free cache space calculation module and the allocated cache control module; A free cache space calculation module, configured to calculate the current free cache space amount in the centralized cache of the controlled switching chip according to the used cache quantities of different traffic classes; The cache allocation control module is used to, when receiving a cache application request, compare the current size of the free cache space and the current used cache amount corresponding to the request traffic category with the free cache threshold value and the used cache threshold value corresponding to the request traffic category respectively, and determine whether to allocate cache according to the comparison result; when it is determined that cache needs to be allocated for the current cache application request, generate an allocation cache signal to control taking out an idle cache address in the centralized cache as the allocated cache address, and feedback a cache allocation success signal to the update control module; The update control module is used to update the current free cache space amount and the current used cache value corresponding to the request traffic category according to the received cache allocation success signal.

[0054] The above-mentioned free cache space calculation module and update control module are not shown. In a specific application embodiment, the above functions can be integrally implemented through the cache allocation control module, that is, the free cache space calculation, cache allocation control, and update control functions are implemented through the cache allocation control module, and can be specifically configured according to actual requirements. The cache allocation control module is also used to receive a cache release request, and update the used cache count value corresponding to the released process category when receiving the cache release request.

[0055] After constructing the above cache allocation device, the centralized cache allocation control is completed by each module working together. At the entrance of the centralized cache, it is controlled whether to allocate cache to the data frame applying for cache. In the threshold record module, two groups of thresholds based on the number of free spaces in the centralized cache and the used cache amounts of different category traffic are set for different traffic categories. The used cache counting module counts the used cache amounts of different traffic categories, the free cache space calculation module calculates the current number of free cache spaces, and the cache allocation control module controls whether to allocate a cache address to the specified category of traffic according to the two groups of thresholds, which can limit the use of the centralized cache by different types of traffic, provide guarantee for different types of traffic to share the centralized cache, further support the switching chip to meet the reliability requirements of different category traffic for switching, and solve the contention problem of different reliability requirement traffic for the centralized cache.

[0056] In a specific application embodiment, the data received by the cache allocation device specifically includes: (1) external configuration of the threshold value and the size of the centralized cache; (2) a cache application request, and the cache application request includes the category of the data frame; (3) a cache release request, which is generated when the switching chip releases the cache space of the data frame after sending the data frame, and the cache release request contains the category of the data frame; (4) a cache release address, which is the address of the released cache space and is generated together with the cache release signal. The output data of the cache allocation device is the allocated cache address, and the switching chip can write the data frame to this address of the centralized cache to cache the data frame.

[0057] In a specific application embodiment, the used cache counting module can be configured to count the number of different types of traffic using the centralized cache space, and provide the count values to the free cache space calculation module and the cache allocation control module respectively. When a cache release request is received, the cache release request includes the traffic type, and when the cache release request is received, the used cache count value of the corresponding type is controlled to decrease. The specific amount of decrease in the count value is related to the number of cache units occupied by the data frame and can be determined according to the configuration of the centralized cache. When a cache application request is received, the cache application request includes the traffic type, and a signal indicating whether to allocate cache sent by the cache allocation control is received. If cache is allocated, the used cache count value of the corresponding traffic type increases; otherwise, the count value remains unchanged. Similarly, the specific amount of increase in the count value is related to the number of cache units occupied by the data frame and can be determined according to the configuration of the centralized cache.

[0058] In a specific application embodiment, first, the free cache space calculation module obtains the used cache quantities of different traffic types from the used cache counting module and calculates the free cache space quantity. The cache allocation control module performs two rounds of comparison based on two sets of threshold values to control whether to allow cache allocation for the corresponding type of traffic. In the first round, the used cache quantity of different types of traffic and the threshold based on the used cache quantity are compared. If the comparison result shows that the used cache quantity is less than the threshold value, the first round of comparison passes. In the second round, the threshold based on the free cache space quantity of different types of traffic and the current free cache space quantity are compared. If the comparison result shows that the free cache space quantity is greater than the threshold value, the second round of comparison passes. If both rounds of comparison pass, the allocation enable for the corresponding traffic type is output as valid; otherwise, the allocation enable for the corresponding traffic type is output as invalid.

[0059] In this embodiment, a free cache address pool module is further included, which is used to record the addresses of the current free cache space in the centralized cache, and receive the cache release address to add it to the free cache address pool. If an cache allocation signal from the cache allocation control module is received, a free cache address is taken out for cache allocation and output, and the corresponding address is deleted from the free cache address pool. The cache release address is output by the controlled switching chip simultaneously with the cache release request when the data frame is output and the cache is released.

[0060] Specifically, the idle cache address pool module receives the cache allocation signal from the cache allocation control module, and determines whether to take out and output an idle cache address according to the cache allocation signal. If the cache allocation signal is for cache allocation, it takes out an idle cache address for output, and deletes the corresponding address from the idle cache address pool after output; if the cache allocation signal is for non-allocation, no processing is performed. The cache allocation control module determines whether the allocation enable signal of the traffic category of the cache application request is valid. If it is valid, it outputs an allocation control signal to the idle cache address pool module to determine whether to allocate a cache address, and the used cache count sub-module is used to update the count value of the corresponding traffic category. At the same time, it outputs a signal indicating successful application to the external module that needs to obtain information on whether the application is successful. Otherwise, it outputs a non-allocation control signal to the idle cache address pool module and the used cache count sub-module.

[0061] In a specific application embodiment, as Figure 3 shown, the detailed process of the used cache counting model for performing used cache counting is as follows: Step Sa1: Determine whether initialization has been completed. If it has not been initialized, initialize the used cache count values CNT[ST], CNT[AVB], CNT[HBE], and CNT[BE] of all traffic categories to 0. CNT[ST], CNT[AVB], CNT[HBE], and CNT[BE] are the used cache count values of the four traffic categories respectively. If it has been initialized, continue to step Sa2; Step Sa2: Determine whether there is a cache release request. If there is a cache release request, the used cache count value of the corresponding traffic category T of the cache release request is decreased by CNT[T]=CNT[T] - 1; otherwise, the used cache count value remains unchanged; Step Sa3: Determine whether there is a cache allocation signal. If there is a cache allocation signal, the used cache count value of the corresponding traffic category T of the cache application request is increased by CNT[T]=CNT[T]+1; otherwise, the used cache count value remains unchanged.

[0062] In a specific application embodiment, as Figure 4 shown, the specific process of implementing cache allocation control in this embodiment includes: Step Sb1. Determine whether initialization has been completed. If it has not been initialized, first enter the initialization process of step Sb2. If it has been initialized, execute step Sb3; Step Sb2. Receive the external threshold configuration TL and the centralized cache length S, and write the threshold based on the number of free spaces in the centralized cache and the threshold based on the used cache quantities of different traffic categories into the threshold record module, including the threshold value TL_L based on the free cache and the threshold value TL_U based on the used cache for the four traffic categories; Step Sb3. The cache allocation control module obtains the used cache count values of different traffic classes from the used cache count module, and calculates the free cache space LEF = S - ST_used_cache - AVB_used_cache - HBE_used_cache - BE_used_cache; successively compare the used cache count of each traffic type T with the threshold value TL_U[T] based on the used cache, and the size relationship between the free cache space LEF and the threshold value TL_L[T] based on the free cache. If the comparison result is that the used cache quantity is less than the threshold value, the comparison passes, that is, T_used_cache < TL_U[T], and transfer to Step Sb4. Otherwise, output that the allocation enable of the corresponding traffic class is invalid; Step Sb4. Compare the threshold based on the free cache space quantity of different types of traffic with the current free cache space quantity. If the comparison result is that the free cache space quantity is greater than the threshold value, that is, LEF > TL_L[T], the comparison passes, output that the allocation enable of the corresponding traffic class is valid, otherwise output that the allocation enable of the corresponding traffic class is invalid.

[0063] Further control the cache allocation by generating an enable control signal for cache allocation, such as Figure 5 shown, the specific process is as follows: Step Sc1. Determine whether there is a cache application request. If so, obtain the data frame category, Step Sc2. If not, continue to determine whether there is a cache application request; Step Sc2. Obtain the allocation enable signal of the corresponding traffic class in the cache application request. If the allocation enable signal of the corresponding traffic class is valid, output an allocation control signal, otherwise output a non-allocation control signal.

[0064] The above processes of used cache counting and cache allocation control are executed cyclically when the cache allocation device is working. Before the data frame enters the centralized cache, it needs to apply for cache space from the cache allocator first, and control whether to allocate the cache address through the threshold to achieve the allocation of the centralized cache. The threshold values are set according to the reliability requirements of the data frame. For example, the threshold based on the free cache space can be set as TL_L[ST] = 0, TL_L[AVB] = (1 / 4)D, TL_L[HBE] = (1 / 2)D, TL_L[BE] = (3 / 4)D in descending order of reliability, so that when the occupancy rate of the centralized cache is lower than 1 / 4, all four types of traffic can share the centralized cache; when the occupancy rate of the centralized cache is higher than 1 / 4, three types of traffic except the low-priority best-effort traffic can share the centralized cache. When the occupancy rate of the centralized cache reaches half, the audio-visual traffic and time-sensitive traffic can share the centralized cache. When the occupancy rate of the centralized cache reaches 3 / 4, only the time-sensitive traffic is allowed to enter the centralized cache.

[0065] The present invention uses the above method to implement the allocation control of the centralized cache of the time-sensitive network switching chip. The entire control process is simple, requiring fewer logic resources and storage resources. The complexity of the entire control process only comes from the threshold comparison, and the complexity only depends on the number of traffic classes. Therefore, the complexity is O(n). The storage resource overhead only comes from the recording of the threshold value and the used cache count. Then the storage overhead of the threshold value and the used cache counter is 3*n values with the maximum value being the number of centralized cache storage units, where n is the number of traffic classes. Taking the centralized cache size of 4MB and the storage unit size of 2KB as an example, there are 4 types of traffic. The 4MB space has a total of 2^11 storage units of 2KB size, and a 11-bit counter is required. Then the storage overhead of the threshold value and the used cache counter only needs (3*4)*11 = 132 bits.

[0066] Meanwhile, the present invention uses the above cache allocation method, which can flexibly support the allocation of caches for multiple traffic classes, and can improve the sharing degree of the centralized cache. The threshold values of various traffic classes can be set based on the remaining space of the centralized cache. When the cache space occupancy rate is low, low-reliability traffic and high-reliability traffic can share the cache space. When the cache space occupancy rate is high, it can ensure that the high-reliability traffic has cache available to meet the cache requirements of the high-reliability traffic.

[0067] This embodiment further provides an electronic device, including a processor and a memory. The memory is used to store a computer program, and the processor is used to execute the computer program to execute the method as described above.

[0068] The time-sensitive network switching chip of this embodiment includes a switching chip, and further includes the above cache allocation device or the electronic device connected to the switching chip.

[0069] Those skilled in the art should understand that the above embodiments of the present invention can be provided as a method, a system, or a computer program product. Therefore, the present invention can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention can take the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code. The present invention is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to the embodiments of the present invention. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be realized by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing devices generate means for realizing the functions specified in the process Figure 1 one process or multiple processes and / or blocks Figure 1 These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including instruction means that realizes the functions specified in the process Figure 1 one process or multiple processes and / or blocks Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable device provide steps for realizing the functions specified in the process Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0070] The above are only the preferred embodiments of the present invention and do not impose any form of limitation on the present invention. Although the present invention has been disclosed above with the preferred embodiments, it is not intended to limit the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the technical solution of the present invention shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A method for allocating centralized cache in a time-sensitive network switching chip, characterized in that the steps include: Receive and record free buffer threshold values ​​and used buffer threshold values ​​of different traffic categories; receiving a cache application request at an entrance of a centralized cache of a controlled switching chip, wherein the cache application request carries a requested traffic category; When receiving the application cache request, extracting the request traffic category carried in the application cache request; Obtaining the currently used cache amount corresponding to the requested traffic category, and calculating the current free cache space amount in the centralized cache of the controlled switching chip; Compare the current free cache space size and the current used cache amount corresponding to the request traffic category with the free cache threshold value and the used cache threshold value corresponding to the request traffic category, and determine whether cache allocation is required based on the comparison results; When it is determined that cache needs to be allocated for the current cache request, a free cache address in the centralized cache is taken out as the allocated cache address for caching the requested data frame, and the current free cache space amount and the current used cache value corresponding to the requested traffic category are updated.

2. The method for centralized cache allocation in a time-sensitive network switching chip according to claim 1, characterized in that: The current free cache space size and the current used cache amount corresponding to the request traffic category are compared with the free cache threshold value and the used cache threshold value corresponding to the request traffic category respectively, and whether cache needs to be allocated is determined based on the comparison result, including: determining whether the current free cache space size is greater than the free cache threshold value corresponding to the request traffic category, and the current used cache amount corresponding to the request traffic category is less than the used cache threshold value corresponding to the request traffic category. If it is determined that both conditions are met, it is determined that cache needs to be allocated for the request traffic category corresponding to the current cache request, otherwise it is determined that cache is not allocated.

3. The method for centralized cache allocation in a time-sensitive network switching chip according to claim 2, characterized in that: A two-round comparison method is used to determine whether cache allocation is needed. In the first round, if the current used cache amount corresponding to the requested traffic category is less than the used cache threshold value corresponding to the requested traffic category, a second round of judgment is performed. Otherwise, it is determined that cache is not allocated. During the second round of judgment, it is determined whether the current free cache space size is greater than the free cache threshold value corresponding to the requested traffic category. If so, cache is determined to be allocated, otherwise, cache is not allocated.

4. The method for centralized cache allocation in a time-sensitive network switching chip according to claim 1, characterized in that: Also includes: Receive a cache release request generated when the controlled switching chip sends a data frame. When the cache release request is received, extract the release traffic category carried in the cache release request, update the current free cache space amount and update the used cache value of the corresponding category according to the extracted release traffic category. The cache release request is generated by the switching chip when releasing the cache space of the data frame after sending the data frame.

5. The method for centralized cache allocation in a time-sensitive network switching chip according to any one of claims 1 to 4, characterized in that: It also includes configuring the idle cache threshold value, determining the idle cache threshold value of the corresponding category according to the priority level of the traffic category, limiting the amount of cache used by traffic of the category with an upper limit of cache requirement by configuring the used cache threshold value, limiting the amount of cache used by traffic of the category without an upper limit of cache requirement by configuring the idle cache threshold value, and configuring the used cache threshold value by estimating the upper limit of cache requirement for traffic of the category with an upper limit of cache requirement, configuring the corresponding used cache threshold value according to the estimated upper limit of cache requirement, and for traffic of the category without an upper limit of cache requirement, configuring the corresponding used cache threshold value as the total cache amount of the centralized cache.

6. The method for centralized cache allocation in a time-sensitive network switching chip according to claim 5, characterized in that: Traffic categories include time-sensitive traffic, audio and video traffic, high-priority best-effort traffic and best-effort traffic, wherein the best-effort traffic is ordinary traffic without priority requirements or service quality requirements, and the high-priority best-effort traffic is best-effort traffic with high priority, wherein the idle buffer threshold value TL_L[ST] of the time-sensitive traffic is configured as r1D, the idle buffer threshold value TL_L[AVB] of the audio and video traffic is set to r2D, the idle buffer threshold value TL_L[HBE] of the high-priority best-effort traffic is set to r3D, and the idle buffer threshold value TL_L[BE] of the best-effort traffic is set to r4D, where D represents the total buffer capacity of the centralized buffer, r1< r2< r3< r4.

7. A time-sensitive network switching chip centralized cache allocation device, characterized in that: include: A threshold recording module, used to receive and record free buffer threshold values ​​and used buffer threshold values ​​of different traffic categories; A used cache counting module is used to count the used cache amounts of different traffic categories and provide the count values ​​to the free cache space calculation module and the allocated cache control module respectively; A free cache space calculation module, used to calculate the current free cache space amount in the centralized cache of the controlled switching chip according to the used cache amount of different traffic categories; The cache allocation control module is used to compare the current free cache space size and the current used cache amount corresponding to the requested traffic category with the free cache threshold value and the used cache threshold value corresponding to the requested traffic category respectively when receiving a cache application request, and determine whether cache allocation is required according to the comparison result; When it is determined that a cache needs to be allocated for the current cache request, a cache allocation signal is generated to control the fetching of an idle cache address in the centralized cache as the allocated cache address, and a cache allocation success signal is fed back to the update control module; The update control module is used to update the current free cache space amount and the current used cache value corresponding to the request traffic category according to the received cache allocation success signal.

8. The centralized cache allocation device for a time-sensitive network switching chip according to claim 7, characterized in that: It also includes an idle cache address pool module, which is used to record the address of the current idle cache space in the centralized cache, and receive the released cache address to add it to the idle cache address pool. If an allocation cache signal is received from the cache allocation control module, a idle cache address is taken out for the allocation cache and the corresponding address is deleted from the idle cache address pool. The released cache address is output by the controlled switching chip at the same time as the release cache request when the data frame is released.

9. An electronic device comprising a processor and a memory, wherein the memory is used to store a computer program, wherein: The processor is configured to execute the computer program to execute the method for allocating centralized cache in a time-sensitive network switching chip according to any one of claims 1 to 6.

10. A time-sensitive network switching chip, comprising a switching chip, characterized in that: It also includes a time-sensitive network switch chip centralized cache allocation device as described in claim 7 or 8 connected to the switch chip.

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