Time-Sensitive Network Switch Chip Central Cache Allocation Method, Device, and Chip
By setting idle and used cache thresholds in time-sensitive network switching chips and judging cache allocation strategies in combination with traffic categories, the problem of low cache resource waste and sharing in the existing technology is solved, and flexible and efficient cache management is achieved.
Patent Information
- Application Number
- CN202510535359.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-27
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2045-04-27
AI Technical Summary
The existing centralized cache allocation strategy of time-sensitive network switching chips has poor flexibility and scalability, which makes it difficult to cope with the reliability requirements of different types of traffic, resulting in the problem of waste and low degree of sharing of cache resources.
Using a combination strategy of idle cache threshold value and used cache threshold value, we obtain traffic categories by receiving requests for cache, and make double judgments based on the current idle and used cache amounts, flexibly control cache allocation, and ensure the priority and reliability requirements of different traffic categories.
It improves the flexibility and scalability of cache allocation, improves the sharing of centralized caches, reduces resource waste, and meets the reliability needs of different types of traffic.
Smart Images

Figure CN120075165B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of Time-Sensitive Networking (TSN), and particularly to a method, device, and chip for centralized cache allocation in a Time-Sensitive Networking switch chip. Background Art
[0002] Time-Sensitive Networking enhances traditional Ethernet and realizes the planning and scheduling of traffic in the network through time synchronization and traffic shaping mechanisms, thereby providing excellent quality of service assurance. Therefore, it has characteristics such as low latency, low jitter, and high reliability. Time-Sensitive Networking is a particularly prominent technology in the field of deterministic Ethernet and is gradually being applied to various scenarios such as industrial control networks and vehicle networks.
[0003] In a Time-Sensitive Networking switch chip, traffic backlog occurs due to contention for traffic shaping and output interfaces. To reduce packet loss of traffic, a storage space is designed in the switch chip to cache traffic that cannot be sent in time. Considering performance and complexity, centralized cache is usually adopted in current switch chips, that is, there is a storage space with a slightly larger capacity dedicated to storing all cached traffic, which is the centralized cache. Due to cost and power consumption reasons, the size of the centralized cache is limited, and all traffic needs to contend for the centralized cache. If the use of the centralized cache is not controlled, uncertainty will be introduced in the process of data frame caching. And the traffic in Time-Sensitive Networking has certain reliability requirements, and different types of traffic have differences in traffic characteristics and reliability requirements. The centralized cache allocation strategy in Time-Sensitive Networking optimizes the cache resources in the network through centralized control to ensure that data can be efficiently transmitted according to requirements such as delay and bandwidth.
[0004] Regarding the centralized cache allocation in Time-Sensitive Networking, the prior art usually adopts an allocation strategy based on statically specifying cache addresses or an allocation strategy based on priorities. Among them, the allocation strategy based on statically specifying cache addresses configures specific storage locations for corresponding types of traffic (such as time-sensitive flows) to avoid cache contention problems; while the cache allocation method based on priorities sets different priorities for different types of traffic in Time-Sensitive Networking, and allocates cache resources according to the priorities of the traffic. Higher-priority traffic is allocated more cache space to ensure its timely transmission, while lower-priority traffic is allocated less cache space. However, the storage utilization rate of the above-mentioned allocation strategy based on statically specifying cache addresses is relatively low, and its flexibility and scalability are poor, and it will also weaken the sharing degree of the centralized cache. The allocation strategy based on priorities also has problems of poor flexibility and scalability, and is prone to insufficient caching of low-priority data and waste of cache resources. At the same time, it is difficult to cope with sudden changes in data traffic, and the actual reliability is not high. Summary of the Invention
[0005] The technical problem to be solved by the present invention lies in: aiming at the technical problems existing in the prior art, the present invention provides a centralized cache allocation method, device and chip for a time-sensitive network switching chip, which has a simple implementation method, strong flexibility and scalability, and high sharing degree and reliability of centralized cache, and can flexibly adapt to different types of traffic to share the centralized cache of the time-sensitive network switching chip, improving the utilization rate and reliability of the centralized cache.
[0006] To solve the above technical problems, the technical solution proposed by the present invention is:
[0007] A centralized cache allocation method for a time-sensitive network switching chip, the steps include:
[0008] Receive and record the idle cache threshold values and used cache threshold values of different traffic classes;
[0009] Receive a cache request application at the entrance of the centralized cache of the controlled switching chip, and the cache request application carries the requested traffic class.
[0010] When receiving the cache request application, extract the requested traffic class carried in the cache request application;
[0011] Obtain the current used cache amount corresponding to the requested traffic class, and calculate the current idle cache space amount in the centralized cache of the controlled switching chip;
[0012] Compare the current idle cache space size and the current used cache amount corresponding to the requested traffic class with the idle cache threshold value and the used cache threshold value corresponding to the requested traffic class respectively, and judge whether to allocate cache according to the comparison results.
[0013] When it is judged that cache needs to be allocated for the current cache request application, take out an idle cache address in the centralized cache as the allocated cache address to be used for caching the data frame of the request, and update the current idle cache space amount and the current used cache value corresponding to the requested traffic class.
[0014] Further, the comparing the current idle cache space size and the current used cache amount corresponding to the requested traffic class with the idle cache threshold value and the used cache threshold value corresponding to the requested traffic class respectively, and judging whether to allocate cache according to the comparison results includes: judging whether both the current idle cache space size is greater than the idle cache threshold value corresponding to the requested traffic class and the current used cache amount corresponding to the requested traffic class is less than the used cache threshold value corresponding to the requested traffic class. If it is judged that both are satisfied, it is determined that cache needs to be allocated for the requested traffic class corresponding to the current cache request application, otherwise it is determined not to allocate cache.
[0015] Further, a two-round comparison method is adopted to determine whether cache allocation is required. In the first round, it is judged whether the currently used cache amount corresponding to the request traffic category is less than the used cache threshold value corresponding to the request traffic category. If so, the second round of judgment is carried out; otherwise, it is determined that cache allocation is not required. When carrying out the second round of judgment, it is judged whether the current free cache space size is greater than the free cache threshold value corresponding to the request traffic category. If so, it is determined that cache allocation is required; otherwise, it is determined that cache allocation is not required.
[0016] Further, it also includes: receiving a cache release request generated when the controlled switching chip finishes sending a data frame, extracting the released traffic category carried in the cache release request when receiving the cache release request, updating the current free cache space amount, and updating the used cache value of the corresponding category according to the extracted released traffic category. The cache release request is generated when the switching chip releases the cache space of the data frame after sending the data frame.
[0017] Further, when configuring the free cache threshold value, the free cache threshold value corresponding to the corresponding traffic category is determined according to the priority level of the traffic category. By configuring the used cache threshold value, the cache quantity used by the traffic of the category with an upper bound on cache requirements is limited. By configuring the free cache threshold value, the cache quantity used by the traffic of the category without an upper bound on cache requirements is restricted. When configuring the used cache threshold value, by estimating the upper bound of the cache requirements of the category traffic with an upper bound on cache requirements, the corresponding used cache threshold value is configured according to the estimated upper bound of the cache requirements. For the category traffic without an upper bound on cache requirements, the corresponding used cache threshold value is configured as the total cache quantity of the centralized cache.
[0018] Further, the traffic categories include time-sensitive traffic, audio-video traffic, high-priority best-effort traffic, and best-effort traffic. The best-effort traffic is ordinary traffic without priority requirements or quality-of-service requirements. The high-priority best-effort traffic is best-effort traffic with high priority. Among them, the free cache threshold value TL_L[ST] of the time-sensitive traffic is configured as r1D, the free cache threshold value TL_L[AVB] of the audio-video traffic is set as r2D, the free cache threshold value TL_L[HBE] of the high-priority best-effort traffic is set as r3D, and the free cache threshold value TL_L[BE] of the best-effort traffic is set as r4D. D represents the total cache quantity of the centralized cache, and r1 < r2 < r3 < r4.
[0019] A cache allocation device for implementing the above-mentioned centralized cache allocation method of the time-sensitive network switching chip includes:
[0020] A threshold recording module, configured to receive and record the free cache threshold values and used cache threshold values of different traffic categories;
[0021] A used cache counting module, configured to count the used cache amounts of different traffic classes and provide the count values to an idle cache space calculation module and an allocated cache control module respectively;
[0022] An idle cache space calculation module, configured to calculate the current idle cache space amount in the centralized cache of the controlled switching chip according to the used cache amounts of different traffic classes;
[0023] A cache allocation control module, configured to, when receiving a cache application request, compare the current idle cache space size and the current used cache amount corresponding to the requested traffic class with the idle cache threshold value and the used cache threshold value corresponding to the requested traffic class respectively, and determine whether to allocate cache according to the comparison result; when it is determined that cache needs to be allocated for the current cache application request, generate an allocated cache signal to control taking out an idle cache address in the centralized cache as the allocated cache address, and feedback a cache allocation success signal to an update control module;
[0024] An update control module, configured to update the current idle cache space amount and the current used cache value corresponding to the requested traffic class according to the received cache allocation success signal.
[0025] Further, the cache allocation control module is further configured to receive a cache release request, and update the used cache count value corresponding to the corresponding cache release process class when receiving the cache release request.
[0026] Further, it further includes an idle cache address pool module, configured to record the addresses of the current idle cache space in the centralized cache, and receive the released cache addresses to add them to the idle cache address pool. If receiving the allocated cache signal from the cache allocation control module, take out an idle cache address for cache allocation and output it and delete the corresponding address from the idle cache address pool. The released cache address is output by the controlled switching chip when releasing the cache after outputting the data frame and is output simultaneously with the cache release request.
[0027] An electronic device, including a processor and a memory, where the memory is used to store a computer program, and the processor is used to execute the computer program to execute the method as described above.
[0028] A time-sensitive network switching chip, including a switching chip, and further including the above-mentioned cache allocation device connected to the switching chip.
[0029] Compared with the prior art, the beneficial effects of the present invention are as follows: By setting two threshold values, namely the idle cache threshold value and the used cache threshold value, for different traffic categories respectively, at the entrance of the centralized cache, by receiving an application cache request and obtaining the traffic category in the application cache request, and combining the threshold values of the current traffic category to make judgments on both idle cache and used cache to determine whether to allocate cache, it enables flexible control of whether to allocate cache to the data frame applying for cache before the data frame enters the centralized cache. By setting different threshold values for different traffic categories, different priorities can be flexibly set for different traffic categories, improving the flexibility and scalability of cache allocation. At the same time, by combining the judgments of both idle cache and used cache to comprehensively judge whether to allocate memory, it can limit the use of the centralized cache by different types of traffic, solve the contention problem of traffic with different reliability requirements for the centralized cache, and also improve the sharing degree of the centralized cache, minimizing the waste of forwarding pipeline processing resources as much as possible. Thus, it can flexibly achieve a centralized cache allocation control with a high sharing degree, high reliability, and elimination of waste of logical processing resources. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 is a schematic flowchart of the implementation process of the centralized cache allocation method for the time-sensitive network switching chip in this embodiment.
[0031] Figure 2 is a schematic structural diagram of the cache allocation device in this embodiment.
[0032] Figure 3 is a schematic flowchart of the process of performing used cache counting in this embodiment.
[0033] Figure 4 is a schematic flowchart of the process of performing cache allocation control in this embodiment.
[0034] Figure 5 is a schematic flowchart of the process of controlling cache allocation enabling in this embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0035] The present invention will be further described below in conjunction with the accompanying drawings of the specification and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.
[0036] As disclosed in the present invention, unless the context clearly indicates otherwise, words such as "a", "an", "one", and / or "the" are not specifically singular and may also include the plural. The terms "first", "second", and similar terms used in the disclosure of the present invention do not denote any order, quantity, or importance, but are merely used to distinguish different components. Similarly, words such as "comprising" or "including" mean that the elements or items appearing before the word cover the elements or items listed after the word and their equivalents, without excluding other elements or items. The terms "connected" or "coupled" and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
[0037] For ease of understanding, first, the relevant technical background related to the present invention will be introduced by way of example.
[0038] In time-sensitive networks, traffic can generally be classified into time-sensitive traffic, audio-visual traffic, high-priority best-effort traffic, and low-priority best-effort traffic in descending order of reliability requirements. Among them, best-effort traffic is ordinary traffic without priority requirements or quality-of-service requirements, and high-priority best-effort traffic is best-effort traffic with high priority. When exchanging traffic with high reliability requirements, such as time-sensitive traffic and audio-visual traffic, the uncertainty introduced during the caching process is usually intolerable.
[0039] Taking the above-mentioned types of traffic as examples, in order to solve the problem of contention for the centralized cache between time-sensitive traffic and best-effort traffic, the following two main centralized cache allocation strategies are adopted in the prior art:
[0040] One is the allocation strategy based on statically specifying cache addresses. It takes the cache location of time-sensitive traffic as the problem to be solved by scheduling, and obtains the cache space for time-sensitive flows through scheduling. The specific storage location of time-sensitive traffic is specified in the switching chip, and the remaining space is used by best-effort traffic. Since the scheduling is executed offline, it is a method of statically specifying the cache addresses of time-sensitive flows. However, the allocation strategy based on statically specifying cache addresses, due to the need to rely on traffic scheduling as the cache allocation strategy, has a high storage utilization rate, but the cache allocation control on the switching chip is relatively simple, and it can only support the control of specifying the cache addresses of specific traffic, and needs to be coupled with traffic scheduling, resulting in poor flexibility and scalability. In addition, since the cache space is statically specified, the cache space allocated to different traffic can only be used by the specified traffic, which also weakens the sharing degree of the centralized cache.
[0041] Second, it is an allocation strategy based on high - priority preemption. The core idea of this type of preemptive strategy is that when there is free cache space, time - sensitive traffic and best - effort traffic can enter the centralized cache arbitrarily. However, when the free cache space is insufficient, best - effort traffic cannot enter the centralized cache, and time - sensitive traffic can overwrite the cache space of best - effort traffic that has entered but not been sent yet. However, this type of high - priority preemption allocation strategy requires time - sensitive traffic to preempt the cached best - effort traffic when the cache is insufficient. In a switching chip, a parallel method of cache and forwarding pipeline is usually adopted. Although preempting the cache of best - effort data frames can improve the utilization rate of cache space, the preempted data frames will enter the forwarding pipeline, resulting in waste of forwarding pipeline processing resources.
[0042] In addition, the above - mentioned two allocation strategies can only consider the cache of two types of traffic, namely time - sensitive traffic and best - effort traffic. In an actual network, there are usually other types of traffic such as audio - video traffic. Audio - video traffic often has a certain degree of burstiness and also has relatively high reliability requirements. The existing centralized cache allocation strategies in the prior art cannot flexibly respond to such bursty traffic changes and are difficult to meet the high - reliability requirements.
[0043] The present invention first sets two threshold values, namely the free - cache threshold value and the used - cache threshold value, for different traffic categories respectively. At the entrance of the centralized cache, by receiving a cache - application request and obtaining the traffic category in the cache - application request, the current free - cache space amount and the current used - cache amount of the corresponding traffic category are further obtained. By combining the threshold values of the current traffic category, discrimination is made in terms of both free cache and used cache to determine whether to allocate cache, so as to flexibly control whether to allocate cache to the data frames applying for cache before the data frames enter the centralized cache. By setting the threshold values of different traffic categories, different priorities can be flexibly set for different traffic categories, achieving the effect of preferentially allocating cache to high - priority traffic. At the same time, the flexibility and scalability of cache allocation are improved. Combining the judgments of both free cache and used cache to comprehensively judge whether to allocate memory can limit the use of the centralized cache by different types of traffic, can control the cache - space allocation of multiple types of traffic simultaneously, solve the contention problem of traffic with different reliability requirements for the centralized cache, and can also improve the sharing degree of the centralized cache, minimizing the waste of forwarding - pipeline processing resources as much as possible. Thus, a centralized - cache allocation control with high sharing degree, high reliability, and elimination of waste of logical - processing resources can be flexibly realized.
[0044] The following will further illustrate the present invention with specific embodiments.
[0045] As Figure 1 shown, the steps of the centralized - cache allocation method for a time - sensitive network switching chip in this embodiment include:
[0046] Step S01. Receive and record the idle cache threshold values and used cache threshold values for different traffic classes.
[0047] In this embodiment, the traffic in the time-sensitive network is divided into four categories: the traffic classes include but are not limited to time-sensitive traffic (ST traffic), audio-visual traffic (AVB traffic), high-priority best-effort traffic (HBE traffic), and best-effort traffic (BE traffic). The characteristics of each category are as follows:
[0048] (1) Time-sensitive traffic, which is traffic that has undergone time-aware shaping and has high requirements for latency, jitter, and determinism;
[0049] (2) Audio-visual traffic, which usually needs to undergo credit-based shaping and has bandwidth requirements and burstiness;
[0050] (3) High-priority best-effort traffic, whose traffic class is best-effort traffic but has a higher priority. The time synchronization packets in the time-sensitive network are this type of traffic and have a certain degree of reliability requirements;
[0051] (4) Best-effort traffic, whose traffic class is best-effort traffic and has a lower priority.
[0052] Assume that the size of the centralized cache is S. Two types of threshold values are set for the above four types of traffic according to the reliability requirements and traffic characteristics for subsequent judgment on whether to allow caching to be allocated to the corresponding traffic classes. One group is the idle cache threshold value, that is, the threshold based on the number of idle spaces in the centralized cache, and the other group is the used cache threshold value, that is, the threshold based on the used cache quantity of different traffic classes. Specifically, the threshold record includes the threshold values of time-sensitive traffic (ST), audio-visual traffic (AVB), high-priority best-effort traffic (HBE), and best-effort traffic (BE). Optionally, the threshold values of each traffic class can be configured externally to provide an implementation interface for the cache allocation policy, and each group of thresholds can be organized in the form of a threshold record.
[0053] In a specific application embodiment, the storage unit size of the centralized cache is specifically 2KB (configurable), that is, each storage unit can store one data frame. Therefore, the value of the used cache count increases and decreases by 1.
[0054] The idle cache threshold values for each traffic category can be configured according to the priorities of each traffic category in a hierarchical manner. The idle cache threshold value corresponding to a traffic category with a higher priority is smaller, and the idle cache threshold value corresponding to a traffic category with a lower priority is larger. This enables the cache to be preferentially allocated to traffic categories with higher priorities while also ensuring that other traffic categories with lower priorities can be flexibly allocated a certain amount of cache when the idle cache is sufficient, effectively improving the sharing degree of the centralized cache. As a preferred implementation, the idle cache threshold values for each traffic category can be set according to the following rules: the idle cache threshold value TL_L[ST] for time-sensitive traffic is configured as r1D, the idle cache threshold value TL_L[AVB] for audio / video traffic is set as r2D, the idle cache threshold value TL_L[HBE] for high-priority best-effort traffic is set as r3D, and the idle cache threshold value TL_L[BE] for best-effort traffic is set as r4D, where D represents the total cache capacity of the centralized cache, and r1 < r2 < r3 < r4. For example, the idle cache threshold value TL_L[ST] for time-sensitive traffic is configured as 0, the idle cache threshold value TL_L[AVB] for audio / video traffic is set as (1 / 4)D, the idle cache threshold value TL_L[HBE] for high-priority best-effort traffic is set as (1 / 2)D, and the idle cache threshold value TL_L[BE] for best-effort traffic is set as (3 / 4)D, where D represents the total cache capacity of the centralized cache, and the specific value can be taken as the sum of the used cache count values of all types of traffic when the centralized cache is full. By configuring in the above manner, when the occupancy rate of the centralized cache is lower than 1 / 4, all four types of traffic can share the centralized cache. When the occupancy rate of the centralized cache is higher than 1 / 4, three types of traffic except for the low-priority best-effort traffic can share the centralized cache. When the occupancy rate of the centralized cache reaches half, the audio / video traffic and the time-sensitive traffic can share the centralized cache.
[0055] In this embodiment, the used cache threshold value is configured to limit the specific cache quantity that a certain type of traffic can use, which can be specifically used to limit the traffic for which the upper bound of the cache requirement can be clearly calculated, such as ST and AVB traffic. The idle cache threshold value is configured to limit the traffic with unclear cache requirements, such as BE and HBE traffic. When configuring the used cache threshold value, the upper bound of the cache requirement for the category traffic with a clear upper bound of the cache requirement can be estimated, and the corresponding used cache threshold value is configured according to the estimated upper bound of the cache requirement. For the category traffic without a clear upper bound of the cache requirement, the corresponding used cache threshold value is configured as the total cache capacity of the centralized cache, which means that it is not restricted by the used cache threshold value but is restricted by the idle cache threshold value.
[0056] For example, if the ST and AVB streams have clear upper bounds on buffer requirements, the upper bounds on buffer requirements for the ST and AVB streams can be estimated. Suppose the estimated upper bounds on buffer requirements for the ST and AVB streams are (1 / 4)D and (1 / 2)D respectively. Then, the used buffer threshold value TL_U[ST] for the ST stream can be configured accordingly as (1 / 4)D, and the used buffer threshold value TL_U[AVB] for the AVB stream can be configured as (1 / 2)D. For the BE and HBE traffic, the used buffer threshold values are configured as the total buffer size D of the centralized buffer, that is, TL_U[BE]=D and TL_U[HBE]=D. This enables the ST stream to use at most 1 / 4 of the total buffer size, the AVB stream to use at most 1 / 2 of the total buffer size, and the BE and HBE streams to use up the centralized buffer. In the hardware, a buffer management interface is reserved to implement the upper-layer buffer allocation algorithm to configure specific threshold values.
[0057] It can be understood that the threshold values for each traffic category can of course also be configured in other more flexible ways according to actual needs. Traffic categories include but are not limited to the above-mentioned time-sensitive traffic (ST stream), audio-visual traffic (AVB stream), high-priority best-effort traffic (HBE stream), and best-effort traffic (BE stream). In actual applications, the threshold values for other traffic categories can also be flexibly configured by increasing the length of the threshold record to support the buffer allocation control of more traffic types.
[0058] Step S02. Receive a buffer request at the entrance of the centralized buffer of the controlled switching chip. The buffer request carries the requested traffic category.
[0059] When a data frame needs to enter the centralized buffer of the controlled switching chip, a buffer request will be generated before entering. The buffer request includes the requested traffic category, that is, the category of the data frame that needs to be buffered, which is also the traffic category. It can be understood that in addition to the traffic category, the buffer request can also include other types of information related to the required buffered traffic according to actual needs, such as the required buffer amount, etc.
[0060] Step S03. When receiving the buffer request, extract the requested traffic category carried in the buffer request.
[0061] After receiving the buffer request, extract the traffic category information from the buffer request, so that subsequent double judgments on the current free buffer space and the used buffer amount can be made according to the traffic category.
[0062] Step S04. Obtain the currently used buffer amount corresponding to the requested traffic category, and calculate the current free buffer space amount in the centralized buffer of the controlled switching chip.
[0063] Specifically, the current cache space LEF can be calculated based on the total cache capacity S of the centralized cache and the cache capacity already used by each current process category. For example, the used cache count values of four traffic types, i.e., time-sensitive traffic (ST flow), audio-video traffic (AVB flow), high-priority best-effort traffic (HBE flow), and best-effort traffic (BE flow), namely ST used cache, AVB used cache, HBE used cache, and BE used cache, can be obtained. According to the formula: idle cache space LEF = S - ST used cache - AVB used cache - HBE used cache - BE used cache, the current idle cache space LEF can be calculated.
[0064] Step S05. Compare the current size of the idle cache space and the current used cache capacity corresponding to the requested traffic category with the idle cache threshold value and the used cache threshold value corresponding to the requested traffic category respectively, and determine whether to allocate cache according to the comparison results.
[0065] In this embodiment, comparing the current size of the idle cache space and the current used cache capacity corresponding to the requested traffic category with the idle cache threshold value and the used cache threshold value corresponding to the requested traffic category respectively, and determining whether to allocate cache according to the comparison results includes: determining whether both the current size of the idle cache space is greater than the idle cache threshold value corresponding to the requested traffic category and the current used cache capacity corresponding to the requested traffic category is less than the used cache threshold value corresponding to the requested traffic category. If it is determined that both conditions are met, it is determined that cache needs to be allocated for the requested traffic category corresponding to the current cache application request; otherwise, it is determined that no cache is allocated. That is, by comprehensively making a dual judgment on the current size of the idle cache space and the current used cache capacity corresponding to the requested traffic category through the threshold values of different traffic categories, it is determined whether to allow cache to be allocated for the current traffic category. Cache allocation is only allowed when both the idle cache space and the used cache of the current traffic category meet the conditions, which can not only ensure the flexibility and reliability of cache allocation, but also improve the sharing degree and resource utilization rate of the centralized cache.
[0066] Preferably, a two-round comparison method can be used to determine whether to allocate cache. In the first round, it is determined whether the current used cache capacity corresponding to the requested traffic category is less than the used cache threshold value corresponding to the requested traffic category. If so, the second round of judgment is carried out; otherwise, it is determined that no cache is allocated. When carrying out the second round of judgment, it is determined whether the current size of the idle cache space is greater than the idle cache threshold value corresponding to the requested traffic category. If so, it is determined that cache needs to be allocated; otherwise, it is determined that no cache is allocated.
[0067] For example, when adopting the two-round comparison method, in the first round, compare the used cache quantities of different types of traffic with the thresholds based on the used cache quantities. If the comparison result shows that the used cache quantity is less than the threshold value, the first-round comparison passes; in the second round, compare the thresholds based on the free cache space quantities of different types of traffic with the current free cache space quantity. If the comparison result shows that the free cache space quantity is greater than the threshold value, the second-round comparison passes; if both rounds of comparison pass, output that the allocation enable of the corresponding traffic class is valid, otherwise output that the allocation enable of the corresponding traffic class is invalid.
[0068] Step S06. When it is judged that cache needs to be allocated for the current cache request, take out an idle cache address in the centralized cache as the allocated cache address to be used for the data frame of the cache request, and update the current free cache space quantity and the current used cache value corresponding to the requested traffic class.
[0069] The cache release request is specifically generated by the switching chip when releasing the cache space of the data frame after sending the data frame. The cache release request also contains traffic class information. When receiving the cache release request, update the current free cache space quantity and the current used cache value corresponding to the released request traffic class accordingly.
[0070] This embodiment further includes step S07: Receive the cache release request generated when the controlled switching chip finishes sending the data frame. When receiving the cache release request, extract the released traffic class carried in the cache release request, update the current free cache space quantity, and update the used cache value of the corresponding class according to the extracted released traffic class. The cache release request is generated by the switching chip when releasing the cache space of the data frame after sending the data frame.
[0071] As Figure 2 shown, the cache allocation device for implementing the above-mentioned centralized cache allocation method of the time-sensitive network switching chip in this embodiment includes:
[0072] A threshold recording module, configured to receive and record the free cache thresholds and used cache thresholds of different traffic classes;
[0073] A used cache counting module, configured to count the used cache quantities of different traffic classes, and respectively provide the count values to the free cache space calculation module and the allocated cache control module;
[0074] A free cache space calculation module, configured to calculate the current free cache space quantity in the centralized cache of the controlled switching chip according to the used cache quantities of different traffic classes;
[0075] The cache allocation control module is used to, when receiving a cache application request, compare the current size of the free cache space and the current used cache amount corresponding to the request traffic category with the free cache threshold value and the used cache threshold value corresponding to the request traffic category respectively, and determine whether to allocate cache according to the comparison result; when it is determined that cache needs to be allocated for the current cache application request, generate an allocation cache signal to control taking out an idle cache address in the centralized cache as the allocated cache address, and feedback a cache allocation success signal to the update control module;
[0076] The update control module is used to update the current free cache space amount and the current used cache value corresponding to the request traffic category according to the received cache allocation success signal.
[0077] The above-mentioned free cache space calculation module and update control module are not shown. In a specific application embodiment, the above functions can be integrated and implemented through the cache allocation control module, that is, the free cache space calculation, cache allocation control and update control functions are implemented through the cache allocation control module, and can be specifically configured according to actual requirements. The cache allocation control module is also used to receive a cache release request, and update the used cache count value corresponding to the released process category when receiving the cache release request.
[0078] After constructing the above cache allocation device, the centralized cache allocation control is completed by the cooperation of each module. At the entrance of the centralized cache, it is controlled whether to allocate cache to the data frame applying for cache. In the threshold record module, two groups of thresholds based on the number of free spaces in the centralized cache and the used cache amounts of different category traffic are set for different traffic categories. The used cache counting module counts the used cache amounts of different traffic categories, the free cache space calculation module calculates the current number of free cache spaces, and the cache allocation control module controls whether to allocate cache addresses to the specified category of traffic according to the two groups of thresholds, which can limit the use of the centralized cache by different types of traffic, provide guarantee for different types of traffic to share the centralized cache, further support the switching chip to meet the reliability requirements of different category traffic for switching, and solve the contention problem of different reliability requirement traffic for the centralized cache.
[0079] In a specific application embodiment, the data received by the cache allocation device specifically includes: (1) external configuration of the threshold value and the size of the centralized cache; (2) cache application request, and the cache application request includes the category of the data frame; (3) cache release request, which is generated when the switching chip releases the cache space of the data frame after sending the data frame, and the cache release request contains the category of the data frame; (4) cache release address, which is the address of the released cache space and is generated together with the cache release signal. The output data of the cache allocation device is the allocated cache address, and the switching chip can write the data frame to this address of the centralized cache to cache the data frame.
[0080] In a specific application embodiment, the used cache counting module can be configured to count the number of different categories of traffic using the centralized cache space, and provide the count values to the free cache space calculation module and the cache allocation control module respectively. When a cache release request is received, the cache release request includes the traffic category, and when the cache release request is received, the used cache count value of the corresponding category is controlled to decrease. The specific amount of decrease in the count value is related to the number of cache units occupied by the data frame and can be determined according to the configuration of the centralized cache. When a cache application request is received, the cache application request includes the traffic category, and a signal indicating whether to allocate the cache sent by the cache allocation control is received. If the cache is allocated, the used cache count value of the corresponding traffic category increases; otherwise, the count value remains unchanged. Similarly, the specific amount of increase in the count value is related to the number of cache units occupied by the data frame and can be determined according to the configuration of the centralized cache.
[0081] In a specific application embodiment, first, the free cache space calculation module obtains the used cache quantities of different traffic types from the used cache counting module and calculates the free cache space quantity. The cache allocation control module makes two rounds of comparisons based on two sets of threshold values to control whether to allow cache allocation for the corresponding category of traffic. In the first round, the used cache quantity of different types of traffic is compared with the threshold based on the used cache quantity. If the comparison result shows that the used cache quantity is less than the threshold value, the first round of comparison passes. In the second round, the threshold based on the free cache space quantity of different types of traffic is compared with the current free cache space quantity. If the comparison result shows that the free cache space quantity is greater than the threshold value, the second round of comparison passes. If both rounds of comparisons pass, the allocation enable of the corresponding traffic category is output as valid; otherwise, the allocation enable of the corresponding traffic category is output as invalid.
[0082] In this embodiment, a free cache address pool module is further included, which is used to record the addresses of the current free cache space in the centralized cache, and receive the cache release address and add it to the free cache address pool. If a cache allocation signal from the cache allocation control module is received, a free cache address is taken out for cache allocation and output, and the corresponding address is deleted from the free cache address pool. The cache release address is output by the controlled switching chip simultaneously with the cache release request when the data frame is output and the cache is released.
[0083] Specifically, the idle cache address pool module receives the cache allocation signal from the cache allocation control module, and decides whether to take out and output an idle cache address according to the cache allocation signal. If the cache allocation signal is for cache allocation, it takes out an idle cache address for output, and deletes the corresponding address from the idle cache address pool after output; if the cache allocation signal is for non-allocation, no processing is performed; the cache allocation control module determines whether the allocation enable signal of the traffic category of the cache application request is valid. If it is valid, it outputs an allocation control signal to the idle cache address pool module for deciding whether to allocate a cache address and to the used cache count sub-module for updating the count value of the corresponding traffic category, and at the same time outputs a signal indicating successful application to the external module that needs to obtain information on whether the application is successful. Otherwise, it outputs a non-allocation control signal to the idle cache address pool module and the used cache count sub-module.
[0084] In a specific application embodiment, as Figure 3 shown, the detailed process of the used cache count model for performing used cache counting is as follows:
[0085] Step Sa1: Determine whether initialization has been completed. If not, initialize the used cache count values CNT[ST], CNT[AVB], CNT[HBE], and CNT[BE] of all traffic categories to 0. CNT[ST], CNT[AVB], CNT[HBE], and CNT[BE] are the used cache count values of the four traffic categories respectively. If initialization has been completed, continue to step Sa2;
[0086] Step Sa2: Determine whether there is a cache release request. If there is a cache release request, decrease the used cache count value of the corresponding traffic category T of the cache release request by CNT[T]=CNT[T] - 1; otherwise, the used cache count value remains unchanged;
[0087] Step Sa3: Determine whether there is a cache allocation signal. If there is a cache allocation signal, increase the used cache count value of the corresponding traffic category T of the cache application request by CNT[T]=CNT[T]+1; otherwise, the used cache count value remains unchanged.
[0088] In a specific application embodiment, as Figure 4 shown, the specific process of this embodiment for cache allocation control includes:
[0089] Step Sb1. Determine whether initialization has been completed. If not, first enter the initialization process of step Sb2. If initialization has been completed, execute step Sb3;
[0090] Step Sb2. Receive the external threshold configuration TL and the centralized cache length S, and write the thresholds based on the number of free spaces in the centralized cache and the thresholds based on the used cache quantities of different types of traffic into the threshold record module, including the threshold value TL_L based on the free cache for four types of traffic and the threshold value TL_U based on the used cache;
[0091] Step Sb3. The cache allocation control module obtains the used cache count values of different traffic types from the used cache counting module, and calculates the free cache space LEF = S - ST_used cache - AVB_used cache - HBE_used cache - BE_used cache; successively compare the size relationships between the used cache quantity of each traffic type T, the threshold value TL_U[T] based on the used cache, the free cache space LEF, and the threshold value TL_L[T] based on the free cache. If the comparison result is that the used cache quantity is less than the threshold value, the comparison passes, i.e., T_used cache < TL_U[T], and transfer to Step Sb4; otherwise, output that the allocation enable of the corresponding traffic type is invalid;
[0092] Step Sb4. Compare the threshold based on the number of free cache spaces of different types of traffic with the current number of free cache spaces. If the comparison result is that the number of free cache spaces is greater than the threshold value, i.e., LEF > TL_L[T], the comparison passes, and output that the allocation enable of the corresponding traffic type is valid; otherwise, output that the allocation enable of the corresponding traffic type is invalid.
[0093] Further control the cache allocation by generating an enable control signal for cache allocation, as Figure 5 shown, the specific process is as follows:
[0094] Step Sc1. Determine whether there is a cache request application. If so, obtain the data frame category, Step Sc2; if not, continue to determine whether there is a cache request application;
[0095] Step Sc2. Obtain the allocation enable signal of the corresponding traffic type in the cache request application. If the allocation enable signal of the corresponding traffic type is valid, output an allocation control signal; otherwise, output a non-allocation control signal.
[0096] The above process of cached count and cache allocation control is executed in a loop when the cache allocation device is working. Before a data frame enters the centralized cache, it needs to apply for cache space from the cache allocator, and whether to allocate a cache address is controlled by a threshold, so as to realize the allocation of the centralized cache. The threshold value is set according to the reliability requirements of the data frame. For example, the threshold based on the free cache space can be set as TL_L[ST]=0, TL_L[AVB]=(1 / 4)D, TL_L[HBE]=(1 / 2)D, TL_L[BE]=(3 / 4)D in descending order of reliability, so that when the occupancy rate of the centralized cache is lower than 1 / 4, all four types of traffic can share the centralized cache; when the occupancy rate of the centralized cache is higher than 1 / 4, three types of traffic except the low-priority best-effort traffic can share the centralized cache. When the occupancy rate of the centralized cache reaches half, the audio-visual traffic and time-sensitive traffic can share the centralized cache. When the occupancy rate of the centralized cache reaches 3 / 4, only the time-sensitive traffic is allowed to enter the centralized cache.
[0097] The present invention uses the above method to realize the allocation control of the centralized cache of the time-sensitive network switching chip. The entire control process is simple, and the required logic resources and storage resources are less. The complexity of the entire control process only comes from the threshold comparison, and the complexity only depends on the number of traffic classes. Therefore, the complexity is O(n). The storage resource overhead only comes from the record of the threshold value and the used cache count. The storage overhead of the threshold value and the used cache counter is 3*n values with the maximum value being the number of centralized cache storage units, where n is the number of traffic classes. Taking the centralized cache size of 4MB and the storage unit size of 2KB as an example, there are 4 types of traffic. The 4MB space has a total of 2^11 2KB-sized storage units, and a counter of 11 bits is required. Then the threshold value and the used cache counter only need a storage overhead of (3*4)*11 = 132 bits.
[0098] At the same time, the present invention uses the above cache allocation method, which can flexibly support the allocation of caches for multiple traffic classes, and can improve the sharing degree of the centralized cache. The threshold values of various traffic classes can be set based on the remaining space of the centralized cache. When the occupancy rate of the cache space is low, low-reliability traffic and high-reliability traffic can share the cache space. When the occupancy rate of the cache space is high, it can ensure that the high-reliability traffic has cache available to meet the cache requirements of the high-reliability traffic.
[0099] This embodiment further provides an electronic device, including a processor and a memory. The memory is used to store a computer program, and the processor is used to execute the computer program to execute the method as described above.
[0100] The time-sensitive network switching chip of this embodiment includes a switching chip, and also includes the above cache allocation device or the electronic device connected to the switching chip.
[0101] Those skilled in the art should understand that the above embodiments of the present invention can be provided as a method, a system, or a computer program product. Therefore, the present invention can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention can take the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The present invention is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to the embodiments of the present invention. It should be understood that each flow and / or block in the flowchart and / or block diagram, as well as the combination of flows and / or blocks in the flowchart and / or block diagram, can be realized by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate means for implementing the functions specified in the flow Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks
[0102] The above are only the preferred embodiments of the present invention and do not impose any form of limitation on the present invention. Although the present invention has been disclosed above with the preferred embodiments, it is not intended to limit the present invention. Therefore, any simple modification, equivalent change, and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the scope of the protection of the technical solution of the present invention.
Claims
1. A method for centralized cache allocation of a time-sensitive network switching chip, characterized in that the steps including: receiving and recording the idle cache threshold value and the used cache threshold value for different traffic classes; receiving a cache application request at the entrance of the centralized cache of the controlled switching chip, where the cache application request carries a requested traffic class; when receiving the cache application request, extracting the requested traffic class carried in the cache application request; obtaining the current used cache amount corresponding to the requested traffic class, and calculating the current idle cache space amount in the centralized cache of the controlled switching chip; comparing the current idle cache space size and the current used cache amount corresponding to the requested traffic class with the idle cache threshold value and the used cache threshold value corresponding to the requested traffic class respectively, and judging whether cache needs to be allocated according to the comparison results; when it is judged that cache needs to be allocated for the current cache application request, taking out an idle cache address in the centralized cache as the allocated cache address to be used for caching the data frame of the request, and updating the current idle cache space amount and the current used cache value corresponding to the requested traffic class; 2. The time-sensitive network switching chip centralized cache allocation method according to claim 1, wherein, The comparing the current idle cache space size and the current used cache amount corresponding to the requested traffic class with the idle cache threshold value and the used cache threshold value corresponding to the requested traffic class respectively, and judging whether cache needs to be allocated according to the comparison results includes: judging whether both the current idle cache space size is greater than the idle cache threshold value corresponding to the requested traffic class and the current used cache amount corresponding to the requested traffic class is less than the used cache threshold value corresponding to the requested traffic class are satisfied. If it is judged that both are satisfied, it is determined that cache needs to be allocated for the requested traffic class corresponding to the current cache application request, otherwise it is determined not to allocate cache; 3. The method for centralized cache allocation of a time-sensitive network switching chip according to claim 2, wherein judging whether cache needs to be allocated by using a two-round comparison method, where in the first round, it is judged whether the current used cache amount corresponding to the requested traffic class is less than the used cache threshold value corresponding to the requested traffic class. If so, the second round of judgment is carried out, otherwise it is determined not to allocate cache. When carrying out the second round of judgment, it is judged whether the current idle cache space size is greater than the idle cache threshold value corresponding to the requested traffic class. If so, it is determined that cache needs to be allocated, otherwise it is determined not to allocate cache; 4. The method for centralized cache allocation of a time-sensitive network switching chip according to claim 1, wherein, further including: receiving a cache release request generated when the controlled switching chip finishes sending a data frame. When receiving the cache release request, extracting the released traffic class carried in the cache release request, updating the current idle cache space amount and updating the used cache value of the corresponding class according to the extracted released traffic class. The cache release request is generated when the switching chip releases the cache space of the data frame after sending the data frame.
5. The method for centralized cache allocation of a time-sensitive network switching chip according to any one of claims 1 to 4, characterized in that It also includes, when configuring the idle cache threshold value, determining the idle cache threshold value of the corresponding category according to the priority level of the traffic category, limiting the cache quantity used by the traffic of the category with the upper bound of cache requirement by configuring the used cache threshold value, and limiting the cache quantity used by the traffic of the category without the upper bound of cache requirement by configuring the idle cache threshold value. When configuring the used cache threshold value, by estimating the upper bound of the cache requirement of the category traffic with the upper bound of cache requirement, configuring the corresponding used cache threshold value according to the estimated upper bound of the cache requirement, and for the category traffic without the upper bound of cache requirement, the corresponding used cache threshold value is configured as the total cache quantity of the centralized cache.
6. The method for centralized cache allocation of a time-sensitive network switching chip according to claim 5, characterized in that, The traffic categories include time-sensitive traffic, audio-video traffic, high-priority best-effort traffic, and best-effort traffic. The best-effort traffic is ordinary traffic without priority requirements or quality-of-service requirements, and the high-priority best-effort traffic is best-effort traffic with high priority. Among them, the idle cache threshold value TL_L[ST] of the time-sensitive traffic is configured as r1D, the idle cache threshold value TL_L[AVB] of the audio-video traffic is set to r2D, the idle cache threshold value TL_L[HBE] of the high-priority best-effort traffic is set to r3D, and the idle cache threshold value TL_L[BE] of the best-effort traffic is set to r4D. D represents the total cache quantity of the centralized cache, and r1 < r2 < r3 < r4.
7. A centralized cache allocation device for a time-sensitive network switching chip, characterized in that, It includes: A threshold record module, which is used to receive and record the idle cache threshold value and the used cache threshold value of different traffic categories; A used cache counting module, which is used to count the used cache quantity of different traffic categories and provide the count values to the idle cache space calculation module and the allocated cache control module respectively; An idle cache space calculation module, which is used to calculate the current idle cache space quantity in the centralized cache of the controlled switching chip according to the used cache quantity of different traffic categories; A cache allocation control module, which is used to compare the current idle cache space size and the current used cache quantity corresponding to the request traffic category with the idle cache threshold value and the used cache threshold value corresponding to the request traffic category respectively when receiving a cache request, and judge whether to allocate cache according to the comparison result; When it is judged that cache needs to be allocated for the current cache request, generate an allocated cache signal to control taking out an idle cache address in the centralized cache as the allocated cache address, and feedback the cache allocation success signal to the update control module; An update control module, which is used to update the current idle cache space quantity and the current used cache value corresponding to the request traffic category according to the received cache allocation success signal.
8. The time-sensitive network switching chip centralized cache allocation device according to claim 7, wherein It also includes an idle cache address pool module, which is used to record the addresses of the current idle cache space in the centralized cache, and receive the released cache address and add it to the idle cache address pool. If it receives the allocated cache signal from the cache allocation control module, take out an idle cache address for allocation and delete the corresponding address from the idle cache address pool. The released cache address is output by the controlled switching chip simultaneously with the cache release request when the data frame is output and the cache is released.
9. An electronic device, comprising a processor and a memory, the memory being used for storing a computer program, characterized in that, The processor is used to execute the computer program to perform the method for centralized cache allocation of a time-sensitive network switching chip set as described in any one of claims 1 to 6.
10. A time-sensitive network switching chip, including a switching chip, characterized in that, It further includes the device for centralized cache allocation of a time-sensitive network switching chip set as described in claim 7 or 8 and connected to the switching chip.
Citation Information
Patent Citations
Message buffer management method for time-sensitive network
CN113411270A
TSN network switch for data monitoring cache multiplexing based on FPGA
CN119520441A