Cell service processing method, device, equipment, medium and program product

Abstract

The present invention relates to the field of wireless communication technologies, and provides a cell service processing method, apparatus, device, medium, and program product. The method includes: obtaining a frequency-domain data stream based on cell search synchronization and time-frequency conversion, and writing each frequency-domain data symbol in the frequency-domain data stream into a memory; performing blind detection of a physical downlink control channel based on a first frequency-domain data symbol in the frequency-domain data stream, and storing the obtained multiple downlink control information into an information collection container; taking out each downlink control information from the information collection container, and parsing each downlink control information; based on the parsing results of each downlink control information, reading physical downlink shared channel data from the memory, and processing the physical downlink shared channel data. The present invention realizes real-time processing of the physical downlink control channel and non-real-time processing of the physical downlink shared channel. This processing mode optimizes the entire service processing flow and improves the service processing ability.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technologies, and particularly to a method, apparatus, device, medium, and program product for processing cell services. Background Art

[0002] In the current mobile communication network, cell service processing plays a crucial role. To ensure the effective transmission and reception of user data, existing terminals (such as mobile phones) usually perform blind detection of the Physical Downlink Control Channel (PDCCH) at specific times and locations to identify and process a specific Radio Network Temporary Identity (RNTI).

[0003] Specifically, the terminal performs a blind detection search on the received PDCCH at a preset time point to find the relevant RNTI. Once the blind detection is successful, that is, the matching RNTI is found, the terminal can further extract and process the Physical Downlink Shared Channel (PDSCH) data associated with the RNTI, thereby obtaining the user's service data.

[0004] However, with the continuous increase in the number of users and the increasing diversification of communication requirements, the number of RNTIs that the system needs to process is also rising sharply. Since the existing service processing method performs blind detection at specific times, it is impossible to quickly and effectively detect all possible RNTIs in the first time, and it is difficult to meet the processing requirements of large-scale and high efficiency. Summary of the Invention

[0005] The present invention provides a method, apparatus, device, medium, and program product for processing cell services to solve the defect that the existing cell service processing method cannot meet the processing requirements of large-scale RNTI detection and rapid growth of data volume.

[0006] The present invention provides a method for processing cell services, including:

[0007] Based on cell search synchronization, obtain a time-domain data stream, perform time-frequency conversion on the time-domain data stream to obtain a frequency-domain data stream, and write each frequency-domain data symbol in the frequency-domain data stream into a memory. Each frequency-domain data symbol includes a first frequency-domain data symbol and a second frequency-domain data symbol. The first frequency-domain data symbol corresponds to the Physical Downlink Control Channel and is used to carry downlink control information. The second frequency-domain data symbol corresponds to the Physical Downlink Shared Channel and is used to carry service information;

[0008] Perform blind detection of the physical downlink control channel based on the first frequency-domain data symbol in the frequency-domain data stream to obtain multiple pieces of downlink control information, and store the multiple pieces of downlink control information in an information collection container;

[0009] Based on a preset order, take out each piece of downlink control information from the information collection container, and parse each piece of downlink control information to obtain the parsing result of each piece of downlink control information;

[0010] Based on the parsing results of the respective downlink control information, read the physical downlink shared channel data from the memory and process the physical downlink shared channel data.

[0011] According to a cell service processing method provided by the present invention, the frequency-domain data stream is composed of multiple system frames, each system frame includes multiple subframes, each subframe corresponds to multiple time slots, and each time slot includes at least one first frequency-domain data symbol and multiple second frequency-domain data symbols;

[0012] The step of writing each frequency-domain data symbol in the frequency-domain data stream into the memory includes:

[0013] Based on the system frame number, subframe number, time slot number, and symbol number corresponding to any frequency-domain data symbol, determine the offset address;

[0014] Based on the cell base address and the offset address, determine the storage address corresponding to any frequency-domain data symbol;

[0015] Based on the storage address, write any frequency-domain data symbol into the memory.

[0016] According to a cell service processing method provided by the present invention, the step of determining the system frame number corresponding to any frequency-domain data symbol includes:

[0017] When the number of configured frames in the memory is equal to the preset number of frames, use the actual system frame number corresponding to any frequency-domain data symbol as the system frame number;

[0018] When the number of configured frames in the memory is less than the preset number of frames, based on the number of configured frames and the actual system frame number corresponding to any frequency-domain data symbol, determine the system frame number corresponding to any frequency-domain data symbol.

[0019] According to a cell service processing method provided by the present invention, the step of taking out each piece of downlink control information from the information collection container based on a preset order, and parsing each piece of downlink control information to obtain the parsing result of each piece of downlink control information includes:

[0020] Within the current storage time window, each downlink control information is sequentially retrieved from the information collection container based on a preset order, and the parsing of each downlink control information is completed within the current storage time window to obtain the parsing results of each downlink control information, where the storage time window is determined based on the configured number of frames of the memory.

[0021] According to a cell service processing method provided by the present invention, the writing of each frequency-domain data symbol in the frequency-domain data stream into the memory includes:

[0022] Writing any frequency-domain data symbol with full bandwidth into the memory;

[0023] The reading of the physical downlink shared channel data from the memory based on the parsing results of each downlink control information includes:

[0024] Determining the reading bandwidth based on the parsing result of any downlink control information;

[0025] Reading the physical downlink shared channel data from the memory based on the reading bandwidth.

[0026] According to a cell service processing method provided by the present invention, the reading of the physical downlink shared channel data from the memory based on the reading bandwidth includes:

[0027] Determining the associated system frame number, subframe number, and time slot number based on the frequency-domain data symbol corresponding to any downlink control information;

[0028] Determining the offset address of the second frequency-domain data symbol based on the system frame number, the subframe number, the time slot number, and the number of the second frequency-domain data symbol;

[0029] Determining the reading address corresponding to the second frequency-domain data symbol based on the cell base address and the offset address of the second frequency-domain data symbol;

[0030] Reading the physical downlink shared channel data from the memory based on the reading bandwidth and the reading address.

[0031] The present invention also provides a cell service processing apparatus, including:

[0032] A synchronization unit, configured to obtain a time-domain data stream based on cell search synchronization, perform time-frequency conversion on the time-domain data stream to obtain a frequency-domain data stream, and write each frequency-domain data symbol in the frequency-domain data stream into the memory, where each frequency-domain data symbol includes a first frequency-domain data symbol and a second frequency-domain data symbol, the first frequency-domain data symbol corresponds to a physical downlink control channel for carrying downlink control information, and the second frequency-domain data symbol corresponds to a physical downlink shared channel for carrying service information;

[0033] A blind detection unit, configured to perform blind detection on a physical downlink control channel based on a first frequency-domain data symbol in the frequency-domain data stream, obtain a plurality of downlink control information, and store the plurality of downlink control information into an information collection container;

[0034] An analysis unit, configured to take out each downlink control information from the information collection container based on a preset time and a preset order, and analyze each downlink control information to obtain an analysis result of each downlink control information;

[0035] A processing unit, configured to read physical downlink shared channel data from the memory based on the analysis result of each downlink control information, and process the physical downlink shared channel data.

[0036] The present invention further provides an electronic device, including a memory, a processor, and a computer program stored on the memory and running on the processor. When the processor executes the computer program, the method for processing cell services as described in any one of the above is implemented.

[0037] The present invention further provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the method for processing cell services as described in any one of the above is implemented.

[0038] The present invention further provides a computer program product, including a computer program. When the computer program is executed by a processor, the method for processing cell services as described in any one of the above is implemented.

[0039] The method, device, equipment, medium, and program product for processing cell services provided by the present invention can, after obtaining a frequency-domain data stream through cell search synchronization and time-frequency conversion, perform blind detection on a physical downlink control channel in real time based on a first frequency-domain data symbol in the frequency-domain data stream. This real-time processing method can ensure that downlink control information can be processed in a timely manner, avoiding affecting subsequent physical downlink shared channel service processing due to processing delay. At the same time, by writing each frequency-domain data symbol in the frequency-domain data stream into the memory, it is possible to first cache the physical downlink shared channel data, and then read the physical downlink shared channel data from the memory and perform non-real-time processing according to the analysis result of the downlink control information. This strategy effectively balances the relationship between system computing power and data processing requirements, and improves the utilization efficiency of computing power. By combining the real-time processing of the physical downlink control channel and the non-real-time processing of the physical downlink shared channel, the present invention optimizes the entire service processing flow, not only improving the processing ability of user service data, but also better coping with the challenge of the geometric progression increase in service data volume. Description of the Drawings

[0040] To more clearly illustrate the technical solutions in the present invention or related technologies, the following will briefly introduce the drawings required for use in the embodiments or related technology descriptions. Obviously, the drawings in the following descriptions are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0041] Figure 1 It is one of the schematic flowcharts of the cell service processing method provided by the present invention;

[0042] Figure 2 It is the schematic diagram of the time domain distribution of PDCCH and PDSCH provided by the present invention;

[0043] Figure 3 It is the schematic diagram of the DCI collection and scheduling detected by PDCCH provided by the present invention;

[0044] Figure 4 It is the schematic flowchart of the PDSCH data processing provided by the present invention;

[0045] Figure 5 It is the schematic diagram of the structure of multi-cell DDR writing and reading provided by the present invention;

[0046] Figure 6 It is the second schematic flowchart of the cell service processing method provided by the present invention;

[0047] Figure 7 It is the schematic diagram of the structure of the cell service processing device provided by the present invention;

[0048] Figure 8 It is the schematic diagram of the structure of the electronic device provided by the present invention. Detailed implementation manners

[0049] To make the objectives, technical solutions, and advantages of the present invention clearer, the following will clearly and completely describe the technical solutions in the present invention in conjunction with the drawings in the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0050] The Radio Network Temporary Identifier (RNTI) is a technical identifier introduced by the 4G standard to support dynamic scheduling and is also applicable in 5G NR (New Radio). RNTI is mainly divided into the following categories, each of which undertakes different functions:

[0051] C-RNTI: The Radio Network Temporary Identifier of the user (terminal), and its value range is between 128 and 65533.

[0052] SI-RNTI: System Information Radio Network Temporary Identifier, with a fixed value of 65535.

[0053] P-RNTI: Paging Radio Network Temporary Identifier, mainly used for paging the terminal, with a fixed value of 65534.

[0054] RA-RNTI: Random Access (Response) Radio Network Temporary Identifier, used for the base station to respond to the terminal's random access request. In this signaling, multiple temporary C-RNTIs (i.e., TempC-RNTI) related to the communication user (terminal) are carried, and these TempC-RNTIs are usually converted into formal C-RNTIs.

[0055] In 5G NR, the base station (Base Station, BS) schedules the PDSCH (carrying system messages or service data) through the PDCCH (carrying downlink control information), and this process is called downlink scheduling. It should be noted that the PDCCH and PDSCH are located in the same time slot. The 5G NR system schedules services in time slots as the basic unit. Each time slot is divided into two parts: the first part is the PDCCH channel, used to carry DCI (Downlink Control Information, downlink control information), and one or more DCIs may be carried within a single time slot. The DCI information indicates the parameters of the second part of the PDSCH channel (such as the position of the PDSCH in the frequency domain symbols, demodulation, and decoding information, etc.). The second part is the PDSCH channel, used to carry the user's service information.

[0056] Existing terminals (such as mobile phones) know the RNTIs and blind detection times they need to blindly detect, so the computational complexity of blind detection is small, and the PDSCH only needs to cache the data it needs, and the data volume is also relatively small. Therefore, most existing terminals first blindly detect and search for specific RNTIs at specific times and positions. After successful blind detection, they extract the corresponding PDSCH data for processing to obtain the user's service data. It should be understood that the terminal obtains the corresponding DCI information by blindly detecting a specific RNTI, and then guides the reception and processing of the PDSCH data.

[0057] However, the above blind detection method is a burst fixed-point mode, that is, blind detection is carried out at the burst moment and in the known RNTI mode. This non-real-time blind detection method cannot meet the need for blind detection processing of a large number of unknown RNTIs because it is impossible to quickly and effectively detect all possible RNTIs in the first time. In addition, with the rapid growth of mobile communication data volume, the PDSCH data volume also shows a geometric growth trend. The existing processing methods face increasing challenges when caching and processing this data. To this end, the present invention provides a cell service processing method, which combines the real-time processing of PDCCH and the non-real-time processing mode of PDSCH to overcome the above defects.

[0058] It should be noted that in the non-cooperative positioning system, the maximum number of DCIs detected by the blind detection of the PDCCH control channel (there are multiple DCIs within a single time slot, and each DCI corresponds to a user) within a single time slot is 45. In a local time window, the accumulated number of DCIs is large. For example, on average, there are 10 DCIs in 1 time slot (1 slot = 500 microseconds), and there are 20,000 DCIs in 1 second. This means that 20,000 user services are being transmitted in 1 second. If a huge number of DCIs cannot be processed in real time, it will affect the subsequent PDSCH service processing. Therefore, the present invention proposes to perform real-time processing on the PDCCH blind detection.

[0059] In addition, in the non-cooperative positioning system, PDSCH carries service information. By identifying a certain user (C-RNTI) message within a certain time window, since the user messages are of different lengths and the processing complexity of a single PDSCH service is higher than that of PDCCH, considering the system computing power, the embodiments of the present invention first cache the PDSCH service and then perform non-real-time processing within a certain time window. Thus, a dynamic window continuous frequency-domain data symbol writing is proposed, and based on the target DCI dynamic bandwidth extraction mode, non-real-time processing of the PDSCH service is carried out. The technical solution provided by the present invention will be introduced in detail below.

[0060] Figure 1 is one of the flow schematic diagrams of the cell service processing method provided by the present invention, as Figure 1 shown, the method includes:

[0061] Step 110, based on cell search synchronization, obtain a time-domain data stream, perform time-frequency conversion on the time-domain data stream to obtain a frequency-domain data stream, and write each frequency-domain data symbol in the frequency-domain data stream into a memory. Each frequency-domain data symbol includes a first frequency-domain data symbol and a second frequency-domain data symbol. The first frequency-domain data symbol corresponds to the physical downlink control channel and is used to carry downlink control information. The second frequency-domain data symbol corresponds to the physical downlink shared channel and is used to carry service information.

[0062] It should be noted that cell search synchronization is a key process in mobile communication, which is used to determine the synchronization relationship between the user terminal and the base station, and to determine the cell where the user terminal is currently located. This process usually involves detecting the synchronization signals sent by the base station, such as the Primary Synchronization Signal (PSS) and the Secondary Synchronization Signal (SSS), so as to obtain information such as time synchronization and cell ID. Cell search synchronization is a prerequisite for receiving and decoding the data sent by the base station.

[0063] Specifically, after cell search synchronization, a time-domain data stream can be obtained. Here, the time-domain data stream refers to a sequence of signal data that changes over time. In mobile communication, these signal data are usually digital signal sequences obtained from the wireless signals sent by the base station after being received by the antenna, down-converted, sampled, etc. The time-domain data stream contains all the information sent by the base station, but this information may be mixed together in the time domain and is difficult to directly analyze. Therefore, after obtaining the time-domain data stream, it is necessary to perform time-frequency conversion on each time-domain data in the time-domain data stream to convert the time-domain data into frequency-domain data.

[0064] Here, time-frequency conversion refers to the process of converting the time-domain data stream from the time domain to the frequency domain. This can be achieved by mathematical tools such as the Fast Fourier Transform (FFT). The purpose of time-frequency conversion is to separate different frequency components that are mixed together in the time domain, so that the signal can be further processed and analyzed in the frequency domain.

[0065] The frequency-domain data stream refers to the sequence of signal data represented in the frequency domain obtained after time-frequency conversion. Each data point in the frequency-domain data stream corresponds to a specific frequency component, so it is easier to identify and process different signal components.

[0066] It should be understood that the time-domain OFDM (Orthogonal Frequency Division Multiplexing) symbol is the basic unit that constitutes the time-domain data stream. Through time-frequency conversion of the time-domain data stream, the obtained frequency-domain data stream also includes multiple frequency-domain data symbols. Here, the frequency-domain data symbol refers to the basic unit in the frequency-domain data stream, which represents the amplitude and phase information of the signal at a specific frequency. These frequency-domain data symbols are the basis for subsequent decoding and processing.

[0067] It can be understood that the 5G NR system schedules services in time slots as the basic unit. A time slot includes two parts. The first part is the PDCCH channel, and the second part is the PDSCH channel. Therefore, the frequency-domain data symbols in the frequency-domain data stream can be divided into two categories, namely the first frequency-domain data symbols and the second frequency-domain data symbols, which respectively correspond to the PDCCH and the PDSCH. Among them, the PDCCH is used to carry downlink control information, such as scheduling information, power control commands, etc.; while the PDSCH is used to carry service information, such as user data, voice signals, etc. These two types of frequency-domain data symbols have different uses and importance in subsequent processing.

[0068] Furthermore, after obtaining the frequency-domain data stream through conversion, the frequency-domain data symbols in the frequency-domain data stream can be written into a memory to cache the PDSCH data, so as to read the corresponding PDSCH data from the memory for subsequent processing, thereby realizing the non-real-time processing of the PDSCH service. It should be understood that the above-mentioned memory can be a DDR (Double Data Rate SDRAM, double data rate synchronous dynamic random access memory). After cell search synchronization and FFT time-frequency conversion, continuous frequency-domain data symbols can be stored in the DDR. These frequency-domain data symbols are stored in units of blocks, and one storage block stores one frequency-domain data symbol. These frequency-domain data symbols are written into the memory according to a specific format and address to ensure that these data can be correctly read and processed subsequently.

[0069] Step 120: Perform blind detection of the physical downlink control channel based on the first frequency-domain data symbols in the frequency-domain data stream to obtain multiple pieces of downlink control information, and store the multiple pieces of downlink control information in an information collection container.

[0070] Specifically, after obtaining the frequency-domain data stream through time-frequency conversion, PDCCH blind detection can be performed in real time according to the first frequency-domain data symbols in the frequency-domain data stream. Here, PDCCH blind detection means that without knowing at which specific moment or position the PDCCH will be sent, the receiving end (such as a user terminal or a third-party device, etc.) attempts to decode all possible PDCCH candidate positions to find out the position and content where the PDCCH is actually sent.

[0071] Specifically, in the frequency-domain data stream, the first frequency-domain data symbol corresponds to the frequency-domain resource where the PDCCH is located. The receiving end will perform decoding attempts on all possible PDCCH candidates according to the predetermined PDCCH search space and the format of the PDCCH (such as aggregation level, DCI size, etc.). If the decoding is successful (i.e., the CRC check passes), it is considered that a valid PDCCH has been found, and the corresponding downlink control information (DCI) is obtained. Here, the downlink control information refers to the control information sent to the receiving end through the PDCCH, which includes scheduling information about downlink data transmission (such as PDSCH), power control commands, etc.

[0072] Once a valid DCI is found through PDCCH blind detection, the receiving end will store it in a special data structure called an information collection container. The information collection container is used to temporarily store all received DCIs for subsequent processing and analysis. Here, the information collection container refers to a data structure for storing and managing received downlink control information, which can be a queue, array, or hash table in memory, etc., for quickly accessing and retrieving stored information.

[0073] Step 130: Based on a preset order, take out each downlink control information from the information collection container, and parse the each downlink control information to obtain the parsing results of the each downlink control information.

[0074] Specifically, the receiving end will sequentially take out each DCI from the information collection container according to a preset order (such as time order, etc.) to parse each DCI. Here, taking out DCIs based on a preset order can ensure that the system can process the received information according to the predetermined logic and process, thus avoiding chaos and errors in information processing.

[0075] DCI parsing refers to decoding the DCI into readable information or instructions according to the format and definition of the DCI. This usually involves decoding and verifying each field of the DCI to ensure that the received information is accurate and complete. The parsed DCI information can be used to guide subsequent data reception and processing.

[0076] The parsing result of the DCI refers to the information or instructions obtained after decoding and verifying the DCI. These information or instructions usually include scheduling information of downlink data (such as PDSCH), power control commands, etc., which are crucial for the receiving end to correctly receive and process downlink data.

[0077] Step 140: Based on the parsing results of the each downlink control information, read the physical downlink shared channel data from the memory, and process the physical downlink shared channel data.

[0078] Specifically, according to the parsing results of each DCI, the receiving end can determine information such as the position of the PDSCH in the time domain and frequency domain and the modulation and coding scheme. Then, the receiving end will read the corresponding PDSCH data from the memory (such as DDR) according to this information.

[0079] After reading each PDSCH data, the PDSCH data can be processed to obtain the user's service data. Here, the processing of the PDSCH data usually includes steps such as demodulation, decoding, and verification. Specifically, the receiving end will demodulate the PDSCH data according to the information such as the modulation and coding scheme provided in the DCI and convert it into a baseband signal. Then, the receiving end will decode the demodulated data to recover the original service data. Finally, the receiving end will also verify the decoded data to ensure the accuracy and integrity of the data.

[0080] In the method provided by the embodiments of the present invention, after obtaining the frequency-domain data stream through cell search synchronization and time-frequency conversion, blind detection of the physical downlink control channel can be performed in real time based on the first frequency-domain data symbols in the frequency-domain data stream. This real-time processing method can ensure that the downlink control information can be processed in a timely manner and avoid affecting the service processing of the subsequent physical downlink shared channel due to processing delays. At the same time, by writing each frequency-domain data symbol in the frequency-domain data stream into the memory, it is possible to first cache the physical downlink shared channel data, and then, according to the parsing results of the downlink control information, read the physical downlink shared channel data from the memory and perform non-real-time processing. This strategy effectively balances the relationship between the system computing power and the data processing requirements and improves the utilization efficiency of the computing power. By combining the real-time processing of the physical downlink control channel and the non-real-time processing of the physical downlink shared channel, the present invention optimizes the entire service processing flow, which can not only improve the processing ability of the user's service data but also better cope with the challenge of the geometric progression increase in the service data volume.

[0081] Based on the above embodiments, the frequency-domain data stream is composed of multiple system frames, each system frame includes multiple subframes, each subframe corresponds to multiple time slots, and each time slot includes at least one first frequency-domain data symbol and multiple second frequency-domain data symbols.

[0082] It should be noted that the time-domain data stream consists of multiple system frames. Each system frame includes multiple sub-frames, each sub-frame corresponds to multiple time slots, and each time slot includes multiple OFDM symbols. After time-frequency conversion, each OFDM symbol corresponds to a frequency-domain data symbol. Therefore, the frequency-domain data stream also consists of multiple system frames. Each system frame includes multiple sub-frames, each sub-frame corresponds to multiple time slots, and each time slot includes multiple frequency-domain data symbols. Here, a system frame refers to the basic time unit for transmitting data and control information. A sub-frame is a division of a system frame, which further divides the time of the system frame into smaller units to more flexibly organize data transmission. A time slot is a smaller time unit of a sub-frame, which is used to allocate to users or channels for data transmission.

[0083] Figure 2 It is a schematic diagram of the time-domain distribution of PDCCH and PDSCH provided by the present invention. As Figure 2 shown, after cell search and synchronization, the Figure 2 time-domain data stream shown can be obtained. A complete radio frame includes system frames 0 to 1023. These system frames are periodically repeated, but the information carried by each system frame is different. Figure 2 Mainly taking system frame 0 as an example for display, each system frame includes 10 sub-frames (i.e., sub-frames 0 to 9), each sub-frame corresponds to 2 time slots, and each time slot includes 14 symbols (i.e., symbols 0 to 13). Among them, in 5G NR, the time-domain search space for PDCCH blind detection is usually the first 1 to 3 symbols of a time slot, and the specific number can be configured according to requirements. Generally, it is the first two symbols of a time slot, that is, symbol 0 and symbol 1 of each time slot. The PDCCH channel within a time slot carries 1 or more (up to 45) DCIs; within a time slot, except for the symbols corresponding to PDCCH, the remaining symbols correspond to PDSCH, which is used to carry one or more service messages.

[0084] For example, if PDCCH occupies 1 symbol (i.e., symbol 0), then PDSCH occupies 13 symbols (i.e., symbols 1 to 13); if PDCCH occupies 2 symbols (i.e., symbol 0 and symbol 1), then PDSCH occupies 12 symbols (i.e., symbols 2 to 13); if PDCCH occupies 3 symbols (i.e., symbols 0 to 2), then PDSCH occupies 11 symbols (i.e., symbols 3 to 13).

[0085] Based on any of the above embodiments, in step 110, the writing of each frequency-domain data symbol in the frequency-domain data stream into the memory includes:

[0086] Step 111, determining an offset address based on the system frame number, sub-frame number, time slot number, and symbol number corresponding to any frequency-domain data symbol;

[0087] Step 112: Determine the storage address corresponding to any frequency-domain data symbol based on the cell base address and the offset address;

[0088] Step 113: Write any frequency-domain data symbol into the memory based on the storage address.

[0089] It should be noted that in a wireless communication system, time is divided into a series of consecutive system frames, each of which has a unique number for identifying its position in time. Each system frame is usually further divided into multiple sub-frames, each of which also has a unique number. A sub-frame can be further divided into time slots, each of which also has a number. Within a time slot, data is transmitted in the form of symbols, and each symbol also has a number.

[0090] Specifically, when storing each frequency-domain data symbol in the DDR, it is necessary to first determine its corresponding storage address, which is jointly determined by the cell base address and the offset address. Here, the cell base address is a fixed starting address used to identify the starting position of a specific cell in the memory. This address is preset and unique for each cell. The offset address is a relative address calculated based on information such as the system frame number, sub-frame number, time slot number, and symbol number corresponding to each symbol, and is used to indicate the relative position of the frequency-domain data symbol in the memory. This address is relative to a reference point (such as the cell base address).

[0091] After calculating the offset address, based on the cell base address and the offset address, the storage address of the frequency-domain data symbol in the memory can be determined. This usually involves adding the cell base address and the offset address (or other forms of combined operations) to obtain the final storage address.

[0092] After determining the storage address, the specific position of the frequency-domain data symbol in the DDR memory can be calculated. Subsequently, through the interface of the DDR memory (such as the DDR controller), a write operation is performed to write the frequency-domain data symbol into the calculated storage address. This process is usually jointly completed by hardware (such as the DDR controller) and software (such as drivers or firmware). The hardware is responsible for providing the necessary interfaces and timing control, while the software is responsible for address calculation and data preparation, etc.

[0093] Based on any of the above embodiments, in step 111, the steps for determining the system frame number corresponding to any frequency-domain data symbol include:

[0094] When the number of configured frames in the memory is equal to the preset number of frames, use the actual system frame number corresponding to any frequency-domain data symbol as the system frame number;

[0095] When the number of configured frames in the memory is less than a preset number of frames, determine the system frame number corresponding to any frequency-domain data symbol based on the number of configured frames and the actual system frame number corresponding to any frequency-domain data symbol.

[0096] It should be noted that the number of configured frames in the memory refers to the number of system frames that can be stored in the pre-configured memory. For example, the number of configured frames can be 1024 or 64, etc. The preset number of frames refers to the threshold of the number of system frames set in advance, which is usually 1024 (i.e., the number of a complete radio frame).

[0097] Specifically, the number of system frames stored in the DDR can be custom-configured. For example, if 1024 is configured, then a complete radio frame is stored. In this case, the actual system frame number corresponding to each frequency-domain data symbol can be directly used as the system frame number for storage address calculation. If 64 system frames are configured to be stored, the escaped system frame numbers 0 to 63 need to be stored. The escape calculation formula is: MOD(actual system frame number, number of configured frames), where MOD is the modulo calculation. For example, if the configured number of stored frames is 64 and the current actual system frame number is 67, then the stored escaped frame number (i.e., the system frame number) is MOD(67, 64) = 3. If the current actual system frame number is 2, then the stored escaped frame number is MOD(2, 64) = 2.

[0098] Based on any of the above embodiments, step 130 specifically includes:

[0099] Within the current storage time window, sequentially extract each downlink control information from the information collection container based on a preset order, and complete the parsing of each downlink control information within the current storage time window to obtain the parsing results of each downlink control information, where the storage time window is determined based on the number of configured frames in the memory.

[0100] It should be noted that for the consistency of operations, all frequency-domain data symbols within the DDR temporary storage time slot are used to address and periodically store the air interface frames according to the escaped system frame number, and the storage time window is the number of DDR storage system frames configured.

[0101] Figure 3 It is a schematic diagram of the DCI collection and scheduling for PDCCH detection provided by the present invention, as Figure 3As shown, taking the configuration storage of 64 system frames as an example (one system frame is 10 milliseconds, so the storage time window is 640 milliseconds): Try to schedule and process all the DCI within the storage time window, and definitely process all the DCI within the time window before the periodic storage overwrite. For example, within the first storage time window, DCIn groups are detected in system frames 0 to 63. These DCI messages will be stored in the DCI collection container (this container follows the first-in, first-out principle). Before the arrival of the second escape storage system frame 63 (i.e., the second storage time window), the DCIn group must be processed, otherwise the data stored in the container will be overwritten.

[0102] It can be understood that when writing the DCI messages obtained by blind detecting each PDCCH into the collection container, the DCI messages, as well as the actual system frame number, subframe number, slot number, etc. where the DCI is located, can all be written into the container. Subsequently, in the first-in, first-out order, each group of DCI messages is taken out from the DCI collection container in sequence for parsing. The DCI parameters obtained by parsing will also be put into a secondary container (this container also follows the first-in, first-out principle), so that when scheduling DCI, the corresponding DCI parameters and the accompanying system frame number, subframe number, slot number, Rbshift offset (i.e., bit rate offset), etc. are taken out from this container to read PDSCH data from the DDR.

[0103] It should be understood that the above-mentioned accompanying system frame number, subframe number, slot number, and Rbshift offset, etc. are obtained based on DCI parsing. Within each slot, the system frame number, subframe number, and slot number corresponding to the first frequency-domain data symbol (such as symbol 0 and symbol 1) and the second frequency-domain data symbol (such as symbols 2 to 13) are the same. Therefore, based on the system frame number, subframe number, and slot number obtained by DCI parsing, the system frame number, subframe number, and slot number corresponding to each second frequency-domain data symbol (such as symbols 2 to 13) within this slot can be determined. Thus, the offset address can be determined based on the system frame number, subframe number, slot number, symbol number, and Rbshift offset corresponding to each second frequency-domain data symbol, so as to determine the read address for reading PDSCH data from the DDR based on this offset address and the cell base address.

[0104] Based on any of the above embodiments, in step 110, the writing of each frequency-domain data symbol in the frequency-domain data stream into the memory includes:

[0105] Writing any frequency-domain data symbol with the full bandwidth into the memory;

[0106] Correspondingly, in step 140, the reading of the physical downlink shared channel data from the memory based on the parsing results of the respective downlink control information includes:

[0107] Step 141: Determine the read bandwidth based on the parsing result of any downlink control information.

[0108] Step 142: Read the physical downlink shared channel data from the memory based on the read bandwidth.

[0109] Specifically, the embodiments of the present invention propose a strategy of writing frequency-domain data symbols with full bandwidth into DDR and reading DDR based on the DCI bandwidth. For example, the full bandwidth of a single symbol occupies 273 RBs (resource blocks, 1 RB = 12 REs, and RE is the sub-carrier of the NR OFDM system, i.e., the smallest resource element). Assuming that the PDSCH occupied bandwidth after DCI parsing is 2 RBs, then the read bandwidth is 2 RBs. If the PDCCH bandwidth is configured as the first two symbols 0 - 1 within a slot (1 slot = 14 symbols), and the PDSCH occupies symbols 2 - 13, then the DDR write is 273 RB @ symbols 2 - 13, and the DDR read is 2 RB @ symbols 2 - 13.

[0110] It can be understood that writing with full bandwidth means writing data to the DDR according to the entire bandwidth (273 RBs) for each symbol. The DDR read based on the DCI bandwidth means that the bandwidth for reading data is determined according to the bandwidth of the PDSCH obtained after DCI parsing. Since the PDSCH occupied bandwidth indicated after DCI parsing is 2 RBs, although the data is written to the DDR with full bandwidth (273 RBs), only 2 RB of data is read during the readout.

[0111] In the embodiments of the present invention, even if the data is initially stored in the form of full bandwidth, the read bandwidth of the data is dynamically adjusted by DCI, improving the flexibility and efficiency of the system because it allows optimizing data transmission according to the current network conditions and user requirements.

[0112] Figure 4 is a schematic flow diagram of PDSCH data processing provided by the present invention. As Figure 4 shown, when writing frequency-domain data symbols with full bandwidth into the DDR, a Ping Pang selection (or ping-pong operation) strategy can be adopted to achieve this. Here, the ping-pong operation is a common technique in computer science and hardware design, especially in dealing with data streams and cache management. It usually involves two or more cache or storage areas, and data is alternately written and read between these areas to achieve continuous processing and efficient utilization of data. In the DDR write scenario, the ping-pong operation means that the full-bandwidth frequency-domain data symbols A and B are alternately written to different areas or addresses of the DDR to achieve continuous storage and fast access of data.

[0113] Subsequently, according to the DCI parsing and DCI scheduling, determine the DDR read command based on the DCI bandwidth (i.e.,Figure 4 the DDR read command shown in , and then according to this command, read the corresponding PDSCH frequency-domain data from the DDC memory and cache this data. Here, caching means temporarily storing the data in a memory that can be accessed quickly for subsequent processing. By caching the PDSCH frequency-domain data, it can be ensured that the data can be accessed efficiently in subsequent processing steps, and at the same time, different parts in the processing pipeline are allowed to work in parallel.

[0114] Next, technologies such as channel estimation, equalization, and LDPC (Low-Density Parity-Check) decoding are used to process the cached PDSCH frequency-domain data to obtain the user's service data. Here, channel estimation refers to using known signals (such as reference signals or pilot signals) to estimate the characteristics of the wireless channel (such as amplitude, phase, and delay). This is because during wireless transmission, the signal is affected by various factors (such as multipath propagation, attenuation, and interference), resulting in signal distortion. Through channel estimation, the system can understand these distortions and accordingly adjust the received signal to improve the signal quality.

[0115] It can be understood that equalization is a signal processing technology used to compensate for channel distortion. It usually adjusts the received signal based on the results of channel estimation to restore the originally transmitted signal. In the embodiments of the present invention, equalization may involve applying one or more algorithms to the PDSCH frequency-domain data to reduce or eliminate the distortion caused by the channel. LDPC is a linear block code used for error detection and correction. It works by adding redundant information (i.e., check bits) to the transmitted data, and these check bits allow the receiving end to detect and correct errors after receiving the data. LDPC decoding is performed on the PDSCH data that has undergone channel estimation and equalization processing to recover the original user service data.

[0116] Based on any of the above embodiments, step 142 specifically includes:

[0117] Step 1421, based on the frequency-domain data symbols corresponding to the any downlink control information, determine the associated system frame number, subframe number, and time slot number;

[0118] Step 1422, based on the system frame number, the subframe number, and the time slot number, and the number of the second frequency-domain data symbol, determine the offset address of the second frequency-domain data symbol;

[0119] Step 1423, based on the cell base address and the offset address of the second frequency-domain data symbol, determine the read address corresponding to the second frequency-domain data symbol;

[0120] Step 1424: Read the physical downlink shared channel data from the memory based on the read bandwidth and the read address.

[0121] It should be noted that when reading the corresponding PDSCH data from the DDR, it is first necessary to determine the corresponding read address. Similarly, the read address can be determined by the cell base address and the calculated offset address.

[0122] Specifically, within each time slot, since the system frame numbers, sub-frame numbers, and time slot numbers corresponding to the first frequency-domain data symbols (such as symbol 0 and symbol 1) and the second frequency-domain data symbols (such as symbols 2 to 13) are the same, therefore, according to the system frame number, sub-frame number, and time slot number corresponding to the DCI information parsed from the DCI, the system frame number, sub-frame number, and time slot number corresponding to each second frequency-domain data symbol (such as symbols 2 to 13) within this time slot can be determined. Thus, the offset address can be determined based on the system frame number, sub-frame number, time slot number, symbol number, and Rbshift offset corresponding to each second frequency-domain data symbol, so as to determine the read address for reading the PDSCH data from the DDR based on this offset address and the cell base address.

[0123] Figure 5 It is a schematic structural diagram of multi-cell DDR writing and reading provided by the present invention. As Figure 5 shown, PCI0 to PCI2 in the figure are cell numbers. The multi-channel read-write polling arbitration is an arbitration mechanism for processing multiple read-write requests. In this mechanism, the system will process the read-write requests from different sources or with different functions in sequence according to certain rules and algorithms. For example, the arbitration mechanism is designed to process 4-way read-write requests, namely 1-way downlink write, 1-way downlink read, 1-way uplink write, and 1-way uplink read.

[0124] In the scenario of multi-cells, first, the base address division for DDR reading and writing is performed for each cell. Assume that the DDR chip (i.e., the DDR memory) has a storage space of 4GB, and its address bit width is 30bit (i.e., the width of the address lines used is 30 bits, which determines the memory space it can address. 30 address lines can address 2 30 (i.e., approximately 1GB) different memory locations), and the 30bit address addressing data bit width is 32bit, that is, one address addresses 4 bytes (the data bit width corresponding to each memory address is 32 bits).

[0125] For the convenience of addressing, the smallest storage unit for downlink 4RX is designed as a 64KB block (the smallest storage unit for uplink 2RX is a 32KB block). Here, downlink 4RX means that the device (or terminal) has 4 receiving antennas or channels in the downlink direction. For each frequency-domain data symbol within a time slot, the calculation formula for the storage unit it occupies is: , since the size of the storage unit is usually designed as a power of 2, the storage unit of the downlink 4RX is designed as a 64KB block.

[0126] Since 1 system frame = 10 subframes = 20 time slots = 280 symbols, one system frame requires storage space, and 64 system frames require storage space. Each cell's storage is allocated according to 64 system frame spaces. The total storage space of the three downlink cells (i.e., PCI0~PCI2) is: . The remaining 4GB - 3.2813GB = 0.7187GB is allocated to the uplink cells (i.e., RNTIx).

[0127] There are only 2 RXs for the uplink frequency-domain data symbols, and the DDR space occupied by a single symbol is halved. The uplink single symbol occupies 32KB of unit storage and also stores 64 system frame spaces. , and the allocated space meets the design requirements.

[0128] The embodiment of the present invention also provides another design scheme: the space occupied by a single symbol remains unchanged, still being 64KB, storing the space of 32 system frames, and the allocated space of 0.7187GB can also meet the requirements. This is consistent with the downlink addressing address mapping and reduces the design complexity to a certain extent.

[0129] The APP interface data bit width of the DDR chip is 256bit (that is, each time data is read from or written to the DDR memory, 256 bits (i.e., 32 bytes) of data can be processed), the address bit width is 30bit, and the 30bit address addressing data bit width is 32bit, that is, one address addresses 4 bytes. Since the interface data bit width is 256bit, that is, the lowest 3 bits of the 30bit address are always 0, and the 30bit address is incremented by 8 for addressing. It should be understood that since the APP data bit width is 256 bits, this means that 32 bytes can be transferred per access (256 bits / 8 bits = 32 bytes). Since each address corresponds to 4 bytes, each access will span 8 consecutive memory addresses (32 bytes / 4 bytes = 8). Since 256 bits (32 bytes) is a multiple of 2 8 so the lowest 3 bits of the 30-bit address (i.e., 2 0 , 2 1 , 2 2When determining the starting address of these 32 bytes, it remains unchanged. Therefore, these 3 bits can be considered to be always 0. And 30-bit address incrementing by 8 means that after each 256-bit (32-byte) data access, the address will increment by 8 (because each access spans 8 addresses, and each address is 4 bytes). In other words, after each complete 256-bit data read / write operation, the address will automatically be incremented by 8 (in the 30-bit address space) to access the next 32-byte data block in sequence.

[0130] Based on the above memory space allocation and design, in 30-bit (i.e., [29:0]) addressing, the 30-bit DDR base addresses are divided as follows: The base address of PCI0 in the DDR memory is 0x0000_0000 (downward), the base address of PCI1 in the DDR memory is 0x1180_0000 (downward), the base address of PCI2 in the DDR memory is 0x2300_0000, and the base address of RNTIx in the DDR is 0x3480_0000 (upward).

[0131] The offset address is used for 256-bit data addressing. The lower 3 bits of the offset address are always 0, and the address is incremented by 8 in a single operation. The following explains the calculation process of the offset address for DDR read / write.

[0132] The system frame number ranges from 0 to 63, occupying 6 bits, with 280 symbols. The ARM processor scheduling needs to clearly understand the mapping of the local time escape frame numbers 0 to 63 to the actual frame numbers 0 to 1023. The sub-frame number ranges from 0 to 9, occupying 4 bits, with 28 symbols. The time slot number ranges from 0 to 1, occupying 1 bit, with 14 symbols. The symbol number ranges from 0 to 13, occupying 4 bits. The RE internal number ranges from 0 to 3275, occupying 12 bits.

[0133] For the calculation of the downlink offset address, since each symbol occupies a 64KB block, the configured number of system frames stored is 64, one system frame includes 10 sub-frames, one sub-frame includes 2 time slots, and each time slot includes 14 symbols. Therefore, a total of 64KB storage units of blocks are required. Converting a single 64KB block to the 30-bit DDR APP address is , and finally, the formula for calculating the 30-bit offset address can be obtained as:

[0134] Downlink offset address calculation formula = (system frame number × 280 + sub-frame number × 28 + time slot number × 14 + symbol number) × 16384 + RBshift × 48.

[0135] For example, for system frame 1, subframe 0, time slot 0, symbol 1, RBshift = 0, the offset address is: .

[0136] For another example, for system frame 63, subframe 9, time slot 1, symbol 13, RBshift = 10, the offset address is: .

[0137] Based on any of the above embodiments, Figure 6 is the second schematic flow diagram of the cell service processing method provided by the present invention. As Figure 6 shown, the method includes:

[0138] Step S1, after the SSB cell search synchronization, obtain the OFDM symbol timing boundary (the start and end of the symbol) and the corresponding system frame number, subframe number, time slot number, symbol number, etc. After synchronization, it cycles periodically as Figure 2 shown. Here, SSB (Synchronization Signal Block) synchronization refers to a key technology in the 5G NR network, mainly used to achieve synchronization between the user equipment (i.e., the terminal) and the base station. SSB is a key signal block in the 5G NR network, which includes two parts: synchronization signal and broadcast signal. The synchronization signal includes PSS and SSS, and the broadcast signal includes the data of PBCH (Physical Broadcast Channel) and DMRS (Demodulation Reference Signal).

[0139] Step S2, after FFT time-frequency conversion, store the continuous frequency-domain data symbols in the full bandwidth into the DDR, store them in units of frequency-domain data symbols in blocks, and store one frequency-domain data symbol in one storage block. The storage address of the DDR is addressed by transposing [system frame number, subframe number, time slot number, symbol number].

[0140] Step S3, perform PDCCH blind detection based on the frequency-domain data symbols after FFT time-frequency conversion, and put the DCI information output by the blind detection into the collection container.

[0141] Step S4, take out the DCI information from the container in the first-in-first-out order and perform DCI parsing. According to the parsing result, perform DCI scheduling to determine the read bandwidth of the DCI parsing. According to the DCI parsing parameters and the read bandwidth, read the PDSCH data from the DDR and perform subsequent processing to obtain the user's service data.

[0142] The method provided by the embodiment of the present invention realizes the combination of the real-time processing of PDCCH and the non-real-time processing mode of PDSCH by performing real-time processing on the PDCCH blind detection, continuously writing the frequency-domain data symbols in the dynamic window into the DDR, reading the PDSCH data based on the dynamic bandwidth of the target DCI, and performing non-real-time processing on the PDSCH service, and supports multiple cells.

[0143] The cell service processing device provided by the present invention will be described below. The cell service processing device described below can be correspondingly referred to the cell service processing method described above.

[0144] Based on any of the above embodiments, Figure 7 is a schematic structural diagram of the cell service processing device provided by the present invention, as Figure 7 shown. The device includes:

[0145] A synchronization unit 710, configured to obtain a time-domain data stream based on cell search synchronization, perform time-frequency conversion on the time-domain data stream to obtain a frequency-domain data stream, and write each frequency-domain data symbol in the frequency-domain data stream into a memory. Each frequency-domain data symbol includes a first frequency-domain data symbol and a second frequency-domain data symbol. The first frequency-domain data symbol corresponds to a physical downlink control channel and is used to carry downlink control information. The second frequency-domain data symbol corresponds to a physical downlink shared channel and is used to carry service information;

[0146] A blind detection unit 720, configured to perform blind detection on a physical downlink control channel based on the first frequency-domain data symbol in the frequency-domain data stream to obtain a plurality of downlink control information, and store the plurality of downlink control information in an information collection container;

[0147] An analysis unit 730, configured to take out each downlink control information from the information collection container based on a preset time and a preset order, and analyze each downlink control information to obtain an analysis result of each downlink control information;

[0148] A processing unit 740, configured to read physical downlink shared channel data from the memory based on the analysis result of each downlink control information, and process the physical downlink shared channel data.

[0149] The device provided by the embodiment of the present invention can, after obtaining the frequency-domain data stream through cell search synchronization and time-frequency conversion, perform blind detection of the physical downlink control channel in real time based on the first frequency-domain data symbols in the frequency-domain data stream. This real-time processing method can ensure that the downlink control information can be processed in a timely manner, avoiding affecting the service processing of the subsequent physical downlink shared channel due to processing delay. At the same time, by writing each frequency-domain data symbol in the frequency-domain data stream into the memory, it is possible to first cache the physical downlink shared channel data, and then read the physical downlink shared channel data from the memory and perform non-real-time processing according to the parsing result of the downlink control information. This strategy effectively balances the relationship between the system computing power and the data processing requirements, improving the utilization efficiency of the computing power. By combining the real-time processing of the physical downlink control channel and the non-real-time processing of the physical downlink shared channel, the present invention optimizes the entire service processing flow, which can not only improve the processing ability of user service data, but also better cope with the challenge of the geometric progression increase in the service data volume.

[0150] Based on any of the above embodiments, the frequency-domain data stream consists of multiple system frames, each system frame includes multiple sub-frames, each sub-frame corresponds to multiple time slots, and each time slot includes at least one first frequency-domain data symbol and multiple second frequency-domain data symbols;

[0151] Correspondingly, the synchronization unit 710 includes a data writing sub-unit, and the data writing sub-unit is used for:

[0152] Based on the system frame number, sub-frame number, time slot number, and symbol number corresponding to any frequency-domain data symbol, determine the offset address;

[0153] Based on the cell base address and the offset address, determine the storage address corresponding to any frequency-domain data symbol;

[0154] Based on the storage address, write any frequency-domain data symbol into the memory.

[0155] Based on any of the above embodiments, the data writing sub-unit is specifically used for:

[0156] When the configured number of frames in the memory is equal to the preset number of frames, use the actual system frame number corresponding to any frequency-domain data symbol as the system frame number;

[0157] When the configured number of frames in the memory is less than the preset number of frames, based on the configured number of frames and the actual system frame number corresponding to any frequency-domain data symbol, determine the system frame number corresponding to any frequency-domain data symbol.

[0158] Based on any of the above embodiments, the parsing unit 730 is specifically used for:

[0159] Within the current storage time window, each downlink control information is sequentially retrieved from the information collection container based on a preset order, and the parsing of each downlink control information is completed within the current storage time window to obtain the parsing results of each downlink control information, where the storage time window is determined based on the configured number of frames of the memory.

[0160] Based on any of the above embodiments, the data writing subunit is configured to:

[0161] Write the full bandwidth of any frequency-domain data symbol into the memory;

[0162] Correspondingly, the processing unit 740 includes a data reading subunit, and the data reading subunit is configured to:

[0163] Determine the read bandwidth based on the parsing result of any downlink control information;

[0164] Read the physical downlink shared channel data from the memory based on the read bandwidth.

[0165] Based on any of the above embodiments, the data reading subunit is specifically configured to:

[0166] Determine the associated system frame number, subframe number, and time slot number based on the frequency-domain data symbol corresponding to the any downlink control information;

[0167] Determine the offset address of the second frequency-domain data symbol based on the system frame number, the subframe number, the time slot number, and the number of the second frequency-domain data symbol;

[0168] Determine the read address corresponding to the second frequency-domain data symbol based on the cell base address and the offset address of the second frequency-domain data symbol;

[0169] Read the physical downlink shared channel data from the memory based on the read bandwidth and the read address.

[0170] Figure 8 Illustrates a schematic diagram of the physical structure of an electronic device, such as Figure 8As shown in the figure, the electronic device may include: a processor 810, a communication interface 820, a memory 830, and a communication bus 840. Among them, the processor 810, the communication interface 820, and the memory 830 complete communication with each other through the communication bus 840. The processor 810 may call logic instructions in the memory 830 to execute a cell service processing method, which includes: obtaining a time-domain data stream based on cell search synchronization, performing time-frequency conversion on the time-domain data stream to obtain a frequency-domain data stream, and writing each frequency-domain data symbol in the frequency-domain data stream into the memory. Each of the frequency-domain data symbols includes a first frequency-domain data symbol and a second frequency-domain data symbol. The first frequency-domain data symbol corresponds to a physical downlink control channel and is used to carry downlink control information. The second frequency-domain data symbol corresponds to a physical downlink shared channel and is used to carry service information; performing blind detection on the physical downlink control channel based on the first frequency-domain data symbol in the frequency-domain data stream to obtain a plurality of downlink control information, and storing the plurality of downlink control information in an information collection container; taking out each downlink control information from the information collection container based on a preset order, and parsing each downlink control information to obtain a parsing result of each downlink control information; reading physical downlink shared channel data from the memory based on the parsing result of each downlink control information, and processing the physical downlink shared channel data.

[0171] In addition, when the logic instructions in the above-mentioned memory 830 are implemented in the form of a software functional unit and sold or used as an independent product, they may be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the related technology, or a part of this technical solution, may be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: various media such as a USB flash drive, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk, or an optical disc that can store program codes.

[0172] On the other hand, the present invention also provides a computer program product, which includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the cell service processing method provided by the above-mentioned various methods. The method includes: based on cell search synchronization, obtaining a time-domain data stream, performing time-frequency conversion on the time-domain data stream to obtain a frequency-domain data stream, and writing each frequency-domain data symbol in the frequency-domain data stream into a memory. Each of the frequency-domain data symbols includes a first frequency-domain data symbol and a second frequency-domain data symbol. The first frequency-domain data symbol corresponds to a physical downlink control channel and is used to carry downlink control information. The second frequency-domain data symbol corresponds to a physical downlink shared channel and is used to carry service information; performing blind detection of the physical downlink control channel based on the first frequency-domain data symbol in the frequency-domain data stream to obtain a plurality of downlink control information, and storing the plurality of downlink control information in an information collection container; taking out each downlink control information from the information collection container based on a preset order, and parsing each downlink control information to obtain an analysis result of each downlink control information; based on the analysis results of each downlink control information, reading physical downlink shared channel data from the memory and processing the physical downlink shared channel data.

[0173] In another aspect, the present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it is implemented to execute the cell service processing method provided by the above-mentioned various methods. The method includes: based on cell search synchronization, obtaining a time-domain data stream, performing time-frequency conversion on the time-domain data stream to obtain a frequency-domain data stream, and writing each frequency-domain data symbol in the frequency-domain data stream into a memory. Each of the frequency-domain data symbols includes a first frequency-domain data symbol and a second frequency-domain data symbol. The first frequency-domain data symbol corresponds to a physical downlink control channel and is used to carry downlink control information. The second frequency-domain data symbol corresponds to a physical downlink shared channel and is used to carry service information; performing blind detection of the physical downlink control channel based on the first frequency-domain data symbol in the frequency-domain data stream to obtain a plurality of downlink control information, and storing the plurality of downlink control information in an information collection container; taking out each downlink control information from the information collection container based on a preset order, and parsing each downlink control information to obtain an analysis result of each downlink control information; based on the analysis results of each downlink control information, reading physical downlink shared channel data from the memory and processing the physical downlink shared channel data.

[0174] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art can understand and implement it without creative effort.

[0175] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the essence of the above technical solution, or the part that contributes to the related technology, can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0176] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for processing cell services, characterized in that, Including: Based on cell search synchronization, a time-domain data stream is obtained, time-frequency conversion is performed on the time-domain data stream to obtain a frequency-domain data stream, and each frequency-domain data symbol in the frequency-domain data stream is written into a memory in full bandwidth. Each of the frequency-domain data symbols includes a first frequency-domain data symbol and a second frequency-domain data symbol. The first frequency-domain data symbol corresponds to a physical downlink control channel and is used to carry downlink control information. The second frequency-domain data symbol corresponds to a physical downlink shared channel and is used to carry service information; Based on the first frequency-domain data symbol in the frequency-domain data stream, blind detection of the physical downlink control channel is performed to obtain a plurality of downlink control information, and the plurality of downlink control information is stored in an information collection container; Based on a preset order, each downlink control information is taken out from the information collection container, and each downlink control information is parsed to obtain a parsing result of each downlink control information; Based on the parsing result of any downlink control information, a reading bandwidth is determined. Based on the reading bandwidth, physical downlink shared channel data is read from the memory, and the physical downlink shared channel data is processed; The reading of the physical downlink shared channel data from the memory based on the reading bandwidth includes: Based on the frequency-domain data symbol corresponding to any downlink control information, a system frame number, a subframe number, and a time slot number of the associated path are determined; Based on the system frame number, the subframe number, the time slot number, and the number of the second frequency-domain data symbol, an offset address of the second frequency-domain data symbol is determined; Based on a cell base address and the offset address of the second frequency-domain data symbol, a reading address corresponding to the second frequency-domain data symbol is determined; Based on the reading bandwidth and the reading address, physical downlink shared channel data is read from the memory.

2. The cell service processing method according to claim 1, characterized in that The frequency-domain data stream is composed of a plurality of system frames. Each system frame includes a plurality of subframes. Each subframe corresponds to a plurality of time slots. Each time slot includes at least one first frequency-domain data symbol and a plurality of second frequency-domain data symbols; The writing of each frequency-domain data symbol in the frequency-domain data stream into the memory in full bandwidth includes: Based on the system frame number, subframe number, time slot number, and symbol number corresponding to any frequency-domain data symbol, an offset address is determined; Based on a cell base address and the offset address, a storage address corresponding to any frequency-domain data symbol is determined; Based on the storage address, any frequency-domain data symbol is written into the memory in full bandwidth.

3. The cell service processing method according to claim 2, wherein The determining step of the system frame number corresponding to any frequency-domain data symbol includes: When the configured number of frames in the memory is equal to a preset number of frames, the actual system frame number corresponding to any frequency-domain data symbol is used as the system frame number; When the configured number of frames in the memory is less than the preset number of frames, based on the configured number of frames and the actual system frame number corresponding to any frequency-domain data symbol, the system frame number corresponding to any frequency-domain data symbol is determined.

4. The cell service processing method according to claim 1, wherein The taking out of each downlink control information from the information collection container based on a preset order and the parsing of each downlink control information to obtain the parsing result of each downlink control information includes: Within the current storage time window, each downlink control information is sequentially retrieved from the information collection container based on a preset order, and the parsing of each downlink control information is completed within the current storage time window to obtain the parsing results of each downlink control information, where the storage time window is determined based on the configured number of frames of the memory.

5. A cell service processing device, characterized in that, Including: A synchronization unit, configured to obtain a time-domain data stream based on cell search synchronization, perform time-frequency conversion on the time-domain data stream to obtain a frequency-domain data stream, and write all frequency-domain data symbols in the frequency-domain data stream into the memory in full bandwidth. The frequency-domain data symbols include a first frequency-domain data symbol and a second frequency-domain data symbol. The first frequency-domain data symbol corresponds to a physical downlink control channel for carrying downlink control information, and the second frequency-domain data symbol corresponds to a physical downlink shared channel for carrying service information; A blind detection unit, configured to perform blind detection of a physical downlink control channel based on the first frequency-domain data symbol in the frequency-domain data stream to obtain a plurality of downlink control information, and store the plurality of downlink control information in an information collection container; An analysis unit, configured to retrieve each downlink control information from the information collection container based on a preset time and a preset order, and analyze each downlink control information to obtain the analysis results of each downlink control information; A processing unit, configured to determine a read bandwidth based on the analysis result of any downlink control information, read physical downlink shared channel data from the memory based on the read bandwidth, and process the physical downlink shared channel data; Specifically, the processing unit is configured to: Determine the associated system frame number, sub-frame number, and time slot number based on the frequency-domain data symbol corresponding to the any downlink control information; Determine the offset address of the second frequency-domain data symbol based on the system frame number, the sub-frame number, the time slot number, and the number of the second frequency-domain data symbol; Determine the read address corresponding to the second frequency-domain data symbol based on the cell base address and the offset address of the second frequency-domain data symbol; Read physical downlink shared channel data from the memory based on the read bandwidth and the read address.

6. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the cell service processing method according to any one of claims 1 to 4.

7. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the cell service processing method according to any one of claims 1 to 4.

8. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the cell service processing method according to any one of claims 1 to 4.

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