Display panel and preparation method thereof

Abstract

The invention discloses a display panel and a preparation method of the display panel. The display panel comprises a substrate; a pixel defining layer disposed on the substrate; wherein the pixel limiting layer is provided with a plurality of pixel openings, each pixel opening is internally provided with at least one dam, and the pixel opening is limited into at least two first openings by the dams; a sub-pixel disposed in the first opening; wherein the sub-pixels located in the same pixel opening have at least one light emitting color. According to the invention, the opening size of the sub-pixels can be limited and the aperture ratio of the display panel can be improved, so that the resolution of the display panel is improved and the display effect is improved.

Description

Technical Field

[0001] This application relates to the field of display technologies, and particularly to a display panel and a method for manufacturing the display panel. Background Art

[0002] Semiconductor quantum dots (QDs) are an important type of fluorescent nanomaterials. Using quantum dot materials as the light-emitting layer materials in the field of optoelectronic displays has gradually become a trend for future development.

[0003] In the prior art, the patterning process of quantum dots is usually achieved by inkjet printing. However, the prior art cannot fabricate a display panel with high resolution and good performance. Summary of the Invention

[0004] To solve the above problems or other problems, the present application provides the following technical solutions.

[0005] The first technical solution adopted by the present application is to provide a display panel, including: a substrate; a pixel definition layer disposed on the substrate; wherein, the pixel definition layer is provided with a plurality of pixel openings, and at least one dam is disposed in each pixel opening, and the dam defines the pixel opening into at least two first openings; a sub-pixel disposed in the first opening; wherein, the sub-pixels located in the same pixel opening have at least one emission color.

[0006] To solve the above technical problems, the second technical solution adopted by the present application is to provide a method for manufacturing a display panel, including: obtaining a substrate; forming a pixel definition layer on the substrate; wherein, the pixel definition layer is provided with a plurality of pixel openings; forming at least one dam in each pixel opening; wherein, the dam defines the pixel opening into at least two first openings; forming sub-pixels in the first openings; wherein, the sub-pixels located in the same pixel opening have at least one emission color.

[0007] The beneficial effects of the present application are: Different from the prior art, the present application provides a display panel and a method for manufacturing the display panel. By disposing at least one dam in the pixel opening defined by the pixel definition layer, and defining each pixel opening into at least two first openings by the dam, and disposing sub-pixels with at least one emission color in the multiple first openings within the same pixel opening, the opening size of the sub-pixels can be restricted and the aperture ratio of the display panel can be increased, thereby improving the resolution of the display panel and then improving the display effect. Description of the Drawings

[0008] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the accompanying drawings required for the description of the examples. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0009] Figure 1 It is a schematic structural diagram of the first embodiment of the display panel of the present application;

[0010] Figure 2 It is a schematic structural diagram of the second embodiment of the display panel of the present application;

[0011] Figure 3 It is a schematic flow diagram of the first embodiment of the manufacturing method of the display panel of the present application;

[0012] Figure 4 It is a schematic flow diagram of the second embodiment of the manufacturing method of the display panel of the present application;

[0013] Figure 5 It is a schematic structural diagram of one embodiment of the pixel defining structure obtained in S204;

[0014] Figure 6 It is a schematic structural diagram of one embodiment of the pixel defining structure obtained in S206;

[0015] Figure 7 It is a schematic structural diagram of one embodiment of the pixel defining structure obtained in S207;

[0016] Figure 8 It is a schematic structural diagram of one embodiment of the pixel defining structure obtained in S208;

[0017] Figure 9 It is a schematic structural diagram of one embodiment of the pixel defining structure obtained in S209;

[0018] Figure 10 It is a schematic structural diagram of one embodiment of the pixel defining structure obtained in S211;

[0019] Figure 11 It is a schematic structural diagram of one embodiment of the pixel defining structure obtained in S214;

[0020] Figure 12 It is a schematic structural diagram of one embodiment of the pixel defining structure obtained in S215. Detailed implementation manners

[0021] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0022] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "the" and "said" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless clearly stated otherwise in the context. The term "plural" generally includes at least two, but does not exclude the case of including at least one.

[0023] It should be understood that the term "and / or" used herein is only a relationship describing the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0024] It should be understood that the term "comprising", "including" or any other variant used herein is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, the elements defined by the statement "including..." do not exclude the existence of additional identical elements in the process, method, article or device including the said elements.

[0025] In one implementation, the patterning process of quantum dots (Quantum Dot, QD) is usually achieved by inkjet printing. However, the morphology and thickness uniformity of the film formed by inkjet printing are both poor, which is only suitable for preparing devices with medium and low pixel densities, and it is difficult to prepare high-PPI (pixels per inch, that is, the number of pixels per inch) devices.

[0026] In another implementation, the patterning process of quantum dots is achieved by lithography to avoid being limited by PPI. However, lithography requires modification of the quantum dot material to avoid lithography damage, but modifying the quantum dot material may cause the structure of the quantum dots to be damaged, thereby leading to a decrease in the device performance or lifespan, and thus affecting the display effect.

[0027] Based on the above situation, the present application provides a display panel and a method for manufacturing the display panel, which can solve the problem that a display panel with high resolution and good performance cannot be manufactured in the above embodiments.

[0028] To illustrate the specific structure of the display panel of the present application, please refer to Figure 1 , Figure 1 which is a schematic structural diagram of the first embodiment of the display panel of the present application.

[0029] In this embodiment, the display panel 100 includes a substrate 10, a pixel defining layer 20 (Pixel Defining Layer, PDL) and a dam 30 disposed on the substrate 10. The pixel defining layer 20 is provided with a plurality of pixel openings 201, and at least one dam 30 is disposed in each pixel opening 201. The dam 30 defines the pixel opening 201 into at least two first openings 301, and sub-pixels are disposed in the first openings 301. Among them, the sub-pixels located in the same pixel opening 201 have at least one emission color.

[0030] Among them, the number of dams 30 disposed in each pixel opening 201 can be set to 1, 2 or more according to needs, and the present application does not limit this.

[0031] Among them, both ends of the dam 30 are in contact with the pixel defining layer 20.

[0032] It can be understood that by defining each pixel opening 201 into at least two first openings 301 by the dam 30, and disposing sub-pixels of at least one color in the plurality of first openings 301 within the same pixel opening 201, the opening size of the sub-pixels can be restricted and the aperture ratio of the display panel 100 can be increased, thereby increasing the resolution of the display panel 100.

[0033] Continuing to refer to Figure 1 , in some embodiments, along the direction away from the substrate 10, the sub-pixel includes a first electrode portion 40, a light-emitting functional portion 50, and a second electrode portion 60 disposed in sequence. Among them, the first electrode portion 40 is used to form the anode of the sub-pixel, and the second electrode portion 60 is used to form the cathode of the sub-pixel.

[0034] In some embodiments, the pixel defining layer 20 is provided with at least one first via 21 connected to the second electrode portion 60. In some embodiments, the dam 30 is provided with a second via 31 connected to the second electrode portion 60.

[0035] One end of the first via 21 and the second via 31 in the above embodiments are respectively connected to the conductive layer of the substrate 10, and the other end of the first via 21 and the second via 31 are respectively connected to the second electrode portion 60 of the sub-pixel, so that the second electrode portion 60 is connected to the conductive layer through the first via 21 or the second via 31.

[0036] Specifically, the first vias 21 or the second vias 31 are used to transmit the VSS (low voltage power supply voltage) signal in the conductive layer to the second electrode portion 60 of the sub-pixel.

[0037] Wherein, the first electrode portion 40 of the sub-pixel is electrically connected to the array layer through the vias 11 provided on the substrate 10, so as to transmit the VDD (high voltage power supply voltage) signal to the anode of the sub-pixel through the vias 11.

[0038] It can be understood that by respectively providing the first vias 21 and the second vias 31 on the pixel defining layer 20 and the dam 30, and connecting the second electrode portion 60 of each sub-pixel to the conductive layer through the first vias 21 or the second vias 31, the cathode overlapping performance of each sub-pixel can be ensured, thereby improving the display effect of the display panel 100.

[0039] In some embodiments, a plurality of first vias 21 may be provided only on the pixel defining layer 20, and the sub-pixel extends to the first vias 21 through the side connected to the pixel defining layer 20 and covers the first vias 21.

[0040] In some embodiments, one side of the sub-pixel is connected to the pixel defining layer 20 and one side is connected to the dam 30. Then, the side connected to the pixel defining layer 20 is connected through the first vias 21, or the side connected to the dam 30 is connected through the second vias 31, or is connected to both the first vias 21 and the second vias 31 at the same time.

[0041] The sub-pixel can be connected to the first vias 21 or the second vias 31 through the extension of one side wall, or can be connected to a plurality of first vias 21 through the extension of adjacent two side walls, or the adjacent two side walls are respectively connected to the first vias 21 and the second vias 31.

[0042] In this embodiment, for the sub-pixels in the same column, they all extend in the same direction to cover the side wall of the pixel defining layer 20, the first vias 21, and the side wall of the dam 30, that is, the second vias 31.

[0043] In this embodiment, the thickness of the dam 30 is less than or equal to the thickness of the pixel defining layer 20.

[0044] In some embodiments, the thickness of the pixel defining layer 20 is greater than or equal to 0.4 μm and less than or equal to 5 μm. The thickness of the dam 30 is greater than or equal to 0.3 μm and less than or equal to 5 μm. In some specific embodiments, the difference between the thickness of the pixel defining layer 20 and the thickness of the dam 30 is greater than 0.1 μm. In some specific embodiments, the thicknesses of both the pixel defining layer 20 and the dam 30 are less than 2 μm.

[0045] Understandably, setting the thickness of the dam 30 to be less than the thickness of the pixel defining layer 20 can prevent the light-emitting material of the sub-pixels from climbing along the sidewalls of the pixel defining layer 20, thereby ensuring the film formation uniformity within each first opening 301, and then ensuring the film thickness uniformity.

[0046] In some embodiments, the substrate 10 may be a flexible substrate or a rigid substrate. In a specific implementation scenario, the substrate 10 may be a polymer substrate, a plastic substrate, or an ultra-thin glass substrate. In another specific implementation scenario, the substrate 10 may be a glass substrate. The present application does not limit this.

[0047] In some embodiments, the pixel defining layer 20 and the dam 30 are made of the same material. In some specific embodiments, the pixel defining layer 20 and the dam 30 may be inorganic materials or fluorine-containing organic materials. Understandably, since the pixel defining layer 20 and the dam 30 are made of the same material, the pixel defining layer 20 and the dam 30 can be formed by the same process.

[0048] In other embodiments, the material of the pixel defining layer 20 may be different from the material of the dam 30, and the present application does not limit this.

[0049] In this embodiment, the sub-pixels include a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. In some embodiments, the first color sub-pixel is a red (Red, R) sub-pixel, the second color sub-pixel is a green (Green, G) sub-pixel, and the third color sub-pixel is a blue (Blue, B) sub-pixel.

[0050] In some embodiments, the light-emitting colors of the sub-pixels disposed in at least two first openings 301 in the same pixel opening 201 are different.

[0051] In some embodiments, two dams 30 are disposed within each pixel opening 201. The two ends of the dam 30 are in contact with the pixel defining layer 20, and the dam 30 defines the pixel opening 201 into at least three first openings 301. Specifically, please continue to refer to Figure 1 .

[0052] In this embodiment, the first electrode portions 40 of the sub-pixels are disposed on the substrate 10, on the side of the pixel defining layer 20 close to the substrate 10. The first electrode portions 40 of different sub-pixels are insulated and spaced apart, and the orthographic projection of the first electrode portions 40 on the substrate 10 covers the orthographic projection of the first opening 301.

[0053] Among them, the light-emitting functional part is disposed in the first opening 301 and covers the side of the first electrode part 40 away from the substrate 10. The light-emitting functional parts located in the same pixel opening 201 have at least one light-emitting color. The light-emitting functional part includes a hole injection layer, a hole transport layer, a light-emitting layer, a charge generation layer, and an electron injection layer disposed in sequence.

[0054] In some embodiments, the material of the light-emitting functional part is a quantum dot light-emitting material.

[0055] In some embodiments, the light-emitting functional part includes a first light-emitting functional part 51, a second light-emitting functional part 52, and a third light-emitting functional part. Among them, the first light-emitting functional part 51 is used to form a first color sub-pixel, the second light-emitting functional part 52 is used to form a second color sub-pixel, and the third light-emitting functional part 53 is used to form a third color sub-pixel.

[0056] In some specific embodiments, the light-emitting material of the first light-emitting functional part 51 is a red quantum dot, the light-emitting material of the second light-emitting functional part 52 is a green quantum dot, and the light-emitting material of the third light-emitting functional part 53 is a blue quantum dot. The above quantum dots are all electroluminescent quantum dot materials.

[0057] Among them, the second electrode part 60 is disposed in the first opening 301. The second electrode part 60 is located on the side of the light-emitting functional part away from the substrate 10. At least a part of the second electrode part 60 covers at least one side wall of the pixel defining layer 20 facing the first opening 301 and extends to the top wall of the pixel defining layer 20.

[0058] In some embodiments, the second electrode parts 60 of adjacent sub-pixels are spaced apart;

[0059] In some embodiments, the second electrode parts 60 of adjacent sub-pixels are spaced apart by an insulating part. The insulating part is disposed on the top wall of the pixel defining layer 20 and the dam 30. The orthographic projection of the insulating part on the substrate 10 is located outside the orthographic projection of the second electrode part 60 on the substrate 10.

[0060] In some embodiments, the second electrode part 60 includes a main body part and an extension part. The main body part is located in the first opening 301 and covers the light-emitting functional part. The extension part covers at least one side wall of the pixel defining layer 20 close to the main body part and / or at least one side wall of the dam 30 close to the main body part, and extends to the top wall of the pixel defining layer 20 to cover the first via hole 21 and / or extends to the top wall of the dam 30 to cover the second via hole 31.

[0061] In some embodiments, the second electrode parts 60 of adjacent sub-pixels are connected to each other.

[0062] Please continue to refer to Figure 1, in some specific embodiments, the main body of the second electrode portion 60 for forming the first color sub-pixel is located in the left first opening 301, covering the first light-emitting functional portion 51. The extending portion of the second electrode portion 60 covers the side wall of the pixel defining layer 20 near the main body portion and extends to the top wall of the pixel defining layer 20 to cover the first via 21. The main body of the second electrode portion 60 for forming the second color sub-pixel is located in the middle first opening 301, covering the second light-emitting functional portion 52. The extending portion of the second electrode portion 60 covers the side wall of the left dam 30 near the main body portion and extends to the top wall of the left dam 30 to cover the second via 31. The main body of the second electrode portion 60 for forming the third color sub-pixel is located in the right first opening 301, covering the third light-emitting functional portion 53. The extending portion of the second electrode portion 60 covers the side wall of the left dam 30 near the main body portion and extends to the top wall of the left dam 30 to cover the second via 31.

[0063] It can be understood that by providing two dams 30 in each pixel opening 201, the dams 30 define the pixel opening 201 into three first openings 301, and the three first openings 301 located in the same pixel opening 201 are respectively used to set the first color sub-pixel, the second color sub-pixel, and the third color sub-pixel, so that the display panel 100 can achieve full-color light emission.

[0064] In other embodiments, multiple first openings 301 in the same pixel opening 201 can also be only used to set sub-pixels of the same color or sub-pixels of two colors, and the present application does not limit this.

[0065] In some embodiments, the distance between adjacent dams 30 is the same as the distance between the dam 30 and the pixel defining layer 20. In other embodiments, the distance between adjacent dams 30 is different from the distance between the dam 30 and the pixel defining layer 20, and the present application does not limit this.

[0066] In the above embodiments, the thicknesses of the pixel defining layer 20 are the same, and the thicknesses of the multiple dams 30 are also the same.

[0067] In other embodiments, the thicknesses of the multiple dams 30 provided in the same pixel opening 201 are different. Specifically, please refer to Figure 2 , Figure 2 which is a schematic structural diagram of the second embodiment of the display panel of the present application.

[0068] In this embodiment, the display panel 200 includes a substrate 10 and a pixel defining layer 20 and a dam 30 disposed on the substrate 10. The pixel defining layer 20 is provided with a plurality of pixel openings 201, and two dams 30 are disposed in each pixel opening 201. The dams 30 define the pixel opening 201 into three first openings 301, and sub-pixels are disposed in the first openings 301. The sub-pixels in the same pixel opening 201 have at least one luminous color.

[0069] The pixel defining layer 20 is provided with at least one first via hole 21 connected to the sub-pixel, and the dam 30 is provided with a second via hole 31 connected to the sub-pixel.

[0070] The thickness of the dam 30 is smaller than the thickness of the pixel defining layer 20 .

[0071] Only the parts of this embodiment that are different from the first embodiment will be described below.

[0072] In this embodiment, the thickness of the dam 30 on the right side is greater than that of the dam 30 on the left side, and the thickness of the third light emitting functional portion 53 is greater than that of the first light emitting functional portion 51 and the second light emitting functional portion 52 .

[0073] It is understandable that the solid content of the quantum dot solution used to form sub-pixels of different colors is different, and the thickness of the formed light-emitting layer is different, which leads to different thicknesses of different light-emitting functional parts. By setting dams 30 of different thicknesses, the thickness of the sub-pixels of the corresponding colors can be adjusted.

[0074] In the above-mentioned multiple implementations, the display panel 100 further includes a first encapsulation layer.

[0075] The first encapsulation layer includes a plurality of independent encapsulation parts 70 , each of which covers the second electrode part 60 of the sub-pixel, and the orthographic projection area of ​​the encapsulation part 70 on the substrate 10 is larger than the orthographic projection area of ​​the second electrode part 60 on the substrate 10 .

[0076] Furthermore, the display panel 100 further includes a second encapsulation layer.

[0077] The second encapsulation layer covers the first encapsulation layer and the pixel defining layer 20 as well as the sidewalls and top wall of the dam 30 that are not covered by the first encapsulation layer.

[0078] In some implementations, part of the second encapsulation layer is reused as an insulating portion.

[0079] In some embodiments, the second encapsulation layer includes an organic encapsulation layer 80 disposed on a side of the first encapsulation layer facing away from the substrate 10 , and an inorganic encapsulation layer 90 located on a side of the organic encapsulation layer 80 facing away from the substrate 10 .

[0080] In some specific embodiments, the organic encapsulation layer 80 covers the encapsulation portion 70 located within the pixel opening 201, the sidewalls and the top wall of the dam 30 not covered by the encapsulation portion 70, and the sidewalls of the pixel definition layer 20 not covered by the encapsulation portion 70. The inorganic encapsulation layer 90 covers the top wall of the pixel definition layer 20, the encapsulation portion 70 extending to the top wall of the pixel definition layer 20, and the organic encapsulation layer 80.

[0081] In some specific embodiments, the inorganic encapsulation layer 90 covering the top wall of the pixel definition layer 20 is reused as an insulating portion.

[0082] It can be understood that in this embodiment, each pixel opening 201 is defined by the dam 30 into at least two first openings 301, and at least one color of sub-pixels is disposed among the multiple first openings 301 within the same pixel opening 201, which can improve the aperture ratio of the display panel 100, thereby improving the resolution of the display panel 100. Further, by respectively providing a first via 21 and a second via 31 on the pixel definition layer 20 and the dam 30, and connecting the cathode of each sub-pixel to the conductive layer through the first via 21 or the second via 31, the cathode lap performance of each sub-pixel can be ensured, thereby improving the display effect of the display panel 100. In addition, by respectively using the multiple first openings 301 located within the same pixel opening 201 to set the first color sub-pixels, the second color sub-pixels, and the third color sub-pixels, the display panel 100 can also achieve full-color emission.

[0083] Correspondingly, the present application provides a method for manufacturing a display panel.

[0084] Specifically, please refer to Figure 3 , Figure 3 which is a schematic flowchart of the first embodiment of the method for manufacturing the display panel of the present application. In this embodiment, the manufacturing method includes:

[0085] S11: Obtain a substrate.

[0086] In this embodiment, the substrate can be a flexible substrate or a rigid substrate.

[0087] In this embodiment, an array layer and a planarization layer covering the array layer are sequentially formed on one side surface of the substrate.

[0088] Among them, the array layer is a TFT device array layer, including multiple TFT devices for driving sub-pixels to emit light.

[0089] Among them, the planarization layer can be prepared by physical vapor deposition (PVD) and / or chemical vapor deposition (CVD), and the present application does not limit this.

[0090] Among them, a plurality of vias are formed on the planarization layer, and the anode is connected to the drain of the driving transistor in the array layer through the vias, and the driving current is transmitted to the anode through the driving transistor.

[0091] S12: Form a pixel defining layer on the substrate; among them, the pixel defining layer is provided with a plurality of pixel openings.

[0092] In this embodiment, before the step of forming the pixel defining layer on the substrate, it includes: forming a first electrode portion of a plurality of sub-pixels arranged at intervals on the substrate.

[0093] Specifically, form a metal layer on the substrate, and attach a resist film on the metal layer so that the resist film covers a plurality of preset positions. Among them, the preset positions correspond to the regions where the first electrode portions are located. Etch the metal layer to form a plurality of first electrode portions arranged at intervals on the metal layer, and each first electrode portion corresponds to a via. Remove the resist film.

[0094] Among them, a conductive material can be deposited on the planarization layer and the bottom and side walls of the vias by evaporation or sputtering to form a metal layer.

[0095] In this embodiment, the pixel defining layer can be prepared by a deposition process and a half-tone mask process.

[0096] S13: Form at least one dam in each pixel opening; among them, the dam defines the pixel opening into at least two first openings.

[0097] In this embodiment, at least one dam is formed in the spaced area corresponding to the first electrode portion in each pixel opening, so that the pixel opening is defined into at least two first openings by the dam. Among them, the orthographic projection of the first electrode portion on the substrate covers the orthographic projection of the first opening.

[0098] In a specific implementation scenario, the number of dams is multiple, and the thicknesses of the multiple dams are different. In another specific implementation scenario, the number of dams is multiple, and the thicknesses of the multiple dams are the same. The present application does not make any limitation in this regard.

[0099] In a specific implementation scenario, two dams are arranged in each pixel opening so that the dam defines the pixel opening into three first openings.

[0100] In this embodiment, multiple dams with different heights can be prepared by using a half-tone mask (HTM).

[0101] In some embodiments, the pixel defining layer and the multiple dams can be etched synchronously by the HTM process, thereby avoiding increasing the manufacturing cost.

[0102] In some embodiments, after the step of forming at least one dam in each of the pixel openings, the method includes: forming at least one first via connected to a sub-pixel on the pixel defining layer, and forming at least one second via connected to a sub-pixel on each dam, and connecting one end of the first via and the second via to a conductive layer in the substrate respectively, and connecting the other end of the first via and the second via to the cathode of the sub-pixel respectively. Wherein, the cathode is connected to the conductive layer through the first via or the second via.

[0103] Specifically, both the first via and the second via are connected to the conductive layer for outputting the VSS signal on the substrate.

[0104] S14: Form sub-pixels in the first openings; wherein, the sub-pixels located in the same pixel opening have at least one emission color.

[0105] In this embodiment, the sub-pixels include a first color sub-pixel, a second color sub-pixel and a third color sub-pixel. In some embodiments, the first color sub-pixel is a red (Red, R) sub-pixel, the second color sub-pixel is a green (Green, G) sub-pixel, and the third color sub-pixel is a blue (Blue, B) sub-pixel.

[0106] In this embodiment, multiple first openings 301 in the same pixel opening 201 can be respectively used to set sub-pixels of three colors, or can be only used to set sub-pixels of the same color or sub-pixels of two colors, and the present application does not make any limitation thereto.

[0107] In a specific implementation scenario, a first color sub-pixel, a second color sub-pixel and a third color sub-pixel are respectively formed in three first openings located in the same pixel opening.

[0108] It can be understood that by setting at least one dam in the pixel opening defined by the pixel defining layer, and defining each pixel opening into at least two first openings through the dam, and setting sub-pixels with at least one emission color in multiple first openings within the same pixel opening, the opening size of the sub-pixels can be restricted and the aperture ratio of the display panel can be increased, thereby improving the resolution of the display panel. Further, by respectively setting the first via and the second via on the pixel defining layer and the dam, and connecting the cathode of each sub-pixel to the conductive layer through the first via or the second via, the cathode overlapping performance of each sub-pixel can be ensured, thereby improving the display effect.

[0109] Please refer to Figure 4 , Figure 4 which is a schematic flowchart of the second embodiment of the manufacturing method of the display panel of the present application. In this embodiment, the manufacturing method includes:

[0110] S201: Obtain a substrate.

[0111] For the specific process, please refer to the description in S11 and will not be elaborated here.

[0112] S202: Form a first electrode portion of a plurality of sub-pixels arranged at intervals on a substrate.

[0113] For the specific process, please refer to the description in S12 and will not be elaborated here.

[0114] S203: Form a pixel defining layer on the substrate and form at least one dam in each pixel opening; wherein, the dam defines the pixel opening into at least two first openings.

[0115] In this embodiment, first, a first isolation layer is formed on the side of the first electrode portion facing away from the substrate, the first isolation layer is patterned to form a plurality of pixel openings, and each pixel opening includes the same number of first electrode portions as the number of first openings.

[0116] Further, a second isolation layer covering the first isolation layer, the plurality of pixel openings and the plurality of first electrode portions is formed on the first isolation layer. Then, the second isolation layer in the pixel opening is patterned to form a dam between adjacent first electrode portions in each pixel opening, the dam defines the pixel opening into at least two first openings, and the remaining second isolation layer and the first isolation layer together form a pixel definition layer. Wherein, the first opening exposes the first electrode portion.

[0117] Wherein, both the first isolation layer and the second isolation layer are organic materials such as polyimide, polyethylene terephthalate, polyethylene naphthalate, photoresist film layer, etc., and can also be inorganic materials such as silicon nitride, silicon oxide or silicon oxynitride.

[0118] Wherein, the photoresist used in the patterning process can be a positive photoresist or a negative photoresist.

[0119] Wherein, the material of the photoresist can be methyl methacrylate, sulfone and diazo. Wherein, the excess first isolation layer and second isolation layer are removed by a dry etching process when patterning the first isolation layer and the second isolation layer.

[0120] In some embodiments, after the step of forming at least one dam in each of the pixel openings, it includes: forming at least one first via connected to the sub-pixel on the pixel defining layer, and forming at least one second via connected to the sub-pixel on each dam, and connecting one end of the first via and the second via to a conductive layer in the substrate respectively, and connecting the other end of the first via and the second via to the cathode of the sub-pixel respectively. Wherein, the cathode is connected to the conductive layer through the first via or the second via.

[0121] Specifically, please refer to Figure 5 , Figure 5It is a schematic structural diagram of an implementation manner of the pixel defining structure obtained in S203. In this implementation manner, the pixel defining structure 300 includes a substrate 10, and a pixel defining layer 20 and a dam 30 disposed on the substrate 10. The pixel defining layer 20 is provided with a plurality of pixel openings 201, and two dams 30 are disposed in each pixel opening 201. The dams 30 define the pixel opening 201 into three first openings 301. Among them, the thickness of the dam 30 is less than the thickness of the pixel defining layer 20. Among them, the pixel defining layer 20 is provided with at least one first via 21 connected to the sub-pixel, and the dam 30 is provided with a second via 31 connected to the sub-pixel.

[0122] Further, a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel are respectively formed in a plurality of first openings located in the same pixel opening.

[0123] Continue to refer to Figure 4 , the step of respectively forming a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel in a plurality of first openings located in the same pixel opening specifically includes:

[0124] S204: Coating a photoresist on the pixel defining layer, a plurality of first electrode portions, and a plurality of dams.

[0125] S205: Patterning the photoresist to expose a plurality of first openings for forming the first color sub-pixel and a part of the pixel defining layer and / or part of the dam on the periphery of the first opening. The exposed part of the pixel defining layer has a first via, and the exposed part of the dam has a second via.

[0126] In this implementation manner, the plurality of first openings for forming the first color sub-pixel refer to each first opening for forming the first color sub-pixel among the plurality of pixel openings.

[0127] In this implementation manner, a part of the pixel defining layer and / or part of the dam on the periphery of the first opening is an area for subsequently forming the second electrode portion. It can be understood that a part of the pixel defining layer and / or part of the dam on the periphery of the first opening includes a first via or a second via connecting the first color sub-pixel, so that the subsequently formed second electrode portion can communicate with the conductive layer for transmitting the VSS signal through the first via and / or the second via.

[0128] In this implementation manner, the photoresist is exposed through a semi-transmissive mask plate.

[0129] In a specific implementation manner, the photoresist is a positive photoresist. The first region of the semi-transmissive mask plate is a transparent region, and the second region is an opaque region.

[0130] In another specific embodiment, the photoresist is a negative photoresist, the first region of the semi-transmissive mask is an opaque region, and the second region is a transparent region.

[0131] It can be understood that the first region corresponds to a plurality of first openings for forming the first color sub-pixels, and a part of the pixel defining layer and / or part of the dam on the periphery of the plurality of first openings, and the second region corresponds to the remaining region.

[0132] Specifically, please refer to Figure 6 , Figure 6 which is a schematic structural diagram of an embodiment of the pixel defining structure obtained in S205. In this embodiment, the first opening 301 located on the left side of the pixel opening 201 is used to set the first color sub-pixel, and the photoresist 101 covers the remaining regions except the first opening 301 for forming the first color sub-pixel and the first preset region 110.

[0133] Among them, the first preset region 110 is a part of the pixel defining layer on the periphery of the first opening 301, and the first preset region 110 has a first via 21.

[0134] S206: Form a first light-emitting functional part on the plurality of exposed first openings and the remaining photoresist; wherein, the light-emitting material of the first light-emitting functional part is a quantum dot material.

[0135] In this embodiment, the first light-emitting functional part can be formed on the plurality of exposed first openings and the remaining photoresist by means of spin coating, printing, slot coating, doctor blade coating, spraying, etc.

[0136] Among them, the first light-emitting functional part includes a hole injection layer, a hole transport layer, a light-emitting layer, a charge generation layer, and an electron injection layer arranged in sequence.

[0137] Among them, the thickness of the first light-emitting functional part is 20 - 25 nm.

[0138] In a specific implementation scenario, the first color sub-pixel is a red sub-pixel, and the light-emitting material of the first light-emitting functional part is a red quantum dot.

[0139] Specifically, please refer to Figure 7 , Figure 7 which is a schematic structural diagram of an embodiment of the pixel defining structure obtained in S206. In this embodiment, the first light-emitting functional part 51 covers the first opening 301 not covered by the photoresist 101 and the photoresist 101 located within the pixel opening 201.

[0140] It can be understood that since the thickness of the dam 30 is less than the thickness of the pixel defining layer 20, it is possible to prevent the light-emitting material from climbing along the side wall of the pixel defining layer 20, thereby ensuring the film formation uniformity within each first opening 301, and then ensuring the film thickness uniformity.

[0141] S207: A cathode layer and a first encapsulation layer are sequentially formed on the first light-emitting functional part.

[0142] In this embodiment, the method of forming the cathode layer is the same as the method of forming the first electrode part.

[0143] In this embodiment, the first encapsulation layer can be prepared by chemical vapor deposition (CVD).

[0144] Among them, the material of the first encapsulation layer can be silicon nitride (SiN) or silicon oxide (SiO).

[0145] Among them, the thickness of the first encapsulation layer is 1.3 - 1.5 μm.

[0146] Among them, the cathode layer is also deposited on a part of the pixel defining layer and / or part of the dam on the periphery of the first opening.

[0147] Specifically, please refer to Figure 8 , Figure 8 is a schematic structural diagram of an embodiment of the pixel defining structure obtained in S207. In this embodiment, the cathode layer 601 covers the first light-emitting functional part 51 and the first preset area 110, and the first encapsulation layer 701 covers the cathode layer 601.

[0148] S208: Remove the photoresist, the cathode layer and the first encapsulation layer on the photoresist to form a first color sub-pixel in the first opening. The first color sub-pixel has a first electrode part, a first light-emitting functional part and a second electrode part; among them, the second electrode part is connected to the conductive layer through the first via hole and / or the second via hole.

[0149] In this embodiment, the residual photoresist is removed by a stripping method.

[0150] Among them, when stripping the photoresist, the cathode layer and the first encapsulation layer attached to the photoresist can be removed, and the remaining cathode layer forms the second electrode part of the sub-pixel, which can supply power to the first light-emitting functional part.

[0151] It can be understood that by providing the first encapsulation layer, damage to the first light-emitting functional part can be avoided when stripping the photoresist. Further, the remaining first encapsulation layer can form an independent encapsulation part, and each encapsulation part covers the second electrode part of the sub-pixel.

[0152] It can be understood that the above scheme for forming the first light-emitting functional part does not involve photolithography of the light-emitting layer, nor does it require modification of the quantum dot material, so that the structure of the quantum dot can be avoided from being damaged, thereby improving the performance and service life of the display device.

[0153] Specifically, please refer to Figure 9 ,Figure 9 It is a schematic structural diagram of an implementation manner of the pixel defining structure obtained in S208. In this implementation manner, a first color sub-pixel is disposed in a first opening 301 on the left side of the pixel opening 201. The first color sub-pixel includes a first electrode portion 40, a first light-emitting functional portion 51, and a second electrode portion 60 which are stacked. Among them, the second electrode portion 60 for forming the first color sub-pixel includes a main body portion and an extension portion. The main body portion is located in the first opening 301 and covers the first light-emitting functional portion 51. The extension portion covers a side wall of the pixel defining layer 20 close to the main body portion and extends to the top wall of the pixel defining layer 20 to cover the first via hole 21. Among them, the second electrode portion 60 is connected to the conductive layer through the first via hole 21. Among them, the surface of the second electrode portion 60 is covered with a packaging portion 70.

[0154] S209: Apply photoresist again on the pixel defining layer, the first encapsulation layer, the remaining first electrode portions, and the dams.

[0155] S210: Pattern the photoresist to expose a plurality of first openings for forming the second color sub-pixels and expose a part of the pixel defining layer and / or part of the dams on the periphery of the first opening. Among them, the exposed part of the pixel defining layer has a first via hole, and the exposed part of the dams has a second via hole.

[0156] For the specific process, please refer to the description in S205 and will not be elaborated here.

[0157] Specifically, please refer to Figure 10 , Figure 10 It is a schematic structural diagram of an implementation manner of the pixel defining structure obtained in S210. In this implementation manner, a first opening 301 in the middle of the pixel opening 201 is used to set the second color sub-pixel, and the photoresist 101 covers the remaining areas except the first opening 301 for forming the second color sub-pixel and the second preset area 120.

[0158] Among them, the second preset area 120 is a part of the dams on the periphery of the first opening 301, and the second preset area 120 has a second via hole 31.

[0159] S211: Form a second light-emitting functional portion on the plurality of exposed first openings and the remaining photoresist.

[0160] For the specific process, please refer to the description in S206 and will not be elaborated here.

[0161] Among them, the light-emitting material of the second light-emitting functional portion is a quantum dot material.

[0162] In a specific implementation scenario, the second color sub-pixel is a green sub-pixel, and the light-emitting material of the second light-emitting functional portion is a green quantum dot.

[0163] S212: A cathode layer and a first encapsulation layer are sequentially formed on the second light-emitting functional part.

[0164] For the specific process, please refer to the description in S207 and will not be elaborated here.

[0165] S213: Remove the photoresist, the cathode layer, and the first encapsulation layer on the photoresist to form a second color sub-pixel within the first opening. The second color sub-pixel has a first electrode part, a second light-emitting functional part, and a second electrode part.

[0166] For the specific process, please refer to the description in S208 and will not be elaborated here.

[0167] Specifically, please refer to Figure 11 , Figure 11 which is a schematic structural diagram of an embodiment of the pixel defining structure obtained in S213. In this embodiment, a second color sub-pixel is disposed in the first opening 301 in the middle of the pixel opening 201. The second color sub-pixel includes a first electrode part 40, a second light-emitting functional part 52, and a second electrode part 60 which are stacked. Among them, the second electrode part 60 for forming the second color sub-pixel includes a main body part and an extension part. The main body part is located within the first opening 301 and covers the second light-emitting functional part 52. The extension part covers the side wall of the left dam 30 near the main body part and extends to the top wall of the left dam 30 to cover the second via hole 31. Among them, the second electrode part 60 is connected to the conductive layer through the second via hole 31. Among them, the surface of the second electrode part 60 is covered with an encapsulation part 70.

[0168] S214: Repeat the above steps to form a third color sub-pixel in the remaining first openings.

[0169] Repeat the above S209 - S213 to form a third color sub-pixel in the remaining first openings.

[0170] Specifically, please refer to Figure 12 , Figure 12 which is a schematic structural diagram of an embodiment of the pixel defining structure obtained in S214. In this embodiment, a third color sub-pixel is disposed in the first opening 301 on the right side of the pixel opening 201. The third color sub-pixel includes a first electrode part 40, a third light-emitting functional part 53, and a second electrode part 60 which are stacked. Among them, the second electrode part 60 for forming the third color sub-pixel includes a main body part and an extension part. The main body part is located within the first opening 301 and covers the third light-emitting functional part 53. The extension part covers the side wall of the left dam 30 near the main body part and extends to the top wall of the left dam 30 to cover the second via hole 31. Among them, the second electrode part 60 is connected to the conductive layer through the second via hole 31. Among them, the surface of the second electrode part 60 is covered with an encapsulation part 70.

[0171] S215: Form a second encapsulation layer on the first color sub-pixel, the second color sub-pixel, the third color sub-pixel, the dam, and the pixel defining layer.

[0172] In this embodiment, the second encapsulation layer includes an organic encapsulation layer disposed on the side of the first encapsulation layer away from the substrate, and an inorganic encapsulation layer located on the side of the organic encapsulation layer away from the substrate.

[0173] Among them, an organic encapsulation layer is formed on the encapsulation part located within the pixel opening, the side walls and the top wall of the dam not covered by the encapsulation part, and the side walls of the pixel defining layer not covered by the encapsulation part, and an inorganic encapsulation layer is formed on the top wall of the pixel defining layer, the encapsulation part extending to the top wall of the pixel defining layer, and the organic encapsulation layer, so as to form a second encapsulation layer through the organic encapsulation layer and the inorganic encapsulation layer, and then obtain a display panel.

[0174] Specifically, please refer to Figure 1 , Figure 1 The display panel in is the specific structure obtained through the above steps.

[0175] It can be understood that in this embodiment, at least one dam is provided in the pixel opening defined by the pixel defining layer, and each pixel opening is defined as at least two first openings through the dam, and sub-pixels of at least one emission color are provided in multiple first openings within the same pixel opening, which can limit the opening size of the sub-pixels and improve the aperture ratio of the display panel, thereby improving the resolution of the display panel. Further, by respectively providing a first via hole and a second via hole on the pixel defining layer and the dam, and connecting the cathode of each sub-pixel to the conductive layer through the first via hole or the second via hole, the cathode lamination performance of each sub-pixel can be ensured, thereby improving the display effect. In addition, since the above scheme for forming the light-emitting functional part does not involve photolithography of the light-emitting layer and does not require modification of the quantum dot material, the structure of the quantum dot can be avoided from being damaged, thereby improving the performance and service life of the display device.

[0176] The above are only the embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied to other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. A display panel, characterized in that, comprising: a substrate; a pixel defining layer disposed on the substrate; wherein, a plurality of pixel openings are formed in the pixel defining layer, and at least one dam is disposed in each pixel opening, and the dam defines the pixel opening into at least two first openings; sub-pixels disposed in the first openings; wherein, the sub-pixels located in the same pixel opening have at least one emission color.

2. The display panel according to claim 1, characterized in that, along the direction away from the substrate, the sub-pixel includes a first electrode portion, a light-emitting functional portion, and a second electrode portion disposed in sequence; the pixel defining layer is provided with at least one first via connected to the second electrode portion; Preferably, the dam is provided with a second via connected to the second electrode portion; wherein, one end of the first via and the second via are respectively connected to a conductive layer, and the other end of the first via and the second via are respectively connected to the second electrode portion, so that the second electrode portion is connected to the conductive layer through the first via or the second via; Preferably, the pixel defining layer and the dam are made of the same material.

3. The display panel according to claim 1, characterized in that, the emission colors of the sub-pixels disposed in at least two first openings in the same pixel opening are different; Preferably, two dams are disposed in each pixel opening, and two ends of the dam are in contact with the pixel defining layer, and the dam defines the pixel opening into at least three first openings; wherein, the sub-pixel includes a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel, and at least three first openings in the same pixel opening are respectively used to dispose the first color sub-pixel, the second color sub-pixel, and the third color sub-pixel.

4. The display panel according to claim 1, characterized in that, the thickness of the dam is less than or equal to the thickness of the pixel defining layer; Preferably, the thicknesses of the plurality of dams disposed in the same pixel opening are different.

5. The display panel according to claim 1, characterized in that, the thickness of the pixel defining layer is greater than or equal to 0.4 μm and less than or equal to 5 μm; the thickness of the dam is greater than or equal to 0.3 μm and less than or equal to 5 μm; the difference between the thickness of the pixel defining layer and the thickness of the dam is greater than 0.1 μm; Preferably, the thicknesses of the pixel defining layer and the dam are both less than 2 μm.

6. The display panel according to claim 2, characterized in that, the first electrode portion is disposed on the substrate, on the side of the pixel defining layer close to the substrate, the first electrode portions of different sub-pixels are disposed at an insulating interval, and the orthographic projection of the first electrode portion on the substrate covers the orthographic projection of the first opening; the light-emitting functional portion is disposed in the first opening and covers the side of the first electrode portion away from the substrate, and the light-emitting functional portions in the same pixel opening have at least one emission color; The second electrode portion is disposed in the first opening, and the second electrode portion is located on a side of the light-emitting functional portion away from the substrate. At least a part of the second electrode portion covers at least one side wall of the pixel defining layer facing the first opening and extends to the top wall of the pixel defining layer; Preferably, the material of the light-emitting functional portion is a quantum dot light-emitting material; Preferably, the second electrode portions of adjacent sub-pixels are spaced apart; Preferably, the second electrode portion includes a main body portion and an extending portion. The main body portion is located in the first opening and covers the light-emitting functional portion. The extending portion covers at least one side wall of the pixel defining layer adjacent to the main body portion and / or at least one side wall of the dam adjacent to the main body portion, and extends to the top wall of the pixel defining layer to cover the first via hole and / or extends to the top wall of the dam to cover the second via hole; Preferably, the second electrode portions of adjacent sub-pixels are spaced apart by an insulating portion. The insulating portion is disposed on the pixel defining layer and the top wall of the dam. The orthographic projection of the insulating portion on the substrate is located outside the orthographic projection of the second electrode portion on the substrate; Preferably, the second electrode portions of adjacent sub-pixels are connected to each other.

7. The display panel according to claim 6, wherein, the display panel further includes a first encapsulation layer; the first encapsulation layer includes a plurality of independent encapsulation portions. Each encapsulation portion covers the second electrode portion of the sub-pixel. The area of the orthographic projection of the encapsulation portion on the substrate is larger than the area of the orthographic projection of the second electrode portion on the substrate; Preferably, the display panel further includes a second encapsulation layer. The second encapsulation layer covers the first encapsulation layer, the pixel defining layer, and the side walls and top walls of the dam that are not covered by the first encapsulation layer; Preferably, a part of the second encapsulation layer is reused as the insulating portion; Preferably, the second encapsulation layer includes an organic encapsulation layer disposed on a side of the first encapsulation layer away from the substrate, and an inorganic encapsulation layer located on a side of the organic encapsulation layer away from the substrate.

8. A method for manufacturing a display panel, wherein, comprises: obtaining a substrate; forming a pixel defining layer on the substrate; wherein, the pixel defining layer is provided with a plurality of pixel openings; forming at least one dam in each pixel opening; wherein, the dam defines the pixel opening into at least two first openings; forming sub-pixels in the first openings; wherein, the sub-pixels located in the same pixel opening have at least one light-emitting color.

9. The manufacturing method according to claim 8, wherein, after the step of forming at least one dam in each pixel opening, includes: Form at least one first via connected to the sub-pixel on the pixel defining layer, and form at least one second via connected to the sub-pixel on each of the dams, and connect one end of the first via and the second via to the conductive layer in the substrate respectively, and connect the other end of the first via and the second via to the cathode of the sub-pixel respectively; wherein, the cathode is connected to the conductive layer through the first via or the second via.

10. The preparation method according to claim 9, characterized in that, before the step of forming the pixel defining layer on the substrate, it includes: forming a first electrode portion of a plurality of spaced-apart sub-pixels on the substrate; the step of forming the pixel defining layer on the substrate and forming at least one dam in each pixel opening includes: forming a first isolation layer on a side of the first electrode portion facing away from the substrate; patterning the first isolation layer to form a plurality of pixel openings, and making each pixel opening include the same number of first electrode portions as the first opening; forming a second isolation layer on the first isolation layer to cover the first isolation layer, the plurality of pixel openings and the plurality of first electrode portions; patterning the second isolation layer in the pixel openings to form one dam between adjacent first electrode portions in each pixel opening, the dam defining the pixel opening into at least two first openings, and the remaining second isolation layer and the first isolation layer together form a pixel definition layer; wherein, the first opening exposes the first electrode portion; Preferably, a first color sub-pixel, a second color sub-pixel and a third color sub-pixel are respectively formed in a plurality of the first openings located in the same pixel opening; the step of respectively forming a first color sub-pixel, a second color sub-pixel and a third color sub-pixel in a plurality of the first openings located in the same pixel opening includes: coating a photoresist on the pixel defining layer, the plurality of first electrode portions and the plurality of dams; patterning the photoresist to expose a plurality of the first openings for forming the first color sub-pixel and expose a part of the pixel defining layer and / or a part of the dam on the periphery of the first opening, wherein the exposed part of the pixel defining layer has a first via, and the exposed part of the dam has a second via; forming a first light-emitting functional portion on a plurality of the exposed first openings and the remaining photoresist; wherein, the light-emitting material of the first light-emitting functional portion is a quantum dot material; forming a cathode layer and a first encapsulation layer on the first light-emitting functional portion in sequence; removing the photoresist and the cathode layer and the first encapsulation layer on the photoresist to form the first color sub-pixel in the first opening, the first color sub-pixel having a first electrode portion, a first light-emitting functional portion and a second electrode portion; wherein, the second electrode portion is connected to the conductive layer through the first via and / or the second via; coating the photoresist again on the pixel defining layer, the first encapsulation layer, the remaining first electrode portions and the dams; Pattern the photoresist to expose a plurality of the first openings for forming the second color sub-pixels and to expose a portion of the pixel defining layer and / or a portion of the dam around the first openings, wherein the exposed portion of the pixel defining layer has a first via hole and the exposed portion of the dam has a second via hole; Form a second light emitting functional portion on the plurality of exposed first openings and the remaining photoresist; Successively form a cathode layer and the first encapsulation layer on the second light emitting functional portion; Remove the photoresist and the cathode layer and the first encapsulation layer on the photoresist to form the second color sub-pixel within the first opening, the second color sub-pixel having a first electrode portion, a second light emitting functional portion, and a second electrode portion; Repeat the above steps to form the third color sub-pixel within the remaining first openings; Form a second encapsulation layer on the first color sub-pixel, the second color sub-pixel, the third color sub-pixel, the dam, and the pixel defining layer.

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