A digital quantum voltmeter and voltage measurement method

Abstract

The present application discloses a digital quantum voltmeter and a voltage measurement method, which relate to the field of quantum electrical measurement. The digital quantum voltmeter includes: a quantum voltage reference device, an integrator, a hysteresis comparator and a controller; the controller is respectively connected to the output end of the hysteresis comparator and the input end of the quantum voltage reference device, and the controller is used to control the polarity of the output voltage of the quantum voltage reference device according to the polarity of the output voltage of the hysteresis comparator; the input end of the integrator is respectively connected to the measured voltage and the output end of the quantum voltage reference device; the output end of the integrator is connected to the input end of the hysteresis comparator. The present application can realize a zero traceability chain and thereby improve the accuracy of voltage measurement.

Description

Technical Field

[0001] The present application relates to the field of quantum electrical measurement, and in particular to a digital quantum voltmeter and a voltage measurement method. Background Art

[0002] The digital voltmeter is the core part of the digital multimeter. In the electromagnetic metrology traceability system, the high-precision digital voltmeter is an important link in the traceability chain from the standard voltage source to the voltage reference.

[0003] Currently, digital voltmeters based on conventional electronic technology have a maximum resolution of 8.5 digits. These 8.5-digit multimeters are generally used as secondary electrical measurement standards. Against this backdrop, the existence of redundant links in the traceability chain of electrical measuring instruments has become a problem that needs to be further addressed to improve electrical measurement accuracy. However, even the highest-precision digital multimeters currently require a traceability chain, making a zero-traceability chain impossible. Summary of the Invention

[0004] The purpose of this application is to provide a digital quantum voltmeter and a voltage measurement method, which can realize a zero traceability chain and thus improve the accuracy of voltage measurement.

[0005] To achieve the above-mentioned objectives, the present application provides the following solutions: In a first aspect, the present application provides a digital quantum voltmeter, comprising: a quantum voltage reference device, an integrator, a hysteresis comparator, and a controller; the controller is respectively connected to the output end of the hysteresis comparator and the input end of the quantum voltage reference device, and the controller is used to control the polarity of the output voltage of the quantum voltage reference device according to the polarity of the output voltage of the hysteresis comparator; the input end of the integrator is respectively connected to the measured voltage and the output end of the quantum voltage reference device; the output end of the integrator is connected to the input end of the hysteresis comparator.

[0006] In one embodiment, the digital quantum voltmeter further comprises: a quantum resistance reference device; the input end of the integrator is connected to the measured voltage and the output end of the quantum voltage reference device through the quantum resistance reference device.

[0007] In one embodiment, the digital quantum voltmeter further includes: a reference voltage buffer; the output ends of the quantum resistance reference device and the quantum voltage reference device are connected via the reference voltage buffer.

[0008] In one embodiment, the digital quantum voltmeter further includes: an input voltage buffer; the quantum resistance reference device is connected to the voltage to be measured via the input voltage buffer.

[0009] In one embodiment, the digital quantum voltmeter further includes a slope amplifier, and the output end of the integrator is connected to the input end of the hysteresis comparator through the slope amplifier.

[0010] In one embodiment, the digital quantum voltmeter further includes: a charge release circuit; the output of the slope amplifier and the input of the hysteresis comparator are both connected to a reference ground or an input of an integrator through the charge release circuit.

[0011] In one embodiment, the quantum resistance reference device includes: a first quantized Hall resistor and a second quantized Hall resistor.

[0012] The first common end of the first quantized Hall resistor is connected to the measured voltage.

[0013] The first common end of the second quantized Hall resistor is connected to the output end of the quantum voltage reference device.

[0014] The second common end of the first quantized Hall resistor and the second common end of the second quantized Hall resistor are both connected to the input end of the integrator.

[0015] In one embodiment, the digital quantum voltmeter further includes: a first switch; and the input end of the input voltage buffer is connected to the measured voltage and a reference ground through the first switch.

[0016] In a second aspect, the present application provides a voltage measurement method, which is applied to the digital quantum voltmeter provided above. The voltage measurement method includes: after a voltage to be measured is input into the digital quantum voltmeter described above, executing a first control step in M preset cycles; the first control step is: controlling the polarity of a first preset value voltage output by a quantum voltage reference device according to the polarity of a target voltage in a first time period; controlling the quantum voltage reference device to output zero voltage in a second time period; controlling the quantum voltage reference device to output a first preset value voltage having the same polarity as the measured voltage in a third time period; and controlling the quantum voltage reference device to output zero voltage in a fourth time period; the first time period, the second time period, the third time period, and the fourth time period constitute a preset cycle; in an initial preset cycle, the target voltage is the measured voltage; in preset cycles other than the initial preset cycle, the target voltage is the output voltage of a hysteresis comparator at the last moment of the fourth time period in the previous preset cycle; in the initial preset cycle, the polarity of the first preset value voltage output by the quantum voltage reference device in the first time period is opposite to the target voltage, and in preset cycles other than the initial preset cycle, the polarity of the first preset value voltage output by the quantum voltage reference device in the first time period is the same as or opposite to the target voltage; and M is an integer greater than 1.

[0017] According to the polarity of the output voltage of the hysteresis comparator at any moment before the end of the Mth preset period, the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period is controlled.

[0018] The second control step is executed in each of n clock cycles; the second control step comprises: reading the polarity of the hysteresis comparator output voltage in real time; when the polarity of the hysteresis comparator output voltage deflects at time t, determining the duration of the output voltage of the quantum voltage reference device in the current cycle at time t+d, and determining the output voltage of the quantum voltage reference device in the next clock cycle based on the output voltage of the quantum voltage reference device in the current clock cycle; n is an integer greater than 1.

[0019] The conversion voltage is calculated according to the length of the first time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle to obtain the voltage conversion voltage to be measured.

[0020] The actual voltage of the voltage to be measured is obtained based on the voltage to be measured conversion voltage and the zero voltage conversion voltage; the zero voltage conversion voltage is obtained by converting the voltage to be measured into zero voltage and inputting it into the digital quantum voltmeter described above.

[0021] In one embodiment, the specific process of determining the zero voltage switching voltage is as follows: after the zero voltage is input into the digital quantum voltmeter described above, the first control step is executed in M preset cycles.

[0022] According to the polarity of the output voltage of the hysteresis comparator at any moment before the end of the Mth preset period, the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period is controlled.

[0023] The second control step is executed in each of n clock cycles.

[0024] The conversion voltage is calculated according to the length of the second time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle to obtain a zero-voltage conversion voltage.

[0025] According to the specific embodiments provided in this application, the present application has the following technical effects: This application provides a digital quantum voltmeter and voltage measurement method. Compared with physical standards, quantum metrology standards have significant advantages. First, macroscopic quantum effects and physical constants exist objectively and will not disappear or change due to damage to a physical carrier, thereby improving the stability and continuity of the preservation of the basic unit values of the International System of Units. Second, quantum metrology standards can be reproduced at any time and place using appropriate physical techniques. Relying on quantum metrology standards can change the previous pyramid-shaped metrology model that relies on the step-by-step transmission of physical standards. It is expected to overcome the problems of gradual degradation of measurement capabilities, the need for periodic calibration of measuring instruments, and the difficulty of tracing measurement results under special circumstances. This will achieve a flattened traceability link for value transmission and a one-stop improvement in measurement accuracy. In related art, there are two ways to implement quantum standards: one is a quantum voltage standard device based on the Josephson effect to reproduce the voltage unit "volt", and the other is a quantum resistance standard device based on the quantized Hall effect to reproduce the resistance unit "ampere". Generally, metrology instruments or measuring instruments need to be traced back to a quantum standard step by step. Taking the traceability chain of the current highest-precision digital multimeter as an example, it is also necessary to use a quantum voltage standard device to perform periodic verification or calibration on it so that it can be traced within the verification cycle. This is the shortest traceability chain under normal circumstances, but a traceability chain is also required. By setting up a quantum voltage reference device, the present application can avoid the problem of requiring additional periodic verification or calibration of the quantum voltage standard device in the related art, so that it can be traced within the verification cycle, realizing a zero traceability chain and thus improving the accuracy of voltage measurement. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0027] Figure 1 This is a schematic diagram of the structure of a digital quantum voltmeter provided in one embodiment of the present application.

[0028] Figure 2 This is a schematic diagram of the single-pole double-throw switch structure.

[0029] Figure 3 A schematic diagram of a quantized Hall resistor connection method provided in one embodiment of the present application.

[0030] Figure 4 This is a timing diagram of the first control step in the voltage measurement method provided in one embodiment of the present application.

[0031] Figure 5 This is a timing diagram of the second control step in the voltage measurement method provided in one embodiment of the present application.

[0032] Reference numerals: first switch-S1, Josephson junction array chip-JJA, input voltage buffer-A1, reference voltage buffer-A2, first low-temperature environment container-1, second low-temperature environment container-2, first quantized Hall resistor-R H1 , the second quantized Hall resistance - R H2 , Second switch-S2, First operational amplifier-A3, Second operational amplifier-A4, Basic comparator-A5, Integrating capacitor-C int , first resistor-R1, second resistor-R2, third resistor-R3, fourth resistor-R4, fifth resistor-R5, sixth resistor-R6, first diode-D1, second diode-D2, negative voltage-V-. DETAILED DESCRIPTION

[0033] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0034] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0035] In an exemplary embodiment, Figure 1 As shown, a digital quantum voltmeter is provided, comprising: a quantum voltage reference device, an integrator, a hysteresis comparator, and a controller; the controller is respectively connected to the output end of the hysteresis comparator and the input end of the quantum voltage reference device, and the controller is used to control the polarity of the output voltage of the quantum voltage reference device according to the polarity of the output voltage of the hysteresis comparator; the input end of the integrator is respectively connected to the measured voltage and the output end of the quantum voltage reference device; and the output end of the integrator is connected to the input end of the hysteresis comparator.

[0036] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a clock module, a communication module, and a human-computer interaction module connected to the controller. Specifically, the output of the clock module is connected to the input of the controller to provide a clock reference for timing calculations. The human-computer interaction module and the communication module are connected to the controller via an optical isolation module. The communication module is used to exchange data with other devices, and the operator exchanges data with the controller via the human-computer interaction module. In actual applications, the controller is an FPGA controller.

[0037] In another exemplary embodiment of the present application, the quantum voltage reference device includes: a quantum voltage driver, a microwave source, a Josephson junction array chip JJA, and a first cryogenic environment container 1; the controller output is connected to the quantum voltage driver input for setting the polarity and specific value of the quantum voltage reference device output voltage; the outputs of the quantum voltage driver and the microwave source are both connected to the input of the Josephson junction array chip, and the Josephson junction array chip is disposed within the first cryogenic environment container 1. The quantum voltage reference device can be a programmable Josephson voltage standard (PJVS) or a Josephson arbitrary waveform synthesizer (JAWS), and the quantum voltage driver can be a PJVS quantum voltage driver or a JAWS quantum voltage driver.

[0038] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a quantum resistance reference device; the input end of the integrator is connected to the measured voltage and the output end of the quantum voltage reference device through the quantum resistance reference device.

[0039] In another exemplary embodiment of the present application, the quantum resistance reference device includes: a first quantized Hall resistor R H1 and the second quantized Hall resistance R H2 The first quantized Hall resistance R H1 The first common end of the second quantized Hall resistor R is connected to the measured voltage. H2 The first common end of the first quantized Hall resistor R is connected to the output end of the quantum voltage reference device. H1 The second common terminal and the second quantized Hall resistor R H2 The second common end of each of the integrators is connected to the input end of the integrator.

[0040] In another exemplary embodiment of the present application, Figure 3 As shown, the first quantized Hall resistance R H1The first common terminal is the first quantized Hall resistor R H1 The first current electrode and the plurality of voltage electrodes adjacent to it in a clockwise direction are short-circuited to one point; the second quantized Hall resistance R H2 The first common end is the second quantized Hall resistor R H2 The first current electrode and the plurality of voltage electrodes adjacent to it in a clockwise direction are short-circuited to form a point; the first quantized Hall resistance R H1 The second common end is the first quantized Hall resistor R H1 The second current electrode and the plurality of voltage electrodes adjacent to it in the clockwise direction are short-circuited to one point; the second quantized Hall resistance R H2 The second common end is the second quantized Hall resistor R H2 The second current electrode and a plurality of voltage electrodes adjacent to it in the clockwise direction are short-circuited to one point.

[0041] The reason for the above design is as follows: the quantum Hall resistor must strictly meet the four-terminal definition in use to completely avoid errors introduced by its leads. However, when the multiple V / I branches of the integrator are summed at the inverting input of the reference voltage buffer A2, the four-terminal definition of the resistor cannot be met (that is, the current passing through the resistor flows entirely through the current lead, and no current flows through the voltage lead). Using the above connection method, based on the Ricketts-Kemeny model of the quantum Hall resistor, the relationship between the single-ended lead current, lead resistance, and the equivalent resistance at the AB terminal is established as formula (1).

[0042] (1).

[0043] Where, I f 、 I s 、 I t They are the currents of the three lead branches respectively; ε f 、 ε s 、 ε t The three lead branch resistances are respectively the quantum Hall resistance ( R H / 2) relative value; R AB is the resistance between nodes AB; I is the total current flowing into the node.

[0044] Further deduction from formula (1) yields: (2). Among them, V AB is the voltage between nodes AB, represents the high-order error term that can be ignored. Formula (2) shows that if the lead resistance is negative for the quantum Hall resistance ( R H / 2) has a relative value of 10 -4 Magnitude, then Figure 3 The equivalent resistance R of the connection shown AB Relatively large quantum Hall resistance R H The error introduced is 10 -12 The above analysis is based on the case where two voltage electrodes are connected to a current electrode. In fact, it is also possible to connect three adjacent voltage electrodes to a current electrode to further reduce the lead resistance error.

[0045] In another exemplary embodiment of the present application, the quantum resistance reference device further includes: a second low temperature environment container 2; a first quantized Hall resistor R H1 And the second quantized Hall resistance R H2 Placed within the second cryogenic environment container 2. The first and second cryogenic environment containers 1 and 2 can be set to the same low temperature of 4.2K, or different low temperatures can be selected depending on the device types used. Because the Josephson junction array and the quantized Hall resistor require different magnetic field environments for operation, the first and second cryogenic environment containers 1 and 2 cannot be combined.

[0046] In another exemplary embodiment of the present application, the integrator includes: a first operational amplifier A3 and an integrating capacitor C int The first quantized Hall resistance R H1 The second common terminal and the second quantized Hall resistor R H2 The second common terminal is connected to the inverting input terminal of the first operational amplifier A3 and the integrating capacitor C in the integrator. int The non-inverting input terminal of the first operational amplifier A3 is connected to the reference ground, and the output terminal of the first operational amplifier A3 is connected to the integrating capacitor C int The first operational amplifier A3 should be a high input impedance, low noise type amplifier such as LT1001. The integrating capacitor C int Low temperature drift and low temperature coefficient capacitors should be selected, such as polystyrene capacitors.

[0047] In another exemplary embodiment of the present application, the digital quantum voltmeter further comprises: an input voltage buffer A1; the quantum resistance reference device is connected to the voltage to be measured via the input voltage buffer A1. Specifically, the non-inverting input terminal of the input buffer A1 is connected to the voltage to be measured, and the inverting input terminal and output terminal of the input buffer A1 are both connected to the first quantized Hall resistor R H1The first common terminal of the input buffer A1 is connected to the first common terminal of the input terminal. In practical applications, input buffer A1 can generally be constructed using a unity-gain stable operational amplifier. The purpose of providing input buffer A1 is to achieve impedance matching. Specifically, it increases the input impedance of the subsequent stage relative to the measured voltage and reduces the output impedance of the previous stage relative to the first quantum Hall resistance.

[0048] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a first switch S1; the input end of the input voltage buffer A1 is connected to the measured voltage and the reference ground through the first switch S1. Specifically, the first switch S1 can be a single-pole double-throw switch, and the measured voltage input end is connected to the non-inverting input end of the input buffer A1 through the single-pole double-throw switch. This switch is provided to eliminate measurement errors caused by offset voltage, thermoelectric potential, etc. in the circuit during the measurement process. During measurement, the measured voltage and reference ground potential are connected to the subsequent circuit through the first switch S1, and the measurements and readings are taken separately. Subtracting the two readings can eliminate measurement errors caused by offset voltage, thermoelectric potential, etc.

[0049] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a reference voltage buffer A2; the output end of the quantum resistance reference device and the quantum voltage reference device are connected through the reference voltage buffer A2. Specifically, the output end of the quantum voltage reference device is connected to the non-inverting input end of the reference voltage buffer A2, and the inverting input end and output end of the reference voltage buffer A2 are both connected to the second quantized Hall resistor R H2 The first common terminal is connected.

[0050] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a slope amplifier, wherein the output end of the integrator is connected to the input end of the hysteresis comparator through the slope amplifier, and the slope amplifier makes the hysteresis comparator more sensitive to the polarity of the integrator output voltage.

[0051] In another exemplary embodiment of the present application, a slope amplifier includes: a second operational amplifier A4, a first resistor R1, a second resistor R2, a first diode D1, and a second diode D2. The non-inverting input of the second operational amplifier A4 is connected to the output of the first operational amplifier A3. The inverting input of the second operational amplifier A4 is connected to a reference ground via the second resistor R2. The first resistor R1, the first diode D1, and the second diode D2 are connected in parallel between the inverting input and the output of the second operational amplifier A4, wherein the first diode D1 and the second diode D2 are arranged with opposite polarities. The function of the slope amplifier is to amplify the integrator output voltage by a factor determined by the second resistor R2 and the first resistor R1 when the integrator output voltage is within the ±0.7V voltage limit determined by the first diode D1 and the second diode D2, thereby improving the resolution of the hysteresis comparator in distinguishing the integrator output voltage. When the integrator output voltage exceeds the ±0.7V voltage limit determined by the first diode D1 and the second diode D2, the amplification factor is approximately 1 to avoid saturation.

[0052] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a charge release circuit; the output end of the slope amplifier and the input end of the hysteresis comparator are both connected to the reference ground or the input end of the integrator through the charge release circuit.

[0053] In another exemplary embodiment of the present application, the charge release circuit includes: a second switch S2 and a fifth resistor R5. One end of the fifth resistor R5 is connected to the integral capacitor C through the second switch S2. int The input terminal of the fifth resistor R5 is connected to the reference ground; the other end of the fifth resistor R5 is connected to the output terminal of the slope amplifier, specifically: connected to the output terminal of the second operational amplifier A4, one end of the first resistor R1, the output terminal of the second diode D2 and the input terminal of the first diode D1. When the device is in the non-measuring state, the second switch S2 can connect the integration capacitor C int The input of the integrator is connected to the output of the slope amplifier to avoid saturation of the integrator.

[0054] In another exemplary embodiment of the present application, the first switch S1 and the second switch S2 are single-pole double-throw switches and have the same structure. Figure 2 As shown, the single-pole double-throw switch is composed of two semiconductor switching tubes; one pole of the two semiconductor switching tubes serves as input terminal 1 and input terminal 2 respectively, and the other poles of the two semiconductor switching tubes are connected as output terminals; the control signals of the two semiconductor switching tubes are complementary signals; the semiconductor switches can be MOSFETs, JFETs or integrated analog switches.

[0055] In another exemplary embodiment of the present application, the hysteresis comparator includes: a basic comparator A5, a third resistor R3, a fourth resistor R4, and a sixth resistor R6; wherein the fourth resistor R4 and the sixth resistor R6 divide the negative voltage V-, and the voltage dividing point is connected to the non-inverting input terminal of the basic comparator A5. The voltage dividing point is also connected to the output terminal of the basic comparator A5 through the third resistor R3. One end of the sixth resistor R6 is connected to the negative voltage V-, and the other end of the sixth resistor R6 is connected to the non-inverting input terminal of the basic comparator A5, one end of the third resistor R3, and one end of the fourth resistor R4. The other end of the fourth resistor R4 is connected to the reference ground. The other end of the third resistor R3 is connected to the output terminal of the basic comparator A5 and the input terminal of the controller. The inverting input terminal of the basic comparator A5 is connected to the output terminal of the second operational amplifier A4. The use of a hysteresis comparator can prevent the general comparator from oscillating near the zero crossing point.

[0056] This application directly traces the voltage measurement results to an electrical quantum reference, which can shorten the voltage traceability chain and greatly improve measurement accuracy, solving the problem of directly tracing high-precision voltage measurements to a quantum reference.

[0057] An embodiment of the present application further provides a voltage measurement method applied to the above-mentioned digital quantum voltmeter. The voltage measurement method is executed by a controller and specifically includes the following steps.

[0058] Step 101: After a voltage to be measured is input into the digital quantum voltmeter described above, a first control step is executed in each of M preset cycles. The first control step comprises: controlling the polarity of a first preset value voltage output by a quantum voltage reference device according to the polarity of a target voltage in a first time period; controlling the quantum voltage reference device to output zero voltage in a second time period; controlling the quantum voltage reference device to output a first preset value voltage having the same polarity as the measured voltage in a third time period; and controlling the quantum voltage reference device to output zero voltage in a fourth time period. The first, second, third, and fourth time periods constitute a preset cycle. In an initial preset cycle, the target voltage is the measured voltage. In preset cycles other than the initial preset cycle, the target voltage is the output voltage of the hysteresis comparator at the last moment of the fourth time period in the previous preset cycle. In the first time period of the initial preset cycle, the polarity of the first preset value voltage output by the quantum voltage reference device is opposite to the target voltage. In the first time period of the initial preset cycle, the polarity of the first preset value voltage output by the quantum voltage reference device is the same as or opposite to the target voltage. M is an integer greater than 1.

[0059] Step 102: Control the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period based on the polarity of the hysteresis comparator output voltage at any time before the end of the Mth preset period. The polarity of the output voltage of the quantum voltage reference device remains unchanged during the subsequent time period, and the following steps are performed during the clock cycles of the subsequent time period.

[0060] Step 103: Execute the second control step in each of n clock cycles; the second control step comprises: reading the polarity of the hysteresis comparator output voltage in real time; when the polarity of the hysteresis comparator output voltage deflects at time t, determining the duration of the quantum voltage reference device output voltage in the current cycle at time t+d; and determining the output voltage of the quantum voltage reference device in the next clock cycle based on the output voltage of the quantum voltage reference device in the current clock cycle; n is an integer greater than 1.

[0061] Step 104: Calculate the conversion voltage according to the length of the first time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle to obtain the voltage conversion voltage to be measured.

[0062] Step 105: obtaining the actual voltage of the voltage to be measured based on the voltage to be measured conversion voltage and the zero voltage conversion voltage; the zero voltage conversion voltage is obtained by converting the voltage to be measured into zero voltage and inputting it into the digital quantum voltmeter described above.

[0063] In an exemplary embodiment, the specific process of determining the zero voltage switching voltage is as follows.

[0064] Step 201: After zero voltage is input into the digital quantum voltmeter, the first control step is executed in M preset cycles.

[0065] Step 202: Control the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period according to the polarity of the output voltage of the hysteresis comparator at any time before the end of the Mth preset period.

[0066] Step 203: Execute the second control step in n clock cycles.

[0067] Step 204: Calculate the conversion voltage according to the length of the second time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle to obtain a zero-voltage conversion voltage.

[0068] In an exemplary embodiment, step 101 specifically includes: step 1-1: synchronously perform the following actions, switch the first switch S1 to the voltage to be measured, so that the voltage to be measured passes through the input voltage buffer A1 and is applied to the first quantum Hall resistor R H1An integral current is generated on the circuit; the second switch S2 is switched to the reference ground, so that the integrator starts working; the polarity of the output voltage of the quantum voltage reference device in the first stage is set to be opposite to the polarity of the measured input voltage, and the voltage value is V R , and output the above set voltage under the drive of quantum voltage driver and microwave power supply, and then pass through reference voltage buffer A2 and then pass through the second quantum Hall resistor R H2 Another integral current is generated.

[0069] like Figure 4 As shown, step 1-2: in the first preset cycle, it is divided into 4 stages, namely the four time periods mentioned above: in the first stage, the quantum voltage reference device outputs the voltage set in the previous step, and this time period is recorded as Δtm1; in the second stage, the quantum voltage reference device outputs zero voltage, and this time period is recorded as Δt m2 In the third stage, the quantum voltage reference device outputs a voltage with the same amplitude and opposite polarity as that in the first stage. This period is recorded as Δt m3 ; In the fourth stage, the quantum voltage reference device outputs zero voltage, and this period is recorded as Δt m4 . In Δt m4 Before the end, the polarity of the hysteresis comparator output voltage is read, and the polarity of the quantum voltage reference device output voltage for the next preset period is preset based on the hysteresis comparator output polarity. Specifically, if the inverting input of the basic comparator A5 is connected to the output of the second operational amplifier A4, and the non-inverting input of the basic comparator A5 is connected to the other end of the sixth resistor R6, one end of the third resistor R3, and one end of the fourth resistor R4, then the polarity of the quantum voltage reference device output voltage for the next preset period is preset to be opposite to the polarity of the read hysteresis comparator output voltage. If the non-inverting input of the basic comparator A5 is connected to the output of the second operational amplifier A4, and the inverting input of the basic comparator A5 is connected to the other end of the sixth resistor R6, one end of the third resistor R3, and one end of the fourth resistor R4, then the polarity of the quantum voltage reference device output voltage for the next preset period is preset to be the same as the polarity of the read hysteresis comparator output voltage.

[0070] Step 1-3: Repeat steps 1-2 M times.

[0071] In an exemplary embodiment, Figure 5 In the preRD stage, step 102 is specifically as follows: Steps 1-4: Read the output polarity of the hysteresis comparator before the end of the last preset cycle, and adjust the polarity of the output voltage of the quantum voltage reference device at the end of the last preset cycle according to the output polarity of the hysteresis comparator, so that the output voltage of the integrator changes in the direction of driving the polarity of the hysteresis comparator to change in the next stage; the output voltage of the quantum voltage reference device in this stage is recorded as V Rn .

[0072] In an exemplary embodiment, Figure 5 The RD phase in step 103 specifically includes: Steps 1-5: reading the polarity of the hysteresis comparator output voltage in each clock cycle, and when the polarity of the hysteresis comparator output voltage flips, after a delay of d clocks, recording the duration of the quantum voltage reference device output voltage in the current clock cycle, and calculating the value of the output voltage according to the formula Calculate the output voltage of the quantum voltage reference device in the next clock cycle and control the quantum voltage reference device in the next clock cycle to change the output voltage, where V R（i） represents the output voltage of the quantum voltage reference device in the i-th clock cycle, n and B are positive integers greater than 1 and have no practical meaning; the initial value of i is n.

[0073] Step 1-6: Repeat steps 1-5, decreasing i by 1 each time until i=1.

[0074] In an exemplary embodiment, step 104 specifically includes: Step 1-7: Switch the second switch S2 of the charge release device to the integral capacitor C int The input terminal stops integration and releases the residual charge of the integrator. At the same time, according to the formula Calculate the conversion voltage to obtain the voltage to be measured, where t i represents the duration of the output voltage of the quantum voltage reference device in the i-th clock cycle, U in Indicates the conversion voltage, M + is the number of times the polarity of the quantum voltage output in the first stage is positive in M preset cycles, M _ is the number of times the polarity of the quantum voltage output in the first stage is negative in M preset cycles; M + With M - The sum is M.

[0075] In an exemplary embodiment, step 105 specifically includes: subtracting the zero voltage conversion voltage from the voltage conversion voltage to obtain the actual voltage to be measured.

[0076] In an exemplary embodiment, before step 201, the following steps are further included: Step 2-1: synchronously executing the following actions: switching the switch S1 to the input reference ground, switching the second switch S2 to the reference ground, setting the polarity of the output voltage of the quantum voltage reference device to be opposite to the polarity of the measured voltage, and setting the voltage value to V R .

[0077] In an exemplary embodiment, when selecting parameters B and n, it should be ensured that V R0 is an integer multiple of the LSB of the output voltage of the quantum voltage reference device; when d is selected, the output voltage of the quantum voltage reference device V R0The integrated voltage within the time d is greater than the input noise limit of the hysteresis comparator; the preset period is based on the clock period provided by the clock module as a basic unit.

[0078] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0079] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above examples is only intended to help understand the method and core concept of this application. At the same time, for those skilled in the art, based on the concept of this application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A digital quantum voltmeter, characterized in that: The digital quantum voltmeter comprises: Quantum voltage reference devices, quantum resistance reference devices, integrators, hysteresis comparators, and controllers; The controller is connected to the output end of the hysteresis comparator and the input end of the quantum voltage reference device respectively, and the controller is used to control the polarity of the output voltage of the quantum voltage reference device according to the polarity of the output voltage of the hysteresis comparator; The input end of the integrator is connected to the measured voltage and the output end of the quantum voltage reference device respectively; the output end of the integrator is connected to the input end of the hysteresis comparator; the input end of the integrator is connected to the measured voltage and the output end of the quantum voltage reference device through the quantum resistance reference device.

2. The digital quantum voltmeter according to claim 1, characterized in that: The digital quantum voltmeter further comprises: a reference voltage buffer; the output end of the quantum resistance reference device and the output end of the quantum voltage reference device are connected via the reference voltage buffer.

3. The digital quantum voltmeter according to claim 1, characterized in that: The digital quantum voltmeter further comprises: an input voltage buffer; the quantum resistance reference device is connected to the voltage to be measured via the input voltage buffer.

4. The digital quantum voltmeter according to claim 1, characterized in that: The digital quantum voltmeter further includes a slope amplifier, and the output end of the integrator is connected to the input end of the hysteresis comparator through the slope amplifier.

5. The digital quantum voltmeter according to claim 4, characterized in that: The digital quantum voltmeter further includes: a charge release circuit; the output end of the slope amplifier and the input end of the hysteresis comparator are both connected to a reference ground or an input end of an integrator through the charge release circuit.

6. The digital quantum voltmeter according to claim 1, characterized in that: The quantum resistance reference device includes: a first quantized Hall resistor and a second quantized Hall resistor; The first common terminal of the first quantized Hall resistor is connected to the measured voltage; The first common end of the second quantized Hall resistor is connected to the output end of the quantum voltage reference device; The second common end of the first quantized Hall resistor and the second common end of the second quantized Hall resistor are both connected to the input end of the integrator.

7. The digital quantum voltmeter according to claim 3, characterized in that: The digital quantum voltmeter further includes: a first switch; the input end of the input voltage buffer is connected to the measured voltage and the reference ground through the first switch.

8. A voltage measurement method, characterized in that: Applied to the digital quantum voltmeter of claim 1, the voltage measurement method comprises: When the voltage to be measured is input into the digital quantum voltmeter described in claim 1, In each of M preset cycles, a first control step is performed; the first control step is: controlling the polarity of a first preset value voltage output by the quantum voltage reference device according to the polarity of the target voltage in a first time period; controlling the quantum voltage reference device to output zero voltage in a second time period; controlling the quantum voltage reference device to output a first preset value voltage having the same polarity as the measured voltage in a third time period; and controlling the quantum voltage reference device to output zero voltage in a fourth time period; the first time period, the second time period, the third time period, and the fourth time period constitute a preset cycle; in an initial preset cycle, the target voltage is the measured voltage; in preset cycles other than the initial preset cycle, the target voltage is the output voltage of the hysteresis comparator at the last moment of the fourth time period in the previous preset cycle; in the initial preset cycle, the polarity of the first preset value voltage output by the quantum voltage reference device in the first time period is opposite to the target voltage, and in preset cycles other than the initial preset cycle, the polarity of the first preset value voltage output by the quantum voltage reference device in the first time period is the same as or opposite to the target voltage; M is an integer greater than 1; Controlling the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period according to the polarity of the output voltage of the hysteresis comparator at any time before the end of the Mth preset period; The second control step is performed in each of n clock cycles; the second control step comprises: reading the polarity of the output voltage of the hysteresis comparator in real time; when the polarity of the output voltage of the hysteresis comparator deflects at time t, determining the duration of the output voltage of the quantum voltage reference device in the current cycle at time t+d, and determining the output voltage of the quantum voltage reference device in the next clock cycle based on the output voltage of the quantum voltage reference device in the current clock cycle; n is an integer greater than 1; Calculating a conversion voltage according to the length of the first time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle to obtain a voltage conversion voltage to be measured; The actual voltage of the voltage to be measured is obtained based on the voltage to be measured conversion voltage and the zero voltage conversion voltage; the zero voltage conversion voltage is obtained by converting the voltage to be measured into zero voltage and inputting it into the digital quantum voltmeter described in claim 1.

9. The voltage measurement method according to claim 8, characterized in that: The specific process of determining the zero voltage switching voltage is: When zero voltage is input into the digital quantum voltmeter of claim 1, In M preset cycles, the first control step is executed; Controlling the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period according to the polarity of the output voltage of the hysteresis comparator at any time before the end of the Mth preset period; The second control step is executed in each of n clock cycles; The conversion voltage is calculated according to the length of the second time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle to obtain a zero-voltage conversion voltage.

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