Method, system and device for realizing high-repetition-frequency wide-width imaging

Abstract

The invention discloses a method, a system and a device for realizing high-repetition-frequency wide-width imaging, and relates to the technical field of high-repetition-frequency wide-width imaging, and the method comprises the steps: carrying out the pulse compression of large-size imaging echo data; setting the number of accumulation frame periods and the number of imaging areas; a first cache, a second cache, a first processing core and a second processing core are arranged, high repetition frequency imaging accumulation is conducted on pulse pressure data of multiple accumulation frame periods through the first cache, the second cache, the first processing core and the second processing core, and high repetition frequency imaging accumulation results corresponding to multiple imaging areas are spliced. Based on this, the dual-core model separates the control flow and the imaging accumulation process, and the two cores perform parallel processing, so that the processing speed can be improved; an imaging accumulation process is divided into pulse pressure cache and imaging hardcore accumulation by a double-cache technology, and the repetition frequency is improved by optimizing time efficiency through a memory; and the imaging data is divided into a plurality of areas for respective imaging, so that the problem of imaging sheet limitation can be solved.

Description

Technical Field

[0001] The present invention relates to the technical field of high pulse repetition frequency wide-swath imaging, and particularly to a method, system and device for realizing high pulse repetition frequency wide-swath imaging. Background Art

[0002] The Back Projecting (BP) algorithm is widely used in the field of SAR imaging. The BP imaging algorithm is simple, has good robustness and high resolution, and is applicable to any orbit or flight trajectory model. The imaging process is to calculate the round-trip time delay between the position of the radar platform at each azimuth moment and the target point, then find the echo signals corresponding to different azimuth moments for coherent accumulation, and finally obtain the objective function of the target. Simply put, the BP algorithm is to project the target data onto each pixel in the imaging area and then coherently accumulate the echoes at each pixel. This algorithm needs to traverse the entire imaging area, so the amount of computation is very large. Without optimization, the time complexity is high and the efficiency is low. Currently, the BP algorithm is usually implemented on FPGA, but the FPGA program has defects such as high power consumption, slow processing speed, low imaging pulse repetition frequency, and limited processing map size in debugging, modification and compilation, and it is difficult to meet the requirements of SAR high pulse repetition frequency wide-swath imaging processing. Summary of the Invention

[0003] The present invention provides a method, system and device for realizing high pulse repetition frequency wide-swath imaging to solve the problems of high power consumption, slow processing speed, low imaging pulse repetition frequency and limited processing map size in the existing imaging based on FPGA.

[0004] To achieve the above object, the present invention adopts the following technical solutions:

[0005] The present invention provides a method for realizing high pulse repetition frequency wide-swath imaging, including:

[0006] Performing pulse compression on large-size imaging echo data;

[0007] Setting the number of accumulation frame periods and the number of imaging areas, where the accumulation frame period represents the cumulative number of times in the imaging accumulation process;

[0008] Selecting an imaging area and the pulse compression data corresponding to the area;

[0009] Setting a first buffer, a second buffer, a first processing core and a second processing core, and respectively performing high pulse repetition frequency imaging accumulation on the pulse compression data of multiple accumulation frame periods through the first buffer, the second buffer, the first processing core and the second processing core. In the same accumulation frame period, the first processing core is used to store different segments of pulse compression into the first buffer and the second buffer at different times, and the second processing core is used to perform imaging on the pulse compression in the first buffer and the second buffer, and accumulate the imaging of different accumulation frame periods, so as to realize high pulse repetition frequency imaging accumulation;

[0010] Iteratively select the next imaging area and the corresponding pulse compression data for this area, and perform high PRF imaging accumulation until the high PRF imaging accumulation of all pulse compression data is completed;

[0011] Stitch the high PRF imaging accumulation results corresponding to multiple imaging areas to obtain high PRF wide-swath imaging.

[0012] Optionally,

[0013] Before selecting an imaging area and the corresponding pulse compression data for this area, it includes:

[0014] Set the total imaging area of the large-size imaging echo data to M×N, where the number of longitudinal pixels in the total imaging area is M, the number of lateral pixels in the large-size imaging data is N, and the total imaging area represents the final wide-swath imaging size;

[0015] The resolution of the total imaging area in the M direction is PIX_M, and the resolution in the N direction is PIX_N.

[0016] Optionally,

[0017] Set the starting point coordinates of the imaging area to (TarLeft_X, TarLeft_Y, TarLeft_Z);

[0018] According to the resolution of the total imaging area, the coordinate increment in the M direction is PIX_M, and the coordinate increment in the N direction is PIX_N.

[0019] Optionally,

[0020] The setting of the first buffer, the second buffer, the first processing core, and the second processing core, and the high PRF imaging accumulation of the pulse compression data for multiple accumulation frame periods respectively through the first buffer, the second buffer, the first processing core, and the second processing core. In the same accumulation frame period, the first processing core is used to store different segments of pulse compression data into the first buffer and the second buffer in a time-sharing manner, and the second processing core is used to perform imaging on the pulse compression in the first buffer and the second buffer, and accumulate the imaging of different accumulation frame periods, so as to realize high PRF imaging accumulation includes:

[0021] Set the first buffer, the second buffer, the first processing core, and the second processing core;

[0022] Select the pulse compression data corresponding to an accumulation frame period;

[0023] At the first moment, control the first buffer to store a segment of pulse compression data through the first processing core;

[0024] At the second moment, the next segment of pulse compression data is scheduled by the first processing core to be stored in the second cache, and imaging accumulation is performed on the pulse compression data in the first cache;

[0025] At the third moment, imaging accumulation is performed on the pulse compression data in the second cache by the second processing core, and the first processing core controls the first cache to store the third segment of pulse compression data until the imaging accumulation of the current accumulation frame period is completed;

[0026] Iteratively select the pulse compression data corresponding to the next accumulation frame period for imaging accumulation until the imaging accumulation of all accumulation frame periods is completed.

[0027] Optionally,

[0028] The setting of the first cache, the second cache, the first processing core, and the second processing core, and the high PRF imaging accumulation of the pulse compression data of multiple accumulation frame periods by the first cache, the second cache, the first processing core, and the second processing core respectively includes:

[0029] Set the cache sizes of the first cache and the second cache to be the same, both being x, then the cache size x satisfies the following conditions:

[0030] x > (n * (t2 + t3) / (1 / f1 - 2t1))

[0031] In the formula, n is the number of imaging regions, t1 is the time for the second processing core to perform imaging accumulation on a single imaging region, t2 is the time for the second processing core to upload the imaging accumulation result of a single imaging region, t3 is the time for the second processing core to perform coherent accumulation on a single imaging region, f 1 is the PRF of the imaging accumulation result

[0032] Optionally,

[0033] The iteratively selecting the pulse compression data corresponding to the next accumulation frame period for imaging accumulation until the imaging accumulation of all accumulation frame periods is completed includes:

[0034] When performing imaging on the pulse compression data of the next accumulation frame period, continue to perform imaging accumulation on the basis of the imaging accumulation results already generated in the first cache and the second cache.

[0035] Optionally,

[0036] The splicing of the high PRF imaging accumulation results corresponding to multiple imaging regions to obtain a high PRF wide - swath imaging includes:

[0037] Divide each imaging region into 16 blocks, and each block has 32 pixel points;

[0038] The starting point coordinates of the first region (point1_i_X, point1_i_Y, point1_i_Z), then the coordinates of each point in the region are:

[0039] point1_i_X = point1_X,

[0040] point1_i_Y = point1_Y+(i - 1)*32*PIX_M,

[0041] point1_i_Z = point1_Z.

[0042] Optionally,

[0043] The step of splicing the high PRF imaging accumulation results corresponding to multiple imaging regions to obtain high PRF wide - swath imaging further includes:

[0044] The starting point coordinates of the second region (point2_i_X, point2_i_Y, point2_i_Z), then the coordinates of each point in the region are:

[0045] point1_i_X = point2_X,

[0046] point1_i_Y = point2_Y+(i - 1)*32*PIX_M,

[0047] point1_i_Z = point2_Z,

[0048] Splicing the first region and the second region along the M direction.

[0049] The present invention provides a high PRF wide - swath imaging implementation system, including:

[0050] A data processing module, configured to perform pulse compression on large - size imaging echo data;

[0051] A region division module, configured to set the number of accumulation frame periods and the number of imaging regions, where the accumulation frame period represents the cumulative number of times in the imaging accumulation process, and the imaging region is used to represent dividing the large - size imaging echo data into multiple regions for imaging respectively;

[0052] A high PRF accumulation module, configured to select an imaging region and the pulse - compressed data corresponding to this region;

[0053] A first cache, a second cache, a first processing core and a second processing core are set, and pulse pressure data of a plurality of accumulation frame periods are respectively accumulated by the first cache, the second cache, the first processing core and the second processing core. Within the same accumulation frame period, the first processing core is used to store different segments of pulse pressure into the first cache and the second cache in a time-sharing manner, and the second processing core is used to image the pulse pressure of the first cache and the second cache, and accumulate the images of different accumulation frame periods, thereby realizing high repetition rate imaging accumulation;

[0054] Iteratively select the next imaging area and the pulse pressure data corresponding to the area, and perform high-repetition rate imaging accumulation until the high-repetition rate imaging accumulation of all pulse pressure data is completed;

[0055] The wide-width stitching module is used to stitch the high-repetition-rate imaging accumulation results corresponding to multiple imaging areas to obtain high-repetition-rate wide-width imaging.

[0056] The present invention provides a high repetition rate wide-band imaging implementation device, comprising:

[0057] processor, and

[0058] A memory arranged to store computer executable instructions, which when executed cause the processor to perform the steps of any of the methods described above.

[0059] At least one of the above technical solutions adopted in this specification can achieve the following beneficial effects:

[0060] The present invention discloses a method, system and device for realizing high repetition rate and wide-width imaging. A first processing core and a second processing core are set. The first processing core is used for process control, and the second processing core is used for imaging accumulation. The control process and the imaging accumulation process are separated. The two cores process in parallel, which can optimize the working efficiency of the processing cores and improve the processing speed. The dual-core model is also convenient for debugging and enhances plasticity. A double buffer technology is set to further divide the imaging accumulation process into two subtasks, namely pulse pressure buffer and imaging hard core accumulation. The time efficiency is optimized by memory, thereby improving the repetition rate. When processing data, theoretically, when the size of the double buffer is infinite, imaging of any repetition rate can be satisfied. In addition, the imaging data is divided into a plurality of areas for imaging respectively, and finally spliced, thereby solving the problem of imaging width limitation. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 A flow chart of a method for implementing high repetition rate wide-width imaging provided in one embodiment of this specification;

[0062] Figure 2 A schematic diagram of a wide-format imaging dual-core architecture provided in one embodiment of this specification;

[0063] Figure 3 Schematic diagram of a wide - width imaging dual - core workflow provided by an embodiment of this specification;

[0064] Figure 4 Schematic diagram of a wide - width imaging area division provided by an embodiment of this specification;

[0065] Figure 5 Schematic diagram of a wide - width imaging area division provided by an embodiment of this specification;

[0066] Figure 6 Schematic diagram of a high - repetition - rate wide - width imaging implementation system provided by an embodiment of this specification;

[0067] Figure 7 Schematic diagram of a high - repetition - rate wide - width imaging implementation device provided by an embodiment of this specification. Detailed implementation manners

[0068] To make the objectives, technical solutions, and advantages of this specification clearer, the technical solutions of this specification will be clearly and completely described below in conjunction with specific embodiments of this specification and the corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this specification, rather than all of them. Based on the embodiments in this specification, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of this specification.

[0069] Without conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0070] It should be noted that the terms "first", "second", etc. in the description, claims, and the above - mentioned drawings of the embodiments of the present invention are used to distinguish similar objects, and do not necessarily need to describe a specific order or sequence. It should be understood that such used data may be interchanged under appropriate circumstances so that the embodiments described here can be implemented in an order different from that shown or described here.

[0071] As used herein, "a plurality or several" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects before and after.

[0072] The following describes the preferred embodiments of the present invention in conjunction with the drawings of the specification. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not used to limit the present invention. Without conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0073] Figure 1 A flowchart of a method for realizing high pulse repetition frequency wide - area imaging provided by an embodiment of this specification. The method may specifically include:

[0074] Perform pulse compression on large - size imaging echo data;

[0075] Set the number of accumulation frame periods and the number of imaging regions. The accumulation frame period represents the cumulative number of times in the imaging accumulation process;

[0076] Select an imaging region and the corresponding pulse - compressed data for this region;

[0077] Set a first buffer, a second buffer, a first processing core, and a second processing core. Through the first buffer, the second buffer, the first processing core, and the second processing core, perform high pulse repetition frequency imaging accumulation on the pulse - compressed data of multiple accumulation frame periods. In the same accumulation frame period, the first processing core is used to store different segments of pulse - compressed data into the first buffer and the second buffer at different times, and the second processing core is used to perform imaging on the pulse - compressed data in the first buffer and the second buffer, and accumulate the imaging results of different accumulation frame periods, so as to realize high pulse repetition frequency imaging accumulation;

[0078] Iteratively select the next imaging region and the corresponding pulse - compressed data for this region, and perform high pulse repetition frequency imaging accumulation until the high pulse repetition frequency imaging accumulation of all pulse - compressed data is completed;

[0079] Stitch the high pulse repetition frequency imaging accumulation results corresponding to multiple imaging regions to obtain high pulse repetition frequency wide - area imaging.

[0080] In one embodiment,

[0081] Before the step of selecting an imaging region and the corresponding pulse - compressed data for this region, it includes:

[0082] Set the total imaging region of the large - size imaging echo data as M×N. The number of longitudinal pixels in the total imaging region is M, the number of horizontal pixels in the large - size imaging data is N, and the total imaging region represents the final wide - area imaging size;

[0083] The resolution in the M direction of the total imaging region is PIX_M, and the resolution in the N direction is PIX_N.

[0084] In a specific embodiment,

[0085] Such as Figure 4 , taking an image with a size of 512*512 as an example, set the data block size as M_Num = 32, the number of points in the N direction of each block as N_Num = 512. In the longitudinal direction, each column of data of the large - size imaging data is pulse - compressed into 16 data blocks, and the pulse - compression result of each column of data is a piece of pulse - compressed data, obtaining 512 pieces of pulse - compressed data.

[0086] In one embodiment,

[0087] Set the starting point coordinates of the imaging area as (TarLeft_X, TarLeft_Y, TarLeft_Z);

[0088] According to the resolution of the total imaging area, the coordinate increment in the M direction is PIX_M, and the coordinate increment in the N direction is PIX_N.

[0089] In one embodiment,

[0090] Set the first cache, the second cache, the first processing core and the second processing core. Through the first cache, the second cache, the first processing core and the second processing core, the pulse compression data of multiple accumulation frame periods are respectively subjected to high pulse repetition frequency (PRF) imaging accumulation. Within the same accumulation frame period, the first processing core is used to store the pulse compression of different segments into the first cache and the second cache at different times, and the second processing core is used to perform imaging on the pulse compression in the first cache and the second cache, and accumulate the imaging of different accumulation frame periods, so as to realize high PRF imaging accumulation, including:

[0091] Set the first cache, the second cache, the first processing core and the second processing core;

[0092] Select the pulse compression data corresponding to one accumulation frame period;

[0093] At the first moment, control the first cache by the first processing core to store a segment of pulse compression data;

[0094] At the second moment, schedule the next segment of pulse compression data to be stored in the second cache by the first processing core, and perform imaging accumulation on the pulse compression data in the first cache;

[0095] At the third moment, perform imaging accumulation on the pulse compression data in the second cache by the second processing core, and control the first cache by the first processing core to store the third segment of pulse compression data until the imaging accumulation of the current accumulation frame period is completed;

[0096] Iteratively select the pulse compression data corresponding to the next accumulation frame period for imaging accumulation until the imaging accumulation of all accumulation frame periods is completed.

[0097] In a specific embodiment,

[0098] The first cache and the second cache adopt ping-pong caches.

[0099] As Figure 2 shown in the schematic diagram of the wide-field imaging dual-core architecture, the first processing core is core 0, the second processing core is core 1, and the second processing core is an imaging acceleration hard core.

[0100] As Figure 3 shown, select the pulse compression data corresponding to an accumulation frame period;

[0101] At the first moment, core 0 controls the ping buffer to store a segment of pulse compression data;

[0102] At the second moment, core 0 schedules the next segment of pulse compression data to be stored in the pong buffer, and core 1 performs imaging accumulation on the pulse compression data in the ping buffer;

[0103] At the third moment, core 1 performs imaging accumulation on the pulse compression data in the pong buffer, and core 0 controls the ping buffer to store the third segment of pulse compression data until the imaging accumulation of the current accumulation frame period is completed;

[0104] Iteratively select the pulse compression data corresponding to the next accumulation frame period for imaging accumulation until the imaging accumulation of all accumulation frame periods is completed.

[0105] In one embodiment,

[0106] The setting of the first buffer, the second buffer, the first processing core and the second processing core, and the high PRF imaging accumulation of the pulse compression data of multiple imaging regions by the first buffer, the second buffer, the first processing core and the second processing core respectively further includes:

[0107] Set the time for the second processing core to process the imaging accumulation of a single imaging region as t1, the time for the second processing core to upload the imaging accumulation result of a single imaging region as t2, the time for the second processing core to perform coherent accumulation on a single imaging region as t3, and the number of imaging regions as n. Then, the PRF f of the imaging accumulation result of the single-frame large-size imaging data M×N 1 Satisfies the following conditions:

[0108]

[0109] In one embodiment,

[0110] The setting of the first buffer, the second buffer, the first processing core and the second processing core, and the high PRF imaging accumulation of the pulse compression data of multiple imaging regions by the first buffer, the second buffer, the first processing core and the second processing core respectively includes:

[0111] Set the buffer sizes of the first buffer and the second buffer to be the same, both being x. Then, the buffer size x satisfies the following conditions:

[0112] x > (n*(t2 + t3) / (1 / f1 - 2t1))

[0113] Where n is the number of imaging regions, t1 is the time for the second processing core to accumulate the imaging of a single imaging region, t2 is the time for the second processing core to upload the imaging accumulation result of a single imaging region, t3 is the time for the second processing core to perform coherent accumulation on a single imaging region, and f 1 is the pulse repetition frequency of the imaging accumulation result.

[0114] In one embodiment,

[0115] The iterative selection of the pulse compression data corresponding to the next accumulation frame period for imaging accumulation until the imaging accumulation of all accumulation frame periods is completed includes:

[0116] When performing imaging on the pulse compression data of the next accumulation frame period, based on the imaging accumulation results that have been generated in the first buffer and the second buffer, continue with the imaging accumulation.

[0117] In a specific embodiment,

[0118] Taking an image with a size of 1024*512 as an example, the maximum image size that the chip can process in this embodiment is 512*512.

[0119] Assume that the imaging region is in the XOY plane. Figure 4 shows a way of region division using the imaging acceleration hard core. Define two directions on the imaging plane as M and N. The resolution of the image in the M direction is PIX_M, the resolution in the N direction is PIX_N, and the starting point coordinates of the imaging region are (TarLeft_X, TarLeft_Y, TarLeft_Z). Then the coordinate increment in the M direction is PIX_M, and the coordinate increment in the N direction is PIX_N.

[0120] Such as Figure 5 , taking an image with a size of 1024*512 as an example, set the data block size as M_Num = 32, the number of points in the N direction of each block N_Num = 512. In the longitudinal direction, the pulse compression of each column of data of the large-size imaging data is into 32 data blocks. The pulse compression result of each column of data is a piece of pulse compression data, and 512 pieces of pulse compression data are obtained.

[0121] In order to use the imaging acceleration hard core to complete the imaging of a 1024*512 image size, regional division is adopted, that is, the imaging region is divided into several regions smaller than 512*512. Such as Figure 5 , the direction with 1024 points is defined as the M direction, and the direction with 512 points is defined as the N direction. Divide the M direction into two equal parts. So far, the image is divided into two regions ①②.

[0122] In order to use the imaging acceleration hard core for imaging, it is necessary to know the coordinates of each block of the imaging region. Please refer to Figure 4, the invention divides the imaging area into area ① and area ② according to the illustration of the image, obtains the M-direction resolution PIX_M and N-direction resolution PIX_N of the image, and the starting position coordinates of the lower left corner of the image are (TarLeft_X, TarLeft_Y, TarLeft_Z), where TarLeft_Z = 0. From Figure 4 It can be obtained that the coordinates of point1 (point1_X, point1_Y, point1_Z) at the lower left corner of the image in area ① and the coordinates of point2 (point2_X, point2_Y, point2_Z) at the lower left corner of the image in area ② are known, and the calculation formulas are as follows:

[0123] point2_X = TarLeft_X,

[0124] point2_Y = TarLeft_Y,

[0125] point2_Z = TarLeft_Z = 0,

[0126] point1_X = TarLeft_X,

[0127] point1_Y = TarLeft_Y + 512 * PIX_M,

[0128] point1_Z = TarLeft_Z = 0

[0129] Reference Figure 5 , each area is divided into 16 blocks according to the illustration. The calculation formula for the starting point coordinates (point1_i_X, point1_i_Y, point1_i_Z) of each block i (i = 1, 2, 3, 4, 5,..., 12, 13, 14, 15, 16) in area ① is as follows:

[0130] point1_i_X = point1_X,

[0131] point1_i_Y = point1_Y + (i - 1) * 32 * PIX_M,

[0132] point1_i_Z = point1_Z,

[0133] The calculation formula for the starting point coordinates (point2_i_X, point2_i_Y, point2_i_Z) of each block i (i = 1, 2, 3, 4, 5,..., 12, 13, 14, 15, 16) in area ② is as follows:

[0134] point1_i_X = point2_X,

[0135] point1_i_Y = point2_Y + (i - 1) * 32 * PIX_M,

[0136] point1_i_Z = point2_Z.

[0137] Assume that the accumulation time of the imaging acceleration hardcore is t1 (this time is related to the frequency of the imaging acceleration hardcore, the number of imaging pulse compression points, etc.), the image upload time of the imaging acceleration hardcore is t2 (this time is related to the size of the imaging frame), the coherent accumulation time is t3, and the pulse repetition frequency is f1. Then, for the Jingdao Core 2 imaging acceleration hardcore to form images of the following two regions, the required time T3 is: Figure 4 The time T3 required for the images of the two regions is:

[0138] T3 = (t1 + t2 + t3) * 2

[0139] To ensure the imaging timing, the following relationship exists:

[0140] T3 < 1 / f1

[0141] Analyzing the above formula, it can be obtained that to complete the images of the two regions as shown below, the maximum pulse repetition frequency that can be supported is 1 / T3. In practical applications, if an imaging with a pulse repetition frequency greater than 1 / T3 is to be achieved, the current method cannot meet the requirements. The present invention uses two designs, dual-core time-sharing multiplexing and ping-pong buffering, to achieve the purpose of increasing the pulse repetition frequency. Time-sharing multiplexing means that core 0 caches the pulse compression into a ping-pong buffer, and at the same time, core 1 accumulates the previously cached pulse compression for imaging. Please refer to Figure 4 . Using memory to exchange for time to achieve the purpose of increasing the pulse repetition frequency. Figure 2 .

[0142] Assume that the size of the ping-pong buffer is 2N. Then, the time T1 required for time-sharing multiplexing to image N in one frame period is:

[0143] T1 = t1 * N * 2 + (t3 + t2) * 2

[0144] In the time-sharing multiplexing mode, the processing period T2 is:

[0145] T2 = N * 1 / f1

[0146] To ensure the imaging timing, the following relationship exists:

[0147] T1 < T2, that is, (t1 * N * 2 + (t3 + t2) * 2) < N * 1 / f1. After derivation, it can be obtained that:

[0148] N > (2 * (t2 + t3) / (1 / f1 - 2t1))

[0149] Analyzing the above formula, it can be known that to implement 1024*512 BP imaging using the algorithm of the present invention and to satisfy imaging with a pulse repetition frequency of f1, the size of the ping-pong buffer should be at least 4*((t2 + t3) / (1 / f1 - 2t1)). Increasing the pulse repetition frequency can be achieved by increasing the size of the ping-pong buffer. In theory, when the size of the ping-pong buffer is infinitely large, BP imaging with any pulse repetition frequency can be satisfied.

[0150] In a specific embodiment,

[0151] only one imaging acceleration hardcore needs to be set. By obtaining the high-pulse-repetition-frequency wide-swath imaging result of a single-frame large-size imaging data M×N and releasing the ping-pong buffer;

[0152] iteratively select the next frame of large-size imaging data M×N for high-pulse-repetition-frequency wide-swath imaging, and coherently accumulate the image of the next frame and the image of the previous frame to obtain the back-projection of the high-pulse-repetition-frequency wide-swath imaging.

[0153] It can be seen from this that a method for implementing high-pulse-repetition-frequency wide-swath imaging of the present invention separates the control process and the imaging accumulation process by setting a first processing core for process control and a second processing core for imaging accumulation, and the two cores perform parallel processing, which can optimize the working efficiency of the processing core, improve the slow processing speed, and the dual-core model is also convenient for debugging and enhances plasticity; setting the dual-buffer technology and time-division multiplexing further divides the imaging accumulation process into two subtasks: pulse compression buffer and imaging hardcore accumulation, optimizing the time efficiency through memory, thereby increasing the pulse repetition frequency. In theory, when the size of the dual buffer is infinitely large, imaging with any pulse repetition frequency can be satisfied; in addition, the imaging data is divided into multiple regions for separate imaging and finally stitched together to solve the problem of imaging swath limitation.

[0154] Figure 6 The following is a schematic diagram of a system for implementing high-pulse-repetition-frequency wide-swath imaging provided by an embodiment of this specification. The system specifically includes:

[0155] A data processing module for performing pulse compression on large-size imaging echo data;

[0156] A region division module for setting the number of accumulation frame periods and the number of imaging regions, where the accumulation frame period represents the cumulative number of times in the imaging accumulation process;

[0157] A high-pulse-repetition-frequency accumulation module for selecting an imaging region and the corresponding pulse compression data of the region;

[0158] A first cache, a second cache, a first processing core, and a second processing core are provided. High PRF imaging accumulation is performed on the pulse compression data of multiple accumulation frame periods through the first cache, the second cache, the first processing core, and the second processing core respectively. Within the same accumulation frame period, the first processing core is used to store different segments of pulse compression data into the first cache and the second cache at different times, and the second processing core is used to perform imaging on the pulse compression in the first cache and the second cache, and accumulate the imaging of different accumulation frame periods, so as to achieve high PRF imaging accumulation;

[0159] Iteratively select the next imaging area and the corresponding pulse compression data thereof, and perform high PRF imaging accumulation until the high PRF imaging accumulation of all pulse compression data is completed;

[0160] A wide - format stitching module is used to stitch the high PRF imaging accumulation results corresponding to multiple imaging areas to obtain high PRF wide - format imaging.

[0161] In a specific embodiment, the area division module is specifically used for:

[0162] In order to use the imaging acceleration hard core to complete the imaging of a 1024*512 image format, area division is adopted, that is, the imaging area is divided into several areas smaller than 512*512. For example Figure 5 , the direction with 1024 points is defined as the M direction, and the direction with 512 points is defined as the N direction. Divide the M direction into two equal parts. Thus, the image format is divided into two areas ①②.

[0163] In a specific embodiment, the high PRF accumulation module is specifically used for:

[0164] The first cache and the second cache adopt ping - pong caches. The ping cache is used to temporarily store pulse compression data, and the pong cache is used to store imaging accumulation results.

[0165] For example Figure 2 As shown in the schematic diagram of the wide - format imaging dual - core architecture, the first processing core is core 0, the second processing core is core 1, and the second processing core is the imaging acceleration hard core.

[0166] Select the pulse compression data corresponding to an imaging area;

[0167] For example Figure 3 As shown, select the pulse compression data corresponding to an accumulation frame period;

[0168] At the first moment, core 0 controls the ping cache to store a segment of pulse compression data;

[0169] At the second moment, core 0 schedules the next segment of pulse compression data to be stored in the pong cache, and core 1 performs imaging accumulation on the pulse compression data in the ping cache;

[0170] At the third moment, Core 1 performs imaging accumulation on the pulse compression data in the ping buffer, and Core 0 controls the ping buffer to store the third segment of pulse compression data until the imaging accumulation of the current accumulation frame period is completed;

[0171] Iteratively select the pulse compression data corresponding to the next accumulation frame period for imaging accumulation until the imaging accumulation of all accumulation frame periods is completed.

[0172] In a specific embodiment, the backprojection module is specifically used for:

[0173] Only one imaging acceleration hard core needs to be set. By obtaining the high pulse repetition frequency wide-swath imaging result of a single-frame large-size imaging data M×N and releasing the ping-pong buffer;

[0174] Iteratively select the next frame of large-size imaging data M×N for high pulse repetition frequency wide-swath imaging, and coherently accumulate the image of the next frame and the image of the previous frame to obtain the backprojection of the high pulse repetition frequency wide-swath imaging.

[0175] It can be seen from this that in a high pulse repetition frequency wide-swath imaging implementation system of the present invention, by setting a first processing core and a second processing core, the first processing core is used for process control, and the second processing core is used for imaging accumulation, separating the control process and the imaging accumulation process. The two cores are processed in parallel, which can optimize the working efficiency of the processing core, improve the processing speed, and the dual-core model is also convenient for debugging and enhances plasticity; setting the dual-buffer technology and time-sharing multiplexing further divides the imaging accumulation process into two subtasks: pulse compression buffer and imaging hard core accumulation, optimizing the time efficiency through memory, thereby increasing the pulse repetition frequency. In theory, when the size of the dual buffer is infinitely large, it can satisfy the imaging of any pulse repetition frequency; in addition, the imaging data is divided into multiple regions for separate imaging and finally stitched together to solve the problem of imaging frame size limitation.

[0176] Figure 3 The figure is a schematic diagram of a high pulse repetition frequency wide-swath imaging implementation device provided in an embodiment of this specification. The device includes:

[0177] a processor, and

[0178] a memory arranged to store computer-executable instructions, which when executed cause the processor to perform the steps of the method as described in any one of the following:

[0179] Step 1, perform pulse compression on large-size imaging echo data;

[0180] Step 2, set the number of accumulation frame periods and the number of imaging regions, where the accumulation frame period represents the cumulative number of times in the imaging accumulation process;

[0181] Step 3, select an imaging region and the corresponding pulse compression data of the region;

[0182] A first cache, a second cache, a first processing core, and a second processing core are provided. High PRF imaging accumulation is performed on the pulse compression data of multiple accumulation frame periods through the first cache, the second cache, the first processing core, and the second processing core respectively. Within the same accumulation frame period, the first processing core is used to store the pulse compression of different segments into the first cache and the second cache at different times, and the second processing core is used to perform imaging on the pulse compression in the first cache and the second cache, and accumulate the imaging of different accumulation frame periods, so as to achieve high PRF imaging accumulation;

[0183] Iteratively select the next imaging area and the corresponding pulse compression data thereof, and perform high PRF imaging accumulation until the high PRF imaging accumulation of all pulse compression data is completed;

[0184] Step 4: Stitch the high PRF imaging accumulation results corresponding to multiple imaging areas to obtain high PRF wide-swath imaging.

[0185] Those skilled in the art should understand that the embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0186] The present invention is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram can be implemented by computer program instructions, and the combination of the processes and / or blocks in the flowchart and / or block diagram can also be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate instructions for implementing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0187] These computer program instructions can also be stored in a computer-readable memory that directs a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured article including instruction means, and the instruction means implements the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0188] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus, causing a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, so that the instructions executed on the computer or other programmable apparatus provide steps for implementing the specified functions in a process Figure 1 one process or a plurality of processes and / or boxes Figure 1 steps for implementing the specified functions in one box or a plurality of boxes.

[0189] Although the preferred embodiments of the present invention have been described, additional changes and modifications can be made by those skilled in the art once they learn of the basic inventive concept. Therefore, the appended claims are intended to be construed to cover the preferred embodiments as well as all changes and modifications falling within the scope of the present invention.

[0190] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention is also intended to include these modifications and variations.

[0191] The above description is only for the embodiments of the present application and is not intended to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A method for realizing high repetition rate wide-band imaging, characterized in that: include: Pulse compression of large-scale imaging echo data; Setting the number of accumulation frame periods and the number of imaging areas, wherein the accumulation frame period represents the cumulative number of imaging accumulation processes; Select an imaging region and the pulse pressure data corresponding to the region; A first cache, a second cache, a first processing core and a second processing core are set, and pulse pressure data of a plurality of accumulation frame periods are respectively accumulated by the first cache, the second cache, the first processing core and the second processing core. Within the same accumulation frame period, the first processing core is used to store different segments of pulse pressure into the first cache and the second cache in a time-sharing manner, and the second processing core is used to image the pulse pressure of the first cache and the second cache, and accumulate the images of different accumulation frame periods, thereby realizing high repetition rate imaging accumulation; Iteratively select the next imaging area and the pulse pressure data corresponding to the area, and perform high-repetition rate imaging accumulation until the high-repetition rate imaging accumulation of all pulse pressure data is completed; The accumulated results of high-repetition-rate imaging corresponding to multiple imaging areas are stitched together to obtain high-repetition-rate wide-band imaging.

2. The missile-borne radar cancellation and anti-interference data processing method according to claim 1 is characterized in that: The step of selecting an imaging region and pulse pressure data corresponding to the region includes: Set the total imaging area of ​​the large-size imaging echo data to be, the number of longitudinal pixels of the total imaging area to be, the number of transverse pixels of the large-size imaging data to be, and the total imaging area represents the final wide-width imaging size; The M-direction resolution of the total imaging area is PIX_M, and the N-direction resolution is PIX_N.

3. The method for realizing high repetition rate wide-band imaging according to claim 2, characterized in that: The selecting of an imaging region and pulse pressure data corresponding to the region comprises: Set the coordinates of the starting point of the imaging area to (TarLeft_X, TarLeft_Y, TarLeft_Z); According to the resolution of the total imaging area, the coordinate increment in the M direction is PIX_M, and the coordinate increment in the N direction is PIX_N.

4. The method for realizing high repetition rate wide-band imaging according to claim 3, characterized in that: The first cache, the second cache, the first processing core and the second processing core are set, and the pulse pressure data of multiple accumulation frame periods are respectively accumulated by the first cache, the second cache, the first processing core and the second processing core. In the same accumulation frame period, the first processing core is used to store different segments of pulse pressure into the first cache and the second cache in a time-sharing manner, and the second processing core is used to image the pulse pressure of the first cache and the second cache, and the images of different accumulation frame periods are accumulated to achieve high repetition rate imaging accumulation, which includes: Setting a first cache, a second cache, a first processing core, and a second processing core; Select a pulse pressure data corresponding to an accumulation frame period; At a first moment, the first processing core controls the first cache to store a segment of pulse pressure data; At a second moment, the first processing core schedules the next segment of pulse pressure data to be stored in the second cache, and performs imaging accumulation on the pulse pressure data in the first cache; At a third moment, the second processing core performs imaging accumulation on the pulse pressure data in the second buffer, and the first processing core controls the first buffer to store the third segment of pulse pressure data until the imaging accumulation of the current accumulation frame period is completed; The pulse pressure data corresponding to the next accumulation frame period is iteratively selected for imaging accumulation until the imaging accumulation of all accumulation frame periods is completed.

5. A method for realizing high repetition rate wide-band imaging according to claim 4, characterized in that: The step of setting a first cache, a second cache, a first processing core, and a second processing core, and performing high repetition rate imaging accumulation on pulse pressure data of a plurality of accumulation frame periods by using the first cache, the second cache, the first processing core, and the second processing core respectively comprises: The cache sizes of the first cache and the second cache are set to be the same, and the cache sizes meet the following conditions: x>(n*(t2+t3) / (1 / f1-2t1)) Wherein, n is the number of imaging areas, t1 is the time for the second processing core to process the imaging accumulation of a single imaging area, t2 is the time for the second processing core to upload the imaging accumulation result of a single imaging area, t3 is the time for the second processing core to perform coherent accumulation on a single imaging area, and is the repetition rate of the imaging accumulation result.

6. The method for realizing high repetition rate wide-band imaging according to claim 5, characterized in that: The iterative selection of the pulse pressure data corresponding to the next accumulation frame period for imaging accumulation until the imaging accumulation of all accumulation frame periods is completed includes: When imaging the pulse pressure data of the next accumulation frame period, imaging accumulation is continued based on the imaging accumulation results that have been generated in the first buffer and the second buffer.

7. The method for realizing high repetition rate wide-band imaging according to claim 6, characterized in that: The step of stitching the accumulated high repetition rate imaging results corresponding to the plurality of imaging areas to obtain high repetition rate wide-width imaging comprises: Each imaging area is divided into 16 blocks, each block is 32 pixels; The coordinates of the starting point of the first region are (point1_i_X, point1_i_Y, point1_i_Z), then the coordinates of each point in the region are: point1_i_X=point1_X, point1_i_Y=point1_Y+(i-1)*32*PIX_M, point1_i_Z=point1_Z。 8. The method for realizing high repetition rate wide-band imaging according to claim 7, characterized in that: The step of stitching the accumulated high repetition rate imaging results corresponding to the plurality of imaging areas to obtain high repetition rate wide-width imaging further comprises: The coordinates of the starting point of the second region are (point2_i_X, point2_i_Y, point2_i_Z), then the coordinates of each point in the region are: point1_i_X=point2_X, point1_i_Y=point2_Y+(i-1)*32*PIX_M, point1_i_Z=point2_Z, The first region and the second region are spliced ​​along the M direction.

9. A high repetition rate wide-band imaging implementation system, characterized in that: include: A data processing module is used to perform pulse compression on large-size imaging echo data; A region division module, used to set the number of accumulation frame cycles and the number of imaging regions, wherein the accumulation frame cycle represents the cumulative number of imaging accumulation processes; A high repetition rate accumulation module is used to select an imaging area and the pulse pressure data corresponding to the area; A first cache, a second cache, a first processing core and a second processing core are set, and pulse pressure data of a plurality of accumulation frame periods are respectively accumulated by the first cache, the second cache, the first processing core and the second processing core. Within the same accumulation frame period, the first processing core is used to store different segments of pulse pressure into the first cache and the second cache in a time-sharing manner, and the second processing core is used to image the pulse pressure of the first cache and the second cache, and accumulate the images of different accumulation frame periods, thereby realizing high repetition rate imaging accumulation; Iteratively select the next imaging area and the pulse pressure data corresponding to the area, and perform high-repetition rate imaging accumulation until the high-repetition rate imaging accumulation of all pulse pressure data is completed; The wide-width stitching module is used to stitch the high-repetition-rate imaging accumulation results corresponding to multiple imaging areas to obtain high-repetition-rate wide-width imaging.

10. A device for realizing high repetition rate and wide-band imaging, characterized in that: include: processor, and A memory arranged to store computer executable instructions which, when executed, cause the processor to perform the steps of the method as claimed in any one of claims 1 to 8.

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