Executable file burning method, executable file running method, executable file burning device, executable file running device, executable file equipment and medium

Abstract

The invention discloses an executable file burning method, an executable file running method, an executable file burning device, executable file running equipment and a medium, and relates to the technical field of computers. Burning a second executable file in the compiled executable file to a Flash memory based on an on-chip execution mode; wherein the first executable file is configured with a target jump address, and the target jump address is a storage head address corresponding to a second executable file in the Flash memory, so that in the process of running the compiled executable file by the preset embedded processor, when the preset embedded processor runs to a code line where the target jump address in the first executable file is located, the target jump address in the first executable file is located; and skipping from the block random access memory to the Flash memory to read and run the second executable file. According to the application, the Flash memory and the block random access memory are used for jointly storing the compiled executable file, so that the running memory space is expanded.

Description

Technical Field

[0001] The present invention relates to the field of computer technologies, and particularly to an executable file burning method, a running method, a device, a device and a medium. Background Art

[0002] When developing a program using Microblaze (an embedded processor) on the MPSoC (Multi-Processor System on Chip) platform of Xilinx, only a limited BRAM (Block Random Access Memory) space (about 1MB) is provided, which can only support the development of simple functions of Microblaze. Once there are slightly complex functions, the BRAM space will not be able to meet the running requirements, resulting in limited functions. Currently, there are the following two solutions:

[0003] 1. Use a BRAM chip with a larger space. The BRAM space is an internal resource of the chip and cannot be directly expanded externally.

[0004] 2. Increase the capacity by adding an external DRAM (Dynamic Random Access Memory). However, the DRAM occupies many pins (more than 30), and there are no extra pins available on the board for use. Moreover, the DRAM cannot save data when powered off, and the program needs to be burned in again every time it is powered on, and the process is relatively complex. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide an executable file burning method, a running method, a device, a device and a medium, which can jointly store the compiled executable file through a Flash memory and a block random access memory to expand the running memory space. The specific solutions are as follows:

[0006] In a first aspect, the present application provides an executable file burning method, including:

[0007] Determine the executable file to be compiled, and compile the executable file to be compiled to obtain a compiled executable file;

[0008] Burn the first executable file in the compiled executable file into the block random access memory, and burn the second executable file in the compiled executable file into the Flash memory based on the on-chip execution mode;

[0009] Among them, the first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory, so that when a preset embedded processor for running the executable file runs to the code line where the target jump address in the first executable file is located during the process of running the compiled executable file, it jumps from the block random access memory to the Flash memory to read and run the second executable file.

[0010] Optionally, the determining the executable file to be compiled includes:

[0011] Generating a hardware platform file based on the block random access memory and the Flash memory, and determining the executable file to be compiled based on the hardware platform file.

[0012] Optionally, the determining the executable file to be compiled based on the hardware platform file includes:

[0013] Performing operating memory recognition on the block random access memory and the Flash memory based on the hardware platform file, respectively configuring corresponding storage areas for each program segment in the compilation script, and respectively configuring the storage start address corresponding to the first executable file in the block random access memory and the storage start address corresponding to the second executable file in the Flash memory, so as to obtain the configured executable file to be compiled.

[0014] Optionally, the respectively configuring corresponding storage areas for each program segment in the compilation script includes:

[0015] Determining a target read-only code segment and other segments from each of the program segments included in the compilation script;

[0016] Configuring a corresponding storage area located in the Flash memory for the target read-only code segment, and configuring a corresponding storage area located in the block random access memory for the other segments.

[0017] Optionally, the burning the first executable file in the compiled executable file to the block random access memory, and burning the second executable file in the compiled executable file to the Flash memory based on the in-chip execution mode includes:

[0018] Determining a first offset address and a first data volume size corresponding to the other segments and a second offset address and a second data volume size corresponding to the target read-only code segment from the compiled executable file;

[0019] Separate the binary data corresponding to the other segment from the compiled executable file based on the first offset address and the first data volume size to obtain the first executable file;

[0020] Separate the binary data corresponding to the target read-only code segment from the compiled executable file based on the second offset address and the second data volume size to obtain the second executable file;

[0021] Burn the first executable file to the block random access memory based on the storage start address corresponding to the first executable file in the block random access memory, and burn the second executable file to the Flash memory based on the storage start address corresponding to the second executable file in the Flash memory.

[0022] In a second aspect, the present application provides an executable file running method, which is applied to a preset embedded processor. The preset embedded processor has a built-in block random access memory and is externally connected to a Flash memory based on the in-chip execution mode; wherein, the method includes:

[0023] Obtain a running request for the compiled executable file; the compiled executable file includes a first executable file pre-burned to the block random access memory and a second executable file pre-burned to the Flash memory. The first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory;

[0024] Start to respond to the running request, and when running to the code line where the target jump address in the first executable file is located, jump from the block random access memory to the Flash memory to read and run the second executable file.

[0025] Optionally, the second executable file is used to store the binary data corresponding to the target read-only code segment separated from the compiled executable file; the first executable file is used to store the binary data corresponding to the other segments separated from the compiled executable file.

[0026] Optionally, the executable file running method further includes:

[0027] Read and run the first executable file from the block random access memory through the local memory bus, and read and run the second executable file from the Flash memory through the serial peripheral interface and based on the high-performance expansion bus.

[0028] Optionally, after starting to respond to the running request, it further includes:

[0029] Adjust the clock frequency to read and run the compiled executable file based on the adjusted clock frequency.

[0030] Optionally, the executable file running method further includes:

[0031] Enable the cache function of the preset embedded processor during the process of responding to the running request.

[0032] In a third aspect, the present application provides an executable file burning device, including:

[0033] A file compilation module, configured to determine an executable file to be compiled and compile the executable file to be compiled to obtain a compiled executable file;

[0034] A file burning module, configured to burn a first executable file in the compiled executable file to a block random access memory, and burn a second executable file in the compiled executable file to a Flash memory based on an in-chip execution mode;

[0035] Wherein, the first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory, so that when the preset embedded processor for running the executable file runs to the code line where the target jump address in the first executable file is located during the process of running the compiled executable file, it jumps from the block random access memory to the Flash memory to read and run the second executable file.

[0036] In a fourth aspect, the present application provides an executable file running device, applied to a preset embedded processor, where a block random access memory is built in the preset embedded processor and a Flash memory based on an in-chip execution mode is externally connected; wherein, the device includes:

[0037] A request acquisition module, configured to acquire a running request for a compiled executable file; the compiled executable file includes a first executable file pre-burned to the block random access memory and a second executable file pre-burned to the Flash memory, and the first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory;

[0038] A file running module, configured to start responding to the running request, and when running to the code line where the target jump address in the first executable file is located, jump from the block random access memory to the Flash memory to read and run the second executable file.

[0039] In a fifth aspect, the present application provides an electronic device, including:

[0040] a memory for storing a computer program;

[0041] a processor for executing the computer program to implement the foregoing executable file burning method and / or executable file running method.

[0042] In a sixth aspect, the present application provides a computer-readable storage medium for storing a computer program, and when the computer program is executed by a processor, the foregoing executable file burning method and / or executable file running method are implemented.

[0043] In the present application, a to-be-compiled executable file is determined, and the to-be-compiled executable file is compiled to obtain a compiled executable file; the first executable file in the compiled executable file is burned into a block random access memory, and the second executable file in the compiled executable file is burned into a Flash memory based on an in-chip execution mode; wherein, the first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory, so that when a preset embedded processor with an internal block random access memory and an external Flash memory based on an in-chip execution mode runs the compiled executable file, when running to the code line where the target jump address in the first executable file is located, it jumps from the block random access memory to the Flash memory to read and run the second executable file. It can be seen that in the present application, by externally connecting a Flash memory to a preset embedded processor, since the externally connected Flash memory requires fewer pins, it is possible to save the pins on the board and solve the problem of insufficient pins on the board; and by burning a part of the files in the compiled executable file into the block random access memory and another part of the files into the Flash memory, the running memory space is expanded, and the problem of insufficient running memory space is solved, so as to implement the running of the compiled executable file based on the block random access memory and the Flash memory; further, since the Flash memory can permanently store data without current supply, the problem of re-burning data after each power-on is solved, and the operation is simple and has little impact on the original hardware design of the embedded processor. Description of the Drawings

[0044] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained according to the provided drawings.

[0045] Figure 1 Flowchart of an executable file burning method disclosed in this application;

[0046] Figure 2 FPGA design structure diagram disclosed in this application;

[0047] Figure 3 Schematic diagram of a compilation script configuration interface disclosed in this application;

[0048] Figure 4 Schematic diagram of a compilation script editing page disclosed in this application;

[0049] Figure 5 Schematic diagram of a program segment disclosed in this application;

[0050] Figure 6 Schematic diagram of relevant parameters of a.text field disclosed in this application;

[0051] Figure 7 Flowchart of an executable file running method disclosed in this application;

[0052] Figure 8 Schematic diagram of the structure of an executable file burning device disclosed in this application;

[0053] Figure 9 Schematic diagram of the structure of an executable file running device disclosed in this application;

[0054] Figure 10 Schematic diagram of the structure of an electronic device disclosed in this application. Detailed implementation manners

[0055] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0056] When developing a program using Microblaze in Xilinx's MPSoC platform, only a limited BRAM space is provided, which can only support the development of simple functions of Microblaze. Once there are slightly more complex functions, the BRAM space will not be able to meet the running requirements, resulting in restricted functions. For this reason, the present application provides an executable file burning method, a running method, a device, a device and a medium, which can jointly store the compiled executable file through a Flash memory and a block random access memory to expand the running memory space.

[0057] See Figure 1 As shown, an embodiment of the present invention discloses an executable file burning method, including:

[0058] Step S11, determine the executable file to be compiled, and compile the executable file to be compiled to obtain a compiled executable file.

[0059] Considering that Xilinx uses a Microblaze embedded processor in an FPGA (Field Programmable Gate Array), since the memory space of the built-in block random access memory is relatively limited, when designing the FPGA in the present application, as Figure 2 shown, the Microblaze embedded processor is connected to the block random access memory through a local memory bus (LMB, Local Memory Bus), and the Microblaze embedded processor is connected to the Flash memory through a serial peripheral interface (SPI, Serial Peripheral Interface) based on an advanced extensible interface (AXI, Advanced eXtensible Interface). It should be noted that the Microblaze embedded processor only needs four pins to be connected to the Flash memory through the serial peripheral interface, which can save the use of pins on the board and avoid the situation of insufficient pins.

[0060] Furthermore, since the on-chip block random access memory (BRAM) in the Microblaze embedded processor only provides limited space, once there is a slightly complex program function, the space of the BRAM cannot meet the running requirements, resulting in limited program functions. The.text read-only field in the ELF (Executable and Linkable Format) executable file used to store program code accounts for about 70% of the entire code file. Therefore, by storing the.text read-only field or all read-only code segments containing the.text read-only field in the external Flash memory connected to the Microblaze embedded processor, the occupancy of the storage space in the on-chip BRAM can be saved, enabling the on-chip BRAM to support the running of the executable file.

[0061] To further improve the running efficiency of the executable file, during the FPGA design, the Microblaze embedded processor controls the external Flash memory that stores only the read-only code segments through AXI-Quad-SPI and configures the Flash memory in the XIP (Execute In Place) mode, which is only used for code reading operations. That is, in the XIP mode, the external Flash memory connected to the Microblaze embedded processor is in the read-only mode. Generally, when a peripheral wants to perform a read operation, the code stored in the external Flash memory is usually read into the system memory and then the code is executed; while in the XIP mode, the external Flash memory is directly accessed in the form of memory, that is, the code is directly read and executed from the external Flash memory, so that the external Flash memory can be regarded as the running memory, improving the speed of reading code instructions from the Flash memory.

[0062] After completing the FPGA design, for determining the executable file to be compiled, it specifically includes generating a hardware platform file based on the on-chip BRAM and the external Flash memory, such as the Xilinx Support Archive (XSA) file, and then transmitting the hardware platform file to the compilation project to determine the executable file to be compiled based on the hardware platform file through the compilation project. After determining the executable file to be compiled, the compilation project compiles the executable file to be compiled to obtain the compiled executable file.

[0063] Among them, for determining the executable file to be compiled based on the hardware platform file, it specifically includes identifying the operating memory of the block random access memory and the Flash memory respectively based on the hardware platform file, so as to configure corresponding storage areas for each program segment in the compilation script based on the identification results, and respectively configure the storage start address corresponding to the first executable file in the block random access memory and the storage start address corresponding to the second executable file in the Flash memory, so as to obtain the configured executable file to be compiled.

[0064] Specifically, if the block random access memory is identified as the operating memory, the storage start address and storage space size corresponding to the first executable file in the block random access memory can be automatically configured in the compilation script based on the identification result of the block random access memory, that is, the start address of the storage space used to store the first executable file in the block random access memory is configured, and corresponding storage areas located in the block random access memory are configured for other segments except the target read-only code segment in each program segment included in the compilation script based on the identification result of the block random access memory.

[0065] Specifically, considering that Xilinx uses the Microblaze embedded processor in the FPGA, and the Microblaze embedded processor is externally connected to the Flash memory based on the in-chip execution mode, it may cause the Flash memory not to be recognized as the operating memory. For this situation, the configuration instructions of the user can be obtained, so as to configure the storage start address and storage space size corresponding to the second executable file in the Flash memory in the compilation script based on the address information and space size information included in the configuration instructions, that is, the start address of the storage space used to store the second executable file in the Flash memory is configured, and the corresponding storage area located in the Flash memory is configured for the target read-only code segment in each program segment included in the compilation script based on the storage area information included in the configuration instructions. It should be noted that the target read-only code segment can be either only the.text field or all the read-only code segments including the.text field in each program segment.

[0066] Among them, for obtaining the configuration instructions of the user, it can be Figure 3 obtained through the compilation script configuration interface as shown, or Figure 4 obtained through the compilation script editing page as shown. Figure 3Taking the compilation script configuration interface as an example, obtain the configuration instructions input by the user, and in the compilation script, based on the configuration instructions, configure the storage start address (Base Address) corresponding to the second executable file in the Flash memory to 0x00400000, and configure the storage space size (Size) corresponding to the second executable file to 0x00400000. That is, the storage space in the Flash memory for storing the second executable file is from 0x00400000 to 0x007fffff. At the same time, in the compilation script, based on the configuration instructions, configure the storage region (Memory Region) corresponding to the target read-only code segment (.text field) in each program segment (Section Name) to the Flash memory to obtain the executable file to be compiled after configuration.

[0067] Step S12: Burn the first executable file in the compiled executable file into the block random access memory, and burn the second executable file in the compiled executable file into the Flash memory based on the in-chip execution mode.

[0068] After determining the compiled executable file, it is necessary to separate the first executable file and the second executable file from the compiled executable file, and burn the first executable file and the second executable file into the corresponding memories respectively.

[0069] Specifically, for burning the first executable file in the compiled executable file into the block random access memory, it includes determining the first offset address and the first data volume size corresponding to other segments except the target read-only code segment in each program segment from the compiled executable file; separating the binary data corresponding to other segments from the compiled executable file based on the first offset address and the first data volume size to obtain the first executable file; burning the first executable file into the block random access memory based on the storage start address corresponding to the first executable file in the block random access memory. As Figure 5 shown, separate the binary data corresponding to other segments except the.text field (.init segment,.sdata segment,.bss segment, etc.) from the compiled executable file, and burn the binary data corresponding to other segments into the block random access memory. Among them, the.text field is used to store program code and belongs to a read-only field;.sdata segment is used to store statically initialized global variables;.bss segment is used to store uninitialized global variables;.init segment is used to store initialization functions.

[0070] Specifically, for burning the second executable file in the compiled executable file into the Flash memory based on the on-chip execution mode, it includes determining the second offset address and the second data volume size corresponding to the target read-only code segment from the compiled executable file; separating the binary data corresponding to the target read-only code segment from the compiled executable file based on the second offset address and the second data volume size to obtain the second executable file; identifying the Flash memory after the Linux system is started, and after identifying the Flash memory, driving and erasing the Flash memory, and then burning the second executable file into the Flash memory based on the on-chip execution mode based on the storage start address corresponding to the second executable file in the Flash memory. Combining Figure 5 and Figure 6 As shown, determine the second offset address (Off = 0x001148) and the second data volume size (Size = 0x016704) corresponding to the.text field from the compiled executable file (ELF file); determine the storage start address corresponding to the.text field from the compiled executable file based on the second offset address, and separate the binary data corresponding to the.text field from the compiled executable file in combination with the second data volume size to obtain the second executable file; identify the Flash memory after the Linux system is started, and after identifying the Flash memory, drive and erase the Flash memory, and then burn the second executable file into the erased Flash memory based on the on-chip execution mode based on the storage start address (Addr = 0x00400000) corresponding to the second executable file in the Flash memory.

[0071] It should be noted that the first executable file burned into the block random access memory is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory, that is, 0x00400000, so that when the preset embedded processor, such as the Microblaze embedded processor, is running the compiled executable file, when it runs to the code line where the target jump address in the first executable file is located, it jumps from the block random access memory to the Flash memory based on the target jump address, and reads and runs the second executable file from the Flash memory based on the on-chip execution mode.

[0072] It can be seen that in this application, by externally connecting a Flash memory to a preset embedded processor, since fewer pins are required to externally connect the Flash memory through a serial peripheral interface, the pins on the board can be saved, and the problem of insufficient pins on the board can be solved; and by burning a part of the files in the compiled executable file into the block random access memory and another part of the files into the Flash memory, the operating memory space is expanded, and the problem of insufficient operating memory space is solved, so as to realize the operation of the compiled executable file based on the block random access memory and the Flash memory; further, since the Flash memory can permanently store data without current supply, the problem of re-burning data after each power-on is solved, the operation is simple and the impact on the original hardware design of the embedded processor is small.

[0073] See Figure 7 As shown, an embodiment of the present invention discloses an executable file running method, which is applied to a preset embedded processor. The preset embedded processor has a built-in block random access memory and externally connects a Flash memory based on an in-chip execution mode; wherein, the method includes:

[0074] Step S21, obtain a running request for the compiled executable file; the compiled executable file includes a first executable file pre-burned into the block random access memory and a second executable file pre-burned into the Flash memory. The first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory.

[0075] In this embodiment, since the preset embedded processor is connected to the Flash memory based on the in-chip execution mode through a serial peripheral interface, the preset embedded processor can access the configuration register and the status register through the AXI4-Lite interface to read and write configuration information and status feedback, so as to realize the control of the Flash memory; and the preset embedded processor can read data from the Flash memory through four read channels provided by the AXI4 interface that only supports read operations.

[0076] It should be noted that the first executable file pre-recorded in the block random access memory is used to store the binary data corresponding to the segments other than the target read-only code segment separated from the compiled executable file; the second executable file pre-recorded in the Flash memory is used to store the binary data corresponding to the target read-only code segment separated from the compiled executable file. In this way, by separating the target read-only code segment, which accounts for about 70% of the entire file, from the compiled executable file, the occupancy of the storage space in the block random access memory by the executable file is reduced, enabling the block random access memory to support the operation of the executable file and avoiding the problem of program function limitation caused by insufficient storage space in the block random access memory.

[0077] Step S22: Start to respond to the running request, and when running to the code line where the target jump address in the first executable file is located, jump from the block random access memory to the Flash memory to read and run the second executable file.

[0078] In this embodiment, after the preset embedded processor, that is, the Microblaze embedded processor, obtains a running request for the compiled executable file, it starts to respond to the running request to run the compiled executable file. Since the compiled executable file includes the first executable file pre-recorded in the block random access memory and the second executable file pre-recorded in the Flash memory, and the first executable file is configured with a target jump address, where the target jump address is the starting storage address in the Flash memory corresponding to the second executable file. Therefore, during the running process of the compiled executable file, the first executable file is read and run from the block random access memory through the local memory bus. When running to the code line where the target jump address in the first executable file is located, based on the target jump address, it jumps from the block random access memory to the Flash memory to read and run the second executable file through the serial peripheral interface and based on the high-performance expansion bus from the Flash memory in the on-chip execution mode. It should be noted that other jump addresses are also configured in the first executable file and the second executable file, so that when running to the code line where other jump addresses in the first executable file or the second executable file are located, it jumps to the corresponding memory based on the other jump addresses to read and run the corresponding executable file.

[0079] For example, start running the first executable file from the starting address of the storage space of the built-in block random access memory. When running to the code line where the target jump address in the first executable file is located, jump from the built-in block random access memory to the external Flash memory based on the target jump address, so as to read and run the second executable file from the Flash memory based on the in-chip execution mode. When running to the code line where other jump addresses in the second executable file are located, it is possible to jump from the Flash memory to the block random access memory to read and write data based on the other jump addresses, or jump to the corresponding position in the Flash memory based on the other jump addresses to read data.

[0080] Furthermore, during the running process of the compiled executable file, the clock frequency can also be adjusted, such as increasing the clock frequency, to read and run the compiled executable file based on the adjusted clock frequency, thereby improving the reading speed of the Flash memory and accelerating the running speed of the executable file. In addition, the cache function of the preset embedded processor (Microblaze embedded processor) can be enabled during the process of responding to the running request to improve the reading speed of the instruction code in the Flash memory. It should be noted that for the cache, either an existing cache can be used or a self-compiled cache can be used.

[0081] It can be seen that in this application, by externally connecting a Flash memory to the preset embedded processor, since the external Flash memory requires fewer pins, it is possible to save the pins on the board and solve the problem of insufficient pins on the board. And by burning a part of the files in the compiled executable file into the block random access memory and another part of the files into the Flash memory, the running memory space is expanded, solving the problem of insufficient running memory space, and realizing the running of the compiled executable file based on the block random access memory and the Flash memory. Furthermore, since the Flash memory can permanently store data without current supply, the problem of re-burning data after each power-on is solved, the operation is simple and the impact on the original hardware design of the embedded processor is small.

[0082] See Figure 8 As shown, an embodiment of the present invention discloses an executable file burning device, including:

[0083] A file compilation module 11, configured to determine the executable file to be compiled and compile the executable file to be compiled to obtain a compiled executable file;

[0084] A file burning module 12, configured to burn a first executable file in the compiled executable file into a block random access memory, and burn a second executable file in the compiled executable file into a Flash memory based on an in-chip execution mode;

[0085] Wherein, the first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory, so that when a preset embedded processor for running the executable file runs to the code line where the target jump address in the first executable file is located during the process of running the compiled executable file, it jumps from the block random access memory to the Flash memory to read and run the second executable file.

[0086] It can be seen that in this application, by externally connecting a Flash memory to a preset embedded processor, since the externally connected Flash memory requires fewer pins, it is possible to save the pins on the board and solve the problem of insufficient pins on the board; and by burning a part of the files in the compiled executable file into the block random access memory and another part of the files into the Flash memory, the running memory space is expanded, and the problem of insufficient running memory space is solved, so as to realize the running of the compiled executable file based on the block random access memory and the Flash memory; further, since the Flash memory can permanently store data without current supply, the problem of re-burning data after each power-on is solved, and the operation is simple and has little impact on the original hardware design of the embedded processor.

[0087] In some specific embodiments, the file compilation module 11 includes:

[0088] A file determination sub-module, configured to generate a hardware platform file based on the block random access memory and the Flash memory, and determine an executable file to be compiled based on the hardware platform file.

[0089] In some specific embodiments, the file determination sub-module includes:

[0090] A file configuration unit, configured to perform running memory recognition on the block random access memory and the Flash memory based on the hardware platform file, configure a corresponding storage area for each program segment in the compilation script respectively, and configure the storage start address corresponding to the first executable file in the block random access memory and the storage start address corresponding to the second executable file in the Flash memory respectively, so as to obtain the configured executable file to be compiled.

[0091] In some specific embodiments, the file configuration unit includes:

[0092] A segmented determination unit for determining a target read-only code segment and other segments from each of the program segments included in the compilation script;

[0093] A storage area configuration unit for configuring a corresponding storage area located in the Flash memory for the target read-only code segment and a corresponding storage area located in the block random access memory for the other segments.

[0094] In some specific embodiments, the file burning module 12 includes:

[0095] A parameter determination unit for determining a first offset address and a first data volume size corresponding to the other segments and a second offset address and a second data volume size corresponding to the target read-only code segment from the compiled executable file;

[0096] A first data separation unit for separating binary data corresponding to the other segments from the compiled executable file based on the first offset address and the first data volume size to obtain the first executable file;

[0097] A second data separation unit for separating binary data corresponding to the target read-only code segment from the compiled executable file based on the second offset address and the second data volume size to obtain the second executable file;

[0098] A file burning unit for burning the first executable file to the block random access memory based on the storage start address corresponding to the first executable file in the block random access memory, and burning the second executable file to the Flash memory based on the storage start address corresponding to the second executable file in the Flash memory.

[0099] See Figure 9 As shown, an embodiment of the present invention discloses an executable file running device, which is applied to a preset embedded processor. The preset embedded processor has a built-in block random access memory and an externally connected Flash memory based on the in-chip execution mode; wherein, the device includes:

[0100] A request acquisition module 21 for acquiring a running request for a compiled executable file; the compiled executable file includes a first executable file pre-burned to the block random access memory and a second executable file pre-burned to the Flash memory. The first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory;

[0101] A file running module 22, configured to initiate a response to the running request, and when running to the code line where the target jump address in the first executable file is located, jump from the block random access memory to the Flash memory to read and run the second executable file.

[0102] It can be seen that in this application, by externally connecting a Flash memory to a preset embedded processor, since the externally connected Flash memory requires fewer pins, it is possible to save the pins on the board and solve the problem of insufficient pins on the board; and by burning a part of the executable file after compilation into the block random access memory and another part of the file into the Flash memory, the running memory space is expanded, solving the problem of insufficient running memory space, so as to realize the running of the executable file after compilation based on the block random access memory and the Flash memory; further, since the Flash memory can permanently store data without current supply, the problem of re-burning data after each power-on is solved, and the operation is simple and has little impact on the original hardware design of the embedded processor.

[0103] In some specific embodiments, the second executable file is used to store the binary data corresponding to the target read-only code segment separated from the executable file after compilation; the first executable file is used to store the binary data corresponding to other segments separated from the executable file after compilation.

[0104] In some specific embodiments, the executable file running device further includes:

[0105] A file reading unit, configured to read and run the first executable file from the block random access memory through the local memory bus, and read and run the second executable file from the Flash memory through the serial peripheral interface and based on the high-performance expansion bus.

[0106] In some specific embodiments, the executable file running device further includes:

[0107] A file running unit, configured to adjust the clock frequency to read and run the executable file after compilation based on the adjusted clock frequency.

[0108] In some specific embodiments, the executable file running device further includes:

[0109] A cache enabling unit, configured to enable the cache function of the preset embedded processor during the process of responding to the running request.

[0110] Furthermore, an embodiment of the present application also discloses an electronic device, Figure 10It is a structural diagram of an electronic device 30 shown according to an exemplary embodiment. The content in the figure should not be considered as any limitation on the scope of use of this application.

[0111] Figure 10 This is a schematic structural diagram of an electronic device 30 provided by an embodiment of this application. The electronic device 30 may specifically include: at least one processor 31, at least one memory 32, a power supply 33, a communication interface 34, an input / output interface 35, and a communication bus 36. Among them, the memory 32 is used to store a computer program, and the computer program is loaded and executed by the processor 31 to implement the relevant steps in the executable file burning method and / or the executable file running method disclosed in any of the foregoing embodiments. In addition, the electronic device 30 in this embodiment may specifically be an electronic computer.

[0112] In this embodiment, the power supply 33 is used to provide working voltage for each hardware device on the electronic device 30; the communication interface 34 can create a data transmission channel between the electronic device 30 and external devices, and the communication protocol it follows is any communication protocol applicable to the technical solution of this application, and no specific limitation is imposed on it here; the input / output interface 35 is used to obtain external input data or output data to the outside, and its specific interface type can be selected according to specific application needs, and no specific limitation is made here.

[0113] In addition, as a carrier for resource storage, the memory 32 may be a read-only memory, a random access memory, a magnetic disk, or an optical disc, etc. The resources stored thereon may include an operating system 321, a computer program 322, etc., and the storage method may be temporary storage or permanent storage.

[0114] Among them, the operating system 321 is used to manage and control each hardware device and the computer program 322 on the electronic device 30, and it may be Windows Server, Netware, Unix, Linux, etc. In addition to the computer program that can be used to complete the executable file burning method and / or the executable file running method executed by the electronic device 30 disclosed in any of the foregoing embodiments, the computer program 322 may further include a computer program that can be used to complete other specific tasks.

[0115] Furthermore, this application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the executable file burning method and / or the executable file running method disclosed above. For the specific steps of this method, reference may be made to the corresponding content disclosed in the foregoing embodiments, and details will not be repeated here.

[0116] In this specification, the various embodiments are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple. For the relevant parts, reference can be made to the description in the method section.

[0117] Those skilled in the art can further realize that the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the examples have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.

[0118] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be directly implemented by hardware, software modules executed by a processor, or a combination of both. The software modules can be placed in a random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium well-known in the technical field.

[0119] Finally, it should also be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0120] The technical solutions provided in this application have been introduced in detail above. Specific examples are used herein to elaborate on the principles and implementation manners of this application. The description of the above embodiments is only used to help understand the method and its core idea of this application; at the same time, for those of ordinary skill in the art, according to the idea of this application, there will be changes in the specific implementation manners and application scopes. In summary, the content of this specification should not be construed as a limitation to this application.

Claims

1. An executable file burning method, characterized in that, it includes: Determine the executable file to be compiled, and compile the executable file to be compiled to obtain a compiled executable file; Burn the first executable file in the compiled executable file into the block random access memory, and burn the second executable file in the compiled executable file into the Flash memory based on the in-chip execution mode; Wherein, the first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory, so that when the preset embedded processor for running the executable file runs to the code line where the target jump address in the first executable file is located during the process of running the compiled executable file, it jumps from the block random access memory to the Flash memory to read and run the second executable file.

2. The executable file burning method according to claim 1, characterized in that, The determination of the executable file to be compiled includes: Generate a hardware platform file based on the block random access memory and the Flash memory, and determine the executable file to be compiled based on the hardware platform file.

3. The executable file burning method according to claim 2, characterized in that, The determination of the executable file to be compiled based on the hardware platform file includes: Perform running memory identification on the block random access memory and the Flash memory based on the hardware platform file, configure corresponding storage areas for each program segment in the compilation script respectively, and configure the storage start address corresponding to the first executable file in the block random access memory and the storage start address corresponding to the second executable file in the Flash memory respectively, so as to obtain the configured executable file to be compiled.

4. The executable file burning method according to claim 3, characterized in that, The configuration of corresponding storage areas for each program segment in the compilation script respectively includes: Determine the target read-only code segment and other segments from each program segment included in the compilation script; Configure a corresponding storage area located in the Flash memory for the target read-only code segment, and configure a corresponding storage area located in the block random access memory for the other segments.

5. The executable file burning method according to claim 4, characterized in that, The burning of the first executable file in the compiled executable file into the block random access memory and the burning of the second executable file in the compiled executable file into the Flash memory based on the in-chip execution mode includes: Determine the first offset address and the first data volume size corresponding to the other segments and the second offset address and the second data volume size corresponding to the target read-only code segment from the compiled executable file; Separate the binary data corresponding to the other segments from the compiled executable file based on the first offset address and the first data volume size to obtain the first executable file; Separate the binary data corresponding to the target read-only code segment from the compiled executable file based on the second offset address and the second data volume size to obtain the second executable file; Burn the first executable file into the block random access memory based on the storage start address corresponding to the first executable file in the block random access memory, and burn the second executable file into the Flash memory based on the storage start address corresponding to the second executable file in the Flash memory.

6. A method for running an executable file, characterized in that, applied to a preset embedded processor, the preset embedded processor is built-in with a block random access memory and externally connected with a Flash memory based on the in-chip execution mode; wherein, the method includes: Obtain a running request for the compiled executable file; the compiled executable file includes a first executable file pre-burned into the block random access memory and a second executable file pre-burned into the Flash memory, the first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory; Start to respond to the running request, and when running to the code line where the target jump address in the first executable file is located, jump from the block random access memory to the Flash memory to read and run the second executable file.

7. The method for running an executable file according to claim 6, characterized in that, The second executable file is used to store the binary data corresponding to the target read-only code segment separated from the compiled executable file; the first executable file is used to store the binary data corresponding to other segments separated from the compiled executable file.

8. The method for running an executable file according to claim 6, characterized in that, further includes: Read and run the first executable file from the block random access memory through the local memory bus, and read and run the second executable file from the Flash memory through the serial peripheral interface and based on the high-performance expansion bus.

9. The method for running an executable file according to claim 6, characterized in that, After starting to respond to the running request, it further includes: Adjust the clock frequency to read and run the compiled executable file based on the adjusted clock frequency.

10. The method for running an executable file according to any one of claims 6 to 9, characterized in that, further includes: Enable the cache function of the preset embedded processor during the process of responding to the running request.

11. An executable file burning device, characterized in that, includes: A file compilation module, configured to determine an executable file to be compiled and compile the executable file to be compiled to obtain a compiled executable file; A file burning module, configured to burn the first executable file in the compiled executable file into the block random access memory, and burn the second executable file in the compiled executable file into the Flash memory based on the in-chip execution mode; Wherein, the first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory, so that when a preset embedded processor for running the executable file runs to the code line where the target jump address in the first executable file is located during the process of running the compiled executable file, it jumps from the block random access memory to the Flash memory to read and run the second executable file.

12. An executable file running device, Characterized in that, Applied to a preset embedded processor, the preset embedded processor has a built-in block random access memory and an externally connected Flash memory based on the in-chip execution mode; wherein, the device includes: A request acquisition module, configured to acquire a running request for a compiled executable file; the compiled executable file includes a first executable file pre-burned into the block random access memory and a second executable file pre-burned into the Flash memory, and the first executable file is configured with a target jump address, and the target jump address is the storage start address corresponding to the second executable file in the Flash memory; A file running module, configured to start responding to the running request, and when running to the code line where the target jump address in the first executable file is located, jump from the block random access memory to the Flash memory to read and run the second executable file.

13. An electronic device, Characterized in that, Comprising: A memory, configured to store a computer program; A processor, configured to execute the computer program to implement the executable file burning method according to any one of claims 1 to 5 and / or the executable file running method according to any one of claims 6 to 10.

14. A computer-readable storage medium, Characterized in that, For storing a computer program, the computer program, when executed by a processor, implements the executable file burning method according to any one of claims 1 to 5 and / or the executable file running method according to any one of claims 6 to 10.

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