Detection Circuit, Input Device, Chip and Detection Method for Display Interface Auxiliary Channel Polarity

Abstract

The present application discloses a detection circuit, an input device, a chip and a detection method for the polarity of an auxiliary channel of a display interface. The detection circuit is integrated inside the chip and includes a polarity judgment module, an input device and a receiving buffer. The input device is configured to receive an auxiliary channel signal from the outside and, according to a first parsing logic and a second parsing logic, respectively parse the auxiliary channel signal to obtain a first parsing result and a second parsing result; the receiving buffer includes a first receiving buffer and a second receiving buffer for storing and sending the parsing results to the polarity judgment module; the polarity judgment module is configured to determine the receiving polarity of the input device according to the parsing accuracy of the first parsing result and / or the second parsing result. The detection circuit directly performs detection by hardware. On the one hand, it can reduce the complexity of signal transmission and achieve real-time and accurate detection; on the other hand, it does not need to frequently switch the polarity direction according to a fixed detection mode, increasing the stability of the detection method.

Description

Technical Field

[0001] This application relates to the technical field of display interfaces, and particularly to a detection circuit, an input device, a chip, and a detection method for the polarity of an auxiliary channel of a display interface. Background Art

[0002] An auxiliary channel (AUX) is an independent communication path used for auxiliary data transmission, link management, device control, and protocol management, and is a key functional module in a display port (DP). For example, during the initialization phase of a DP link, the AUX can negotiate optimal transmission parameters (such as the number of channels, rate, etc.) through two-way communication to complete link training and ensure data transmission stability.

[0003] In actual communication, the polarity of the auxiliary channel may be reversed, or during the connection process with a new device, the polarity of the auxiliary channel communication for the new device, such as the receiving polarity of the input device, is uncertain, which may make it difficult for the auxiliary channel communication to proceed smoothly and even affect the transmission of other data via the interface.

[0004] Therefore, it is very necessary to detect the polarity of the auxiliary channel of the display interface. However, traditional detection methods are difficult to achieve real-time and accurate detection during the communication process. Summary of the Invention

[0005] In view of this, this application provides a detection circuit for the polarity of an auxiliary channel of a display interface, which is used to achieve real-time and accurate detection of the polarity of the auxiliary channel of the display interface.

[0006] Specifically, the detection circuit is integrated inside the chip, and the detection circuit includes a polarity judgment module, an input device, and a reception buffer;

[0007] The input device is used to receive an auxiliary channel signal from the outside and respectively parse the auxiliary channel signal according to a first parsing logic and a second parsing logic to obtain a first parsing result and a second parsing result;

[0008] The reception buffer includes a first reception buffer and a second reception buffer. The first reception buffer is used to store and send the first parsing result to the polarity judgment module, and the second reception buffer is used to store and send the second parsing result to the polarity judgment module;

[0009] The polarity judgment module is used to determine the reception polarity of the input device according to the parsing accuracy of the first parsing result and / or the second parsing result.

[0010] In some possible implementations, the detection circuit further includes an outputter, and the polarity determination module is further configured to send the received polarity of the inputter to the outputter to adjust the output polarity of the outputter.

[0011] In some possible implementations, the polarities corresponding to the first parsing logic and the second parsing logic are opposite.

[0012] In some possible implementations, when the first parsing result is correctly parsed, the polarity determination module determines that the polarity corresponding to the first parsing logic is the received polarity of the inputter.

[0013] In some possible implementations, when the first parsing result is not correctly parsed, the polarity determination module is further configured to send indication information to the inputter so that the inputter uses the second parsing logic to parse the auxiliary channel signal.

[0014] In some possible implementations, the auxiliary channel signal includes a signal identifier, data, and a data end identifier.

[0015] In some possible implementations, the polarity determination module determines the received polarity of the inputter according to the parsing accuracy of the signal identifier.

[0016] In a second aspect, the present application provides an inputter, characterized in that the inputter is configured to implement the function of the inputter in the detection circuit as described in the first aspect or any one of the possible implementations of the first aspect.

[0017] In a third aspect, the present application provides a chip, and the chip includes the detection circuit as described in the first aspect or any one of the possible implementations of the first aspect.

[0018] In a fourth aspect, the present application provides a method for detecting the polarity of a display interface auxiliary channel, and the method is implemented based on the detection circuit as described in the first aspect or any one of the possible implementations of the first aspect, and includes:

[0019] The inputter receives an auxiliary channel signal from the outside;

[0020] The inputter respectively parses the auxiliary channel signal according to the first parsing logic and the second parsing logic to obtain a first parsing result and a second parsing result;

[0021] The first receiving buffer stores and sends the first parsing result to the polarity determination module, and the second receiving buffer stores and sends the second parsing result to the polarity determination module;

[0022] The polarity determination module determines the received polarity of the inputter according to the parsing accuracy of the first parsing result and / or the second parsing result.

[0023] Based on the implementation manners provided in the above aspects, the present application can be further combined to provide more implementation manners.

[0024] As can be seen from the above technical solutions, the present application has at least the following advantages:

[0025] The present application provides a detection circuit for the polarity of an auxiliary channel of a display interface. This detection circuit is integrated inside a chip and directly performs detection using hardware. On the one hand, it can reduce the complexity of signal transmission, achieve real-time detection, and improve the efficiency and accuracy of detection; on the other hand, it does not need to frequently switch the polarity direction according to a fixed detection mode, increasing the stability of the detection method. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic structural diagram of a detection circuit for the polarity of an auxiliary channel of a display interface disclosed in an embodiment of the present application;

[0027] Figure 2 It is a schematic structural diagram of a chip disclosed in an embodiment of the present application;

[0028] Figure 3 It is a flowchart of a detection method for the polarity of an auxiliary channel of a display interface disclosed in an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0029] To make the above objects, features, and advantages of the present application more obvious and understandable, the embodiments of the present application will be further described in detail below with reference to the drawings and specific implementation manners.

[0030] The terms used in the following embodiments are only for the purpose of describing specific embodiments and are not intended to limit the present application. The terms "first" and "second" in the embodiments of the present application are only used for descriptive purposes and cannot be understood as indicating or implying relative importance, the order of operation time, or implicitly indicating the number of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features.

[0031] First, the background technology related to the embodiments of the present application will be introduced in detail.

[0032] The auxiliary channel (Auxiliary Channel, AUX) is an independent communication path for assisting data transmission, link management, device control, and protocol management, and is a key functional module in the Display Port (DP). For example, in the DP link initialization stage, the AUX can negotiate the best transmission parameters (such as the number of channels, rate, etc.) through two-way communication to complete link training and ensure data transmission stability.

[0033] In actual communication, the polarity of the auxiliary channel may be reversed. For example, due to voltage fluctuations, electromagnetic interference, or accidental impedance mismatches, the signal quality may suddenly deteriorate, causing the input device to misjudge the signal polarity. Or, during the connection process with a new device, the polarity of the auxiliary channel communication for the new device, such as the receiving polarity of the input device, is uncertain, which may make it difficult to smoothly conduct the auxiliary channel communication and even affect the transmission of other data via the interface.

[0034] Therefore, it is very necessary to detect the polarity of the auxiliary channel of the display interface. However, traditional detection methods usually adopt software testing methods, using a fixed detection mode (for example, verifying the positive and negative directions of the preset polarity each time) and frequently switching the polarity direction. On the one hand, data may be lost due to incorrect preset directions during the detection cycle. On the other hand, frequently switching the polarity direction increases the detection cost and reduces the feasibility, making it difficult to achieve real-time and accurate detection during communication.

[0035] In view of this, the embodiment of the present application provides a detection circuit for the polarity of the auxiliary channel of a display interface. This detection circuit is integrated inside the chip and includes a polarity judgment module, an input device, and a receiving buffer. Specifically, the input device is used to receive the auxiliary channel signal from the outside and, according to the first parsing logic and the second parsing logic, respectively parse the auxiliary channel signal to obtain a first parsing result and a second parsing result. The receiving buffer includes a first receiving buffer and a second receiving buffer. The first receiving buffer is used to store and send the first parsing result to the polarity judgment module, and the second receiving buffer is used to store and send the second parsing result to the polarity judgment module. The polarity judgment module is used to determine the receiving polarity of the input device according to the parsing accuracy of the first parsing result and / or the second parsing result.

[0036] This detection circuit is integrated inside the chip and directly performs detection using hardware. On the one hand, it can reduce the complexity of signal transmission, achieve real-time detection, and improve the efficiency and accuracy of detection. On the other hand, there is no need to frequently switch the polarity direction according to a fixed detection mode, increasing the stability of the detection method.

[0037] To make the technical solution of the present application clearer and easier to understand, the following introduces a detection circuit for the polarity of the auxiliary channel of a display interface provided by the present application in combination with specific embodiments.

[0038] See Figure 1 This is a schematic structural diagram of a detection circuit for the polarity of the auxiliary channel of a display interface disclosed in the embodiment of the present application.

[0039] The detection circuit 100 provided by the embodiment of the present application is integrated inside the chip, and includes a polarity judgment module 10, an inputter 20, and a reception buffer 30. Arrows in the figure indicate the transmission direction of signals / data, and the dotted lines indicate that the module is optional.

[0040] During the communication of the auxiliary channel, the inputter 20 can receive the auxiliary channel signal from the outside. For example, when two devices perform data transmission, the inputter on the receiving side can receive the auxiliary channel signal from the outputter on the sending side. For another example, when the target device is used to monitor the link transmission between other devices, the inputter of the target device can obtain the auxiliary channel signal from the link.

[0041] Specifically, the auxiliary channel signal should have a standard data structure according to the protocol (such as the DP AUX protocol), including a signal identifier, data, and a data end identifier. For example, the data to be transmitted should have the following data structure: SYNC + SYNC END + DATA + STOP. Among them, "SYNC + SYNC END" is the signal identifier, which is used to identify that the transmitted data is the transmission data of the auxiliary channel. More specifically, "SYNC" is usually a field composed of 16 bits of "0", and "SYNCEND" is the end identifier of the signal identifier, which is usually represented by "HHLL", that is, the logical signal it represents should be "high level, high level, low level, low level" in the digital signal. The above signal identifiers are all the identifiers specified in the protocol. It should be noted that when the adopted protocol is different or the protocol changes, those skilled in the art should change the signal identifiers in the embodiment of the present application accordingly according to the actual situation. "DATA" is the data transmitted in the auxiliary channel communication, and "STOP" is the identifier for the end of this communication.

[0042] Next, the inputter 20 can parse the auxiliary channel signal according to the first parsing logic and the second parsing logic stored internally, and obtain the first parsing result and the second parsing result. Among them, the polarities corresponding to the first parsing logic and the second parsing logic should be opposite. For example, the first parsing logic corresponds to the inputter channel "+" as the positive pole in the parsing of the auxiliary channel signal and the inputter channel "-" as the negative pole in the parsing of the auxiliary channel signal; the second parsing logic can correspond to the inputter channel "+" as the negative pole in the parsing of the auxiliary channel signal and the inputter channel "-" as the positive pole in the parsing of the auxiliary channel signal.

[0043] In a possible implementation manner, the inputter 20 can parse the auxiliary channel signal according to the first parsing logic and the second parsing logic simultaneously after receiving the auxiliary channel signal, and obtain the first parsing result and the second parsing result. Then, the first parsing result and the second parsing result are respectively stored in the first reception buffer and the second reception buffer.

[0044] Among them, the receiving buffer 30 functions to temporarily store data and coordinate data transmission between different rates or different interfaces, thereby ensuring stable and reliable data transmission. For example, a First-In-First-Out (FIFO) buffer memory can be selected. The receiving buffer 30 can include a first receiving buffer and a second receiving buffer, which are used to store the first parsing result and the second parsing result respectively.

[0045] In another possible implementation, considering that the transmission of the auxiliary channel signal may be periodic in the actual application process, the parsing logic can be preset according to the polarity result of the previous cycle for parsing. For example, when it is determined in the previous cycle that the parsing logic that the input device 20 should adopt is the first parsing logic, in the current cycle, the input device 20 can first only parse the first parsing result according to the first parsing logic, store the first parsing result in the first receiving buffer, and then enable the second parsing logic to obtain the second parsing result when the first parsing result is incorrect.

[0046] The receiving buffer 30 can send the stored parsing result to the polarity judgment module 10 to determine the polarity of the auxiliary channel. Among them, the polarity judgment module 10 in the embodiment of the present application refers to a processing module for determining the parsing logic that the input device 20 should select according to the parsing result, and then determining the polarity of the auxiliary channel. The present application does not specifically limit the form of the polarity judgment module 10. For example, the polarity judgment module 10 can be a single-chip microcomputer, a microprocessor, etc.

[0047] Specifically, since the transmission of the auxiliary channel signal has a format required by the protocol, the polarity judgment module can determine its correctness according to whether the format or content of the data in the first parsing result and / or the second parsing result conforms to the protocol requirements. For example, if the first parsing result is correct, the polarity judgment module 10 can determine that the polarity corresponding to the first parsing logic is the receiving polarity of the input device.

[0048] In a possible implementation, when the input device 20 can parse the auxiliary channel signal according to the first parsing logic and the second parsing logic simultaneously after receiving the auxiliary channel signal to obtain the first parsing result and the second parsing result, the polarity judgment module 10 can determine the receiving polarity of the input device 20 according to the format or content of the data in the first parsing result and the second parsing result to parse the correct one. For example, the first parsing result is parsed to obtain a result including or corresponding to a uniquely determined signal identifier "SYNC+ SYNC END"; while the second parsing result cannot correspond to the signal identifier, or the second parsing result is garbled, it can be determined that the first parsing result is the correct parsing result. Correspondingly, the first parsing logic is the correct parsing logic, and the corresponding polarity should also be the receiving polarity of the input device 20.

[0049] In another possible implementation, when the input unit 20 performs a single parsing according to a preset parsing logic, for example, obtaining a first parsing result according to a first parsing logic, the polarity judgment module 10 may also only judge this one parsing result. That is, the polarity judgment module 10 may determine its correctness according to whether the format or content of the data in the first parsing result or the second parsing result conforms to the protocol requirements. Specifically, the polarity judgment module 10 may adopt a judgment method similar to the foregoing method. When the content of the parsing result includes or corresponds to a uniquely determined signal identifier "SYNC + SYNCEND", it is judged that the result is correct; otherwise, it is judged that the result is incorrect.

[0050] Furthermore, when the first parsing result is parsed incorrectly, the polarity judgment module 10 may also be used to send an indication message to the input unit 20, so that the input unit 20 parses the auxiliary channel signal by using a second parsing logic. It should be noted that the embodiments of the present application do not make any limitation on the specific form and transmission manner of the indication message.

[0051] In some possible implementation manners, the polarity judgment module 10 is further used to send the receiving polarity of the input unit 20 to the output unit 40 to adjust the output polarity of the output unit 40. After determining the receiving polarity of the input unit 20, since the output unit 40 will also send a feedback signal to an external signal source as a response in practical applications, the auxiliary channel polarities of the input unit 20 and the output unit 40 should match. The polarity judgment module 10 may send the receiving polarity to the output unit 40, so that the output unit 40 adjusts the output polarity to match the receiving polarity of the input unit 20, ensuring the smooth progress of auxiliary channel communication.

[0052] Based on the above description, the present application provides a detection circuit for the polarity of a display interface auxiliary channel. The detection circuit is integrated inside the chip and directly performs detection by hardware. On the one hand, it can reduce the complexity of signal transmission, achieve real-time detection, and improve the efficiency and accuracy of detection; on the other hand, it does not need to frequently switch the polarity direction according to a fixed detection mode, increasing the stability of the detection method.

[0053] Based on the above detection circuit for the polarity of a display interface auxiliary channel, the present application provides a chip, which will be introduced in detail below with reference to the accompanying drawings.

[0054] See Figure 2 , which is a schematic structural diagram of a chip disclosed in an embodiment of the present application.

[0055] The chip 1000 provided by the embodiments of the present application includes the detection circuit 100 introduced in the above embodiments. This chip can support auxiliary channel communication, has the function of receiving signals, and may also have the function of transmitting signals at the same time. For example, the chip 1000 can be a chip for audio signal transmission, such as a wireless audio chip, etc. The embodiments of the present application do not make any limitations on the specific type of the chip.

[0056] Based on the above content, the present application also provides a method for detecting the polarity of the auxiliary channel of a display interface. Refer to Figure 3 The schematic diagram of a method for detecting the polarity of the auxiliary channel of a display interface shown. This method is implemented based on the above detection circuit and specifically includes:

[0057] S302: The input device receives the auxiliary channel signal from the outside.

[0058] S304: The input device respectively analyzes the auxiliary channel signal according to the first parsing logic and the second parsing logic to obtain the first parsing result and the second parsing result.

[0059] S306: The first receiving buffer stores and sends the first parsing result to the polarity judgment module, and the second receiving buffer stores and sends the second parsing result to the polarity judgment module.

[0060] S308: The polarity judgment module determines the receiving polarity of the input device according to the parsing accuracy of the first parsing result and / or the second parsing result.

[0061] The specific details of the above steps are similar to those corresponding in the previous text and will not be elaborated here.

[0062] It should be noted that the various embodiments in this specification are described in a progressive manner. The key point of each embodiment is to describe the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other. For the systems or devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the description of the method part.

[0063] It should be understood that in this application, "at least one (item)" means one or more, and "a plurality" means two or more. "And / or" is used to describe the relationship between associated objects and indicates that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and both A and B exist simultaneously. Here, A and B can be singular or plural. The character " / " generally indicates an "or" relationship between the associated objects before and after. "At least one (item) of the following" or its similar expressions refer to any combination of these items, including any combination of single items or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0064] It should also be noted that in this text, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise", or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device that includes a series of elements not only includes those elements but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article, or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article, or device that includes the said element.

[0065] The steps of the methods or algorithms described in connection with the embodiments disclosed herein can be implemented directly in hardware, in software modules executed by a processor, or in a combination of both. The software modules can be placed in a random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0066] The above description of the disclosed embodiments enables those skilled in the art to implement or use this application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application will not be limited to the embodiments shown herein, but rather will be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A detection circuit for the polarity of an auxiliary channel of a display interface, characterized in that, The detection circuit is integrated inside the chip. The detection circuit includes a polarity judgment module, an input unit, and a reception buffer; The input unit includes a first input unit channel and a second input unit channel, and is configured to receive an auxiliary channel signal from the outside, and respectively parse the auxiliary channel signal to obtain a first parsing result and a second parsing result according to a first parsing logic and a second parsing logic. The first parsing logic corresponds to the first input unit channel being the positive electrode in the parsing of the auxiliary channel signal, and the second input unit channel being the negative electrode in the parsing of the auxiliary channel signal; the second parsing logic corresponds to the first input unit channel being the negative electrode in the parsing of the auxiliary channel signal, and the second input unit channel being the positive electrode in the parsing of the auxiliary channel signal; The reception buffer includes a first reception buffer and a second reception buffer. The first reception buffer is configured to store and send the first parsing result to the polarity judgment module, and the second reception buffer is configured to store and send the second parsing result to the polarity judgment module; The polarity judgment module is configured to determine the reception polarity of the input unit according to the parsing accuracy of the first parsing result and / or the second parsing result.

2. The detection circuit according to claim 1, wherein The detection circuit further includes an output unit. The polarity judgment module is further configured to send the reception polarity of the input unit to the output unit to adjust the output polarity of the output unit.

3. The detection circuit according to claim 1, wherein The polarities corresponding to the first parsing logic and the second parsing logic are opposite.

4. The detection circuit according to claim 3, wherein When the first parsing result is correctly parsed, the polarity judgment module determines the polarity corresponding to the first parsing logic as the reception polarity of the input unit.

5. The detection circuit according to claim 4, wherein When the first parsing result is incorrectly parsed, the polarity judgment module is further configured to send an indication message to the input unit, so that the input unit parses the auxiliary channel signal by using the second parsing logic.

6. The detection circuit according to claim 1, wherein The auxiliary channel signal includes a signal identifier, data, and a data end identifier.

7. The detection circuit according to claim 6, wherein The polarity judgment module determines the reception polarity of the input unit according to the parsing accuracy of the signal identifier.

8. An input device, characterized in that, The input unit includes two data parsing logics, namely a first parsing logic and a second parsing logic, and is used to implement the function of the input unit in the detection circuit according to any one of claims 1 to 7.

9. A chip, characterized in that, The chip includes the detection circuit according to any one of claims 1 to 7.

10. A method for detecting the polarity of an auxiliary channel of a display interface, characterized in that, Implemented based on the detection circuit according to any one of claims 1 to 7, the method includes: The input unit receives an auxiliary channel signal from the outside; The input unit respectively parses the auxiliary channel signal to obtain a first parsing result and a second parsing result according to a first parsing logic and a second parsing logic. The input unit includes a first input unit channel and a second input unit channel. The first parsing logic corresponds to the first input unit channel being the positive electrode in the parsing of the auxiliary channel signal, and the second input unit channel being the negative electrode in the parsing of the auxiliary channel signal; the second parsing logic corresponds to the first input unit channel being the negative electrode in the parsing of the auxiliary channel signal, and the second input unit channel being the positive electrode in the parsing of the auxiliary channel signal; The first receiving buffer stores and sends the first parsing result to the polarity determination module, and the second receiving buffer stores and sends the second parsing result to the polarity determination module; The polarity determination module determines the receiving polarity of the inputter according to the parsing accuracy of the first parsing result and / or the second parsing result.

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