Method for forming oxide layer on silicon carbide substrate and silicon carbide device

Abstract

The invention relates to a method for forming an oxide layer on a silicon carbide substrate and a silicon carbide device. The method comprises the following steps of: obtaining an accompanying wafer of which the surface is provided with a processing oxide layer of which the thickness is not less than a thickness threshold value; placing the wafer bearing medium loaded with the silicon carbide positive wafer and the accompanying wafer in first oxidation equipment for oxidation, so that a target oxide layer is formed on the silicon carbide substrate of the silicon carbide positive wafer; the silicon carbide wafer positive pieces and the accompanying pieces are arranged in at least one row in the wafer bearing medium, and the silicon carbide wafer positive pieces and the accompanying pieces in each row are arranged in a mixed mode. Before oxidation, the accompanied wafer is oxidized in advance to form the processing oxide layer with enough thickness, so that the consumption of the accompanied wafer on the oxidizing atmosphere in the oxidation equipment can be reduced, the sufficient oxidizing atmosphere in the oxidation process is ensured, and the stability of the oxidation process is effectively ensured; therefore, the silicon carbide device with good in-chip uniformity of the film thickness of the oxide layer and good film thickness stability is obtained.

Description

Technical Field

[0001] The present application relates to semiconductor manufacturing, and particularly to a method for forming an oxide layer on a silicon carbide substrate, and also relates to a silicon carbide device. Background Art

[0002] The manufacturing process of power semiconductor devices on wide bandgap compound SiC (silicon carbide) substrates also involves multiple processes such as oxidation, diffusion, and doping. Among them, the oxidation process can be compatible with the production line of silicon substrate devices. However, for silicon carbide devices oxidized using the production line of silicon substrate devices, the in-line film thickness stability is poor. Especially in the critical core gate oxide oxidation process, the film thickness will show occasional mutation, directly affecting the device parameters and product yield. Summary of the Invention

[0003] Based on this, it is necessary to provide a method for forming an oxide layer on a silicon carbide substrate with good in-chip uniformity and film thickness stability of the oxide layer.

[0004] A method for forming an oxide layer on a silicon carbide substrate includes: obtaining a dummy wafer with a processed oxide layer having a thickness not less than a thickness threshold formed on its surface; placing a wafer carrier medium loaded with a silicon carbide wafer main body and the dummy wafer in a first oxidation device for oxidation, so as to form a target oxide layer on the silicon carbide substrate of the silicon carbide wafer main body; the silicon carbide wafer main body and the dummy wafer are arranged in at least one column in the wafer carrier medium, and the silicon carbide wafer main body and the dummy wafer are arranged in a mixed manner in each column.

[0005] In the above method for forming an oxide layer on a silicon carbide substrate, the silicon carbide wafer main body and the dummy wafer are arranged in a mixed manner in the oxidation device, and the dummy wafer is pre-oxidized to form a processed oxide layer with a sufficient thickness before oxidation, which can reduce the consumption of the oxidation atmosphere (oxidation gas) in the first oxidation device by the dummy wafer, ensure sufficient oxidation atmosphere during the oxidation process, and thus effectively guarantee the stability of the oxidation process to obtain a silicon carbide device with good in-chip uniformity and film thickness stability of the oxide layer.

[0006] In one embodiment, the dummy wafer includes a silicon carbide dummy wafer.

[0007] In one embodiment, the thickness of the processed oxide layer on the Si surface of the obtained silicon carbide dummy wafer is not less than 3500 Å.

[0008] In one embodiment, the target oxide layer is formed on the Si surface of the silicon carbide wafer main body; for the adjacent silicon carbide wafer main body and the silicon carbide dummy wafer in each column, the Si surface of the silicon carbide wafer main body is placed opposite to the Si surface of the adjacent silicon carbide dummy wafer.

[0009] In one embodiment, the silicon carbide wafers and the dummy wafers are alternately placed in each column.

[0010] In one embodiment, the step of obtaining a dummy wafer with a processing oxide layer having a thickness not less than a thickness threshold formed on the surface includes: introducing a gas carrying dichloroethylene into a second oxidation device where the silicon carbide dummy wafer is placed for oxidation, and the oxidation temperature is 1300°C to 1450°C, and the oxidation time is 180 minutes to 360 minutes.

[0011] In one embodiment, before the step of introducing a gas carrying dichloroethylene into a second oxidation device where the silicon carbide dummy wafer is placed for oxidation, there is also a step of removing the surface oxide layer of the silicon carbide dummy wafer.

[0012] In one embodiment, the step of removing the surface oxide layer of the silicon carbide dummy wafer is performed by hydrofluoric acid.

[0013] In one embodiment, after the step of removing the surface oxide layer of the silicon carbide dummy wafer and before the step of introducing a gas carrying dichloroethylene into a second oxidation device where the silicon carbide dummy wafer is placed for oxidation, there is also a step of cleaning the silicon carbide dummy wafer with a cleaning solution including at least one of SPM, hydrofluoric acid, APM, and HPM.

[0014] In one embodiment, before the step of placing the wafer carrier medium loaded with the silicon carbide wafers and the dummy wafers in a first oxidation device for oxidation, there is also a step of bombarding the surface of the silicon carbide wafer where the target oxide layer is to be formed with plasma.

[0015] In one embodiment, the step of bombarding the surface of the silicon carbide wafer where the target oxide layer is to be formed with plasma includes bombarding the Si surface of the silicon carbide wafer with oxygen plasma.

[0016] In one embodiment, after the step of bombarding the surface of the silicon carbide wafer where the target oxide layer is to be formed with plasma and before the step of placing the wafer carrier medium loaded with the silicon carbide wafers and the dummy wafers in a first oxidation device for oxidation, there is also a step of performing surface treatment on the silicon carbide wafer with APM, and the surface treatment time is 5 minutes to 30 minutes.

[0017] In one embodiment, after the step of surface-treating the silicon carbide wafer with APM and before the step of placing the wafer carrier medium loaded with the silicon carbide wafer and the dummy wafer into the first oxidation equipment for oxidation, the method further includes a step of cleaning the silicon carbide wafer with a cleaning solution including at least one of SPM, hydrofluoric acid, APM, and HPM.

[0018] In one embodiment, the target oxide layer is a gate oxide layer.

[0019] In one embodiment, the substrate of the C-plane of the silicon carbide dummy wafer has N-type doping.

[0020] In one embodiment, the target oxide layer is the gate oxide layer of a silicon carbide MOSFET.

[0021] It is also necessary to provide a silicon carbide device including the target oxide layer formed by the method for forming an oxide layer on a silicon carbide substrate according to any one of the foregoing embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] To better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, one or more drawings may be referred to. Additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the presently described embodiments and / or examples, and the presently understood best mode of these inventions.

[0023] Figure 1 is a schematic diagram of the hexagonal crystal system of SiC;

[0024] Figure 2 is a flowchart of the method for forming an oxide layer on a silicon carbide substrate according to an embodiment of the present application;

[0025] Figure 3 is a schematic diagram of a row of dummy wafers and a silicon carbide wafer in a wafer carrier medium according to an embodiment of the present application;

[0026] Figure 4 is a schematic diagram of the alternating arrangement of dummy wafers and silicon carbide wafers according to an embodiment of the present application;

[0027] Figure 5 is a schematic diagram of the orientation of dummy wafers and silicon carbide wafers according to an embodiment of the present application;

[0028] Figure 6 is a flowchart of the method for forming an oxide layer on a silicon carbide substrate according to another embodiment of the present application. DETAILED DESCRIPTION

[0029] To facilitate the understanding of the present invention, the present invention will be described more comprehensively hereinafter with reference to the relevant drawings. Preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present invention will be thorough and complete.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the associated listed items.

[0031] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or portions, these elements, components, regions, layers and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or portion from another element, component, region, layer or portion. Thus, a first element, component, region, layer or portion discussed below may be denoted as a second element, component, region, layer or portion without departing from the teachings of the present invention.

[0032] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. are used herein for convenience in describing the relationship of one element or feature to another element or feature shown in the figures. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "over" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0033] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present invention. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, identify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0034] The two opposite surfaces of the silicon carbide wafer are the Si surface (commonly referred to as the front surface) and the C surface (commonly referred to as the back surface), respectively. Figure 1 It is a schematic diagram of the hexagonal crystal system of SiC. On the (0001) crystal plane, one chemical bond of the tetrahedrally bonded Si atoms points along the c-axis (<0001>), and this (0001) crystal plane is the "Si surface". On the (000-1) crystal plane, one chemical bond of the tetrahedrally bonded C atoms points along the c-axis (<000-1>), and this crystal plane is the "C surface".

[0035] Figure 2 It is a flowchart of a method for forming an oxide layer on a silicon carbide substrate in an embodiment of the present application, including the following steps:

[0036] S110, obtain a dummy wafer with a processed oxide layer formed on its surface and having a thickness not less than a thickness threshold.

[0037] The dummy wafer, i.e., Dummy Wafer, can be a silicon carbide wafer of poor quality, such as a silicon carbide wafer cut from a position with poor quality at both ends of a crystal bar. In an embodiment of the present application, the dummy wafer can also include dummy wafers of other materials. The dummy wafer does not form a chip product. Before performing an oxidation process on the prime wafer of the silicon carbide wafer to form a target oxide layer, a processed oxide layer with a sufficient thickness is first formed on the surface of the dummy wafer to reduce the consumption of the oxidation atmosphere (oxidation gas) in the oxidation equipment by the dummy wafer when oxidizing the prime wafer of the silicon carbide wafer. To achieve this purpose, the thickness of the processed oxide layer should reach the thickness threshold, and the thickness threshold can be an empirical value. In an embodiment of the present application, the thickness of the processed oxide layer on the Si surface of the silicon carbide dummy wafer obtained in step S110 is not less than 3500 Å.

[0038] In an embodiment of the present application, step S110 includes forming a processed oxide layer on the surface of the dummy wafer. Further, a reaction gas carrying dichloroethylene (DCE) is introduced into the oxidation equipment where the silicon carbide dummy wafer is placed for oxidation, and the oxidation temperature is 1300 °C to 1450 °C, and the oxidation time is 180 minutes to 360 minutes to form a processed oxide layer with a thickness not less than 3500 Å.

[0039] S120, place the wafer carrier medium loaded with the silicon carbide wafer main body and the dummy wafer in an oxidation device for oxidation.

[0040] A target oxide layer is formed on the silicon carbide substrate of the silicon carbide wafer main body through oxidation. The silicon carbide wafer main body and the dummy wafers are arranged in at least one column in the wafer carrier medium, and in each column, the silicon carbide wafer main body and the dummy wafers are arranged in a mixed manner, that is, in each column, some or all of the silicon carbide wafer main bodies are adjacent to the dummy wafers, and some or all of the dummy wafers are adjacent to the silicon carbide wafer main bodies. Figure 3 is a schematic diagram of a column of dummy wafers and silicon carbide wafer main bodies in the wafer carrier medium in an embodiment of the present application. In this embodiment, the wafer carrier medium is a quartz boat. In an embodiment of the present application, the silicon carbide wafer main bodies and the dummy wafers are alternately placed in each column, as Figure 4 shown.

[0041] For the above method for forming the oxide layer on the silicon carbide substrate, the silicon carbide wafer main bodies and the dummy wafers are arranged in a mixed manner, and the dummy wafers are pre-oxidized to form a processing oxide layer with a sufficient thickness before step S120, which can reduce the consumption of the oxidation atmosphere (oxidation gas) in the oxidation device by the dummy wafers, ensure sufficient oxidation atmosphere during the oxidation process, thereby effectively ensuring the stability of the oxidation process, so as to obtain a silicon carbide device with good in-wafer uniformity of the oxide layer thickness and thickness stability.

[0042] In an embodiment of the present application, the target oxide layer is formed on the Si surface of the silicon carbide wafer main body. In step S120, the Si surface of the silicon carbide wafer main body is placed opposite to the Si surface of the adjacent silicon carbide dummy wafer, as Figure 5 shown. This is because the substrate on the C surface of the silicon carbide dummy wafer has N-type doping, for example, N-type heavy doping. It can be understood that the substrate on the C surface of the silicon carbide wafer main body has N-type doping and no back seal. In step S120, this N-type doping may volatilize at high temperature. Placing the Si surface of the silicon carbide wafer main body facing the Si surface of the silicon carbide dummy wafer can reduce the influence of the volatilization of N-type doping on the formation of the target oxide layer on the Si surface of the silicon carbide wafer main body, and ensure the consistency during the oxidation process. In an embodiment of the present application, the target oxide layer is a gate oxide layer.

[0043] In an embodiment of the present application, before forming the processing oxide layer on the surface of the dummy wafer, a step of removing the surface oxide layer of the silicon carbide dummy wafer is further included. The dummy wafer will naturally generate a small amount of oxide layer on the surface when placed in the air. Removing this surface oxide layer before forming the processing oxide layer can ensure the quality of the generated processing oxide layer. In an embodiment of the present application, the surface oxide layer of the silicon carbide dummy wafer is removed by hydrofluoric acid. For example, it is removed by reacting with 20% (weight ratio) HF for 30 minutes.

[0044] In one embodiment of the present application, after the step of removing the surface oxide layer of the silicon carbide carrier wafer and before the step of forming a processing oxide layer on the surface of the carrier wafer, it is also necessary to clean the silicon carbide carrier wafer through a cleaning solution including at least one of SPM (including H 2 SO 4 , H 2 O 2 and H 2 O), hydrofluoric acid, APM (including NH 4 OH, H 2 O 2 and H 2 O), and HPM (including HCl, H 2 O 2 and H 2 O). Specifically, the silicon carbide carrier wafer can be cleaned by the RCA cleaning method.

[0045] In one embodiment of the present application, before step S120, it also includes the step of bombarding the surface of the silicon carbide wafer main body where the target oxide layer is to be formed with plasma. For example, if the target oxide layer is formed on the Si surface of the silicon carbide wafer main body, then the Si surface of the silicon carbide wafer main body is bombarded with plasma. This step is set for the following considerations: First, during the oxidation process of silicon carbide, the carbon on the surface cannot fully participate in the reaction and is likely to remain at the interface, forming carbon-oxygen-silicon compounds or carbon clusters. By bombarding with plasma, the carbon atoms on the surface of the silicon carbide wafer main body can be removed. Second, the lattice structure of silicon carbide has polarity, making it easy for the surface of the silicon carbide wafer main body to adsorb F- or OH- ions in the solution. If a solution containing a large amount of F- ions, for example, is used to process the silicon carbide wafer main body during the process, the F- ions will combine with Si to form F-Si bonds. And by bombarding with plasma, the bonding bonds on the surface of the silicon carbide wafer main body can be broken. In one embodiment of the present application, the plasma used can be oxygen plasma, and the silicon carbide wafer main body is processed for about 90 seconds. The equipment used can be a dry stripping equipment.

[0046] In one embodiment of the present application, after the step of bombarding the silicon carbide wafer main body with plasma and before step S120, it also includes the step of surface-treating the silicon carbide wafer main body with APM, and the surface treatment time is 5 minutes to 30 minutes.

[0047] In one embodiment of the present application, after the step of surface-treating the silicon carbide wafer main body with APM and before step S120, it is also necessary to clean the silicon carbide wafer main body through a cleaning solution including at least one of SPM, hydrofluoric acid, APM, and HPM. Specifically, the silicon carbide wafer main body can be cleaned by the RCA cleaning method.

[0048] In one embodiment of the present application, forming the target oxide layer is to form the gate oxide layer of a silicon carbide MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

[0049] Figure 6 FIG. is a flowchart of a method for forming an oxide layer (i.e., the target oxide layer) on a silicon carbide substrate in another embodiment of the present application. Before forming the target oxide layer, pre-treatment is first performed on a silicon carbide dummy wafer and a silicon carbide wafer main body. The pre-treatment of the silicon carbide dummy wafer includes the following steps:

[0050] S612, Remove the surface oxide layer of the silicon carbide dummy wafer.

[0051] A small amount of oxide layer will naturally form on the surface of the dummy wafer when placed in the air. Removing this surface oxide layer before forming the processing oxide layer can ensure the quality of the generated processing oxide layer. In one embodiment of the present application, the surface oxide layer of the silicon carbide dummy wafer is removed by hydrofluoric acid. For example, it is removed by reacting with 20% (by weight) HF for 30 minutes.

[0052] S614, Clean the silicon carbide dummy wafer.

[0053] The step of cleaning the silicon carbide dummy wafer with a cleaning solution including at least one of SPM, hydrofluoric acid, APM, and HPM. Specifically, the silicon carbide dummy wafer can be cleaned by the RCA cleaning method.

[0054] S616, Form a processing oxide layer on the surface of the silicon carbide dummy wafer.

[0055] In one embodiment of the present application, the thickness of the processing oxide layer formed in step S616 on the Si surface of the silicon carbide dummy wafer is not less than 3500 Å.

[0056] In one embodiment of the present application, a reaction gas carrying dichloroethylene (DCE) is introduced into the oxidation equipment where the silicon carbide dummy wafer is placed for oxidation, and the oxidation temperature is 1300 °C to 1450 °C, and the oxidation time is 180 minutes to 360 minutes to form a processing oxide layer with a thickness not less than 3500 Å.

[0057] The pre-treatment of the silicon carbide wafer main body includes the following steps:

[0058] S622, Bombard the Si surface of the silicon carbide wafer main body with plasma.

[0059] This step of setting is considered as follows: First, during the oxidation process of silicon carbide, the carbon on the surface cannot fully participate in the reaction and is likely to remain at the interface, forming carbon-oxygen-silicon compounds or carbon clusters. The carbon atoms on the surface of the silicon carbide wafer can be removed by plasma bombardment. Second, the lattice structure of silicon carbide has polarity, making it easy for the surface of the silicon carbide wafer to adsorb F- or OH- ions in the solution. If a solution containing a large amount of F- ions is used to process the silicon carbide wafer during the process, the F- ions will combine with Si to form F-Si bonds. And the bonding bonds on the surface of the silicon carbide wafer can be broken by plasma bombardment.

[0060] In an embodiment of the present application, the plasma used can be oxygen plasma, and the silicon carbide wafer is processed for about 90 seconds. The equipment used can be a dry stripping equipment.

[0061] S624, perform surface treatment on the silicon carbide wafer with APM.

[0062] The treatment time is 5 minutes to 30 minutes.

[0063] S626, clean the silicon carbide wafer.

[0064] The silicon carbide wafer is cleaned with a cleaning solution including at least one of SPM, hydrofluoric acid, APM, and HPM. Specifically, the silicon carbide wafer can be cleaned by RCA cleaning method.

[0065] After the pretreatment of the silicon carbide dummy wafer and the silicon carbide wafer is completed (that is, both step S616 and step S626 are completed), the following steps are performed:

[0066] S630, place the wafer carrier medium loaded with the silicon carbide wafer and the silicon carbide dummy wafer in an oxidation equipment for oxidation.

[0067] Place the pretreated silicon carbide wafer and the silicon carbide dummy wafer in the wafer carrier medium, and then place the wafer carrier medium in the oxidation equipment for oxidation to form a target oxide layer on the silicon carbide substrate of the silicon carbide wafer. In an embodiment of the present application, the wafer carrier medium is a boat.

[0068] The silicon carbide wafer and the dummy wafer are arranged in at least one column in the wafer carrier medium, and in each column, the silicon carbide wafer and the dummy wafer are arranged in a mixed manner, that is, in each column, some or all of the silicon carbide wafers are adjacent to the dummy wafers, and some or all of the dummy wafers are adjacent to the silicon carbide wafers. In an embodiment of the present application, the silicon carbide wafer and the dummy wafer are alternately placed in each column, as Figure 4 shown.

[0069] In step S630, the Si surface of the silicon carbide (SiC) wafer in the wafer carrier medium is placed facing the Si surface of the adjacent SiC dummy wafer, as Figure 5 shown. This is because the substrate on the C surface of the SiC dummy wafer has N-type doping, and in step S630, this N-type doping may volatilize at high temperatures. Placing the Si surface of the SiC wafer facing the Si surface of the SiC dummy wafer can reduce the impact of the volatilization of N-type doping on the formation of the target oxide layer on the Si surface of the SiC wafer, ensuring consistency during the oxidation process. In one embodiment of the present application, forming the target oxide layer is forming the gate oxide layer of a SiC MOSFET.

[0070] The oxidation equipment used in step S630 can be the same as or different from that in step S616.

[0071] The above method for forming an oxide layer on a SiC substrate solves the problems of wafer contamination and within-wafer uniformity through the wafer loading method of alternately placing the SiC wafer and the SiC dummy wafer, and placing the Si surface of the SiC wafer facing the Si surface of the adjacent SiC dummy wafer, improving the parameter performance of the wafer. By pre-treating the SiC dummy wafer before forming the target oxide layer, the consistency of the oxidation atmosphere in the furnace tube is ensured, effectively improving the stability of the film thickness of the target oxide layer on the wafer. By pre-treating the SiC wafer before forming the target oxide layer, the stability of the wafer surface state is effectively ensured.

[0072] The present application correspondingly provides a SiC device, including a target oxide layer, which is formed by the method for forming an oxide layer on a SiC substrate described in any of the foregoing embodiments. In one embodiment of the present application, the SiC device is a SiC MOSFET, and the target oxide layer is the gate oxide layer.

[0073] It should be understood that although the steps in the flowchart of the present application are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least some of the steps in the flowchart of the present application may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or steps in other steps.

[0074] In the description of this specification, the descriptions referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0075] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as within the scope described in this specification.

[0076] The above-described embodiments only represent several implementation manners of the present invention. The descriptions are relatively specific and detailed, but should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent shall be subject to the appended claims.

Claims

1. A method for forming an oxide layer on a silicon carbide substrate, characterized in that, comprising: obtaining a dummy wafer with a processed oxide layer having a thickness not less than a thickness threshold formed on its surface; placing a wafer carrier medium loaded with a silicon carbide wafer main body and the dummy wafer in a first oxidation device for oxidation, so as to form a target oxide layer on the silicon carbide substrate of the silicon carbide wafer main body; the silicon carbide wafer main body and the dummy wafer are arranged in at least one column in the wafer carrier medium, and in each column, the silicon carbide wafer main body and the dummy wafer are arranged in a mixed manner.

2. The method for forming an oxide layer on a silicon carbide substrate according to claim 1, characterized in that, the dummy wafer includes a silicon carbide dummy wafer.

3. The method for forming an oxide layer on a silicon carbide substrate according to claim 2, characterized in that, the thickness of the processed oxide layer on the Si surface of the obtained silicon carbide dummy wafer is not less than 3500 Å; and / or the target oxide layer is formed on the Si surface of the silicon carbide wafer main body; for the adjacent silicon carbide wafer main body and the silicon carbide dummy wafer in each column, the Si surface of the silicon carbide wafer main body is placed opposite to the Si surface of the adjacent silicon carbide dummy wafer.

4. The method for forming an oxide layer on a silicon carbide substrate according to claim 1, characterized in that, the silicon carbide wafer main body and the dummy wafer in each column are alternately placed.

5. The method for forming an oxide layer on a silicon carbide substrate according to claim 2 or 3, characterized in that, the step of obtaining a dummy wafer with a processed oxide layer having a thickness not less than a thickness threshold formed on its surface includes: introducing a gas carrying dichloroethylene into a second oxidation device in which the silicon carbide dummy wafer is placed for oxidation, and the oxidation temperature is 1300 °C to 1450 °C, and the oxidation time is 180 minutes to 360 minutes.

6. The method for forming an oxide layer on a silicon carbide substrate according to claim 5, characterized in that, before the step of introducing a gas carrying dichloroethylene into a second oxidation device in which the silicon carbide dummy wafer is placed for oxidation, there is also a step of removing the surface oxide layer of the silicon carbide dummy wafer.

7. The method for forming an oxide layer on a silicon carbide substrate according to claim 1, characterized in that, before the step of placing a wafer carrier medium loaded with a silicon carbide wafer main body and the dummy wafer in a first oxidation device for oxidation, there is also a step of bombarding the surface of the silicon carbide wafer main body where the target oxide layer is to be formed with plasma.

8. The method for forming an oxide layer on a silicon carbide substrate according to claim 2 or 3, characterized in that, the target oxide layer is a gate oxide layer.

9. The method for forming an oxide layer on a silicon carbide substrate according to claim 8, characterized in that, the substrate of the C surface of the silicon carbide dummy wafer has N-type doping.

10. A silicon carbide device, characterized in that, it includes the target oxide layer formed by the method for forming an oxide layer on a silicon carbide substrate according to any one of claims 1-9.

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