Transformer-type differential series resonant cavity, differential series resonant oscillator, chip and device

Abstract

The present invention discloses a transformer-type differential series resonant cavity, a differential series resonant oscillator, a chip and a device, wherein the resonant cavity comprises: a two-port transformer and a variable capacitance module, the two-port transformer comprises mutually coupled inductors L P1 、Inductor L P2 and inductor L S1 、Inductor L S2 , the variable capacitor module includes a variable capacitor C P and variable capacitor C S Inductance L P1 One end is connected to the first port, and the other end is connected to the variable capacitor C P Inductance L P2 One end is connected to the second port, and the other end is connected to the variable capacitor C P Inductance L S1 and inductor L S2 One end of the inductor L is connected to the third port and the fourth port respectively. S1 and inductor L S2 The other ends of the variable capacitor C S The two ends of are connected to the third port and the fourth port respectively; the voltage gain function A V The multiple pole frequencies of the CMOS are set equal so that the A V The present invention solves the problem that a series resonant oscillator in a current pure CMOS process cannot achieve pure differential output.

Description

Technical Field

[0001] The present invention relates to a local oscillator generating circuit for frequency mixing in a wireless communication system, and in particular to a transformer-type differential series resonant cavity, a differential series resonant oscillator, a chip and a device. Background Art

[0002] High-speed wireless and wired communications, as well as high-speed digital-to-analog / analog-to-digital converter systems, often require ultra-low phase noise voltage-controlled oscillators (VCOs). According to the Leeson equation, the phase noise of a VCO can be reduced by increasing the resonant cavity voltage or decreasing the resonant cavity inductance. However, the maximum voltage across the resonant cavity is limited by the process, and excessively reducing the inductance degrades the resonant cavity quality factor. Therefore, further reduction in the phase noise of traditional VCOs is difficult. Multi-core VCOs are another approach to reducing phase noise. However, when ultra-low phase noise is required, this approach faces challenges such as large on-chip area, severe inter-core mismatch, and a complex power supply network.

[0003] In recent years, series resonant voltage-controlled oscillators have been proven to be able to achieve ultra-low phase noise in a single-core architecture. To achieve series resonance, the first existing technical solution uses an inverter to drive a series resonant cavity composed of an inductor and a capacitor in series. The voltage on the capacitor in the resonant cavity is taken out and loaded into the input of the next inverter. Finally, a combination of four inverters and series resonant cavities is cascaded together to form a series resonant oscillator and achieve orthogonal signal output. However, this technical solution requires the use of four discrete inductors, which increases the chip area.

[0004] The second prior art solution is based on the first prior art solution, and changes the inductance in the series resonant cavity into a transformer, wherein the primary coil end of the transformer is composed of a capacitor in series with the primary inductance of the transformer, and the secondary coil end is composed of a capacitor in parallel with the secondary inductance of the transformer. The inverter output drives the primary coil end, and the voltage at the secondary coil end of the transformer is loaded onto the input end of the next inverter. Finally, a combination of a four-stage inverter and a transformer-type series resonant cavity is cascaded together to form a series resonant oscillator and realize orthogonal signal output. However, this technical solution has the problem of mode ambiguity, that is, there are two different oscillation frequencies. In addition, both the first and second prior art solutions can only realize orthogonal output, and cannot realize pure differential output.

[0005] The third existing technical solution uses a series resonant cavity composed of an inductor and a capacitor in series, and places the series resonant cavity at the source of the cross-coupled transistor to realize a differential series resonant oscillator; although this solution can achieve differential output, the differential structure topology has not yet been realized in a pure CMOS process, and requires an additional bias inductor, which occupies a large chip area. Summary of the Invention

[0006] In order to solve at least one of the technical problems existing in the prior art to a certain extent, the purpose of the present invention is to provide a transformer-type differential series resonant cavity, a differential series resonant oscillator, a chip and a device based on pole aggregation technology.

[0007] The first technical solution adopted by the present invention is:

[0008] A transformer-type differential series resonant cavity includes a two-port transformer and a variable capacitance module. The two-port transformer includes two mutually coupled inductors L. P1 、Inductor L P2 and inductor L S1 、Inductor L S2 , the variable capacitor module includes a variable capacitor C P and variable capacitor C S ;

[0009] The inductor L P1 The same-name end is connected to the first port, and the opposite-name end is connected to the variable capacitor C P The inductor L P2 The opposite end is connected to the second port, and the same end is connected to the variable capacitor C P ;

[0010] The inductor L S1 The opposite end and the inductor L S2 The same-name ends of the inductor L are connected to the third port and the fourth port respectively. S1 The same-name terminal and inductor L S2 The opposite ends are connected to each other; the variable capacitor C S Two ends of the jack are connected to the third port and the fourth port respectively;

[0011] The voltage gain function A of the transformer-type differential series resonant cavity V The multiple pole frequencies of the CMOS are set equal so that the A V Increase.

[0012] Furthermore, the variable capacitor C P It includes a first switch capacitor array and a variable capacitor tube C VP1 and variable capacitance tube C VP2 The two ends of the first switch capacitor array are connected to the inductor L P1 and inductor L P2 The other end of the variable capacitance tube C VP1 and variable capacitance tube C VP2 One end is connected to the control voltage V TUNEP The variable capacitance tube C VP1 and variable capacitance tube C VP2 The other end is connected to two ends of the first switch capacitor array;

[0013] The variable capacitor C S Including a second switch capacitor array and a variable capacitor tube C VS1 and variable capacitance tube C VS2 The two ends of the second switched capacitor array are connected to the inductor L S1 and inductor L S2 One end of the variable capacitance tube C VS1 and variable capacitance tube C VS2 One end is connected to the control voltage V TUNES The variable capacitance tube C VS1 and variable capacitance tube C VS2 The other end is connected to two ends of the second switch capacitor array.

[0014] Furthermore, the variable capacitor C P It includes a first switch capacitor array and a variable capacitor tube C VP1 and variable capacitance tube C VP2 The two ends of the first switch capacitor array are connected to the inductor L P1 and inductor L P2 The other end of the variable capacitance tube C VP1 and variable capacitance tube C VP2 One end is connected to the control voltage V TUNEP The variable capacitance tube C VP1 and variable capacitance tube C VP2 The other end is connected to two ends of the first switch capacitor array;

[0015] The variable capacitor C S The second switching capacitor array includes two ends of the second switching capacitor array connected to the inductor L S1 and inductor L S2 one end.

[0016] Furthermore, the first switched capacitor array and the second switched capacitor array are both switched capacitor arrays based on NMOS switches, and the switched capacitor arrays include a plurality of switched capacitor units;

[0017] The switch capacitor unit includes a transistor M N , resistor R B1 , resistor R B2 , switching capacitor C U1 , switching capacitor C U2 , a third inverter, a fourth inverter, and a fifth inverter;

[0018] The switching capacitor C U1 One end of the transistor M is connected N The drain, switching capacitor C U1 The other end is connected to one end of the switched capacitor array;

[0019] The switching capacitor C U2 One end of the transistor M is connected N The source of the switching capacitor C U2 The other end of is connected to the other end of the switched capacitor array;

[0020] The resistor R B1 One end of the transistor M is connected N The drain, the resistor R B2 One end of the transistor M is connected N The enable signal EN is loaded to the transistor M after passing through the third inverter and the fourth inverter in sequence. N The enable signal EN passes through the fifth inverter and is loaded to the resistor R B1 The other end and resistor R B2 the other end.

[0021] Furthermore, the first switched capacitor array and the second switched capacitor array are both switched capacitor arrays based on complementary switches, and the switched capacitor arrays include a plurality of switched capacitor units;

[0022] The switch capacitor unit includes a transistor M P , transistor M N , resistor R B1 , resistor R B2 , switching capacitor C U1 , switching capacitor C U2 , a third inverter, a fourth inverter, and a fifth inverter;

[0023] The transistor M P The drain of transistor M N The drain of the transistor M is connected, and the connection point is marked as point A; P The source of transistor M N The source of is connected, and the connection point is marked as point B;

[0024] The switching capacitor C U1 One end of the switch capacitor C is connected to point A. U1 The other end is connected to one end of the switched capacitor array;

[0025] The switching capacitor C U2 One end of the switch capacitor C is connected to point B. U2 The other end of is connected to the other end of the switched capacitor array;

[0026] The resistor R B1 One end of the resistor R is connected to point A. B2 Connect one end of the

[0027] The enable signal EN is loaded to the transistor M after passing through the third inverter. P The enable signal EN is loaded to the gate of transistor M after passing through the third inverter and the fourth inverter in sequence. N The enable signal EN passes through the fifth inverter and is loaded to the resistor R B1 The other end and resistor R B2 the other end.

[0028] The second technical solution adopted by the present invention is:

[0029] A differential series resonant oscillator comprises a differential driver and the transformer-type differential series resonant cavity as described above;

[0030] The differential output end of the differential driver is connected to the first port and the second port of the transformer type differential series resonant cavity; the differential input end of the differential driver is connected to the third port and the fourth port of the transformer type differential series resonant cavity.

[0031] Furthermore, the differential driver includes two inverters and two capacitors C with the same structure. B1 、C B2 The input terminal of the differential driver is connected to the capacitor C B1 、C B2 One end of the capacitor C B1 、C B2 The other end of the differential driver is connected to the input end of the two inverters; the output ends of the two inverters serve as the output end of the differential driver;

[0032] The inverter is composed of an NMOS transistor, a PMOS transistor and a resistor R FB The gates of the two transistors are connected as the input of the inverter, the drains of the two transistors are connected as the output of the inverter, and the resistor R FB The two ends are respectively connected to the input end and the output end of the inverter; the source of the NMOS transistor is connected to the ground, and the source of the PMOS transistor is connected to the power supply.

[0033] Furthermore, the differential driver includes two inverters and two capacitors C with the same structure. B1 、C B2 The input terminal of the differential driver is connected to the capacitor C B1 、C B2 One end of the capacitor C B1 、C B2 The other end of the differential driver is connected to the input end of the two inverters; the output ends of the two inverters serve as the output end of the differential driver;

[0034] The inverter is composed of a first NMOS transistor, a second NMOS transistor and a resistor R BThe gates of the two transistors are connected as the input of the inverter, the source of the first NMOS transistor and the drain of the second NMOS transistor are connected as the output of the inverter, and the resistor R B One end is connected to the input end of the inverter, and the other end is connected to the power supply; the drain of the first NMOS transistor is connected to the power supply, and the source of the second NMOS transistor is connected to the ground.

[0035] Furthermore, the differential driver includes two inverters of the same structure; the input and output ends of the two inverters are respectively connected to the input and output ends of the differential driver;

[0036] The inverter is composed of an NMOS transistor and a PMOS transistor, the gates of the two transistors are connected as the input end of the inverter, and the drains of the two transistors are connected as the output end of the inverter; the source of the NMOS transistor is connected to the ground, and the source of the PMOS transistor is connected to the power supply;

[0037] In the transformer type differential series resonant cavity, the inductor L S1 and inductor L S2 One end is connected to the external bias voltage V B connected, bias voltage V B Through the inductor L S1 and inductor L S2 Arrives at the input terminal of the inverter and serves as the bias voltage of the inverter.

[0038] Furthermore, the differential driver includes two inverters of the same structure; the input and output ends of the two inverters are respectively connected to the input and output ends of the differential driver;

[0039] The inverter is composed of a first NMOS transistor and a second NMOS transistor, the gates of the two transistors are connected as the input end of the inverter, the source of the first NMOS transistor and the drain of the second NMOS transistor are connected as the output end of the inverter; the drain of the first NMOS transistor is connected to the power supply, and the source of the second NMOS transistor is connected to the ground;

[0040] In the transformer type differential series resonant cavity, the inductor L S1 and inductor L S2 One end is connected to the external bias voltage V B connected, bias voltage V B Through the inductor L S1 and inductor L S2 Arrives at the input terminal of the inverter and serves as the bias voltage of the inverter.

[0041] The third technical solution adopted by the present invention is:

[0042] A chip includes the differential series resonant oscillator described above, and is used to implement the method described above.

[0043] The fourth technical solution adopted by the present invention is:

[0044] A communication device includes the chip described above.

[0045] The beneficial effects of the present invention are as follows: the present invention constructs a transformer-type differential series resonant cavity and uses pole aggregation technology to enable the series resonant oscillator to achieve differential operation. It is currently the first oscillator to achieve differential series resonance in a pure CMOS process, solving the mode ambiguity problem existing in the transformer-type series resonant oscillator and avoiding the large on-chip area problem caused by additional bias inductance. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following introduction is made to the drawings of the embodiments of the present invention or the related technical solutions in the prior art. It should be understood that the drawings introduced below are only for the convenience of clearly describing some embodiments of the technical solutions of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative work.

[0047] Figure 1 is a schematic diagram of the transformer-type differential series resonant cavity of the present invention;

[0048] Figure 2 is a schematic diagram of a differential series resonant oscillator of the present invention;

[0049] Figure 3 1 is a circuit structure diagram of a differential series resonant oscillator provided in Example 1 of the present invention;

[0050] Figure 4 Schematic diagram of a two-port transformer T1 according to an embodiment of the present invention;

[0051] Figure 5 This is a structural diagram of a switched capacitor array based on complementary switches provided by an embodiment of the present invention;

[0052] Figure 6 is a tuning range test result of the differential series resonant oscillator provided in Example 1 of the present invention;

[0053] Figure 7 This is a phase noise test curve diagram of the differential series resonant oscillator provided in Example 1 of the present invention at 7.762 GHz;

[0054] Figure 8This is a phase noise test curve diagram of the differential series resonant oscillator provided in Example 1 of the present invention at 9.122 GHz;

[0055] Figure 9 1 is a phase noise test graph of the differential series resonant oscillator provided in Example 1 of the present invention at 1 MHz and 10 MHz frequency offsets at various frequency points;

[0056] Figure 10 This is a test diagram of the FoM value of the differential series resonant oscillator provided in Example 1 of the present invention at frequency offsets of 1 MHz and 10 MHz at various frequency points;

[0057] Figure 11 1 is a circuit structure diagram of a differential series resonant oscillator provided in Example 2 of the embodiments of the present invention;

[0058] Figure 12 1 is a circuit structure diagram of a differential series resonant oscillator provided in Example 3 of the embodiments of the present invention;

[0059] Figure 13 4 is a circuit diagram of a differential series resonant oscillator provided in Example 4 of the present invention;

[0060] Figure 14 1 is a circuit structure diagram of a differential series resonant oscillator provided in Example 5 of the embodiments of the present invention;

[0061] Figure 15 4 is a circuit structure diagram of a differential series resonant oscillator provided in Example 6 of the embodiments of the present invention. DETAILED DESCRIPTION

[0062] The embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention and are not to be construed as limiting the present invention. The step numbers in the following embodiments are provided for ease of explanation only and do not limit the order of the steps. The order of execution of the steps in the embodiments can be adaptively adjusted according to the understanding of those skilled in the art.

[0063] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present invention.

[0064] In the description of the present invention, "several" means one or more, "many" means more than two, "greater than," "less than," and "exceed" are understood to exclude the number itself, while "above," "below," and "within" are understood to include the number itself. The use of "first" and "second" in the description is solely for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance, implicitly specifying the number of the indicated technical features, or implicitly specifying the order of the indicated technical features.

[0065] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, and connecting should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0066] In general, the purpose of the present invention is to solve the following technical problems: 1) solve the problem that the series resonant oscillator in the current pure CMOS process cannot achieve pure differential output; 2) solve the mode ambiguity problem existing in the traditional transformer-type series resonant oscillator; 3) solve the problem that the traditional series resonant oscillator occupies a large chip area; 4) solve the problem that the bias resistance of the switched capacitor array circuit in the traditional oscillator contributes a large phase noise.

[0067] In response to technical problems 1)-3), the present invention provides a differential series resonant oscillator using transformer aggregation technology, which achieves pure differential output on a pure CMOS process. In addition, by converting the voltage gain function A of the transformer-type series resonant cavity into V By setting the two pole frequencies of Av to be similar and using a smaller transformer magnetic coupling coefficient k, the two peaks of Av converge at the zero-phase point, increasing the gain at Av zero-phase point, thereby improving the performance of the transformer-type series resonant oscillator in the differential operating state, thereby realizing a high-performance pure differential series resonant oscillator. Since the transformer-type series resonant cavity has only a single zero-phase point, the proposed transformer-type differential series resonant oscillator avoids the mode ambiguity problem of the previous transformer-type orthogonal series resonant oscillator.

[0068] In response to technical problem 4), the present invention provides a switched capacitor array circuit using complementary switches. By simultaneously using NMOS and PMOS transistors as switches, the phase noise introduced by the bias resistors in the switched capacitor array through modulating the parasitic capacitance of the NMOS and PMOS transistors cancels each other out, thereby reducing the total phase noise contributed by the bias resistors.

[0069] The following is a detailed description with reference to the accompanying drawings and specific embodiments.

[0070] Example 1

[0071] like Figure 1 、 Figure 2 and Figure 3 As shown, the circuit structure of the differential series resonant oscillator provided in this embodiment is as follows:

[0072] The drain and gate of the NMOS transistor M1 (M3) are connected to the drain and gate of the PMOS transistor M2 (M4), and the resistor R FB1 (R FB2 ) is connected between the drain and gate of M1 and M2 (M3 and M4). The sources of M1 and M3 are connected to each other and grounded, and the sources of M2 and M4 are connected to each other and connected to the power supply V DD By C P1 、C P2 and SW P The two ends of the five-bit switched capacitor array and the variable capacitance tube C V1 、C V2 The two ends of the varactor C are connected v1 、C v2 The common terminal is connected to the voltage control signal V TUNE Inductor L P1 (L P2 ) across the drains of M1, M2 (M3, M4) and C P1 、C V1 (C P2 、C V2 ). By C S1 、C S2 and SW S The two ends of the five-bit switched capacitor array and the inductor L S1 、L S2 The two ends of the inductor L S1 and L S2 Capacitor C B1 (C B2 ) across the gates of M1, M2 (M3, M4) and C S1 、L S1 (C S2 、L S2 ). The gate of transistor M5 (M6) is connected to the drain of M1, M2 (M3, M4), and the output of the oscillator V out+ and V out- The voltage is respectively connected through the drains of transistors M5 and M6, and the sources of M5 and M6 are grounded.

[0073] It should be noted that the switched capacitor array in this embodiment adopts a five-bit switched capacitor array, but is not limited to five bits. Switch capacitor arrays with different bit values ​​can be selected according to actual needs.

[0074] As an optional implementation, L P1 、L P2 and LS1 、L S2 The two-port transformer T1 and the power supply and ground wires are as follows Figure 4 As shown in the figure, the order of interfaces is ①②③④⑤⑥⑦⑧. Among them, ①② corresponds to L S2 The positive electrode and L S1 The negative pole, ③⑤ correspond to L P1 The positive and negative poles, ④⑥ correspond to L P2 The negative and positive poles of ⑦⑧ correspond to the power supply and ground respectively. The inductor L in the transformer T1 P1 、L P2 and L S1 、L S2 Mutually coupled, where L P1 (L P2 ) and L S1 (L S2 ) is a strong coupling with a turns ratio of 1:2.

[0075] As an optional implementation, the switch capacitor array of this embodiment is a complementary switch type switch capacitor array, including a plurality of switch capacitor units, such as Figure 5 As shown, the circuit structure of the switch capacitor unit is as follows: NMOS transistor M N and PMOS transistor M P The drain and source are connected to each other, and the switching capacitor C U1 and bias resistor R B1 (Switching capacitor C U2 and bias resistor R B2 )Connect to M N and M P The drain (source), switching capacitor C U1 (C U2 The other end of the ) is connected to the differential series resonant oscillator circuit. The enable signal EN of the switch capacitor array is loaded to the transistor M after passing through an inverter. P The gate signal is then applied to transistor M after passing through another inverter. N Gate. The EN signal passes through another inverter and is loaded onto the bias resistor R B1 and R B2 The other end.

[0076] The working principle of the oscillator is described in detail below.

[0077] 1) Working principle of fully differential, low phase noise series resonant voltage-controlled oscillator

[0078] See also Figure 3 , NMOS transistor M1 (M3), PMOS transistor M2 (M4) and feedback resistor R FB1 (R FB2) forms a self-biased inverter, providing negative resistance for the oscillator and maintaining oscillation. DD Provides the power supply voltage required by the circuit, and the DC current flows from V DD The inverter output (M1, M2, M3, M4 drain) is driven by L P1 , L P2 , L S1 , L S2 、C P1 、C P2 、C V1 、C V2 、C S1 、C S2 The transformer-type series resonant cavity is composed of a series resonant cavity, and the voltage at the output of the inverter is close to a square wave. Since the input impedance of the series resonant cavity is small, a large amount of current flows into the series resonant cavity, and a large amount of energy is stored in the inductance and capacitance of the resonant cavity, thereby achieving ultra-low phase noise. Since the transformer-type series resonant cavity provides a large voltage gain, C S1 、C S2 , L S1 , L S2 There is a large voltage swing at both ends (①②). In order to ensure that the voltage swing does not exceed the maximum value of the process limit after entering the gate of transistors M1, M2, M3, and M4, a capacitor C is added. B1 、C B2 C S1 、C S2 , L S1 , L S2 The voltage swing at both ends (①②) is divided.

[0079] By C P1 、C P2 and SW P A five-bit switched capacitor array composed of C S1 、C S2 and SW S The five-bit switched capacitor array is used for coarse tuning of the oscillation frequency. V1 、C V2 The control voltage V TUNE , achieving continuous frequency tuning.

[0080] The pole aggregation technology adjusts the capacitor C P1 、C P2 、C S1 、C S2 Implementation, C P1 、C P2 、C V1 、C V2 , LP1 , L P2 The corresponding pole frequency, and C S1 、C S2 , L S1 , L S2 After the corresponding pole frequencies are adjusted to be equal, the two voltage gain resonance peaks of the transformer-type series resonant cavity are aggregated together, which increases the voltage gain at the voltage gain zero phase point and improves the C S1 、C S2 , L S1 , L S2 The voltage swing at both ends (①②) and the energy they store reduce the phase noise of the oscillator.

[0081] By adjusting the magnetic coupling coefficient k of the transformer, the input impedance of the transformer-type series resonant cavity can be flexibly adjusted, thereby achieving flexible control of power consumption and phase noise. When the magnetic coupling coefficient k is increased, the input impedance of the transformer-type series resonant cavity increases, the oscillator power consumption decreases, and the phase noise increases. When the magnetic coupling coefficient k is decreased, the input impedance of the transformer-type series resonant cavity increases, the oscillator power consumption increases, and the phase noise decreases.

[0082] 2) Control principle of the switched capacitor array with complementary switches

[0083] When the enable signal EN is high, the transistor M N The gate voltage is high, transistor M P The gate is low, and M P and M N The drain and gate of transistor M are both low level. N and M P The voltage between the gate and source is greater than the threshold voltage, M N and M P are both turned on, and the capacitor C U1 and C U2 are loaded into the differential series resonant oscillator, increasing the equivalent capacitance of the resonant cavity in the differential series resonant oscillator and reducing the resonant frequency of the resonant cavity; when the enable signal EN is low, the transistor M N The gate voltage is low, transistor M P The gate is high, and M P and M N The drain and gate of transistor M are both high level. N and M P The voltage between the gate and source is less than the threshold voltage, M N and M P are all cut off, at this time the capacitor C U1 and C U2Not loading into the differential series resonant oscillator reduces the equivalent capacitance of the resonant cavity in the differential series resonant oscillator, thereby increasing the resonant frequency of the resonant cavity.

[0084] In addition, when the enable signal EN is at a low level, the transistor M N and M P The parasitic capacitance and capacitance C U1 and C U2 series, loaded into the differential series resonant oscillator, and transistor M N and M P The parasitic capacitance is related to the drain and source voltage. B1 and R B2 The resistance thermal noise modulation, changing the transistor M N and M P The parasitic capacitance of the differential series resonant oscillator changes the equivalent capacitance of the resonant cavity of the differential series resonant oscillator, and the oscillation frequency and output signal phase of the differential series resonant oscillator change. N and M P The parasitic capacitance changes inversely with voltage, so the bias resistor R B1 and R B2 The thermal noise of the resistor modulating transistor M N and M P The introduced phase noises are opposite and cancel each other out, so the switch capacitor array of the complementary switch of the present invention has a bias resistor R B1 and R B2 Not sensitive to noise.

[0085] Specifically, the tuning range of the embodiment of the present invention is 7.65–9.135 GHz, and the tuning range test curve is as follows: Figure 6 shown. Figure 7 and Figure 8 The phase noise test result curves at 7.65GHz and 9.135GHz oscillation frequencies are shown respectively. Figure 9 The phase noise of each frequency point at 1MHz and 10MHz frequency offset is shown, where the phase noise at 1MHz frequency offset is -130.5~-132dBc / Hz, and the phase noise at 10MHz frequency offset is -150.5~-153dBc / Hz. The power consumption of the embodiment of the present invention is 159~164.5mW, and the FoM values ​​at 1MHz and 10MHz frequency offset are 186.4~189dBc / Hz and 186.5~190dBc / Hz respectively. Figure 10 In summary, the embodiments of the present invention realize a differential series resonant voltage-controlled oscillator with ultra-low phase noise and compact area.

[0086] Based on the above, it can be seen that the differential series resonant oscillator of this embodiment has at least the following advantages over the prior art:

[0087] Beneficial effects:

[0088] (1) The present invention proposes a fully differential series resonant oscillator that can achieve pure differential output under pure CMOS technology, solving the mode ambiguity problem existing in traditional transformer-type series resonant oscillators. It occupies a smaller chip area, has a wider tuning range, and has flexible and controllable power consumption and phase noise.

[0089] (2) The present invention proposes a complementary switch type switched capacitor array, which solves the problem of large noise contribution from bias resistors in traditional switched capacitor arrays.

[0090] Example 2

[0091] like Figure 11 As shown, the main difference between the differential series resonant oscillator provided in this embodiment and the oscillator in embodiment 1 is that the transformer type series resonant cavity is composed of an inductor L P1 , L P2 , L S1 , L S2 and capacitor C P1 、C P2 、C S1 、C S2 、C VP1 、C VP2 、C VS1 、C VS2 The oscillator is composed of V TUNEP and V TUNES Control variable capacitor C VP1 、C VP2 、C VS1 、C VS2 The capacitance value of the differential series resonant cavity is changed to achieve the continuous tuning function. For example, in the process of achieving continuous tuning, the control voltage V TUNEP Follow V TUNES , thereby ensuring that the frequencies of the two poles in the proposed differential series resonant cavity change synchronously, thereby reducing the variation of circuit performance during continuous tuning.

[0092] The differential series resonant oscillator of this embodiment can achieve the same functions and beneficial effects as the oscillator of embodiment 1.

[0093] Example 3

[0094] like Figure 12As shown, the main difference between the differential series resonant oscillator provided in this embodiment and the oscillator of embodiment 1 is that the inverter is a non-self-biased inverter, and the active drive part consists of transistors M1, M2, M3, M4 and bias resistor R B1 、R B2 composition, external bias voltage V B Through the bias resistor R B1 、R B2 Applied to the gates of transistors M1, M2, M3, and M4 to achieve DC bias. Similar to Example 1, the transformer-type series resonant cavity is still composed of an inductor L P1 , L P2 , L S1 , L S2 and capacitor C P1 、C P2 、C S1 、C S2 、C V1 、C V2 composition.

[0095] The differential series resonant oscillator of this embodiment can achieve the same functions and beneficial effects as the oscillator of embodiment 1.

[0096] Example 4

[0097] like Figure 13 As shown, the main difference between the differential series resonant oscillator provided in this embodiment and the oscillator in embodiment 1 is that the active drive part is composed of NMOS transistors M1, M2, M3, M4 and bias resistor R B1 、R B2 、R B3 、R B4 NMOS transistors M1, M2 (M3, M4) form a full NMOS inverter, and the input ends of M1, M2 (M3, M4) are connected to the input terminals of the NMOS inverter through the voltage divider capacitor C. B1 、C B2 (C B3 、C B4 ) connected to the V of the differential series resonant cavity SN 、V SP (V SP 、V SN ) terminal. The power supply voltage is passed through the bias resistor R B1 、R B2 、R B3 、R B4 Provide bias voltage for the gates of transistors M1, M2, M3, and M4. Similar to embodiment 1, the transformer type series resonant cavity is also composed of an inductor L P1 , L P2 , L S1 , L S2and capacitor C P1 、C P2 、C S1 、C S2 、C V1 、C V2 composition.

[0098] The differential series resonant oscillator of this embodiment can achieve the same functions and beneficial effects as the oscillator of embodiment 1.

[0099] Example 5

[0100] like Figure 14 As shown, the main difference between the differential series resonant oscillator provided in this embodiment and the oscillator in embodiment 1 is that the active drive part is composed of transistors M1, M2, M3, and M4, and the gate is directly connected to the differential series resonant cavity. The transistor gate bias voltage V B The voltage is applied from the center tap of inductors LS1 and LS2 to the gates of transistors M1, M2, M3 and M4. Similar to the first embodiment, the transformer type series resonant cavity is also composed of inductors L P1 、L P2 、L S1 、L S2 and capacitor C P1 、C P2 、C S1 、C S2 、C V1 、C V2 composition.

[0101] The differential series resonant oscillator of this embodiment can achieve the same functions and beneficial effects as the oscillator of embodiment 1.

[0102] Example 6

[0103] like Figure 15 As shown, the main difference between the differential series resonant oscillator provided in this embodiment and the oscillator in embodiment 1 is that the inductor L P1 、L P2 、L S1 、L S2 There is magnetic coupling between each pair, and the magnetic coupling coefficient is k 21 、k 31 、k 41 、k 32 、k 42 、k 43 Similar to the first embodiment, the transformer type series resonant cavity is still composed of an inductor L P1 、L P2 、L S1 、L S2 and capacitor C P1 、C P2 、CS1 、C S2 、C V1 、C V2 The active driving part is still composed of transistors M1, M2, M3, and M4.

[0104] The differential series resonant oscillator of this embodiment can achieve the same functions and beneficial effects as the oscillator of embodiment 1.

[0105] In the description of this specification, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0106] The above embodiments are intended only to illustrate the technical concepts and features of the present invention. Their purpose is to enable those skilled in the art to understand the contents of the present invention and implement them accordingly. They are not intended to limit the scope of protection of the present invention. Any equivalent changes or modifications made based on the essence of the present invention are intended to be covered by the scope of protection of the present invention.

Claims

1. A transformer-type differential series resonant cavity, characterized in that: It includes a two-port transformer and a variable capacitor module. The two-port transformer contains a mutually coupled inductor L P1 、Inductor L P2 and inductor L S1 、Inductor L S2 , the variable capacitor module includes a variable capacitor C P and variable capacitor C S The inductor L P1 One end is connected to the first port, and the other end is connected to the variable capacitor C P One end of the inductor L P2 One end is connected to the second port, and the other end is connected to the variable capacitor C P The other end of the inductor L S1 and inductor L S2 One end of the inductor L is connected to the third port and the fourth port respectively. S1 and inductor L S2 The other ends of the variable capacitor C S The two ends of the transformer-type differential series resonant cavity are connected to the third port and the fourth port respectively; the voltage gain function A of the transformer-type differential series resonant cavity V The multiple pole frequencies of the CMOS are set equal so that the A V Increase.

2. The transformer-type differential series resonant cavity according to claim 1, characterized in that: The variable capacitor C P It includes a first switch capacitor array and a variable capacitor tube C VP1 and variable capacitance tube C VP2 The two ends of the first switch capacitor array are connected to the inductor L P1 and inductor L P2 The other end of the variable capacitance tube C VP1 and variable capacitance tube C VP2 One end is connected to the control voltage V TUNEP The variable capacitance tube C VP1 and variable capacitance tube C VP2 The other end of the variable capacitor C is connected to the two ends of the first switch capacitor array; S Including a second switch capacitor array and a variable capacitor tube C VS1 and variable capacitance tube C VS2 The two ends of the second switched capacitor array are connected to the inductor L S1 and inductor L S2 One end of the variable capacitance tube C VS1 and variable capacitance tube C VS2 One end is connected to the control voltage V TUNES The variable capacitance tube C VS1 and variable capacitance tube C VS2 The other end is connected to the two ends of the second switch capacitor array respectively.

3. The transformer-type differential series resonant cavity according to claim 1, characterized in that: The variable capacitor C P It includes a first switch capacitor array and a variable capacitor tube C VP1 and variable capacitance tube C VP2 The two ends of the first switch capacitor array are connected to the inductor L P1 and inductor L P2 The other end of the variable capacitance tube C VP1 and variable capacitance tube C VP2 One end is connected to the control voltage V TUNEP The variable capacitance tube C VP1 and variable capacitance tube C VP2 The other end of the variable capacitor C is connected to the two ends of the first switch capacitor array; S The second switching capacitor array includes two ends of the second switching capacitor array connected to the inductor L S1 and inductor L S2 one end.

4. A transformer-type differential series resonant cavity according to claim 2 or 3, characterized in that: The first switched capacitor array and the second switched capacitor array are both switched capacitor arrays based on NMOS switches, and the switched capacitor arrays include a plurality of switched capacitor units; The switch capacitor unit includes a transistor M N , resistor R B1 , resistor R B2 , switching capacitor C U1 , switching capacitor C U2 , a third inverter, a fourth inverter, and a fifth inverter; The switching capacitor C U1 One end of the transistor M is connected N The drain, switching capacitor C U1 The other end is connected to one end of the switched capacitor array; The switching capacitor C U2 One end of the transistor M is connected N The source of the switching capacitor C U2 The other end of is connected to the other end of the switched capacitor array; The resistor R B1 One end of the transistor M is connected N The drain, the resistor R B2 One end of the transistor M is connected N The source of The enable signal EN is sequentially passed through the third inverter and the fourth inverter and then loaded into the transistor M. N The enable signal EN passes through the fifth inverter and is loaded to the resistor R B1 The other end and resistor R B2 the other end.

5. The transformer-type differential series resonant cavity according to claim 2 or 3, characterized in that: The first switched capacitor array and the second switched capacitor array are both switched capacitor arrays based on complementary switches, and the switched capacitor arrays include a plurality of switched capacitor units; The switch capacitor unit includes a transistor M P , transistor M N , resistor R B1 , resistor R B2 , switching capacitor C U1 , switching capacitor C U2 , a third inverter, a fourth inverter, and a fifth inverter; The transistor M P The drain of transistor M N The drain of the transistor M is connected, and the connection point is marked as point A; P The source of transistor M N The source of is connected, and the connection point is marked as point B; The switching capacitor C U1 One end of the switch capacitor C is connected to point A. U1 The other end is connected to one end of the switched capacitor array; The switching capacitor C U2 One end of the switch capacitor C is connected to point B. U2 The other end of is connected to the other end of the switched capacitor array; The resistor R B1 One end of the resistor R is connected to point A. B2 One end of the transistor is connected to point B; the enable signal EN is loaded to the transistor M after passing through the third inverter. P The enable signal EN is loaded to the gate of transistor M after passing through the third inverter and the fourth inverter in sequence. N The enable signal EN passes through the fifth inverter and is loaded to the resistor R B1 The other end and resistor R B2 the other end.

6. A differential series resonant oscillator, characterized in that: It comprises a differential driver and the transformer-type differential series resonant cavity according to any one of claims 1 to 5; the differential output end of the differential driver is connected to the first port and the second port of the transformer-type differential series resonant cavity; the differential input end of the differential driver is connected to the third port and the fourth port of the transformer-type differential series resonant cavity.

7. The differential series resonant oscillator according to claim 6, wherein: The differential driver includes two inverters with the same structure and two capacitors C B1 、C B2 The input terminals of the differential driver are connected to capacitors C B1 、C B2 One end of the capacitor C B1 、C B2 The other end of each of the two inverters is connected to the input end of each of the two inverters; the output ends of the two inverters serve as the output end of the differential driver; the inverter is composed of an NMOS transistor, a PMOS transistor and a resistor R FB The gates of the two transistors are connected as the input of the inverter, the drains of the two transistors are connected as the output of the inverter, and the resistor R FB The two ends are respectively connected to the input end and the output end of the inverter; the source of the NMOS transistor is connected to the ground, and the source of the PMOS transistor is connected to the power supply.

8. The differential series resonant oscillator according to claim 6, wherein: The differential driver includes two inverters with the same structure and two capacitors C B1 、C B2 The input terminals of the differential driver are connected to capacitors C B1 、C B2 One end of the capacitor C B1 、C B2 The other end of each of the two inverters is connected to the input end of each of the two inverters; the output ends of the two inverters serve as the output ends of the differential driver; The inverter is composed of a first NMOS transistor, a second NMOS transistor and a resistor R B The gates of the two transistors are connected as the input of the inverter, the source of the first NMOS transistor and the drain of the second NMOS transistor are connected as the output of the inverter, and the resistor R B One end is connected to the input end of the inverter, and the other end is connected to the power supply; the drain of the first NMOS transistor is connected to the power supply, and the source of the second NMOS transistor is connected to the ground.

9. The differential series resonant oscillator according to claim 6, wherein: The differential driver includes two inverters of identical structure; the input and output of the two inverters are connected to the input and output of the differential driver, respectively; the inverter is composed of an NMOS transistor and a PMOS transistor, the gates of the two transistors are connected as the input of the inverter, and the drains of the two transistors are connected as the output of the inverter; the source of the NMOS transistor is connected to the ground, and the source of the PMOS transistor is connected to the power supply; In the transformer type differential series resonant cavity, the inductor L S1 and inductor L S2 One end is connected to the external bias voltage V B connected, bias voltage V B Through the inductor L S1 and inductor L S2 Arrives at the input terminal of the inverter and serves as the bias voltage of the inverter.

10. The differential series resonant oscillator according to claim 6, wherein: The differential driver includes two inverters of identical structure; the input and output of the two inverters are connected to the input and output of the differential driver, respectively; the inverter is composed of a first NMOS transistor and a second NMOS transistor, the gates of the two transistors are connected as the input of the inverter, the source of the first NMOS transistor and the drain of the second NMOS transistor are connected as the output of the inverter; the drain of the first NMOS transistor is connected to a power supply, and the source of the second NMOS transistor is connected to a ground; In the transformer type differential series resonant cavity, the inductor L S1 and inductor L S2 One end is connected to the external bias voltage V B connected, bias voltage V B Through the inductor L S1 and inductor L S2 Arrives at the input terminal of the inverter and serves as the bias voltage of the inverter.

11. A chip, characterized in that: It comprises a differential series resonant oscillator as described in any one of claims 7 to 10.

12. A communication device, characterized in that: The communication device comprises the chip according to claim 11.

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