Process optimization method and system for flexible circuit board production line

Abstract

The present invention relates to the technical field of flexible circuit board production, and in particular to a process optimization method and system for a flexible circuit board production line. The method comprises the following steps: obtaining material characteristic data of the flexible circuit board; performing a circuit board thermal curing action according to the material characteristic data of the flexible circuit board, and performing a thermal stress intensity assessment to generate stress hotspot distribution data; performing real-time curing temperature control feedback adjustment according to the stress hotspot distribution data to obtain circuit board curing effect assessment data; detecting the real-time surface wettability index of the flexible circuit board to be processed in front of the bonding station; and performing bonding process parameter compensation based on the circuit board curing effect assessment data and the real-time surface wettability index to achieve curing-bonding process optimization of the flexible circuit board production line. The present invention realizes intelligent optimization of the curing-bonding process of the flexible circuit board production line, and effectively solves the quality problems of uneven stress and excessive deformation in the thermal curing-bonding process.

Description

Technical Field

[0001] The present invention relates to the technical field of flexible circuit board production, and in particular to a process optimization method and system for a flexible circuit board production line. Background Art

[0002] In the manufacturing process of flexible circuit boards (FPCBs), curing and laminating processes are critical to ensuring product performance and quality. These processes typically operate at high temperatures, requiring strict temperature control to ensure adequate curing and adhesion of substrates such as polyimide (PI) and polyethylene terephthalate (PET), as well as various adhesives. However, in traditional FPCB production lines, temperature control systems typically utilize fixed parameters, unable to dynamically adjust to the characteristics of different batches of materials, environmental changes, and transient process requirements. This static temperature control solution often results in uneven temperature distribution when processing FPCBs of varying thicknesses and sizes. This leads to uneven thermal expansion and contraction within the material, which in turn causes microscopic structural deformation, leading to a range of quality issues such as wire breakage, interlayer delamination, and poor contact within the board, severely impacting product reliability and service life. In particular, in the production of large-scale, multi-layer FPCBs, mismatched thermal expansion coefficients can easily generate varying degrees of thermal stress during heating and cooling, leading to microscopic deformation. This deformation can cause interlayer stress accumulation, ultimately leading to defects such as interlayer delamination, warping, or microcracks. Summary of the Invention

[0003] Based on this, the present invention provides a process optimization method and system for a flexible circuit board production line to solve at least one of the above technical problems.

[0004] To achieve the above object, a process optimization method for a flexible circuit board production line comprises the following steps:

[0005] Step S1: Acquire material characteristic data of the flexible circuit board; perform thermal curing of the circuit board according to the material characteristic data of the flexible circuit board, and collect real-time temperature distribution data of the board surface during the curing process;

[0006] Step S2: Analyze the planar thermal force based on the board surface temperature distribution data, and then construct the three-dimensional thermal field of the circuit board; evaluate the thermal stress intensity of the three-dimensional thermal field of the circuit board using the flexible circuit board material property data to generate stress hotspot distribution data; divide the stress area based on the stress hotspot distribution data, and perform micro-area thermal balance strategy processing to obtain micro-area thermal balance control data;

[0007] Step S3: Performing real-time curing temperature control feedback adjustment based on the micro-area thermal balance control data, and evaluating the impact of curing deformation after the flexible circuit board curing process is completed to obtain circuit board curing effect evaluation data;

[0008] Step S4: Detecting the real-time surface wettability index of the flexible circuit board to be processed in front of the bonding station; compensating the bonding process parameters based on the circuit board curing effect evaluation data and the real-time surface wettability index to achieve optimization of the curing-bonding process of the flexible circuit board production line.

[0009] Preferably, the present invention further provides a process optimization system for a flexible circuit board production line, which executes the process optimization method for a flexible circuit board production line as described above. The process optimization system for a flexible circuit board production line includes:

[0010] Thermal curing data acquisition module, used to obtain the material characteristic data of the flexible circuit board; perform thermal curing of the circuit board according to the material characteristic data of the flexible circuit board, and collect the temperature distribution data of the board surface during the curing process in real time;

[0011] The thermal stress balance module is used to analyze planar thermal forces based on the board surface temperature distribution data and then construct the PCB's three-dimensional thermal field. The module uses the flexible PCB material property data to evaluate the thermal stress intensity of the PCB's three-dimensional thermal field and generate stress hotspot distribution data. Based on the stress hotspot distribution data, the module divides stress regions and applies micro-area thermal balance strategy processing to obtain micro-area thermal balance control data.

[0012] The curing control and evaluation module is used to perform real-time curing temperature control feedback adjustment based on the micro-area thermal balance control data. After the flexible circuit board curing process is completed, the curing deformation impact is evaluated to obtain circuit board curing effect evaluation data;

[0013] The lamination process optimization module is used to detect the real-time surface wettability index of the flexible circuit board to be processed in front of the lamination station; based on the circuit board curing effect evaluation data and the real-time surface wettability index, the lamination process parameters are compensated to achieve the curing-lamination process optimization of the flexible circuit board production line.

[0014] The present invention first acquires the characteristic data of the flexible circuit board material and combines it with precise real-time temperature distribution data. This solution can dynamically adjust the thermal field distribution during the curing process based on the material characteristics of different batches, thicknesses, and sizes. This adaptive heat source control based on material characteristic parameters effectively avoids problems such as insufficient or excessive curing and uneven heating caused by material differences and environmental changes. By analyzing the board surface temperature distribution in real time during the curing process, a three-dimensional thermal field model is constructed. Combined with material thermal performance parameters, the thermal stress intensity and its spatial distribution are quantitatively assessed, achieving accurate identification of potential stress hotspots. Furthermore, by dividing the stress area and implementing a micro-area thermal balance strategy, each micro-area can be personalized to achieve temperature control based on the actual thermal stress state during the curing process. Compared with traditional overall heating and passive compensation methods, this micro-area thermal balance control significantly improves the spatial resolution and response speed of temperature control, effectively suppresses defects such as microstructural deformation and interlayer delamination caused by local overheating or temperature differences, and significantly improves the yield and consistency of large-scale, multi-layer flexible circuit boards. Three-dimensional thermal field construction and thermal stress intensity assessment technologies enable accurate prediction of thermal stress distribution within the material. Micro-area thermal balance strategies effectively eliminate local stress concentration caused by uneven thermal distribution, fundamentally resolving the problem of microstructural deformation due to temperature imbalance. A real-time curing temperature control feedback adjustment system ensures the stability of the entire curing process, reduces interlayer stress accumulation caused by thermal expansion coefficient mismatch, and effectively prevents quality defects such as wire breakage and interlayer delamination within the circuit board. Surface wettability index detection and bonding process parameter compensation mechanisms further optimize subsequent bonding processes, ensuring close bonding between material interfaces and improving the structural integrity of multilayer flexible circuit boards. This "curing-bonding" full-process intelligent optimization solution significantly extends the product life, improves the production yield of large-size, multi-layer flexible display circuit boards, reduces material waste and rework costs, and enhances the product's adaptability and stability in complex application environments. Therefore, the present invention provides a process optimization method for a flexible circuit board production line by obtaining flexible circuit board material property data, dynamically controlling the heat source to perform thermal curing actions, and performing thermal stress intensity assessment in combination with the material property data. Micro-area thermal balance strategy processing is performed based on stress hotspot distribution data, and real-time curing temperature control feedback adjustment and bonding process parameter compensation are performed based on the micro-area thermal balance control data, thereby achieving curing-bonding process optimization of the flexible circuit board production line, significantly improving the production efficiency and product quality of the flexible circuit board, reducing production costs and energy consumption, and enhancing product reliability and service life. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic flow chart of the steps of a process optimization method for a flexible circuit board production line according to the present invention;

[0016] Figure 2 for Figure 1 Detailed implementation steps of step S3 in FIG.

[0017] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings and in conjunction with the embodiments. DETAILED DESCRIPTION

[0018] The following is a clear and complete description of the technical method of the present invention in conjunction with the accompanying drawings. It is obvious that the embodiments described are part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts are within the scope of protection of the present invention.

[0019] In addition, the accompanying drawings are merely schematic illustrations of the present invention and are not necessarily drawn to scale. Identical reference numerals in the figures denote identical or similar parts, and thus repetitive descriptions thereof will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities that do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor and / or microcontroller approaches.

[0020] It should be understood that although the terms "first," "second," and the like may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used solely to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of the exemplary embodiments. The term "and / or" as used herein includes any and all combinations of one or more of the listed associated items.

[0021] To achieve this, please refer to Figures 1 to 2 The present invention provides a process optimization method for a flexible circuit board production line, comprising the following steps:

[0022] Step S1: Acquire material characteristic data of the flexible circuit board; perform thermal curing of the circuit board according to the material characteristic data of the flexible circuit board, and collect real-time temperature distribution data of the board surface during the curing process;

[0023] Step S2: Analyze the planar thermal force based on the board surface temperature distribution data, and then construct the three-dimensional thermal field of the circuit board; evaluate the thermal stress intensity of the three-dimensional thermal field of the circuit board using the flexible circuit board material property data to generate stress hotspot distribution data; divide the stress area based on the stress hotspot distribution data, and perform micro-area thermal balance strategy processing to obtain micro-area thermal balance control data;

[0024] Step S3: Performing real-time curing temperature control feedback adjustment based on the micro-area thermal balance control data, and evaluating the impact of curing deformation after the flexible circuit board curing process is completed to obtain circuit board curing effect evaluation data;

[0025] Step S4: Detecting the real-time surface wettability index of the flexible circuit board to be processed in front of the bonding station; compensating the bonding process parameters based on the circuit board curing effect evaluation data and the real-time surface wettability index to achieve optimization of the curing-bonding process of the flexible circuit board production line.

[0026] In an embodiment of the present invention, the process optimization method for a flexible circuit board production line includes the following steps:

[0027] Step S1: Acquire material characteristic data of the flexible circuit board; perform thermal curing of the circuit board according to the material characteristic data of the flexible circuit board, and collect real-time temperature distribution data of the board surface during the curing process;

[0028] In one embodiment of the present invention, for example, using a circuit board connected to a flexible display screen in a smartwatch as an example, thermal properties of the circuit board material were tested using a differential scanning calorimeter. The polyimide substrate's glass transition temperature was measured to be 267°C, its coefficient of thermal expansion was 20×10⁻⁶ per degree Celsius, and its thermal conductivity was 0.12 watts per meter Kelvin. Based on these measured material property data, a curing process temperature profile was established: increasing the temperature from room temperature to 120°C at a rate of 3°C per second, holding for 3 minutes to remove moisture, then increasing the temperature at a rate of 2°C per second to 210°C, holding for 15 minutes for curing. The heat source employed an infrared heating array consisting of 16×16 heat source units arranged in a matrix, each measuring 10 mm x 10 mm. The distance between the heat source and the circuit board was precisely controlled to 15 mm. Sixty-four K-type thermocouples were placed on the circuit board surface in a hexagonal honeycomb pattern, with a spacing of 8 mm and a sampling frequency of 2 Hz. Twelve microthermistors were embedded in the middle layer of the substrate to measure internal temperature distribution. Real-time data is converted into digital signals via a 24-bit analog-to-digital converter and recorded as a three-dimensional temperature matrix consisting of a spatial coordinate, a timestamp, and a temperature value. Once the PCB surface temperature uniformity reaches ±3°C and remains at 210°C for 15 minutes, the system controls the heat source to cool at a rate of 2°C per second, completing the thermal curing process.

[0029] Step S2: Analyze the planar thermal force based on the board surface temperature distribution data, and then construct the three-dimensional thermal field of the circuit board; evaluate the thermal stress intensity of the three-dimensional thermal field of the circuit board using the flexible circuit board material property data to generate stress hotspot distribution data; divide the stress area based on the stress hotspot distribution data, and perform micro-area thermal balance strategy processing to obtain micro-area thermal balance control data;

[0030] In this embodiment of the present invention, based on the collected temperature distribution data, the temperature gradient vector field was calculated using the central difference method. The system identified a temperature gradient of 4.3°C / mm in the connector area, exceeding the safety threshold of 3.5°C / mm. The system further calculated the vertical temperature gradient rate from the temperature data at three depth levels and found that the vertical temperature gradient in the display signal transmission area reached 5.8°C / mm, significantly exceeding the average of 2.1°C / mm. The system then constructed a three-dimensional thermal field model and calculated the stress distribution using finite element analysis. Five thermal stress concentration points were identified: stress values reached 105 MPa in the area around the connector pads, 93 MPa in the bend area of the display signal lines, and 87 MPa in the power distribution area. The system then divided the circuit board into three stress zones: areas with stress exceeding 85 MPa were marked as thermal stress concentration zones, areas with stress between 25 and 85 MPa were marked as transition zones, and areas with stress below 25 MPa were marked as low stress zones. The thermal stress concentration zones were meshed, with the grid spacing reduced from 0.5 mm to 0.05 mm. System calculations found that the thermal stress concentration area highly overlaps with the area with excessive cooling rate. Therefore, a micro-area thermal balance strategy was designed: the cooling rate in the thermal stress concentration area was reduced to 1.2°C / second, a buffer cooling rate of 2.0°C / second was set in the surrounding transition area, and the remaining areas maintained a standard cooling rate of 2.5°C / second. At the same time, a constant temperature holding stage of 5 seconds was added to the connector area to relieve internal stress accumulation.

[0031] Step S3: Performing real-time curing temperature control feedback adjustment based on the micro-area thermal balance control data, and evaluating the impact of curing deformation after the flexible circuit board curing process is completed to obtain circuit board curing effect evaluation data;

[0032] In this embodiment of the present invention, during the curing process, the system uses pulse-width modulation technology to control the heat source power output. The connector area uses a 45 Hz pulse frequency with a 65% duty cycle; the display signal line area uses a 52 Hz pulse frequency with a 58% duty cycle; and the power distribution area uses a 48 Hz pulse frequency with a 62% duty cycle. Real-time temperature feedback control utilizes a three-layer cascaded PID algorithm. When a temperature fluctuation exceeding 1.5°C is detected in the connector area, the system immediately increases the sampling frequency to 5 Hz and adjusts the PID parameters to P = 2.3, I = 0.8, and D = 0.4, achieving rapid response and suppressing temperature fluctuations. After the curing process is completed, the circuit board is transferred to an optical inspection station, where surface deformation is scanned using a Zeiss 3D scanner with a resolution of 0.01 mm. The scan results show that the maximum deformation in the connector area is 0.078 mm, significantly lower than the 0.127 mm before optimization. Deformation uniformity in the signal line area has improved by 42%, and overall board warpage has been reduced from 0.23 mm to 0.12 mm. The system calculates the spatial correlation between deformation and functional areas, generating a curing effect score of 87 points (out of 100 points), including 35 points (out of 40 points) for deformation, 32 points (out of 35 points) for uniformity, and 20 points (out of 25 points) for protection of key functional areas.

[0033] Step S4: Detecting the real-time surface wettability index of the flexible circuit board to be processed in front of the bonding station; compensating the bonding process parameters based on the circuit board curing effect evaluation data and the real-time surface wettability index to achieve optimization of the curing-bonding process of the flexible circuit board production line.

[0034] In an embodiment of the present invention, the system activates a humidity sensor array to detect surface wettability. Five Rotronic digital humidity sensors are used for detection, located at the center and four corners of the circuit board. The current relative humidity is measured to be 43.2%, which is lower than the standard condition of 45%. The surface wettability index is calculated to be 87. The system also extracts key area information from the curing effect evaluation data and finds that the residual stress in the connector area is 72 MPa, requiring targeted adjustment of the bonding parameters. The system adjusts the standard bonding temperature from 165°C to 162°C. The calculation formula is determined based on the wettability index and stress distribution. The bonding pressure is adjusted from the baseline value of 0.50 MPa to a regional differentiated pressure distribution: the pressure in the connector area is increased to 0.54 MPa, the pressure in the signal line area is set to 0.51 MPa, and the pressure in the remaining areas is reduced to 0.48 MPa, forming a smooth transition zone. The cooling rate is adjusted from 3.0°C / minute to 2.7°C / minute to reduce the accumulation of thermal stress during the cooling process. The bonding process is divided into four stages: a preheating stage in which the temperature is raised from ambient temperature to 50°C in 30 seconds; a heating stage in which the temperature is raised from 50°C to 162°C in 120 seconds; a bonding stage in which the temperature is kept constant for 300 seconds and the pressure distribution is followed; and a cooling stage in which the temperature is lowered to 85°C at a rate of 2.7°C / minute in 240 seconds. The system monitors the force distribution in real time through a 16-channel pressure sensor, and immediately triggers the correction mechanism when a pressure deviation exceeding 3% is detected. After the process is completed, the system re-scans the microscopic deformation of the finished circuit board and measures that the interface delamination risk index in the connector area has been reduced to 1.8, which is lower than the warning value of 2.5. The thermal curing deformation compensation rate has reached 83%, proving that the curing-bonding collaborative optimization process has effectively improved the production quality of flexible circuit boards for smart watches.

[0035] Preferably, performing the circuit board thermal curing action according to the flexible circuit board material characteristic data in step S1 includes:

[0036] Extract the thermal conductivity value, thermal expansion coefficient value, and phase change latent heat value of the substrate as material thermal characteristic data based on the material characteristic data of the flexible circuit board;

[0037] Set the target curing temperature and curing time as curing process specification data based on the material thermal property data;

[0038] According to the curing process specification data, the pulse heating mode is set and the heat source power timing is processed to obtain the initial curing parameters;

[0039] Initialize the production unit based on the initial curing parameters, then transport and fix the flexible circuit board to be processed to the curing station, receive the trigger signal of the flexible circuit board entering the curing station, and obtain the circuit board arrival signal data;

[0040] Control the positioning of the heat source array according to the circuit board arrival signal data, and obtain the heat source array positioning completion data;

[0041] Based on the positioning of the heat source array, the data drives the heat source to perform the circuit board thermal curing action, and collects the board surface temperature distribution data during the curing process in real time.

[0042] In the embodiment of the present invention, before heat curing, a differential scanning calorimeter is used to test the flexible circuit board sample. The test temperature range is set to 25°C to 200°C, and the heating rate is 5°C / minute. The heat flow change curve is recorded by the measuring instrument, and the thermal conductivity λ value of the material is calculated from it. The typical value is 0.2-0.4W / (m·K). The dimensional change rate of the material in the temperature range of 30°C to 180°C is measured using a thermomechanical analyzer. According to the formula Calculate the thermal expansion coefficient value, where ΔL is the length change, L0 is the initial length, and ΔT is the temperature change. The typical value is 18-25ppm / °C. Use calorimetry to measure the heat released during the curing process and calculate the latent heat of phase change H. The latent heat of phase change of a typical polyimide substrate is 40-60J / g. These three parameters constitute the material thermal characteristic data set. Based on the extracted thermal characteristic data, a thermodynamic model is used to determine the target curing temperature. The calculation formula is: , where Tg is the glass transition temperature of the material and Cp is the specific heat capacity of the material. For polyimide substrates, the temperature is usually set in the range of 175℃ to 185℃. The curing time is calculated by the gelation kinetics equation Calculation, A is the frequency factor, Ea is the activation energy, R is the gas constant, and T is the absolute temperature. The lower the thermal conductivity λ value, the longer the required curing time; the higher the thermal expansion coefficient α value, the lower the heating rate should be to prevent warping. Based on the calculation results, the target curing temperature is set to 180°C and the curing time is 90 minutes. According to the curing process specification data, the pulse heating mode is designed using the numerical simulation method. The entire curing process is divided into three stages: preheating stage (25°C to 120°C), the temperature is maintained at a growth rate of 2°C / minute; medium temperature stage (120°C to 160°C), the growth rate is 1°C / minute; final curing stage (160°C to 180°C), the growth rate is 0.5°C / minute. The heat source power timing adopts pulse modulation, and the pulse duty cycle varies with the temperature stage: 70% in the preheating stage, 50% in the medium temperature stage, and 30% in the final curing stage. The pulse frequency is set to 5Hz. According to the heat conduction equation ,in The heat source power density required for each stage is calculated, where θ is density, c is specific heat capacity, T is temperature, t is time, and q is the heat source term. The calculated results are converted into heat source control parameters, including current intensity, pulse width, and frequency, to form the initial curing parameter data set. Based on the initial curing parameters, the production unit initialization program is initiated. The control system sends parameter configuration commands to the heat source array, setting the temperature controller PID parameters to proportional coefficient Kp = 50, integral coefficient Ki = 0.5, and differential coefficient Kd = 8. The vacuum adsorption system is initialized, with the adsorption pressure set to -85 kPa. Subsequently, a conveyor belt transports the flexible printed circuit board to be processed to the curing station at a speed of 0.2 m / s. Once it reaches the predetermined position, the edge positioning pins extend, precisely positioning the board with an accuracy of ±0.05 mm. The vacuum adsorption system is activated, establishing a stable adsorption force within 1.5 seconds to secure the board. Photoelectric sensors detect the board's position. When all four corner position sensors detect the board's presence and the vacuum pressure reaches the set value, the system generates a board-in-place signal, which contains the board's ID, position coordinates, and a timestamp. Based on the circuit board's position signal, the heat source array control system initiates a precise positioning procedure. The heat source array consists of ceramic heating elements arranged in a 10×12 matrix, each with a power output of 200W and dimensions of 25mm×25mm. A servo motor drives the XY motion stage, moving the heat source array directly above the circuit board. Displacement sensors provide real-time feedback on the heat source array's position. The control system calculates the heat source coverage position based on the circuit board's dimensional data, aligning the center of the heat source array with the center of the circuit board. Positioning accuracy in the XY directions is ±0.1mm, and height adjustment accuracy in the Z direction is ±0.05mm. After positioning is complete, the displacement sensors confirm that the distance between the heat source array and the circuit board is 25mm, and infrared sensors verify that the alignment of the heat source elements with the circuit board edge is greater than 98%. The system then generates heat source array positioning completion data, which includes the heat source position coordinates, alignment confirmation status, and a ready flag. Upon receiving the heat source array positioning completion data, the system enters the thermal curing execution phase. The controller drives the heat source array according to the initial curing parameters and initiates a pulsed temperature ramp. The first stage involves heating from 25°C to 120°C at a rate of 2°C / minute for 47.5 minutes; the second stage, from 120°C to 160°C at a rate of 1°C / minute for 40 minutes; the third stage, from 160°C to 180°C at a rate of 0.5°C / minute for 40 minutes; and the final stage, a constant temperature stage, held at 180°C for 30 minutes. Throughout the entire curing process, an infrared thermal imager collects real-time temperature distribution data on the board surface with a sampling frequency of 10Hz, a temperature resolution of 0.1°C, and a spatial resolution of 2mm. The system calculates temperature gradients and uniformity based on the camera data. If a local temperature deviation exceeding ±3°C is detected, the system automatically adjusts the heat source power in the corresponding area to ensure temperature uniformity across the entire circuit board.

[0043] Preferably, the real-time collection of the board surface temperature distribution data during the curing process in step S1 includes:

[0044] A thermocouple array is placed on the surface of the flexible circuit boards on the production line in a hexagonal honeycomb layout, with a spacing of 8mm. Infrared sensors are added as vertical supplementary collection points based on the substrate thickness specifications in the flexible circuit board material characteristic data to obtain an array of micro-area temperature collection points. The vertical supplementary collection points can collect the temperatures of the middle and bottom layers of the flexible circuit boards.

[0045] The surface temperature of the flexible circuit board is collected every 2 seconds using a micro-area temperature collection point array to obtain the original value of the temperature array;

[0046] The temperature difference between adjacent temperature measurement points is calculated based on the original value of the temperature matrix. The sampling frequency is increased to 0.2 seconds / time in locations where the temperature difference exceeds 1.2°C, and reduced to 3 seconds / time in areas where the temperature difference is less than 0.5°C, in order to obtain the frequency control parameters.

[0047] Based on the frequency control parameters, the acquisition frequency of the micro-area temperature acquisition point array is adaptively adjusted, and then multi-level temperature differentiation acquisition is performed to obtain multi-level temperature data of the circuit board;

[0048] The flexible circuit board is divided into temperature transition zones of the edge area and the center area through the multi-level temperature data of the circuit board, and then the partitioned temperature data is interpolated to generate the board surface temperature distribution data; among them, the edge area is interpolated at a density of 0.5mm / point, and the center area is interpolated at a density of 0.2mm / point.

[0049] In this embodiment of the present invention, a sliding window method is used to analyze temperature fluctuations at all measurement points based on the board surface temperature distribution data. First, the entire circuit board is divided into 5mm×5mm grid cells, each containing 25 temperature monitoring points. For each grid cell, 30 seconds of continuous temperature data is collected, totaling 300 data points (sampling frequency 10Hz), and the temperature standard deviation is calculated. ,in is the temperature value at each time point, Tavg is the average temperature, and n is the number of samples. The temperature fluctuation threshold of 0.3°C is determined by statistical analysis of the temperature fluctuations during the curing process of 10 batches of qualified products, and the upper limit of the 95% confidence interval is taken. When the temperature standard deviation σ calculated for a certain grid unit is greater than 0.3°C, the area is marked as a hot spot area. Then record the temperature peak Tmax (the highest temperature in the area), area range S (the total area calculated by merging adjacent hot spot grid units), and fluctuation frequency f (the main frequency of temperature fluctuations analyzed by fast Fourier transform) of the hot spot area. The characteristic data of all hot spot areas are stored in the hot spot characteristic data table, which includes four key parameters: coordinates, temperature peak, area range, and fluctuation frequency. Based on the characteristic data of the hot spot area, a temperature gradient vector field of the entire plate is constructed. The temperature gradient at each grid point (i, j) is calculated using the second-order central difference method, and the gradient in the x direction is , the y-direction gradient is , where T(i, j) represents the temperature value at coordinate (i, j), is the grid spacing, which is 5 mm. The temperature gradient vector G(i, j) is composed of the gradients in the x and y directions, and its size is |G(i, j)|= , direction angle . For hot spots, an encrypted grid is used for detailed calculations, and the grid spacing is reduced to 1mm. The temperature gradient vector field is presented in the form of a thermal map, the gradient size is color-coded (blue represents low gradient, red represents high gradient), and the gradient direction is represented by an arrow. The calculation results are stored as a plane thermal data matrix, which contains four sets of parameters: the position coordinates of each grid point, the temperature value, the gradient size and the direction. A multi-layer infrared temperature sensor array is used to measure the temperature distribution in the z-axis depth direction of the flexible circuit board. The three-layer depth is specifically defined as: surface layer (0mm from the top), middle layer (0.1mm from the top, that is, half the thickness of the circuit board), and bottom layer (0.2mm from the top, that is, the bottom surface of the circuit board). The surface layer temperature is directly obtained by an infrared thermal imager, the middle layer temperature is obtained by measuring 10 micro-thermocouples buried in the sample plate, and the bottom layer temperature is obtained by measuring the lower infrared array sensor. The measurement accuracy is controlled at ±0.1°C. The vertical temperature change rate is measured by the formula Calculate, where Ttop(i, j) is the surface layer temperature, Tbottom(i, j) is the bottom layer temperature, and d is the thickness of the circuit board (0.2mm). At the same time, calculate the difference between the middle layer temperature and the surface layer and bottom layer temperature, which are recorded as and The vertical temperature change rate data is recorded in the form of a heat map, and the high change rate area (greater than 5℃ / mm) is marked as the focus area. Based on the correlation analysis of the vertical temperature change rate and the characteristic data of the hot spot area, the heat conduction obstruction area is identified. First, the average value Gz_avg and standard deviation Gz_std of the vertical temperature change rate Gz in each hot spot area are calculated. Define the heat transfer resistance coefficient , when k>2.0, it indicates that the vertical heat conduction non-uniformity in the hot spot area is significant. Then focus on analyzing the hot spot area that meets the k>2.0 condition and calculate the ratio r of ΔTtop-mid to ΔTmid-bottom. When r>3.0 or r<0.33, it is determined to be an unbalanced state between heat transfer layers. For areas that meet both k>2.0 and r abnormality, the point with the largest vertical temperature gradient is extracted as the heat transfer block point, and its three-dimensional coordinates (x, y, z) are recorded. The z coordinate determines the depth position of the blockage by comparing the temperature difference of the three layers. Output the heat transfer block point coordinate set, which contains the location information of each block point and its k value, r value and vertical temperature gradient value. Combine the heat transfer block point coordinates with the plane thermal data to construct a complete three-dimensional thermal field of the circuit board. First, establish a three-dimensional grid model with a grid spacing of 1mm in the xy plane and 10 layers in the z direction with a spacing of 0.02mm between each layer. For non-blocking areas, the heat diffusion equation is used. The simulation is performed, where α is the thermal diffusivity, and the thermal conductivity of the material is Divide by density and specific heat capacity Calculated For the heat transfer stagnation point area, the thermal resistance coefficient is introduced , the modified heat diffusion equation is Thermal resistance coefficient According to the heat transfer resistance point Value and The value is determined, specifically The finite difference method is used to solve the modified heat diffusion equation with a time step of 0.1 seconds. The iterative calculation is repeated for 100 time steps until the three-dimensional temperature field distribution is stable. The final output of the three-dimensional thermal field data is a four-dimensional matrix , contains the temperature value of each spatial point on the circuit board at different times.

[0050] Preferably, in step S2, analyzing the plane thermal force according to the board surface temperature distribution data and then constructing the three-dimensional thermal field of the circuit board includes:

[0051] The panel temperature distribution data is used to mark hotspots where temperature fluctuations are frequent using a preset temperature fluctuation threshold. When the standard deviation of temperature fluctuations in a region exceeds the preset temperature fluctuation threshold, the region is marked as a hotspot, and the temperature peak value, area range, and fluctuation frequency of the region are recorded as the hotspot feature data. The temperature fluctuation threshold is set to 0.3°C.

[0052] Based on the characteristic data of the hot spot area, a temperature gradient vector field is established on the xy plane. The temperature change rate of each point along the x-axis and y-axis is calculated and synthesized into a direction vector. The magnitude of the vector represents the temperature change rate, and the direction of the vector points to the direction of temperature increase, thus obtaining the plane thermal data.

[0053] Based on the board surface temperature distribution data, the temperature of the three layers of z-axis depth is extracted and compared, and then the vertical temperature change rate is calculated; the three layers of z-axis depth are specifically the surface, middle layer and bottom layer of the flexible circuit board;

[0054] By correlating the vertical temperature change rate and the characteristic data of the hot spot area, the area where heat conduction is blocked in the vertical direction is identified, and the coordinates of the heat transfer blockage point are obtained;

[0055] The vertical heat diffusion analysis of the plane thermal data is performed through the coordinates of the heat transfer blockage points, and then the three-dimensional thermal field of the circuit board is constructed.

[0056] In the embodiment of the present invention, during the thermal curing process of the circuit board, the board surface temperature distribution data is collected by a 10×10 dot matrix infrared thermal imager, and the sampling frequency is set to 5Hz. The temperature fluctuation threshold of 0.3°C is determined by preliminary experimental data. The specific method is: 10 batches of high-quality circuit boards are thermally cured under standard process conditions, and the temperature fluctuation standard deviation of each measuring point in each batch is recorded. The 95% percentile value of the statistical fluctuation standard deviation is 0.28°C, which is rounded to 0.3°C. For the temperature data collected in real time, the sliding time window method is used for processing. The window length is 20 seconds, and the calculation formula is σ= , where Ti is the temperature value at each moment in the window, Tm is the average temperature in the window, and n is the number of data points in the window. When the calculated σ value of a certain area exceeds 0.3℃, it is marked as a hot spot area, and the temperature peak Tpeak (the highest temperature point value in the area), area range S (area of continuous high temperature area, unit mm²), and fluctuation frequency f (main frequency calculated by fast Fourier transform, unit Hz) of the area are recorded at the same time. The characteristic data of all hot spots are stored as a quaternion (P, Tpeak, S, f), where P is the coordinate of the hot spot center. The temperature gradient vector field is constructed based on the characteristic data of the hot spot area, and the plane of the circuit board is divided into 2mm×2mm grid units. For each grid point (i, j), the temperature gradient vector is calculated using the central difference method, and the x-direction gradient calculation formula is: , the y-direction gradient calculation formula is , where T(i, j) is the temperature value at the coordinate point (i, j), Δx and Δy are the grid spacing of 2mm. The gradient vectors in the two directions are combined into the temperature gradient vector , vector modulus| Indicates the rate of temperature change, vector direction Pointing to the direction of temperature increase. For each hot spot area, the grid is refined to 0.5mm×0.5mm to improve the accuracy. The calculation results form a plane thermal data matrix. Each point contains four parameters: position coordinates, temperature value, gradient size and gradient direction. The data storage format is . The three-layer depth temperature extraction of the z-axis adopts multi-layer temperature measurement technology. The temperature of the surface layer (z=0mm) is directly measured by a high-precision infrared thermal imager with a spatial resolution of 0.5mm×0.5mm and a temperature measurement accuracy of ±0.1℃; the temperature of the middle layer (z=0.1mm, that is, half the thickness of the circuit board) is measured by an array of 20 miniature thermocouples pre-buried in the sample board. The thermocouple diameter is 0.05mm and the temperature measurement accuracy is ±0.05℃; the temperature of the bottom layer (z=0.2mm, the bottom surface of the circuit board) is measured by a downward-looking infrared sensor array located below the circuit board, corresponding to the position of the upper thermal imager. The acquisition frequency is uniformly set to 5Hz to ensure the time synchronization of the three layers of data. The vertical temperature change rate is calculated by the two-point method, and the calculation formula is , where Tsurf is the surface temperature, Tbot is the bottom temperature, and d is the plate thickness 0.2mm. At the same time, calculate the temperature stratification ratio , used to evaluate the uniformity of temperature distribution in the vertical direction. The ideal value is 1.0, indicating linear distribution. Heat transfer stagnation point identification first calculates the average value μG and standard deviation σG of the vertical temperature change rate Gz of the entire plate. Define the heat transfer anomaly index When |TAI|>2.5, the point is marked as a potential heat transfer anomaly point. Secondly, for each hot spot area, the vertical temperature change rate mean Gz_local and temperature stratification ratio Rt_local in the area are calculated. Define the heat transfer retardation judgment condition: ① (Vertical temperature gradient is significantly higher than the average);② (The temperature stratification is significantly uneven); ③ The area of the hot spot area S>25mm² (excluding noise points). When all three conditions are met at the same time, it is confirmed as a heat transfer blockage area. In each heat transfer blockage area, the peak point of the vertical temperature change rate is extracted as the heat transfer blockage point, and its three-dimensional coordinates (x, y, z) are recorded. The z value is determined according to the temperature stratification ratio Rt: when Rt>1.8, z=0.05mm (close to the surface); when Rt<0.2, z=0.15mm (close to the bottom layer); in other cases, z=0.1mm (middle layer). The output heat transfer blockage point coordinate set is The 3D thermal field model of the circuit board is constructed based on the coordinates of the heat transfer blockage point and the plane thermal data. First, a 3D grid is established with a resolution of 1mm×1mm in the xy plane and 10 layers in the z direction, each layer with a thickness of 0.02mm. For the non-blocking area, the 3D heat conduction equation is used. Calculation is performed, where α is the thermal diffusivity, which is equal to the thermal conductivity λ divided by the product of density ρ and specific heat capacity cp. For the area where the heat transfer stagnation point is located, the local thermal resistance model is introduced and the modified heat conduction equation is: , where β is the vertical heat transfer attenuation coefficient, which is determined according to the TAI value at the heat transfer retardation point: The modified heat conduction equation is solved by alternating direction implicit finite difference method with a time step of 0.1 seconds and a space step of 1 mm in the xy plane and 0.02 mm in the z direction. After 50 iterative calculations, the steady-state three-dimensional thermal field distribution is obtained. The calculation results are stored in the form of three-dimensional voxel data. Each voxel contains position coordinates and temperature values, forming a complete three-dimensional thermal field model of the circuit board.

[0057] Preferably, in step S2, evaluating the thermal stress intensity of the three-dimensional thermal field of the circuit board using the material characteristic data of the flexible circuit board includes:

[0058] Based on the three-dimensional thermal field of the circuit board, the temperature change rate in the x, y, and z directions of each measurement point is extracted, and the temperature gradient vector is obtained by combining the temperature change rates in the three directions.

[0059] Calculate the modulus of the gradient vector according to the temperature gradient vector to obtain gradient intensity distribution data;

[0060] Based on the gradient intensity distribution data, the points exceeding 3.5°C / mm were marked as thermal gradient critical points;

[0061] The flexible circuit board is partitioned by material type, and the board surface is divided into three categories: ITO conductive layer area, polyimide base layer area, and edge packaging area. The correspondence between the coordinate points in the three-dimensional thermal field of the circuit board and the material type is established to generate circuit board material partition data;

[0062] Based on the material characteristic data of the flexible circuit board, the regional thermal expansion coefficient, material elastic modulus and thermal conductivity coefficient of the circuit board material partition data are mapped to obtain the material thermal characteristic data;

[0063] The thermal stress intensity of the circuit board material partition data is evaluated through the thermal gradient critical point and material thermal property data to generate stress hot spot distribution data.

[0064] In the embodiment of the present invention, based on the three-dimensional thermal field data of the circuit board, the central difference method is used to extract the three-dimensional temperature change rate at each grid point (i, j, k). The calculation formula for the temperature change rate in the x direction is: , where T(i, j, k) represents the temperature value at the coordinate point (i, j, k), Δx is the grid spacing in the x-direction, which is set to 1 mm. Similarly, the temperature change rate in the y-direction is calculated as , Δy is 1mm; the temperature change rate in the z direction is calculated as follows: , Δz is 0.02mm. For the boundary points, the single-side difference method is used for calculation. The temperature change rates in the three directions are combined into a temperature gradient vector , which represents the direction and rate of temperature change at each point in space. The calculation results are stored as a four-dimensional matrix, which contains the spatial coordinates and the corresponding three-dimensional temperature gradient vector components. The gradient intensity distribution data, that is, the modulus of the gradient vector, is calculated based on the temperature gradient vector. The calculation formula is , represents the absolute size of the temperature change per unit distance, and the unit is ℃ / mm. Considering that the grid spacing in the z-axis direction is much smaller than that in the xy plane, the z-direction gradient is normalized and the correction formula is: . Double-precision floating-point numbers are used in the calculation process to ensure accuracy. Based on the calculated gradient intensity data, a gradient intensity thermal map is constructed and drawn, and color coding is used to represent the gradient intensity: 0-1.0℃ / mm is blue, 1.0-2.0℃ / mm is green, 2.0-3.0℃ / mm is yellow, 3.0-3.5℃ / mm is orange, and greater than 3.5℃ / mm is red. The gradient intensity distribution data is stored in the form of a three-dimensional matrix, and each element contains the grid point coordinates and the corresponding gradient intensity value. Based on the gradient intensity distribution data, thermal gradient critical point marking is performed. The threshold is set to 3.5℃ / mm, which is determined based on the thermal stress safety threshold of polyimide material and comes from the material thermal stress test experimental data. All grid points are scanned, and points with gradient intensity values greater than 3.5℃ / mm are marked as thermal gradient critical points, and their three-dimensional coordinates (x, y, z) and gradient intensity value |G| are recorded. Adjacent thermal gradient critical points are clustered, and when the distance between two critical points is less than 2mm, they are considered to be in the same thermal gradient critical area. For each thermal gradient critical region, the area S and average gradient strength value Gavg are calculated, and the maximum gradient strength value Gmax and its position coordinates within the region are recorded. The distribution of thermal gradient critical points is represented as a point cloud, and the percentage P of thermal gradient critical points to all grid points is calculated. This value reflects the degree of thermal gradient risk. The thermal gradient critical point dataset is output, which contains the coordinates of each critical point, the gradient strength value, and the critical region number to which it belongs. The flexible circuit board is partitioned by material type based on the circuit design drawings and material composition data. First, the flexible circuit board CAD design file is imported to extract the material distribution information of each layer. The board surface is divided into three major areas: ITO conductive layer area, polyimide base layer area, and edge packaging area. ITO conductive layer area identification method: extract the conductive layer data of the circuit board, including all conductive circuits and electrodes; polyimide base layer area identification method: extract the base layer data, including non-conductive and non-edge areas; edge packaging area identification method: extract the outer 5mm wide border area, including all sealing and reinforcement structures. Different color codes are used to distinguish the three material areas: the ITO conductive layer is gold, the polyimide base layer is brown, and the edge packaging area is gray. A mapping relationship between the three-dimensional grid point coordinates (x, y, z) and the material type is established to form a circuit board material partition data matrix M (i, j, k), where M = 1 represents the ITO conductive layer, M = 2 represents the polyimide base layer, and M = 3 represents the edge packaging area. Based on the flexible circuit board material partition data, regional thermal characteristic parameter mapping is performed. For each material type, the corresponding thermal expansion coefficient α, elastic modulus E and thermal conductivity coefficient λ values are extracted from the material property database. ITO conductive layer: thermal expansion coefficient , elastic modulus E1=116GPa, thermal conductivity ; Polyimide base layer: thermal expansion coefficient , elastic modulus E2=2.5GPa, thermal conductivity ; Edge packaging area: thermal expansion coefficient α3=16×10^-6 / ℃, elastic modulus E3=4.2GPa, thermal conductivity . Establish three three-dimensional matrices: thermal expansion coefficient matrix A(i, j, k), elastic modulus matrix E(i, j, k) and thermal conductivity matrix L(i, j, k), and assign corresponding material parameters to each grid point according to the material partition data M(i, j, k). For the material junction, the weighted average method is used to calculate the mixing parameters, and the weight is inversely proportional to the distance. Output the material thermal property data set containing coordinates and three material parameters. The thermal stress intensity is evaluated through the thermal gradient critical point and material thermal property data. Use the thermal stress calculation formula , where σ is the thermal stress intensity, E is the elastic modulus, α is the thermal expansion coefficient, |G| is the temperature gradient intensity, and d is the characteristic length (1mm). For each thermal gradient critical point, the corresponding thermal stress intensity value is calculated. When σ>12MPa, it is marked as a stress hotspot. At the same time, considering the material interface factor, when the thermal gradient critical point is located at the junction of different materials, the thermal stress amplification factor is set to 1.5, that is, Calculate the stress severity index for each stress hotspot , where σcritical is the material's fracture stress (120 MPa for ITO, 160 MPa for polyimide, and 85 MPa for packaging materials). Stress hotspots are classified according to their risk level based on the SI value: SI < 0.3 is low risk (green), 0.3 ≤ SI < 0.6 is medium risk (yellow), and SI ≥ 0.6 is high risk (red). A stress hotspot distribution map is generated, annotating each hotspot's coordinates, thermal stress intensity value, and risk level.

[0065] It is particularly important to evaluate the thermal stress intensity of the circuit board material partition data through the thermal gradient critical point and material thermal characteristic data. Specifically:

[0066] The thermal conductivity of the heat flow in each material layer is calculated based on the thermal gradient critical point and material thermal characteristic data of the circuit board material partition data to obtain the partition thermal conductivity;

[0067] Construct the heat flow vector field of the flexible circuit board based on the partition thermal conductivity and temperature gradient vector;

[0068] According to the heat flux vector field, the area with thermal conductivity lower than 0.8 W / m·K is marked as the thermal barrier area;

[0069] Calculate the change of heat flow direction before and after the thermal barrier area to obtain the heat flow deflection angle data;

[0070] The heat flux divergence value of each region is calculated based on the heat flux deflection angle data and the heat flux vector field.

[0071] The points with negative heat flux divergence values and absolute values greater than the set threshold are marked as heat energy concentration areas, and the points with positive heat flux divergence values greater than the set threshold are marked as heat energy divergence areas. The area size and intensity of each area are calculated to obtain potential stress hotspot data;

[0072] The thermal stress intensity of potential stress hotspot data is evaluated based on the material thermal property data to obtain stress hotspot distribution data.

[0073] In the embodiment of the present invention, the thermal conductivity of each area is calculated based on the circuit board material partition data and material thermal characteristic data. For the ITO conductive layer area, the thermal conductivity is the material eigenvalue. ; For the polyimide base layer area, the thermal conductivity is the material intrinsic value ; For the edge packaging area, the thermal conductivity is taken as the material eigenvalue For the critical point region of thermal gradient, considering the effect of temperature on thermal conductivity, the modified formula is adopted Calculate temperature-dependent thermal conductivity, where λ is the intrinsic thermal conductivity of the material, β is the thermal conductivity temperature coefficient (0.001 / °C for ITO, 0.003 / °C for polyimide, and 0.002 / °C for packaging materials), T is the current temperature, and T0 is the reference temperature of 25°C. For material interfaces, the harmonic mean method is used to calculate the equivalent thermal conductivity. , where f1 and f2 are the volume fractions of the two materials. The heat flux vector field is constructed based on the partitioned thermal conductivity and temperature gradient vector. According to Fourier's heat conduction law, the heat flux density vector , where λ is the partition thermal conductivity and ∇T is the temperature gradient vector. For each point (i, j, k) in three-dimensional space, calculate the heat flux density vector component:

[0074] ;

[0075] ;

[0076] ;

[0077] Heat flow vector magnitude , in W / m², represents the rate of heat transfer per unit area. represents the xy plane projection angle, Represents the angle with the z-axis. The heat flux vector field is visualized, with arrows indicating heat flow direction and color depth indicating heat flux magnitude (blue for low heat flux <500 W / m², red for high heat flux >2000 W / m²). A heat flux vector distribution map is generated. Thermal barriers are marked based on the partitioned thermal conductivity data. The thermal conductivity values λ(i, j, k) of all points in space are scanned, and points with a thermal conductivity below 0.8 W / (m·K) are marked as thermal barriers. This threshold of 0.8 W / (m·K) is determined based on thermal theory and experimental verification and represents the critical value at which heat conduction is impeded. Marked points are clustered, and points with a distance of less than 1.5 mm are grouped into the same thermal barrier. The volume V and average thermal conductivity λavg of each thermal barrier are calculated. Analysis focuses on thermal barriers larger than 5 mm², as these areas are more susceptible to thermal stress concentration. Calculate the center position coordinates (xc, yc, zc) and regional shape parameters (major axis a, minor axis b and direction angle φ) of the key thermal barrier areas. Generate a thermal barrier area distribution map, using blue shading to represent the thermal barrier area range, and the color depth represents the thermal conductivity. Output the thermal barrier area characteristic data table, which contains the number, center coordinates, volume, average thermal conductivity and shape parameters of each thermal barrier area. Calculate the change in the flow direction of the heat flow before and after the obstacle in the thermal barrier area, and obtain the heat flow deflection angle data. First, determine the incident boundary and exit boundary of the heat flow through the thermal barrier area. Incident boundary definition method: along the main direction of the heat flow, find the point set on the edge of the thermal barrier area where the heat flow is inward; exit boundary definition method: along the main direction of the heat flow, find the point set on the edge of the thermal barrier area where the heat flow is outward. For each pair of incident point Pin and exit point Pout, calculate the angle between the incident heat flow direction vector qin and the exit heat flow direction vector qout , where qin·qout represents the vector dot product. The heat flux deflection angle ranges from 0° to 180°, and a larger deflection angle indicates that the heat flux is strongly disturbed. The average deflection angle θavg and the maximum deflection angle θmax are calculated for each thermal barrier area. Areas with a deflection angle greater than 45° are marked as high-risk areas. A heat flux deflection angle distribution map is generated, and the deflection angle size is indicated by color coding (green for small deflection <15°, yellow for medium deflection 15°-45°, and red for large deflection >45°). The heat flux divergence value of each area is calculated based on the heat flux vector field. The heat flux divergence is defined as , which represents the rate of heat accumulation or dissipation per unit volume. The heat flux divergence is calculated using the central difference method:

[0078] ;

[0079] The unit is W / m³. Single-sided difference calculation is used for boundary points. A negative heat flux divergence indicates that heat energy is concentrated at that point (heat sink), while a positive value indicates that heat energy is dissipated from that point (heat source). A large absolute value of heat flux divergence indicates a high intensity of heat energy concentration or dissipation. Set the divergence threshold Dth = ±3×10 5W / m³. This threshold, obtained through heat flow simulation and experimental verification, represents the critical point where heat energy distribution becomes significantly uneven. The average divergence value Davg and standard deviation Dstd of the heat energy distribution over the entire panel are calculated. Based on the heat flow divergence value, heat energy concentration and divergence areas are marked and data is calculated. The condition for marking heat energy concentration areas is: div(q) < -3×10 5 W / m³; Heat dissipation zone marking condition: div(q)>3×10 5 W / m³. Cluster the marked points, and classify the points with a distance less than 1mm into the same area. Calculate the area Sc and average divergence intensity of each heat energy concentration area. , the area Sd of each heat energy dissipation zone and the average divergence intensity Focus on areas larger than 2mm² and strength greater than 5×10 5 W / m³ areas, which constitute potential stress hotspots. For each potential stress hotspot, calculate the center position coordinates (x, y, z) and shape parameters (area S, perimeter L and roundness) ). Analyze the spatial relationship between the heat energy concentration area and the divergence area. When the distance between the concentration area and the divergence area is less than 3mm, a heat flow gradient pair is formed. This paired structure is more likely to induce thermal stress. Output the potential stress hotspot data table, including type (concentration type or divergence type), location coordinates, area, intensity and shape parameters. According to the material thermal property data, the thermal stress intensity of the potential stress hotspot data is evaluated. The thermal stress calculation formula is used. , where σ is the thermal stress intensity, E is the elastic modulus, α is the thermal expansion coefficient, and ΔT is the product of the temperature gradient and the characteristic length (take , L is the characteristic length (2 mm), ν is the Poisson's ratio (0.25 for ITO, 0.34 for polyimide, and 0.30 for packaging materials). For the heat energy concentration area, the thermal stress is compressive stress with a negative sign; for the heat energy dissipation area, the thermal stress is tensile stress with a positive sign. The stress enhancement factor is introduced to account for the absolute value of the heat flux divergence and the inhomogeneity of material parameters. , corrected thermal stress calculation: For the stress hot spots at the interface of the materials, the interface effect is taken into account and the interface stress concentration factor Ki=1.8 is introduced to further correct the stress calculation: Compare the calculated stress value with the material's ultimate strength σlim (ITO tensile strength is 120MPa, compressive strength is 850MPa; polyimide tensile strength is 160MPa, compressive strength is 240MPa; packaging material tensile strength is 85MPa, compressive strength is 120MPa), and calculate the safety factor. When SF < 2.0, it is marked as a stress hotspot. Output stress hotspot distribution data, including location coordinates, stress type, stress value, safety factor, and risk level (SF < 1.2 is high risk, 1.2 ≤ SF < 2.0 is medium risk, and SF ≥ 2.0 is low risk).

[0080] Preferably, step S2 includes the following steps:

[0081] The stress area of the flexible circuit board is divided according to the stress hot spot distribution data, and then micro-area adaptive mesh processing is performed to obtain micro-area mesh data; wherein the stress area division includes the thermal stress concentration area and the thermal stress sparse area;

[0082] Evaluate the thermal stress level based on micro-region grid data and assign thermal stress risk area weights;

[0083] Screen the cooling points of the thermal stress points in the micro-grid data, and select the points with a temperature lower than the preset process reference temperature by more than 1°C within 10-30mm around the thermal stress points as candidate cooling points;

[0084] Establish a hot and cold point pairing table based on the thermal stress points and candidate cooling points in the micro-region grid data;

[0085] The heat conduction efficiency is scored for the hot and cold spot pairing table, and weighted hot and cold spot pairings are selected based on the weight values of the thermal stress risk areas to obtain thermal stress point-cold spot pairing data;

[0086] The micro-area thermal balance strategy is processed according to the thermal stress point-cold spot pairing data to obtain the micro-area thermal balance control data.

[0087] In the embodiment of the present invention, stress regions are divided based on stress hotspot distribution data, and a hierarchical clustering algorithm is used to classify stress points on the board surface. The algorithm sets the cluster distance threshold to 5mm. When the distance between stress points is less than 5mm, they are classified into the same cluster. The stress density is calculated for each cluster area. , where Ns is the number of stress points in the region and A is the region area. When ρs > 0.4 points / cm², the region is marked as a region of concentrated thermal stress; when ρs ≤ 0.4 points / cm², it is marked as a region of sparse thermal stress. Micro-region adaptive meshing is then performed, using a high-precision mesh (mesh size 1 mm × 1 mm) for the region of concentrated thermal stress and a standard mesh (mesh size 3 mm × 3 mm) for the region of sparse thermal stress. The mesh refinement algorithm uses a quadtree structure, with progressive refinement within a 2 mm radius around the thermal stress point, ensuring higher computational accuracy in areas with large stress gradients. Each mesh cell is assigned a unique identifier in the form of "XnnnYmmm", where nnn represents the X-direction index and mmm represents the Y-direction index. The output micro-region mesh data contains the location coordinates, dimensions, stress region type, and mesh identifier for each mesh cell. The average thermal stress value σavg, the maximum thermal stress value σmax, and the thermal stress standard deviation σstd are calculated for each mesh cell. The thermal stress scoring formula is defined. , where σref is the reference thermal stress value (taken as 5MPa), σcrit is the critical thermal stress value of the material (120MPa for ITO, 160MPa for polyimide, and 85MPa for packaging material). The thermal stress level is divided according to the SL value: SL<0.3 is low risk (L1), 0.3≤SL<0.6 is medium risk (L2), 0.6≤SL<0.9 is high risk (L3), and SL≥0.9 is dangerous level (L4). A weight value is assigned to each risk level: L1 level weight is 1.0, L2 level weight is 2.5, L3 level weight is 4.0, and L4 level weight is 6.0. Considering the influence of material type, a material risk factor is introduced: ITO area is multiplied by 1.2, polyimide area is multiplied by 1.0, and packaging area is multiplied by 0.8. The final risk area weight value W=basic weight×material risk factor×area factor, area factor , S is the grid cell area. Centered on the thermal stress point, three search loops are set within a range of 10-30mm: inner loop (10-15mm), middle loop (15-22mm), and outer loop (22-30mm). The search step size is 1mm for the inner loop, 1.5mm for the middle loop, and 2mm for the outer loop. The temperature value T(x, y) of each search point is extracted and compared with the process reference temperature Tref, which is determined based on the curing stage: 125°C for the preheating stage, 165°C for the intermediate temperature stage, and 185°C for the final curing stage. The screening conditions are: , that is, the point where the temperature is more than 1°C lower than the process reference temperature. Calculate the temperature difference for the points that meet the conditions And the distance d from the thermal stress point. Comprehensive score , used to evaluate the potential of a point as a cooling point. For each thermal stress point, the top 5 points with the highest scores are retained as candidate cooling points, and their coordinate positions, temperature values, distances, and comprehensive scores are recorded. For each thermal stress point i and its candidate cooling point j, a pairing term (i, j) is created, and the pairing parameters are calculated: straight-line distance dij, angle θij (with reference to the center of the circuit board), temperature difference ΔTij, and material type Mij between the two points. Define the shortest heat transfer path Pij and calculate it using the A* algorithm, taking into account the cost function affected by the material thermal conductivity: , where d is the path element length and λ is the thermal conductivity at that point. The path calculation accuracy is 0.5mm and it is forbidden to cross the board boundary or functional area. The heat transfer time evaluation is calculated for each pair of hot and cold points. , where α is the thermal diffusion coefficient, given by Calculated, ρ is density, cp is specific heat capacity. Output contains all feasible hot and cold point pairing table, each pairing includes thermal stress point ID, cooling point ID, distance, angle, temperature difference, heat transfer path length, heat transfer time and path material information. The hot and cold point pairing table is scored and weighted for thermal conductivity efficiency. The thermal conductivity efficiency score uses a comprehensive formula , where ΔTij is the temperature difference (°C), τij is the heat transfer time (seconds), dij is the linear distance (mm), and λavg is the average thermal conductivity (W / m·K). The score is standardized to a range of 0-100, with 80 or above being a high-quality pairing, 60-80 being a good pairing, 40-60 being an average pairing, and below 40 being an inefficient pairing. A weighted score is then applied based on the thermal stress risk area weight Wi. The higher the weight, the greater the pairing's importance. Pairing conflict resolution rules: A cooling point can serve at most two thermal stress points; high-risk thermal stress points (levels L3 and L4) must be assigned a dedicated cooling point; when a cooling point is contested by multiple thermal stress points, the pair with the highest WES is assigned. A greedy algorithm is used for global pairing optimization: the pairing table is traversed in descending WES order, and the pairing that meets the constraints is selected. Thermal stress point-cold point pairing data is output, including each pair's coordinates, distance, temperature difference, efficiency score, and pairing priority. Three thermal balance strategies are employed to address different pairing distances: a pulse modulation strategy for short-range pairings (10-15 mm), a temperature gradient control strategy for medium-range pairings (15-22 mm), and a heat flow guidance strategy for long-range pairings (22-30 mm). The specific parameters of the pulse modulation strategy are: the duty cycle of the heating unit located at the thermal stress point is reduced by 10%-20%, the duty cycle of the heating unit located at the cooling point is increased by 5%-10%, and the pulse frequency remains unchanged at 5Hz. The specific parameters of the temperature gradient control strategy are: divide 5 equidistant control points between the thermal stress point and the cooling point, set the temperature gradient to linear, and the cooling amplitude to , r is the distance from the thermal stress point. The specific parameters of the heat flow guidance strategy are: a temperature groove is formed within 2mm on both sides of the hot-cold point connection line, and the groove depth is , the width changes parabolically with distance Each micro-area thermal balance strategy is recorded as a set of control instructions, including location coordinates, control type (power, temperature, or gradient), value range, and timing information. The output micro-area thermal balance control data includes the strategy type, control parameters, and execution timing for all hot-cold spot pairs.

[0088] Preferably, performing micro-area thermal balance strategy processing based on thermal stress point-cold spot pairing data includes:

[0089] Perform heat conduction path analysis on thermal stress point-cold point pairing data to generate heat conduction path data;

[0090] Calculate the heat conduction rate of each micro-area in the plane and vertical direction of the flexible circuit board based on the heat conduction path data to obtain the heat conduction parameters;

[0091] According to the temperature sensitivity analysis of heat conduction parameters, the area where the thermal conductivity changes significantly with temperature is identified, and the coordinate data of temperature sensitive points are obtained;

[0092] Based on the coordinate data of temperature sensitive points, the latent heat of material phase change is evaluated in real time, and the compensation value of the phase change zone is calculated to obtain the compensation value of the phase change zone;

[0093] Obtain processing environment humidity data;

[0094] The environmental factor correction is performed on the phase change zone compensation value by using the processing environment humidity data to obtain the environmental correction compensation value;

[0095] The micro-area thermal balance control processing is performed on the micro-area grid data based on the environmental correction compensation value to obtain the micro-area thermal balance control data, wherein the micro-area thermal balance control processing includes the configuration of heating / cooling power, action time and start-up sequence priority.

[0096] In the embodiment of the present invention, the circuit board is divided into 0.5mm×0.5mm grid units, and each unit is assigned a thermal resistance value , where l is the grid side length, λ is the local thermal conductivity, and A is the cross-sectional area perpendicular to the heat flow direction. The improved Dijkstra algorithm is used to calculate the minimum thermal resistance path from the thermal stress point to the cold point, and the thermal resistance weight , i is a node on the path. During the path search process, crossing the board boundary and the electrical function key area is prohibited. These areas are marked as infinite thermal resistance. For each heat conduction path, the key point set {( , ),( , ),...,( , )}, with an interval of 1mm. For each key point, record the local thermal conductivity, material type, temperature value and heat flow direction angle , where qx is the component of the heat flux density vector in the x-axis direction, and qy is the component of the heat flux density vector in the y-axis direction. Each heat conduction path generates path characteristic parameters: total length L, average thermal conductivity , minimum thermal conductivity Its position and curvature The output is a heat conduction path data set. The heat conduction rate in the plane and perpendicular direction is calculated based on the heat conduction path data. The heat conduction rate in the plane direction is calculated based on Fourier's heat conduction law. , where λ_xy is the thermal conductivity in the plane direction (10.2 W / (m·K) for the ITO conductive layer and 0.16 W / (m·K) for the polyimide base layer), is the temperature difference between adjacent calculation points, ρ is the material density, c_p is the specific heat capacity, and d_xy is the distance between calculation points. The vertical heat conduction rate is calculated as , where λ_z is the thermal conductivity in the perpendicular direction (usually 0.7-0.9 times that in the plane direction, affected by the direction of the material lamination), ΔT_z is the temperature difference in the z direction, and d_z is the distance between the layers. At the material interface, the modified formula is used , is the equivalent thermal conductivity, ρ_eff and c_p_eff are the equivalent density and specific heat. The calculation results form a thermal conductivity parameter matrix, which contains v_xy, v_z and t_conduct (thermal conduction time, t_conduct=L² / (2α), α is the thermal diffusion coefficient) for each micro-region. The temperature-thermal conductivity relationship model is established. ,in is the reference temperature Thermal conductivity at 25°C, β is the temperature coefficient (ITO is -0.001 / °C, polyimide is -0.003 / °C, and packaging material is -0.002 / °C). Calculate the temperature sensitivity of thermal conductivity over the entire board. , the unit is Then, the temperature fluctuation amplitude ΔT_fluct and the thermal conductivity change percentage are calculated for each point on the heat conduction path. When Rλ>2.5%, it is marked as a temperature sensitive point. Calculate the temperature impact index for each temperature sensitive point ,in is the thermal conductivity rate at the point, and v_avg is the average thermal conductivity rate of the path. Sort by TII value from high to low, extract the top 20% of the points as key temperature sensitive points, record their three-dimensional coordinates (x, y, z), temperature fluctuation amplitude ΔT_fluct, thermal conductivity change percentage Rλ and material type, and generate a temperature sensitive point coordinate data table. Differential scanning calorimetry is used to establish a material phase change temperature range model. The phase change temperature range of the polyimide substrate is 170℃-185℃, the ITO conductive layer is 140℃-145℃, and the packaging material is 160℃-175℃. The phase change process is detected by temperature time series data, and the judgment conditions are: ① The temperature rise rate v_T=dT / dt suddenly decreases (the decrease is >50%); ② The duration τ exceeds 30 seconds; ③ The temperature is maintained within the phase change temperature range. Calculate the latent heat influence coefficient for the identified phase change area , where h is the latent heat of phase change of the material (45 J / g for polyimide, 9 J / g for ITO, and 28 J / g for packaging material), c_p is the specific heat capacity, and ΔT is the normal temperature rise. The calculation formula for the compensation value of the phase change zone is: , P is the heating power density, unit is W / cm². For each phase change area, its center coordinates, area, phase change temperature, latent heat influence coefficient and compensation value are recorded to form a phase change area compensation value data table. Five high-precision humidity sensors (accuracy ±1.5%RH) are installed inside the thermal curing equipment, located at the center and four corners of the equipment. The sensor model is DHT22, and the measurement range is 10%-95%RH. The humidity data sampling frequency is 10 seconds / time, and is processed by a digital filter (5-point moving average) to eliminate short-term fluctuations. The system records the original humidity value H_raw and its standard deviation σ_H, and calculates the humidity gradient vector , used to analyze the uneven distribution of humidity. The humidity data is analyzed through time series to extract three key parameters: average humidity H_avg, humidity fluctuation ΔH and humidity change rate dH / dt. The system automatically determines the ambient humidity status: low humidity (<30%RH), normal (30%-50%RH), high humidity (>50%RH). For the curing process, the preset ideal humidity range is 35%-45%RH. A humidity-thermal characteristic correction model is established, and the sensitivity of the material thermal conductivity to humidity is expressed by the formula Calculation, where λ is the standard humidity The thermal conductivity under humidity is γ, which is the humidity correction factor (0.002 / %RH for polyimide, 0.0005 / %RH for ITO, and 0.003 / %RH for packaging materials). The latent heat of phase change under humidity is corrected to , δ is the humidity latent heat effect coefficient (usually 0.001-0.005 / %RH). Environmental correction factor , unit is ℃. The calculation formula of environmental correction compensation value is: , for high humidity conditions (>50%RH) add a 10% safety margin. Significant areas ( ), using the local correction factor The final environmental correction compensation value data table contains the position coordinates, original compensation value, humidity correction coefficient and final correction compensation value of each phase change zone. Three parameter control instructions are assigned to each micro-zone: heating / cooling power P, action time τ and start priority SP. The heating / cooling power calculation formula is , P_base is the basic power density (1.2W / cm² for heating area, -0.5W / cm² for cooling area), the ± sign depends on the type of hot / cold area. , where ρ is density, c_p is specific heat capacity, d is effective thickness, and ΔT is target temperature change. The startup priority SP is set based on the thermal stress risk level: L4 risk area priority is 1, L3 is 2, L2 is 3, and L1 is 4. For phase change areas, increase the power holding time , ensuring complete phase change. The control command execution order is as follows: Priority 1 zone starts first for 25 seconds, Priority 2 zone starts with a 10-second delay, Priority 3 zone starts with a 20-second delay, and Priority 4 zone starts with a 30-second delay. A maximum allowable temperature gradient of 15°C / mm is set between hot and cold spots. When this value is detected to be exceeded, the system automatically adjusts the power of adjacent zones to smooth the temperature distribution. The output micro-zone thermal balance control data includes the location coordinates, control type, power value, action time, start-up sequence, and hold time of each micro-zone.

[0097] As an example of the present invention, refer to Figure 2 As shown, Figure 1 Detailed implementation steps of step S3 are shown in the flowchart. In this example, step S3 includes:

[0098] Step S31: performing pulse heat flow frequency modulation according to micro-area thermal balance control data to generate pulse frequency distribution data;

[0099] In the embodiment of the present invention, pulse heat flux modulation adopts pulse width modulation technology (PWM), the basic period T is set to 2 seconds, and the pulse duty cycle D is determined according to the heating power demand P_req in the micro-area heat balance control data. The calculation formula is: , where P_req is the required power (W) and P_max is the maximum heater output power (W). For high-risk thermal stress areas, a high-frequency pulse mode with a pulse frequency of f_high = 5 Hz is used; for medium-risk areas, a medium-frequency pulse mode with f_medium = 2 Hz is used; and for low-risk areas, a low-frequency pulse mode with f_low = 0.5 Hz is used. The product of frequency and duty cycle determines the final heat input rate. The system introduces phase difference modulation, with the pulse phase difference between adjacent micro-zones Δφ = 360° × i / n, where i is the micro-zone number and n is the total number of micro-zones, to avoid peak power overlap. The pulse look-ahead time t_advance = τ / 2 is adjusted based on the heat conduction delay time τ to ensure timely delivery of heat energy to the target point. The system constructs a pulse parameter table containing the four parameters for each micro-zone: pulse frequency, duty cycle, phase difference, and look-ahead time. This complete pulse frequency allocation data is transmitted to the execution control unit.

[0100] Step S32: performing real-time curing temperature control feedback adjustment based on the pulse frequency distribution data to obtain real-time state data of heat flow control;

[0101] In this embodiment of the present invention, the system sets up a three-layer control architecture: micro-area local control layer, regional coordination control layer, and global optimization control layer. The micro-area local control layer adopts a proportional-integral-derivative (PID) controller with the following control parameters: proportional coefficient Kp = 12.5, integral coefficient Ki = 0.8, differential coefficient Kd = 3.2, and a sampling period of 0.1 seconds. Temperature deviation , where T_target is the target temperature and T_actual is the measured temperature. Control output , the output value is limited to the range of 0-100%. The regional coordination control layer adopts the model predictive control algorithm, with the prediction time domain set to 10 seconds and the control time domain to 2 seconds. The constraints include: the temperature rise rate does not exceed 5 degrees Celsius / second, and the temperature fluctuation amplitude does not exceed ±1.5 degrees Celsius. The global optimization control layer uses an adaptive fuzzy control strategy to adjust the weight coefficient of each micro-zone controller based on the real-time temperature distribution pattern and heat flow trend. The system establishes a temperature prediction model: , where K is the thermal efficiency coefficient, P(t) is the heating power, C is the specific heat capacity, V is the control volume, R is the heat dissipation coefficient, and T_ambient is the ambient temperature. The system updates the control strategy every 0.5 seconds to implement closed-loop temperature control and generate real-time heat flow control status data, including current temperature, temperature deviation, control output value, predicted temperature value, and controller status flag.

[0102] Step S33: monitoring the curing completion trigger signal based on the real-time status data of the heat flow control, and then transferring the cured circuit board to the inspection station for surface grid-type micro-deformation scanning to obtain the measured curing morphological parameters;

[0103] In this embodiment of the present invention, the system sets the following criteria for determining curing completion: ① The average temperature of the main curing area is maintained within ±2 degrees Celsius of the target curing temperature for a cumulative period of 90 seconds; ② The temperature gradient within the curing area is less than 1.2 degrees Celsius per millimeter; and ③ The resistivity change rate of the cured material is less than 0.05% per minute, with the material resistivity change monitored in real time by an embedded resistivity sensor array. When all three conditions are met, the system generates a curing completion trigger signal. After curing is complete, a servo-transmitter mechanism precisely positions the circuit board to the inspection station at a speed of 250 mm / s, with a positioning accuracy of ±0.05 mm. The inspection station is equipped with a laser triangulation system consisting of a measurement array of 25 laser probes. The laser beam has a wavelength of 650 nanometers, a spot diameter of 20 microns, a Z-axis resolution of 0.5 microns, and an XY plane resolution of 20 microns. Scanning uses a raster path with a stroke pitch of 0.8 mm and a scanning speed of 50 mm / s, covering the entire circuit board surface. The three-dimensional coordinates (x, y, z) of each sampling point are recorded, with the z value representing the surface height. The system collects data from approximately 25,000 surface points, forming a high-density point cloud. This data is then filtered using a median filter (with a filter window size of 5×5 points) to eliminate outliers. A uniform mesh surface model with a resolution of 0.2 mm is then generated using cubic spline interpolation. This data then generates the measured solidification morphological parameters, including surface height, surface normal, and local curvature parameters.

[0104] Step S34: performing reference plane calibration on the measured solidification morphological parameters, and then calculating the vertical distance from each point to the reference plane, calibrating the positive and negative values of the deformation variable, and obtaining deformation variable calibration data;

[0105] In the embodiment of the present invention, 100 measurement points without obvious stress on the edge of the circuit board are selected as the reference point set P, and then the reference plane parameters are determined by solving the equation group AX=b, where A is the coefficient matrix composed of the coordinates of the reference points, b is the Z value vector, and X is the plane parameter to be determined. The plane equation is expressed as The Gaussian elimination method is used to solve the equations and obtain the plane parameters a, b, and c. The vertical distance di from each measuring point to the reference plane is calculated using the formula: , where (xi, yi, zi) are the coordinates of the measuring point. The calibration method for the positive and negative values of the deformation variable is: when the point is higher than the reference surface When the point is lower than the reference plane, the deformation is positive; when the point is lower than the reference plane, the deformation is negative. The system generates a deformation calibration data set , where si is the deformation sign (1 or -1). The average deformation is calculated for each grid area (0.5mm×0.5mm). , k is the number of measurement points in the area, forming a complete deformation calibration data matrix.

[0106] Step S35: identifying thermal stress deviation areas based on deformation calibration data;

[0107] In an embodiment of the present invention, the deformation variable evaluation criteria are determined: the slight deformation area is defined as |di| < 5 microns; the medium deformation area is defined as 5 microns ≤ |di| < 15 microns; the severe deformation area is defined as |di| ≥ 15 microns. The system applies a dual-threshold segmentation algorithm to the deformation variable calibration data, using 5 microns and 15 microns as two key thresholds to screen out all point sets with |di| ≥ 5 microns to form a preliminary thermal stress deviation area. The regional growing algorithm is then applied to cluster the points. When the distance between adjacent points is less than 2 mm and the deformation variable difference is less than 3 microns, they are classified into the same area to form a continuous thermal stress deviation area. The system calculates the area, average deformation variable, maximum deformation variable and deformation gradient (the rate of change of deformation variable between adjacent points) of each area. The thermal stress deviation area is expressed as ,Each region Ri contains the coordinates, shape variables, regional centroid positions and regional shape parameters (major axis, minor axis, and direction angle) of all points in the region, constituting a complete thermal stress deviation regional data set.

[0108] Step S36: performing morphological classification on the thermal stress deviation area to obtain deformation type labeling data;

[0109] In the embodiment of the present invention, deformation is divided into five typical types: convex, concave, wavy, twisted, and wrinkled. The classification is based on the main deformation characteristics: the convex type is characterized by a positive deformation in the central area and a decreasing deformation from the center to the outside; the concave type is characterized by a negative deformation in the central area and an increasing deformation from the center to the outside; the wavy type is characterized by a periodic alternation of positive and negative deformation within the area, with a frequency greater than 2 times / cm; the twisted type is characterized by an obvious twisting axis within the area, with opposite signs of deformation on both sides of the axis; the wrinkled type is characterized by a dramatic change in deformation within a narrow area, with a gradient greater than 5 microns / mm. The classification algorithm uses a morphological feature extraction method to calculate parameters such as the deformation distribution pattern, gradient vector field, principal curvature, and Gaussian curvature for each area. The system calculates the morphological feature vector for each thermal stress deviation area Ri. , containing 10 morphological parameters, and then the deformation type Ti is determined through discriminant analysis to form the deformation type labeling data C = {Ri, Fi, Ti}, which fully records the spatial distribution, morphological characteristics and classification results of each thermal stress deviation area.

[0110] Step S37: evaluating the curing deformation effect of the thermal stress deviation area using the deformation type mark data to obtain circuit board curing effect evaluation data.

[0111] In the embodiment of the present invention, the evaluation of the impact of curing deformation is based on a comprehensive analysis of the importance and deformation degree of the circuit functional area. The evaluation process is divided into three steps: the first step is to determine the key functional areas of the circuit board, including the connector area, the integrated circuit welding area, the high-density circuit area, etc., and establish a functional importance weight matrix W. The weight value range is 1-10, and the larger the value, the higher the importance of the area. The second step is to calculate the deformation influence factor I of each thermal stress deviation area. The formula is: , where S is the area of the region (square millimeters), D is the average deformation (micrometers), G is the maximum deformation gradient (micrometers / mm), and T is the deformation type coefficient (convex type 1.2, concave type 1.5, wavy type 1.8, twisted type 2.0, wrinkled type 2.5); Step 3: Calculate the comprehensive score of the region , where W is the functional importance weight corresponding to the area. The system scores all thermal stress deviation areas, generates a ranking table, and categorizes the PCB into four levels based on the scoring thresholds: Excellent (all E < 150), Acceptable (150 ≤ E < 300), Repair (300 ≤ E < 500), and Scrap (E ≥ 500). This ultimately generates PCB curing performance evaluation data, including the location, deformation type, influencing factors, comprehensive score, and overall board quality grade for each thermal stress deviation area, forming a complete curing performance evaluation report.

[0112] Preferably, step S4 includes the following steps:

[0113] Step S41: obtaining flexible circuit board lamination process parameters; wherein the flexible circuit board lamination process parameters include an initial lamination temperature, a lamination pressure reference value, and a cooling rate reference value;

[0114] Step S42: performing weighted lamination area pressure compensation processing on the lamination pressure reference value according to the circuit board curing effect determination data to obtain lamination pressure compensation distribution data;

[0115] Step S43: correcting the initial bonding temperature and cooling rate reference value according to the real-time surface wettability index, and generating a bonding process instruction sequence according to the bonding pressure compensation distribution data;

[0116] Step S44: Control set values are sent to the temperature controller, pressure actuator and cooling rate regulator of the bonding equipment through the bonding process instruction sequence to perform bonding process optimization operation processing.

[0117] In an embodiment of the present invention, the initial bonding temperature is obtained based on the circuit board material data, and is set to 165±2°C for the polyimide substrate and 145±2°C for the polyester substrate. The temperature value is monitored in real time by a thermocouple array (15 evenly distributed measuring points), with a sampling frequency of 2Hz and a spatial accuracy of ±0.5°C. The bonding pressure reference value is determined by a pressure calibration test. The specific method is: 5 batches of qualified products are subjected to a pressure gradient test (from 0.5MPa to 2.0MPa, with an interval of 0.1MPa), and the interface bonding strength under each pressure is recorded. The lowest pressure value at which the bonding strength reaches 1.2N / mm and the fluctuation does not exceed ±5% is selected as the reference value, usually within the range of 1.2-1.5MPa. The cooling rate reference value is determined by material DSC analysis, and is set to 3.0°C / minute for the polyimide substrate and 5.0°C / minute for the polyester substrate. The process parameter data set is automatically transmitted to the central control unit via Ethernet and displayed in real time on the operation terminal. The circuit board surface is divided into 5×5 grid areas, each area is 20mm×20mm. The curing effect weight is assigned to each grid area i. , the calculation formula is , where Fr is the warpage rate of the area, Dv is the deformation, Wp is the number of warpage points, and adding the subscript max indicates the maximum value of the entire board. The worse the curing effect, the higher the weight. Pressure compensation coefficient , where Wavg is the average weight of the entire board, Kp is the pressure adjustment coefficient, which is 0.2. The regional fitting pressure calculation formula is: , P0 is the reference pressure. For areas with severe warping deformation , set the upper limit of pressure to P0×1.3 to prevent overpressure damage. Precise regional pressure control is achieved through a hydraulic multi-zone independent adjustment system with a pressure adjustment resolution of 0.05MPa. The output bonding pressure compensation distribution data includes the coordinates, weight values, compensation coefficients and final bonding pressure values of 25 grid areas. The surface wettability index WI is obtained in real time through a contact angle meter. Six points on the surface of the circuit board are measured before bonding. The calculation formula is: , θ is the contact angle of the droplet. The larger the WI, the better the wettability. Temperature correction formula , where WIavg is the measured average wettability index, WI0 is the standard wettability index 85%, and Kt is the temperature adjustment coefficient 3.0℃. Corrected initial bonding temperature , where T0 is the initial bonding temperature. Cooling rate correction formula , Kr is the cooling rate adjustment coefficient 0.5℃ / min. The corrected cooling rate , R0 is the cooling rate reference value. The bonding process instruction sequence is generated in XML format and consists of four parts: ① Preheating stage (temperature rises from room temperature to T ×0.8, pressure is Pi×0.3); ② Lamination stage (temperature is T , pressure is Pi); ③Pressure holding stage (temperature is maintained at T , the pressure is maintained at Pi for 10 minutes); ④ cooling stage (temperature is The speed is reduced to 40℃ and the pressure is gradually reduced to 0.3MPa). The bonding equipment control system is connected through the OPC-UA communication protocol to establish a secure data channel. The temperature controller adopts a multi-channel PID control method, and the data sent to it includes the target temperature T , heating rate (5℃ / min), temperature holding time (10 minutes) and cooling rate , using floating point format with an accuracy of 0.1°C. The pressure actuator uses a servo hydraulic control system to send the pressure value Pi of 25 areas to it. The pressure unit is MPa with an accuracy of 0.01MPa. At the same time, it sends the pressure application rate (0.2MPa / second) and the pressure relief rate (0.1MPa / second). The cooling rate regulator uses proportional flow control and sends the cooling rate And the temperature-flow correspondence table, the control quantity is the percentage of the cooling water valve opening. The control instructions are sent step by step according to the timing requirements: the preheating stage instruction is sent at t=0, the bonding stage instruction is sent after the preheating is completed, and the pressure holding stage instruction is sent when the bonding temperature reaches T The cooling stage command is sent when the holding time ends.

[0118] It is particularly important that step S4 also includes:

[0119] Real-time measurement of the force distribution in each area of the flexible circuit board during the bonding operation;

[0120] Calculate the peeling risk index of each functional layer interface of the circuit board based on the force distribution in each area;

[0121] Evaluate circuit board interface reliability data based on the peeling risk index;

[0122] Identify potential delamination risk points based on PCB interface reliability data. When the delamination risk index exceeds 2.5, mark it as a high-risk point and obtain delamination warning area data.

[0123] Optimize the fitting pressure distribution based on the delamination warning area data. Increase the local pressure by 5-8% in the high-risk area and reduce the pressure in the surrounding area by 2-3% to form a pressure gradient transition zone to obtain the optimized fitting pressure distribution data.

[0124] After the flexible circuit board lamination process is completed, the flexible circuit board is re-scanned for microscopic deformation and the thermal curing deformation compensation effect is evaluated.

[0125] In an embodiment of the present invention, during the bonding operation, a high-precision pressure distribution measurement system is used to monitor the force on each area of the circuit board in real time. The system consists of an 8×8 array pressure sensor matrix, each sensor has an area of 5mm×5mm, a measurement range of 0-3MPa, and an accuracy of ±0.01MPa. The sensor matrix is placed under the bonding platform, and the sampling frequency is set to 10Hz. The obtained raw pressure data is enhanced to a resolution of 320×320 dot matrix through a bilinear interpolation algorithm to form a full-board pressure distribution heat map. The system calculates the average pressure Pavg and the pressure standard deviation of each measurement area. and pressure gradient value The pressure non-uniformity factor is defined as When UI>15%, it is marked as a pressure abnormal area. The output data includes the time series pressure distribution matrix P(x, y, t), the pressure gradient matrix ∇P(x, y, t) and the pressure abnormal area coordinate set. The peeling risk index of the functional layer interface of the circuit board is calculated based on the force distribution of each area. The peeling risk index CRI calculation formula is: , where Popt is the ideal fitting pressure (obtained from the material database, usually 1.4 MPa), Pact is the actual measured pressure, and Kt is the temperature influence coefficient , Tact is the actual bonding temperature, Topt is the ideal bonding temperature, Kp is the pressure fluctuation coefficient , Ks is the interface material sensitivity coefficient (1.0 for polyimide-copper interface, 1.2 for polyimide-polyimide interface, and 1.5 for copper-solder mask interface). The interface layer is divided into three layers: the top copper foil-substrate interface, the substrate-substrate interface, and the bottom substrate-copper foil interface. The CRI value of each area of each interface is calculated separately. The peeling risk rating is set as: CRI < 1.0 is low risk (green), 1.0 ≤ CRI < 2.5 is medium risk (yellow), and CRI ≥ 2.5 is high risk (red). The interface reliability score IRS is based on a multi-parameter weighted calculation, and the formula is:

[0126] ;

[0127] Where CRIavg is the average debonding risk index, HRA is the total area of high-risk areas, A is the total interface area, Bstr is the peel strength (N / mm) from the sample test, Bref is the baseline peel strength (1.2 N / mm), PND is the number of pressure-unstable areas, and PNmax is the total number of areas. The IRS score ranges from 0 to 100, with higher scores indicating better interface reliability. The assessment system labels interfaces with an IRS < 60 as "unacceptable," 60 ≤ IRS < 75 as "marginal," 75 ≤ IRS < 90 as "acceptable," and IRS ≥ 90 as "excellent." For each interface, the system calculates reliability indicators including the average debonding risk index, the percentage of high-risk areas, the pressure stability score, and the predicted interface bonding strength. The debonding risk index is scanned across the entire grid area, and points with a CRI ≥ 2.5 are marked as high-risk points. Adjacent high-risk points are clustered, with a 5mm distance threshold set. Two high-risk points within the threshold are classified as belonging to the same risk area. The area S, average peeling risk index CRIavg and maximum peeling risk index CRImax of each risk area are calculated. The risk level is further subdivided: 2.5≤CRI<3.0 is the "warning" level, 3.0≤CRI<4.0 is the "dangerous" level, and CRI≥4.0 is the "serious" level. Areas with an area greater than 25mm² and containing "dangerous" or "serious" level points are marked first. The system calculates the morphological characteristics of each risk area, including the coordinates of the center of gravity (xc, yc), the shape approximation (the degree of similarity to a circle, rectangle or strip) and the boundary curvature. For each warning area i, the central pressure increase is calculated as , where Pbase is the base fitting pressure, and the formula ensures that the boost range is 5-8%. The boost area adopts a Gaussian distribution model, and the pressure increase value decreases with the increase of the distance from the center of the area r. The formula is , is the characteristic length parameter, which is 1.2 times the equivalent radius of the area. A pressure transition zone with a width of 10 mm is established outside the warning area, and the pressure reduction is , ensuring the pressure drop range is 2-3%. The pressure adjustment value is achieved through a 32-channel servo hydraulic control system. The control area of each hydraulic unit is 15mm×15mm, and the pressure adjustment resolution is 0.01MPa. Calculate the deformation difference before and after fitting ; Then the deviation from the ideal plane fitting Compare and get the deformation compensation effect score ,in Represents the standard deviation; finally, analyze the local high and low points, calculate the waviness Wa and flatness Fa, and generate a deformation compensation effect evaluation report.

[0128] Preferably, the present invention further provides a process optimization system for a flexible circuit board production line, which executes the process optimization method for a flexible circuit board production line as described above. The process optimization system for a flexible circuit board production line includes:

[0129] Thermal curing data acquisition module, used to obtain the material characteristic data of the flexible circuit board; perform thermal curing of the circuit board according to the material characteristic data of the flexible circuit board, and collect the temperature distribution data of the board surface during the curing process in real time;

[0130] The thermal stress balance module is used to analyze planar thermal forces based on the board surface temperature distribution data and then construct the PCB's three-dimensional thermal field. The module uses the flexible PCB material property data to evaluate the thermal stress intensity of the PCB's three-dimensional thermal field and generate stress hotspot distribution data. Based on the stress hotspot distribution data, the module divides stress regions and applies micro-area thermal balance strategy processing to obtain micro-area thermal balance control data.

[0131] The curing control and evaluation module is used to perform real-time curing temperature control feedback adjustment based on the micro-area thermal balance control data. After the flexible circuit board curing process is completed, the curing deformation impact is evaluated to obtain circuit board curing effect evaluation data;

[0132] The lamination process optimization module is used to detect the real-time surface wettability index of the flexible circuit board to be processed in front of the lamination station; based on the circuit board curing effect evaluation data and the real-time surface wettability index, the lamination process parameters are compensated to achieve the curing-lamination process optimization of the flexible circuit board production line.

[0133] By acquiring material property data for flexible circuit boards and combining it with precise real-time temperature distribution data, the present invention dynamically adjusts the thermal field distribution during the curing process based on the material properties of different batches, thicknesses, and sizes. By analyzing the board surface temperature distribution during the curing process in real time, constructing a three-dimensional thermal field model, and combining material thermal performance parameters to quantitatively assess the intensity and spatial distribution of thermal stresses, this method enables the precise identification of potential stress hotspots. This effectively suppresses defects such as microstructural deformation and interlayer delamination caused by localized overheating or temperature differences, significantly improving the yield and consistency of large-scale, multi-layer flexible circuit boards. By real-time monitoring of the surface wettability index of the flexible circuit boards and dynamically adjusting the lamination process parameters based on the curing effect evaluation data, it ensures a tight bond between the material interfaces and improves the structural integrity of the multi-layer flexible circuit boards. By real-time monitoring of the force distribution during the lamination process and assessing the reliability of the circuit board interface based on the delamination risk index, it is possible to proactively identify potential delamination risk points and make preventive adjustments by optimizing the lamination pressure distribution. This proactive quality control strategy not only improves the controllability and stability of the production process but also enhances the product's adaptability and stability in complex application environments. The optimized fitting pressure distribution can effectively reduce the interface peeling problem caused by local uneven pressure, further improving the reliability and consistency of the product.

[0134] The present invention is therefore intended to be illustrative and non-restrictive in all respects, with the scope of the invention being defined by the appended claims rather than the foregoing description, and all changes that come within the meaning and range of equivalents of the application documents are intended to be embraced therein.

[0135] The foregoing description is intended only to provide specific embodiments of the present invention, which will enable those skilled in the art to understand and implement the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not intended to be limited to the embodiments shown herein, but is to be construed in the widest possible manner consistent with the principles and novel features disclosed herein.

Claims

1. A process optimization method for a flexible circuit board production line, characterized in that: The following steps are involved: Step S1: Acquire material characteristic data of the flexible circuit board; perform thermal curing of the circuit board according to the material characteristic data of the flexible circuit board, and collect real-time temperature distribution data of the board surface during the curing process; Step S2: Analyze the plane thermal force based on the board surface temperature distribution data, and then construct the three-dimensional thermal field of the circuit board; Use the material property data of the flexible circuit board to evaluate the thermal stress intensity of the circuit board's three-dimensional thermal field and generate stress hotspot distribution data; According to the stress hotspot distribution data, stress areas are divided and micro-area thermal balance strategy processing is performed to obtain micro-area thermal balance control data; Step S3: Performing real-time curing temperature control feedback adjustment based on the micro-area thermal balance control data, and evaluating the impact of curing deformation after the flexible circuit board curing process is completed to obtain circuit board curing effect evaluation data; Step S4: detecting the real-time surface wettability index of the flexible circuit board to be processed in front of the lamination station; Based on the circuit board curing effect evaluation data and real-time surface wettability index, the bonding process parameters are compensated to achieve the optimization of the curing-bonding process of the flexible circuit board production line.

2. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: In step S1, performing a circuit board thermal curing operation according to the flexible circuit board material characteristic data includes: Extract the thermal conductivity value, thermal expansion coefficient value, and phase change latent heat value of the substrate as material thermal characteristic data based on the material characteristic data of the flexible circuit board; Set the target curing temperature and curing time as curing process specification data based on the material thermal property data; According to the curing process specification data, the pulse heating mode is set and the heat source power timing is processed to obtain the initial curing parameters; Initialize the production unit based on the initial curing parameters, then transport and fix the flexible circuit board to be processed to the curing station, receive the trigger signal of the flexible circuit board entering the curing station, and obtain the circuit board arrival signal data; Control the positioning of the heat source array according to the circuit board arrival signal data, and obtain the heat source array positioning completion data; Based on the positioning of the heat source array, the data drives the heat source to perform the circuit board thermal curing action, and collects the board surface temperature distribution data during the curing process in real time.

3. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: The real-time acquisition of the board surface temperature distribution data during the curing process in step S1 includes: A thermocouple array is placed on the surface of the flexible circuit boards on the production line in a hexagonal honeycomb layout, with a spacing of 8mm. Infrared sensors are added as vertical supplementary collection points based on the substrate thickness specifications in the flexible circuit board material characteristic data to obtain an array of micro-area temperature collection points. The vertical supplementary collection points can collect the temperatures of the middle and bottom layers of the flexible circuit boards. The surface temperature of the flexible circuit board is collected every 2 seconds using a micro-area temperature collection point array to obtain the original value of the temperature array; The temperature difference between adjacent temperature measurement points is calculated based on the original value of the temperature matrix. The sampling frequency is increased to 0.2 seconds / time in locations where the temperature difference exceeds 1.2°C, and reduced to 3 seconds / time in areas where the temperature difference is less than 0.5°C, in order to obtain the frequency control parameters. Based on the frequency control parameters, the acquisition frequency of the micro-area temperature acquisition point array is adaptively adjusted, and then multi-level temperature differentiation acquisition is performed to obtain multi-level temperature data of the circuit board; The flexible circuit board is divided into temperature transition zones of the edge area and the center area through the multi-level temperature data of the circuit board, and then the partitioned temperature data is interpolated to generate the board surface temperature distribution data; among them, the edge area is interpolated at a density of 0.5mm / point, and the center area is interpolated at a density of 0.2mm / point.

4. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: In step S2, the planar thermal analysis is performed based on the board surface temperature distribution data, and then the three-dimensional thermal field of the circuit board is constructed, including: The panel temperature distribution data is used to mark hotspots where temperature fluctuations are frequent using a preset temperature fluctuation threshold. When the standard deviation of temperature fluctuations in a region exceeds the preset temperature fluctuation threshold, the region is marked as a hotspot, and the temperature peak value, area range, and fluctuation frequency of the region are recorded as the hotspot feature data. The temperature fluctuation threshold is set to 0.3°C. Based on the characteristic data of the hot spot area, a temperature gradient vector field is established on the xy plane. The temperature change rate of each point along the x-axis and y-axis is calculated and synthesized into a direction vector. The magnitude of the vector represents the temperature change rate, and the direction of the vector points to the direction of temperature increase, thus obtaining the plane thermal data. Based on the board surface temperature distribution data, the temperature of the three layers of z-axis depth is extracted and compared, and then the vertical temperature change rate is calculated; the three layers of z-axis depth are specifically the surface, middle layer and bottom layer of the flexible circuit board; By correlating the vertical temperature change rate and the characteristic data of the hot spot area, the area where heat conduction is blocked in the vertical direction is identified, and the coordinates of the heat transfer blockage point are obtained; The vertical heat diffusion analysis of the plane thermal data is performed through the coordinates of the heat transfer blockage points, and then the three-dimensional thermal field of the circuit board is constructed.

5. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: In step S2, the thermal stress intensity evaluation of the three-dimensional thermal field of the flexible circuit board using the material characteristic data of the flexible circuit board includes: Based on the three-dimensional thermal field of the circuit board, the temperature change rate in the x, y, and z directions of each measurement point is extracted, and the temperature gradient vector is obtained by combining the temperature change rates in the three directions. Calculate the modulus of the gradient vector according to the temperature gradient vector to obtain gradient intensity distribution data; Based on the gradient intensity distribution data, the points exceeding 3.5°C / mm were marked as thermal gradient critical points; The flexible circuit board is partitioned by material type, and the board surface is divided into three categories: ITO conductive layer area, polyimide base layer area, and edge packaging area. The correspondence between the coordinate points in the three-dimensional thermal field of the circuit board and the material type is established to generate circuit board material partition data; Based on the material characteristic data of the flexible circuit board, the regional thermal expansion coefficient, material elastic modulus and thermal conductivity coefficient of the circuit board material partition data are mapped to obtain the material thermal characteristic data; The thermal stress intensity of the circuit board material partition data is evaluated through the thermal gradient critical point and material thermal property data to generate stress hot spot distribution data.

6. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: Step S2 includes the following steps: The stress area of the flexible circuit board is divided according to the stress hot spot distribution data, and then micro-area adaptive mesh processing is performed to obtain micro-area mesh data; wherein the stress area division includes the thermal stress concentration area and the thermal stress sparse area; Evaluate the thermal stress level based on micro-region grid data and assign thermal stress risk area weights; Screen the cooling points of the thermal stress points in the micro-grid data, and select the points with a temperature lower than the preset process reference temperature by more than 1°C within 10-30mm around the thermal stress points as candidate cooling points; Establish a hot and cold point pairing table based on the thermal stress points and candidate cooling points in the micro-region grid data; The heat conduction efficiency is scored for the hot and cold spot pairing table, and weighted hot and cold spot pairings are selected based on the weight values of the thermal stress risk areas to obtain thermal stress point-cold spot pairing data; The micro-area thermal balance strategy is processed according to the thermal stress point-cold spot pairing data to obtain the micro-area thermal balance control data.

7. The process optimization method for a flexible circuit board production line according to claim 6, characterized in that: The micro-area thermal balance strategy processing based on the thermal stress point-cold point pairing data includes: Perform heat conduction path analysis on thermal stress point-cold point pairing data to generate heat conduction path data; Calculate the heat conduction rate of each micro-area in the plane and vertical direction of the flexible circuit board based on the heat conduction path data to obtain the heat conduction parameters; According to the temperature sensitivity analysis of heat conduction parameters, the area where the thermal conductivity changes significantly with temperature is identified, and the coordinate data of temperature sensitive points are obtained; Based on the coordinate data of temperature sensitive points, the latent heat of material phase change is evaluated in real time, and the compensation value of the phase change zone is calculated to obtain the compensation value of the phase change zone; Obtain processing environment humidity data; The environmental factor correction is performed on the phase change zone compensation value by using the processing environment humidity data to obtain the environmental correction compensation value; The micro-area thermal balance control processing is performed on the micro-area grid data based on the environmental correction compensation value to obtain the micro-area thermal balance control data, wherein the micro-area thermal balance control processing includes the configuration of heating / cooling power, action time and start-up sequence priority.

8. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: Step S3 includes the following steps: Step S31: performing pulse heat flow frequency modulation according to micro-area thermal balance control data to generate pulse frequency distribution data; Step S32: performing real-time curing temperature control feedback adjustment based on the pulse frequency distribution data to obtain real-time state data of heat flow control; Step S33: monitoring the curing completion trigger signal based on the real-time status data of the heat flow control, and then transferring the cured circuit board to the inspection station for surface grid-type micro-deformation scanning to obtain the measured curing morphological parameters; Step S34: performing reference plane calibration on the measured solidification morphological parameters, and then calculating the vertical distance from each point to the reference plane, calibrating the positive and negative values of the deformation variable, and obtaining deformation variable calibration data; Step S35: identifying thermal stress deviation areas based on deformation calibration data; Step S36: performing morphological classification on the thermal stress deviation area to obtain deformation type labeling data; Step S37: evaluating the curing deformation effect of the thermal stress deviation area using the deformation type mark data to obtain circuit board curing effect evaluation data.

9. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: Step S4 includes the following steps: Step S41: obtaining flexible circuit board lamination process parameters; wherein the flexible circuit board lamination process parameters include an initial lamination temperature, a lamination pressure reference value, and a cooling rate reference value; Step S42: performing weighted lamination area pressure compensation processing on the lamination pressure reference value according to the circuit board curing effect determination data to obtain lamination pressure compensation distribution data; Step S43: correcting the initial bonding temperature and cooling rate reference value according to the real-time surface wettability index, and generating a bonding process instruction sequence according to the bonding pressure compensation distribution data; Step S44: Control set values are sent to the temperature controller, pressure actuator and cooling rate regulator of the bonding equipment through the bonding process instruction sequence to perform bonding process optimization operation processing.

10. A process optimization system for a flexible circuit board production line, characterized in that: For executing the process optimization method for a flexible circuit board production line according to claim 1, the process optimization system for a flexible circuit board production line comprises: Thermal curing data acquisition module, used to obtain the material characteristic data of the flexible circuit board; perform thermal curing of the circuit board according to the material characteristic data of the flexible circuit board, and collect the temperature distribution data of the board surface during the curing process in real time; The thermal stress balance module is used to analyze planar thermal forces based on the board surface temperature distribution data and then construct the PCB's three-dimensional thermal field. The module uses the flexible PCB material property data to evaluate the thermal stress intensity of the PCB's three-dimensional thermal field and generate stress hotspot distribution data. Based on the stress hotspot distribution data, the module divides stress regions and applies micro-area thermal balance strategy processing to obtain micro-area thermal balance control data. The curing control and evaluation module is used to perform real-time curing temperature control feedback adjustment based on the micro-area thermal balance control data. After the flexible circuit board curing process is completed, the curing deformation impact is evaluated to obtain circuit board curing effect evaluation data; The lamination process optimization module is used to detect the real-time surface wettability index of the flexible circuit board to be processed in front of the lamination station; based on the circuit board curing effect evaluation data and the real-time surface wettability index, the lamination process parameters are compensated to achieve the curing-lamination process optimization of the flexible circuit board production line.

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