Piezoelectric PMUT based on MEMS chip and preparation method thereof

Abstract

The invention relates to the technical field of semiconductor technologies, in particular to a piezoelectric PMUT based on an MEMS chip and a preparation method thereof.The piezoelectric PMUT comprises a substrate, the substrate is provided with a front face and a back face which are opposite, a piezoelectric layer is formed on the front face of the substrate, the substrate is provided with a back cavity in a penetrating mode, and a structural layer is formed on the surface of the piezoelectric layer; the thickness of the structural layer is greater than that of a piezoelectric film in the piezoelectric layer, so that a neutral surface is located in the transverse projection area range of the structural layer; the preparation method comprises the following steps: preparing a substrate; growing a piezoelectric layer on the front surface of the substrate; etching the piezoelectric layer to enable the piezoelectric layer to be patterned; growing a structural layer on the surface of the patterned piezoelectric layer; etching the structural layer to enable the structural layer to be patterned; and penetrating through the etching substrate to form a back cavity. The silicon oxide is used as the structural layer to replace traditional top silicon, the Young modulus of the silicon oxide is low, the process stress is low, the resonant frequency can be effectively reduced, and manufacturing of low-frequency devices is facilitated.

Description

Technical Field

[0001] One or more embodiments of this specification relate to the field of semiconductor process technologies, and in particular, to a piezoelectric PMUT based on a MEMS chip and a preparation method thereof. Background Art

[0002] An ultrasonic sensor is a sensor that converts ultrasonic signals into other energy signals (usually electrical signals). Ultrasonic waves are mechanical waves with a vibration frequency higher than 20 kHz. It has the characteristics of high frequency, short wavelength, small diffraction phenomenon, especially good directivity, and can be a ray and propagate in a directional manner. Ultrasonic waves have a great penetration ability for liquids and solids, especially in solids that are opaque to sunlight. When ultrasonic waves encounter impurities or interfaces, significant reflections will occur to form reflected echoes, and the Doppler effect can be generated when encountering moving objects. Ultrasonic sensors are widely used in industries, national defense, biomedicine, etc.

[0003] In the prior art, in the technical fields of long-distance measurement, monitoring, and remote transmission of information using ultrasound, low-frequency ultrasonic sensors are required. Therefore, low-frequency MEMS chip devices also have a large market. However, traditional piezoelectric MEMS chips are composed of an SOI substrate with a back cavity and a piezoelectric layer arranged in a stacked manner. The top silicon in the SOI substrate serves as a structural layer to undertake the function of the neutral plane. The Young's modulus of silicon is relatively high, and the process stress is high, which leads to a high resonance frequency and is not conducive to the production design and manufacturing of low-frequency devices.

[0004] In summary, the present application now proposes a piezoelectric PMUT based on a MEMS chip and a preparation method thereof to solve the above problems. Summary of the Invention

[0005] The present invention aims to solve the problems raised in the background art. The purpose of one or more embodiments of this specification is to propose a piezoelectric PMUT based on a MEMS chip and a preparation method thereof. By using silicon oxide as the structural layer to replace the traditional top silicon, the Young's modulus of silicon oxide is low, and the process stress is low, which can effectively reduce the resonance frequency.

[0006] Based on the above purpose, one or more embodiments of this specification provide a piezoelectric PMUT based on a MEMS chip, including a substrate. The substrate has opposite front and back surfaces. A piezoelectric layer is formed on the front surface of the substrate. The substrate is penetrated to form a back cavity. A structural layer is formed on the surface of the piezoelectric layer. The thickness of the structural layer is greater than the thickness of the piezoelectric thin film in the piezoelectric layer, so that the neutral plane is within the lateral projection area of the structural layer.

[0007] The piezoelectric PMUT based on the MEMS chip according to the embodiment of the present invention, the piezoelectric layer and the structural layer within the longitudinal projection area of the back cavity are the diaphragm, a groove body is formed by penetrating the structural layer along the edge of the diaphragm, so that the structural layer is divided into an external structure and an internal structure, and the external structure and the internal structure are connected by a fixed beam.

[0008] The piezoelectric PMUT based on the MEMS chip according to the embodiment of the present invention, the groove body is in a shape of a rectangle, a ring or a hexagon.

[0009] The piezoelectric PMUT based on the MEMS chip according to the embodiment of the present invention, a plurality of fixed beams are provided, and the plurality of fixed beams are arranged in a circular array in the groove body.

[0010] The piezoelectric PMUT based on the MEMS chip according to the embodiment of the present invention, the material of the structural layer is silicon oxide.

[0011] The piezoelectric PMUT based on the MEMS chip according to the embodiment of the present invention, the structural layer is a double-layer structure formed by alternately laminating silicon nitride and silicon oxide.

[0012] The piezoelectric PMUT based on the MEMS chip according to the embodiment of the present invention, the structural layer is a three-layer structure formed by alternately laminating silicon nitride and silicon oxide.

[0013] The preparation method according to the embodiment of the present invention, which is used to prepare the piezoelectric PMUT based on the MEMS chip described above, includes the following steps:

[0014] Prepare a substrate, the substrate has opposite front and back surfaces;

[0015] Grow a piezoelectric layer on the front surface of the substrate;

[0016] Etch the piezoelectric layer to pattern the piezoelectric layer;

[0017] Grow a structural layer on the surface of the patterned piezoelectric layer;

[0018] Etch the structural layer to pattern the structural layer;

[0019] Etch through the substrate to form a back cavity;

[0020] Wherein, the thickness of the structural layer is greater than the thickness of the piezoelectric thin film in the piezoelectric layer, so that the neutral plane is within the transverse projection area of the structural layer.

[0021] The preparation method according to the embodiment of the present invention, etching the structural layer to pattern the structural layer specifically includes:

[0022] A groove is formed by penetrating the structural layer along the edge of the diaphragm region, that is, the outermost side of the groove and the side of the back cavity are in the same vertical plane. The structural layer forms an external structure and an internal structure due to the groove, and the external structure and the internal structure are connected by a fixed beam formed by etching.

[0023] According to the preparation method provided by the embodiment of the present invention, the groove is in a shape of a rectangle, a ring or a hexagon.

[0024] According to the preparation method provided by the embodiment of the present invention, there are a plurality of fixed beams formed by etching, and the plurality of fixed beams are arranged in a circular array in the groove.

[0025] According to the preparation method provided by the embodiment of the present invention, the back cavity is formed by etching the substrate through, which specifically includes:

[0026] Etching a part of the substrate from the back of the substrate by a dry process;

[0027] Etching the substrate through by a wet process.

[0028] A piezoelectric PMUT based on a MEMS chip and a preparation method thereof disclosed by the present invention adopt silicon oxide as the structural layer to replace the traditional top silicon. The silicon oxide has a low Young's modulus and a low process stress, which can effectively reduce the resonance frequency and is beneficial to the manufacture of low-frequency devices. Further, by opening a groove in the structural layer, the stress of the device is released, and the resonance frequency is further reduced.

[0029] The beneficial effects of the present invention will be described in detail below according to the embodiments and the accompanying drawings of the present invention. Description of the Drawings

[0030] In order to more clearly illustrate the technical solutions in one or more embodiments of the present specification or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only one or more embodiments of the present specification. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0031] Figure 1 It is a schematic structural diagram of a piezoelectric PMUT based on a MEMS chip provided by an embodiment of the present invention;

[0032] Figure 2 For Figure 1 exploded view of the structure;

[0033] Figure 3 For Figure 1 front view of;

[0034] Figure 4 For Figure 1 bottom view of;

[0035] Figure 5 Top view of the structural layer in Example 4;

[0036] Figure 6 Schematic diagram of an optional structural layer in Example 4;

[0037] Figure 7 Schematic diagram of an optional structural layer in Example 4;

[0038] Figure 8 Schematic diagram of Example 2;

[0039] Figure 9 Schematic diagram of Example 3;

[0040] Figure 10 Schematic flow chart of step S1 of the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in the embodiment of the present invention;

[0041] Figure 11 Schematic flow chart of step S2 of the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in the embodiment of the present invention;

[0042] Figure 12a Schematic flow chart of step S3 of the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in Embodiment 1 of the present invention;

[0043] Figure 12b Schematic flow chart of step S3 of the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in Embodiment 2 of the present invention;

[0044] Figure 12c Schematic flow chart of step S3 of the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in Embodiment 3 of the present invention;

[0045] Figure 13a Schematic flow chart of step S4 of the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in Embodiment 1 of the present invention;

[0046] Figure 13b Schematic flow chart of step S4 of the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in Embodiment 2 of the present invention;

[0047] Figure 13c Schematic flow chart of step S4 of the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in Embodiment 3 of the present invention;

[0048] Figure 14a Schematic flow chart of step S5 of the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in Embodiment 1 of the present invention;

[0049] Figure 14b Schematic flow chart of step S5 in the preparation method of a piezoelectric PMUT based on a MEMS chip proposed in Embodiment 2 of the present invention;

[0050] Figure 14c Schematic flow chart of step S5 in the preparation method of a piezoelectric PMUT based on a MEMS chip proposed in Embodiment 3 of the present invention.

[0051] In the attached drawing reference numerals: 1. Substrate; 2. Piezoelectric layer; 21. Bottom electrode; 22. Piezoelectric thin film; 23. Top electrode; 3. Structural layer; 31. First structural layer; 32. Second structural layer; 33. Third structural layer; 3a. Internal structure; 3b. External structure; 3c. Fixed beam; 3d. Groove. Detailed implementation manners

[0052] To make the objectives, technical solutions and advantages of the present disclosure clearer and more understandable, the present disclosure will be further described in detail below in conjunction with specific embodiments.

[0053] Embodiment 1

[0054] Please refer to Figures 1-4 , a piezoelectric PMUT based on a MEMS chip proposed in an embodiment of the present invention includes a substrate 1, a piezoelectric layer 2 and a structural layer 3 which are sequentially stacked.

[0055] The substrate 1 has opposite front and back surfaces. A back cavity is opened through the substrate 1 from the back surface of the substrate 1. The piezoelectric layer 2 and the structural layer 3 within the longitudinal projection range of the back cavity are diaphragms, and the back cavity provides a space for the diaphragms to vibrate.

[0056] The piezoelectric layer 2 includes a bottom electrode 21, a piezoelectric thin film 22 and a top electrode 23 which are sequentially stacked on the surface of the substrate 1. The thickness of the structural layer 3 is greater than the thickness of the piezoelectric thin film 12, so that the neutral plane is within the lateral projection area of the structural layer 3.

[0057] The material of the structural layer 3 is silicon oxide, and the Young's modulus of silicon oxide is lower than that of silicon.

[0058] For the piezoelectric PMUT based on a MEMS chip proposed in an embodiment of the present invention, silicon oxide is used instead of silicon as the material of the structural layer. Silicon oxide has a low Young's modulus and low process stress, which can effectively reduce the resonance frequency and is beneficial to the design and manufacture of low-frequency devices.

[0059] Optionally, the substrate 1 is a silicon wafer substrate, and the use of a silicon wafer substrate instead of an SOI substrate reduces the cost.

[0060] Embodiment 2

[0061] As Figure 8As shown, preferably based on Embodiment 1, the structural layer 3 includes a first structural layer 31 and a second structural layer 32, and the thickness of the second structural layer 32 is much greater than that of the first structural layer 31. Preferably, the material of the first structural layer 31 is silicon nitride (Si 3 N 4 ), and the material of the second structural layer 32 is silicon oxide (SiO 2) .

[0062] Of course, those skilled in the art can optionally, in some embodiments, when the material of the first structural layer 31 is silicon oxide, the material of the second structural layer 32 is silicon nitride.

[0063] Embodiment 3

[0064] As Figure 9 shown, preferably based on Embodiment 1, the structural layer 3 includes a first structural layer 31, a second structural layer 32 and a third structural layer 33, and the thickness of the second structural layer 32 is much greater than that of the first structural layer 31 and / or the third structural layer 33. Preferably, the material of the first structural layer 31 is silicon nitride (Si 3 N 4 ), the material of the second structural layer 32 is silicon oxide (SiO 2) , and the material of the third structural layer 33 is silicon nitride.

[0065] Of course, in some embodiments, those skilled in the art can optionally, when the material of the first structural layer 31 is silicon oxide, the material of the second structural layer 32 is silicon nitride, and the material of the third structural layer 33 is silicon oxide.

[0066] The main structure of the structural layer 3 in the embodiments of the present invention is the second structural layer 32. The second structural layer 32 mainly undertakes the function of adjusting the neutral plane of the chip. The device performance is mainly determined by the material and thickness of the second structural layer 32. The main function of the first structural layer 31 is to improve the adhesion of the intermediate layer and improve the film forming quality. The third structural layer 33 increases the flexibility of the structural layer 3, and the three-layer structure is more stable and reliable, improving the yield rate (please refer to Figure 9 ).

[0067] Embodiment 4

[0068] To further reduce the resonance frequency, please refer to Figure 5 , as a preferred solution of Embodiment 1, the piezoelectric layer 2 and the structural layer 3 within the longitudinal projection area of the back cavity are the vibrating membrane. A groove 3d is formed through the structural layer 3 along the edge of the vibrating membrane, so that the structural layer 3 is divided into an external structure 3a and an internal structure 3b, and the external structure 3a and the internal structure 3b are connected by a fixed beam 3c.

[0069] As Figures 5-7Optionally, the groove 3d is in a zigzag, annular or hexagonal shape. It should be noted here that the groove 3d can be set to any shape that can improve the device performance as required. Here is just an example and there is no special limitation.

[0070] As Figures 5-7 Optionally, a plurality of fixed beams 3c are provided, and the plurality of fixed beams 3c are arranged in an annular array in the groove 3d.

[0071] The piezoelectric PMUT based on the MEMS chip proposed in the embodiment of the present invention releases the stress of the device by grooving on the structural layer 3, and further reduces the resonance frequency.

[0072] Embodiment 5

[0073] Please refer to Figure 10 , S1, prepare the substrate 1. The substrate 1 has opposite front and back surfaces. Grow the piezoelectric layer 2 on the front surface of the substrate 1, specifically including:

[0074] S1-1, sputter and grow the bottom electrode 21 on the front surface of the substrate 1;

[0075] S1-2, sputter and grow the piezoelectric thin film 22 on the surface of the bottom electrode 21;

[0076] S1-3, sputter and grow the top electrode 23 on the surface of the piezoelectric thin film 22.

[0077] Please refer to Figure 11 , S2, etch the piezoelectric layer 2 to pattern the piezoelectric layer 2, specifically including:

[0078] S2-1, use IBE dry etching to etch the top electrode 23 to pattern the top electrode 23;

[0079] S2-2, use wet etching to etch the piezoelectric thin film 22 to pattern the piezoelectric thin film 22;

[0080] S2-3, use IBE dry etching to etch the bottom electrode 21 to pattern the bottom electrode 21.

[0081] Please refer to Figures 12a-12c , S3, deposit the structural layer 3 on the surface of the piezoelectric layer 2 by PECVD process. The thickness of the structural layer 3 is greater than the thickness of the piezoelectric thin film 22, so that the neutral plane is within the lateral projection area of the structural layer 3.

[0082] Please refer to Figure 13a , S4, etch the structural layer 3 to pattern the structural layer 3.

[0083] Please refer to Figure 14a, S5, etch through the back of the substrate 1 to form a back cavity. The piezoelectric layer 2 and the structural layer 3 within the longitudinally projected area of the back cavity serve as the diaphragm, and the back cavity provides a vibration space for the diaphragm. Specifically, it includes:

[0084] S5-1, etch the back of the substrate 1 through DIRE. Here, the substrate 1 will not be etched through because IBE etching will damage the piezoelectric layer 2. Therefore, after DIRE etching, 5-15% of the thickness of the substrate 1 will remain.

[0085] S5-2, etch the back of the substrate 1 through a wet process to completely etch through the remaining 5-15% thickness of the substrate 1, form a meandering support structure, and form a back cavity.

[0086] The preparation method of the present invention is for piezoelectric MEMS chips based on silicon wafer substrates. Because in the case of SOI substrates, the buried oxide layer serves as a stop line during etching, and a back cavity can be formed by etching through the buried oxide layer. Pure dry etching may damage the piezoelectric layer 2. In order to improve the yield, a part of the silicon wafer substrate is etched by dry etching, and then the remaining part is etched through by a wet process. The wet process will not affect the piezoelectric layer 2.

[0087] In the preparation method of the piezoelectric PMUT based on the MEMS chip proposed in the embodiment of the present invention, compared with the traditional preparation process, the piezoelectric layer 2 is first grown and patterned, then the structural layer 3 is grown on the surface of the piezoelectric layer 2, and then the structural layer 3 is patterned. Therefore, the patterning steps of the piezoelectric layer 2 and the structural layer 3 are independent and do not interfere with each other. The piezoelectric layer 2 does not need to have unnecessary voids due to the pattern of the structural layer 3, which maximally ensures the integrity of the piezoelectric layer 2.

[0088] Example 6

[0089] As a preferred solution of Example 5, as Figures 13b-13c shown in S4, etch the structural layer 3 to pattern the structural layer 3. The structural layer 3 is a double-layer structure or a triple-layer structure formed by alternately laminating silicon nitride and silicon oxide. Optionally, the structural layer 3 includes a first structural layer 31, a second structural layer 32, and a third structural layer 33. The materials of the first structural layer 31 and the third structural layer 33 are silicon nitride, and the material of the second structural layer 32 is silicon oxide. The thickness of the second structural layer 32 is much greater than the thicknesses of the first structural layer 31 and the third structural layer 33.

[0090] The structural layer 3 forms a groove 3d along the edge of the diaphragm area. The structural layer 3 forms an external structure 3a and an internal structure 3b due to the groove 3d, and the external structure 3a and the internal structure 3b are connected by a fixed support beam 3c formed by etching.

[0091] Optionally, the groove 3d is in a meandering shape, a circular shape, or a hexagonal shape.

[0092] Optionally, there are several fixed beams 3c formed by etching, and the several fixed beams are arranged in a circular array in the groove body 3d.

[0093] As Figures 14b-14c shown in S5, the substrate 1 is etched through from the back surface of the substrate 1 to form a back cavity. The piezoelectric layer 2 and the structural layer 3 within the longitudinal projection area of the back cavity are diaphragms, and the back cavity provides a space for the diaphragms to vibrate. Specifically, it includes:

[0094] S5-1, the back surface of the substrate 1 is etched by DIRE etching (deep reactive ion etching), and the substrate 1 will not be etched through here. Since IBE etching (ion beam etching) will damage the piezoelectric layer 2, after DIRE etching, 5-15% of the thickness of the substrate 1 will remain;

[0095] S5-2, the back surface of the substrate 1 is etched by a wet process to completely etch through the remaining 5-15% thickness of the substrate 1, forming a zigzag support structure and a back cavity.

[0096] It should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present invention.

[0097] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present invention, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0098] In the present invention, unless otherwise clearly defined and limited, the terms "mounted", "connected", "connected to", "fixed", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection, an electrical connection, or communicable with each other; it may be directly connected, or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0099] In the present invention, unless otherwise clearly defined and limited, the first feature being "on" or "under" the second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature may mean that the first feature is directly above or obliquely above the second feature, or merely indicates that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "below" and "beneath" the second feature may mean that the first feature is directly below or obliquely below the second feature, or merely indicates that the horizontal height of the first feature is less than that of the second feature.

[0100] As described above, the above are only the preferred specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and inventive concept of the present invention, making equivalent substitutions or changes, shall be covered by the protection scope of the present invention.

Claims

1. A piezoelectric PMUT based on a MEMS chip, comprising a substrate (1), wherein the substrate (1) has a front side and a back side opposite to each other, and a piezoelectric layer (2) is formed on the front side of the substrate (1), characterized in that: The substrate (1) is penetrated to form a back cavity, and a structural layer (3) is formed on the surface of the piezoelectric layer (2). The thickness of the structural layer (3) is greater than the thickness of the piezoelectric film (22) in the piezoelectric layer (2), so that the neutral plane is located within the lateral projection area of ​​the structural layer (3).

2. The piezoelectric PMUT based on a MEMS chip according to claim 1, characterized in that: The piezoelectric layer (2) and the structural layer (3) within the longitudinal projection area of ​​the back cavity are a diaphragm, and a groove (3d) is formed by penetrating the structural layer (3) along the edge of the diaphragm, so that the structural layer (3) is divided into an external structure (3a) and an internal structure (3b), and the external structure (3a) and the internal structure (3b) are connected by a fixed support beam (3c).

3. The piezoelectric PMUT based on a MEMS chip according to claim 2, characterized in that: The trough body (3d) is in the shape of a U-shaped circle, a ring or a hexagon.

4. The piezoelectric PMUT based on a MEMS chip according to claim 3, characterized in that: A plurality of the fixed support beams (3c) are provided, and the plurality of fixed support beams (3c) are arranged in a ring array in the trough body (3d).

5. The piezoelectric PMUT based on a MEMS chip according to claim 4, characterized in that: The material of the structural layer (3) is silicon oxide.

6. The piezoelectric PMUT based on a MEMS chip according to claim 4, characterized in that: The structural layer (3) is a double-layer structure in which silicon nitride and silicon oxide are alternately stacked.

7. The piezoelectric PMUT based on a MEMS chip according to claim 4, characterized in that: The structural layer (3) is a three-layer structure in which silicon nitride and silicon oxide are alternately stacked.

8. A preparation method for preparing the piezoelectric PMUT based on a MEMS chip as claimed in any one of claims 1 to 7, characterized in that: The following steps are involved: A substrate (1) is prepared, wherein the substrate (1) has a front side and a back side opposite to each other, and a piezoelectric layer (2) is grown on the front side of the substrate (1); Etching the piezoelectric layer (2) to pattern the piezoelectric layer (2); Growing a structural layer (3) on the surface of the patterned piezoelectric layer (2); Etching the structural layer (3) to pattern the structural layer (3); Etching through the substrate (1) to form a back cavity; The thickness of the structural layer (3) is greater than the thickness of the piezoelectric film (22) in the piezoelectric layer (2), so that the neutral plane is located within the lateral projection area of ​​the structural layer (3).

9. The preparation method according to claim 8, characterized in that: Etching the structural layer (3) to pattern the structural layer (3) specifically includes: The structural layer (3) is penetrated along the edge of the diaphragm region to form a groove body (3d), and the structural layer (3) forms an external structure (3a) and an internal structure (3b) due to the groove body (3d), and the external structure (3a) and the internal structure (3b) are connected by a fixed support beam (3c) formed by etching.

10. The preparation method according to claim 9, characterized in that: The trough body (3d) is in the shape of a Chinese character "Yu", a ring or a hexagon; a plurality of fixed support beams (3c) are formed by etching, and the plurality of fixed support beams are arranged in the trough body (3d) in the shape of a ring array.

11. The preparation method according to claim 10, characterized in that: Etching through the substrate (1) to form a back cavity, specifically comprising: Etching a portion of the substrate (1) from the back side of the substrate (1) through a dry process; The substrate (1) is etched through by a wet process.

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