Maximum working frequency determination method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention discloses a maximum working frequency determination method and device, electronic equipment and a storage medium, and relates to the technical field of integrated circuits, and the method comprises the steps: obtaining a reference working frequency of a target chip capable of passing a function test; applying a clock frequency greater than the reference working frequency to a target component on the target chip, applying the reference working frequency to a non-target component on the target chip, and performing a function test on the target chip under a set voltage; if the function test is passed, gradually increasing the clock frequency applied to the target component, and continuing the function test until the test is not passed; and determining the maximum working frequency of the target component based on the clock frequency applied to the target component when the test is not passed. According to the technical scheme provided by the embodiment of the invention, by independently testing the maximum working frequency of the target component, the true performance limit of the target component can be found more accurately, and performance waste caused by overall frequency setting is avoided.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit technology, and in particular to a method, device, electronic device and storage medium for determining a maximum operating frequency. Background Art

[0002] In integrated circuit design, especially for the development of central processing units (CPUs), the key factors affecting their processing speed are the operating frequencies of the processing core (Core) and the third-level cache (L3). It is extremely necessary to test the maximum operating frequency (Fmax) of the Core and L3. High frequencies can significantly increase the speed of the CPU when processing complex tasks. In addition, understanding the maximum operating frequency of the core and L3 cache can also help to accurately optimize the voltage supply, thereby reducing power consumption.

[0003] In traditional methods, the clock break down (CBD) technique is generally used to test the maximum operating frequency. However, this test method evaluates the Core and L3 as a whole, and can only obtain the maximum operating frequency of the processor as a whole, which is usually the maximum operating frequency of the Core. Based on this common maximum operating frequency, technicians set the corresponding voltage level to ensure that the system can run reliably at the highest speed. This method has certain limitations because under high voltage conditions, the L3 cache capacity can reach a higher frequency than the Core. If the common maximum operating frequency is simply equated with the maximum operating frequency of L3, and voltage is applied to L3 based on this frequency, it may cause the applied voltage to exceed the actual demand, thereby increasing unnecessary power consumption. Summary of the invention

[0004] In view of this, an embodiment of the present invention provides a maximum operating frequency determination method, device, electronic device and storage medium to solve the problem in the prior art that the maximum operating frequency of L3 cannot be independently evaluated, thereby achieving more accurate voltage supply and power consumption optimization.

[0005] In a first aspect, an embodiment of the present invention provides a method for determining a maximum operating frequency, comprising: Obtaining the benchmark operating frequency at which the target chip can pass the functional test; Applying a clock frequency greater than the reference operating frequency to a target component on the target chip, applying the reference operating frequency to a non-target component on the target chip, and performing a functional test on the target chip under a set voltage; If the functional test passes, gradually increasing the clock frequency applied to the target component, and continuing the functional test until the test fails; A maximum operating frequency of the target component is determined based on a clock frequency applied to the target component when the test fails.

[0006] Further, the obtaining of a reference operating frequency at which the target chip can pass the functional test includes: Determine the maximum operating frequency of the target chip that can pass the functional test through clock decomposition test; A frequency not exceeding the maximum operating frequency is set as the reference operating frequency.

[0007] Further, determining the maximum operating frequency of the target component based on the clock frequency applied to the target component when the test fails includes: When the test fails, determining whether the step size of each increase in the clock frequency applied to the target component exceeds a preset threshold; If not, the clock frequency applied to the target component when the test last passed before the test failed is used as the maximum operating frequency of the target component; If yes, then the step size is reduced, the step of gradually increasing the clock frequency applied to the target component is performed, and the functional test is continued until the test fails.

[0008] Furthermore, before obtaining the reference operating frequency at which the target chip can pass the functional test, the method further includes: From the chip pool that has passed the basic test, select candidate chips whose electrical parameters of the metal oxide semiconductor (MOS) devices contained therein meet the preset requirements; The target chip is evenly selected from the screened candidate chips according to the saturation current data of the MOS device.

[0009] Furthermore, the evenly selecting the target chip from the screened candidate chips according to the saturation current data of the MOS device includes: Based on the saturation current data of MOS devices, the selected candidate chips are classified according to different process corner conditions; A chip is selected from the candidate chips of each category as the target chip.

[0010] Furthermore, the target component is a three-level cache; and the non-target component includes a processing core.

[0011] In a second aspect, an embodiment of the present invention provides a maximum operating frequency determination device, including: A reference operating frequency acquisition unit, used to acquire a reference operating frequency at which the target chip can pass the functional test; A chip function test unit, used to: apply a clock frequency greater than the reference operating frequency to a target component on the target chip, apply the reference operating frequency to a non-target component on the target chip, and perform a function test on the target chip under a set voltage; if the function test passes, gradually increase the clock frequency applied to the target component, and continue the function test until the test fails; The maximum operating frequency determination unit is used to determine the maximum operating frequency of the target component based on the clock frequency applied to the target component when the test fails.

[0012] Furthermore, the reference operating frequency acquisition unit is specifically used to: determine the maximum operating frequency of the target chip that can pass the functional test through a clock decomposition test; and set a frequency that does not exceed the maximum operating frequency as the reference operating frequency.

[0013] Furthermore, the maximum operating frequency determination unit is specifically used to: when the test fails, determine whether the step size of each increase in the clock frequency applied to the target component exceeds a preset threshold; if not, use the clock frequency applied to the target component when the test failed for the last time as the maximum operating frequency of the target component; if yes, reduce the step size, trigger the chip functional test unit to execute the step of gradually increasing the clock frequency applied to the target component, and continue the functional test until the test fails.

[0014] Furthermore, the device also includes a chip selection unit, which is used to: screen out candidate chips whose electrical parameters of metal oxide semiconductor (MOS) devices contained therein meet preset requirements from a chip pool that has passed the basic test before the reference operating frequency acquisition unit acquires the reference operating frequency at which the target chip can pass the functional test; and evenly select the target chip from the screened candidate chips based on the saturation current data of the MOS device.

[0015] Furthermore, the chip selection unit is specifically used for: classifying the selected candidate chips according to different process corner conditions based on the saturation current data of the MOS device; and selecting a chip from the candidate chips in each category as the target chip.

[0016] Furthermore, the target component is a three-level cache; and the non-target component includes a processing core.

[0017] In a third aspect, an embodiment of the present invention provides an electronic device, comprising: a housing, a processor, a memory, a circuit board and a power supply circuit, wherein the circuit board is placed inside a space enclosed by the housing, and the processor and the memory are arranged on the circuit board; a power supply circuit for supplying power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, so as to execute the maximum operating frequency determination method described in the first aspect above.

[0018] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the maximum operating frequency determination method described in the first aspect above.

[0019] The technical solution provided by the embodiment of the present invention independently adjusts the clock frequency of the target component (such as L3 cache) while keeping other components running at the reference frequency, and gradually increases the clock frequency of the target component until the chip functional test fails, thereby accurately determining the maximum operating frequency of the component. This solution overcomes the limitation that traditional technology cannot evaluate the maximum operating frequency of L3 independently. In addition, based on the independently determined maximum operating frequency of L3, a more accurate voltage supply can be achieved, avoiding the application of excessive voltage to L3 due to the use of a unified maximum operating frequency, thereby achieving a better power consumption optimization effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0021] Figure 1 A flowchart of a method for determining a maximum operating frequency provided in Embodiment 1 of the present invention; Figure 2 A flowchart of a method for determining a maximum operating frequency provided in Embodiment 2 of the present invention; Figure 3 A scatter plot for selecting a target chip provided in the second embodiment of the present invention; Figure 4 A schematic diagram of the structure of a device for determining a maximum operating frequency provided in Embodiment 3 of the present invention; Figure 5 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0022] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0023] It should be clear that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] The technical solution of the present invention is described in detail below through various embodiments.

[0025] Embodiment 1 This embodiment provides a maximum operating frequency determination method, which can be performed by a corresponding maximum operating frequency determination device. Figure 1 The method specifically includes the following steps 101-104.

[0026] Step 101: Obtain a reference operating frequency at which a target chip can pass a functional test.

[0027] In this step 101, the target chip can be any semiconductor chip containing multiple components, such as a system on chip (SOC). The components each have an independent operating frequency, and may include a processing core, a cache, a memory, a power management module, etc. The reference operating frequency is a verified frequency, which refers to the operating frequency at which the target chip (including all its components) can stably pass the functional test under standard operating conditions. It should be noted that the functional test includes but is not limited to logic function test, performance test, environmental test (such as test at different temperatures), voltage stability test, etc.

[0028] In specific implementation, the reference operating frequency can be pre-configured through previous test data, chip specifications or empirical values. Alternatively, the maximum operating frequency of the target chip that can pass the functional test is determined through clock decomposition testing; the frequency that does not exceed the maximum operating frequency is set as the reference operating frequency, for example, the maximum operating frequency can be directly used as the reference operating frequency, or a frequency less than the maximum operating frequency can be used as the reference operating frequency, such as a certain ratio of the maximum operating frequency.

[0029] As a preferred implementation, first, the initial reference operating frequency is set through the previous test data, chip specifications or experience values; then, the clock decomposition test is performed: on the basis of the initial reference operating frequency, the clock frequency of the target chip is gradually increased, and the functional test of the target chip is performed; the highest frequency that the target chip can pass the functional test, that is, the maximum operating frequency, is recorded; finally, a value slightly lower than the maximum operating frequency is selected as the final reference operating frequency, which can not only ensure that the target chip can operate stably at this frequency, but also reduce the test time and resource waste caused by the frequency starting point being too low when the maximum operating frequency of the target component is determined later. Among them, the determination of the slightly lower value needs to find a balance between ensuring the stability of the target chip and reducing the test time and resource waste, and specifically at least one of the following aspects can be considered: experience, statistical analysis and operating environment factors. For example, a frequency that can work stably under the worst temperature and voltage conditions is selected. Typically, a value between 90% and 95% of the maximum operating frequency is taken, which can avoid unstable performance due to temperature changes, power supply fluctuations or other environmental factors.

[0030] Step 102: Apply a clock frequency greater than the reference operating frequency to the target component on the target chip, apply the reference operating frequency to the non-target component on the target chip, and perform a functional test on the target chip under a set voltage. If the functional test passes, execute step 103; otherwise, execute step 104 directly.

[0031] In this step 102, the target component can be any component on the target chip that satisfies the maximum operating frequency greater than the following frequency: the overall maximum operating frequency of the target chip, that is, the maximum operating frequency of the target chip (including all its components) that can pass the functional test. Non-target components refer to all components on the target chip except the target component. For a target chip that includes both a processing core and a three-level cache, the target component can be a three-level cache L3, and the non-target component includes the processing core. The functional test is the same as the functional test in step 101, including but not limited to logic function test, performance test, environmental test (such as test at different temperatures), voltage stability test, etc.

[0032] Step 103 : gradually increase the clock frequency applied to the target component, and continue the functional test until the test fails. Execute step 104 .

[0033] In this step 103, starting from the reference operating frequency, the clock frequency of the target component is gradually increased. The step size of each increase can be set according to the actual situation and test requirements, for example, 50 MHz or 100 MHz is increased each time. After each increase in the clock frequency of the target component, a complete functional test is performed on the target chip until the target chip fails the functional test. During the test, ensure that the non-target components are kept running at the reference operating frequency to eliminate the influence of other components. Record the clock frequency and test results of the target component during each test.

[0034] Step 104: Determine the maximum operating frequency of the target component based on the clock frequency applied to the target component when the test fails.

[0035] In step 104, the clock frequency applied to the target component when the test failed for the last time can be directly used as the maximum operating frequency of the target component. If the target component fails in the first functional test, the reference operating frequency set in step 101 can be regarded as the clock frequency applied to the target component when the test failed for the last time. As a preferred embodiment, this step can specifically include: When the test fails, determining whether the step size of each increase in the clock frequency applied to the target component exceeds a preset threshold; If not, the clock frequency applied to the target component when the test last passed before the test failed is used as the maximum operating frequency of the target component; If yes, then the step size is reduced, the step of gradually increasing the clock frequency applied to the target component is performed, and the functional test is continued until the test fails.

[0036] In the above preferred embodiment, when it is found that the target component fails the functional test at a certain clock frequency, it is necessary to analyze the frequency and decide how to continue to determine its maximum operating frequency. Specifically, when the test fails, first determine whether the increase step between the clock frequency applied to the target component at this time and the last successful frequency exceeds the preset threshold. This judgment step is to ensure that more precise adjustments can be made when approaching the maximum operating frequency, thereby improving the test accuracy. Afterwards, the following situation analysis is performed: Case 1: The step length does not exceed the preset threshold: If the step size does not exceed the preset threshold, it indicates that the amplitude of the frequency adjustment is reasonable. At this time, the clock frequency that passed the last test can be regarded as the maximum operating frequency of the target component. This is because the last frequency has proved that the component can work normally at this frequency, ensuring the reliability of the system. Case 2: The step length exceeds the preset threshold: If the step size exceeds the preset threshold, it means that the applied frequency increases too fast and may exceed the tolerance of the target component. At this time, it is necessary to reduce the step size and gradually increase the clock frequency of the target component from the clock frequency applied to the target component when the last functional test passed, and perform functional tests on the target chip. This process will continue until the test fails again, so as to gradually find a suitable maximum operating frequency for the target chip.

[0037] This preferred method uses a phased and progressive approach combined with actual test results to correct and optimize the frequency adjustment strategy, which helps to find a more accurate maximum operating frequency, avoids the problem of unstable frequency setting due to excessive step size, and improves the reliability and accuracy of the test.

[0038] It should be noted that, in this embodiment, after each execution of the maximum operating frequency determination method, the set voltage may be updated once. Then, the maximum operating frequency determination method is re-executed under the updated set voltage. In this way, the maximum operating frequency of the target component can be comprehensively evaluated under different voltage conditions, thereby ensuring the performance and stability of the chip under various operating conditions.

[0039] The technical solution provided by the embodiment of the present invention can gradually increase the clock frequency applied to the target component while maintaining the non-target component at the reference frequency, and perform functional testing on the target chip, thereby achieving an accurate evaluation of the maximum operating frequency of the target component. Once the maximum operating frequency of the target component is determined, a more accurate voltage can be supplied to the component to match its operating characteristics, avoiding unnecessary power consumption caused by applying an excessively high voltage, thereby achieving power consumption optimization.

[0040] Embodiment 2 This embodiment adds a target chip selection step based on the above embodiment 1. Figure 2 , a method for determining a maximum operating frequency, comprising: Step 201 : Screen out candidate chips whose electrical parameters of metal oxide semiconductor (MOS) devices meet preset requirements from a pool of chips that have passed the basic test.

[0041] In this step, the basic test is to verify whether the basic electrical and physical characteristics of the chip meet the design specifications and ensure that the chip can work normally at the physical level. The specific test content may include: power supply voltage and current test, temperature test, signal waveform integrity test, PCB (Printed Circuit Board) connection integrity test, and preliminary hardware reliability test. The MOS devices on the chip may include: P-channel metal oxide semiconductor field effect transistor PMOS, and N-channel metal oxide semiconductor field effect transistor NMOS. The electrical parameters determine the performance of the MOS device and may include one or more of the threshold voltage, drive current, leakage current, gain, etc. The preset requirement may be that each electrical parameter value is within the set qualified range, such as within the range of ±3σ. Among them, σ represents the standard deviation, and the 3σ range corresponds to the 99.73% data set range in a normal distribution.

[0042] Step 202: uniformly select target chips from the screened candidate chips according to the saturation current data of the MOS device.

[0043] In this step 202, the distribution of saturation current data can be obtained in advance, such as arranging the saturation current data of the MOS devices on all candidate chips into a table or database, and drawing a distribution diagram of the saturation current data. Further, according to the distribution of the saturation current data, the candidate chips are divided into several intervals or groups. For example, the saturation current data can be divided into 5 or 10 intervals, each interval containing a certain number of candidate chips. The number of target chips to be selected for each interval is determined based on the total number of target chips and the number of groups required. For example, if 50 target chips need to be selected and divided into 10 intervals, 5 chips should be selected for each interval. In each interval, the required number of target chips can be selected by random selection to ensure the fairness and unbiasedness of the selection process.

[0044] Preferably, the screened candidate chips can be classified into categories according to different process corner conditions based on the saturation current data of the MOS device; and a chip is selected from the candidate chips in each category as the target chip.

[0045] As a specific implementation method, first, for all the candidate chips screened out, a scatter plot is established according to the saturation current of NMOS and PMOS, such as Figure 3 As shown in the figure, the horizontal axis is the saturation current of NMOS on the candidate chip, and the vertical axis is the saturation current of PMOS on the candidate chip. Each point in the coordinates uniquely represents the position of the saturation current values ​​of NMOS and PMOS on a candidate chip in the figure. Then, according to the size of the horizontal and vertical coordinate values, the scatter plot is divided into the following four quadrants, each quadrant representing a different range of process corner conditions: FF (Fast NMOS, Fast PMOS), fast-fast, means the chip is composed of the fastest PMOS and the fastest NMOS, located in the upper right corner of the process corner condition range; FS (Fast NMOS, Slow PMOS), fast-slow, means the chip is composed of the slowest PMOS and the fastest NMOS, located in the lower right corner of the process corner condition range; TT (Typical Typical), typical-typical, means the chip is composed of typical PMOS and typical NMOS, located in the center of the process corner condition range; SF (Slow NMOS, Fast PMOS), slow-fast, means the chip is composed of the fastest PMOS and the slowest NMOS, located in the upper left corner of the process corner condition range; SS (Slow NMOS, Slow PMOS), slow-slow, means the chip consists of the slowest PMOS and the slowest NMOS, and is located in the lower left corner of the process corner condition range.

[0046] Then, a predetermined number of target chips are selected in each quadrant. For example, in the SS quadrant, the slowest PMOS and slowest NMOS chips are first selected as the first target chips, and then chips with increasing saturation current are selected in sequence until a predetermined number is reached. The same method is used in other quadrants. In addition, within a preset range centered on the origin of the TT quadrant (half of the maximum saturation current of NMOS and PMOS), another set of second target chips of a predetermined number are selected. Figure 3 In the figure, the candidate chips corresponding to the square dots are the selected target chips, and the chips represented by the square dots and the circle dots are the candidate chips selected from the chip pool that has passed the basic test.

[0047] Step 203: Obtain a reference operating frequency at which the target chip can pass the functional test.

[0048] Step 204: Apply a clock frequency greater than the reference operating frequency to the target component on the target chip, apply the reference operating frequency to the non-target components on the target chip, and perform a functional test on the target chip under a set voltage.

[0049] If the functional test passes, step 205 is executed; otherwise, step 206 is executed directly.

[0050] Step 205 , gradually increase the clock frequency applied to the target component, and continue the functional test until the test fails. Execute step 206 .

[0051] Step 206: Determine the maximum operating frequency of the target component based on the clock frequency applied to the target component when the test fails.

[0052] The above steps 203 to 206 are the same as the steps 101 to 104 in the first embodiment, and are not described in detail here.

[0053] The technical solution provided in this embodiment can improve the representativeness of samples, reduce deviations, improve the reliability and accuracy of test results, optimize resource utilization, and enhance quality control by uniformly selecting target chips based on the saturation current data of MOS devices.

[0054] Embodiment 3 This embodiment provides a maximum operating frequency determination device, which can be used to execute the maximum operating frequency determination method described in the embodiment of the present invention, and can be implemented by software and / or hardware. Figure 4 , the device specifically includes the following units: A reference operating frequency acquisition unit 401 is used to acquire a reference operating frequency at which the target chip can pass the functional test; The chip function test unit 402 is used to: apply a clock frequency greater than the reference operating frequency to a target component on the target chip, apply the reference operating frequency to a non-target component on the target chip, and perform a function test on the target chip under a set voltage; if the function test passes, gradually increase the clock frequency applied to the target component, and continue the function test until the test fails; The maximum operating frequency determination unit 403 is used to determine the maximum operating frequency of the target component based on the clock frequency applied to the target component when the test fails.

[0055] Exemplarily, the reference operating frequency acquisition unit 401 is specifically used for: Through clock decomposition test, determine the maximum operating frequency of the target chip that can pass the functional test; A frequency not exceeding the maximum operating frequency is set as the reference operating frequency.

[0056] As a preferred implementation, the maximum operating frequency determination unit 403 is specifically configured to: When the test fails, determining whether the step size of each increase in the clock frequency applied to the target component exceeds a preset threshold; If not, the clock frequency applied to the target component when the test last passed before the test failed is used as the maximum operating frequency of the target component; If yes, then the step size is reduced, triggering the chip functional test unit 402 to execute the step of gradually increasing the clock frequency applied to the target component, and continuing the functional test until the test fails.

[0057] Furthermore, the device further comprises a chip selection unit 400, which is used for: before the reference operating frequency acquisition unit acquires the reference operating frequency of the target chip that can pass the functional test: From the chip pool that has passed the basic test, select candidate chips whose electrical parameters of the metal oxide semiconductor (MOS) devices contained therein meet the preset requirements; According to the saturation current data of the MOS device, the target chip is evenly selected from the screened candidate chips.

[0058] Exemplarily, the chip selection unit 400 is specifically used for: Based on the saturation current data of MOS devices, the selected candidate chips are classified according to different process corner conditions; A chip is selected from the candidate chips of each category as the target chip.

[0059] Typically, the target component is the L3 cache; the non-target components include the processing core.

[0060] The maximum operating frequency determination device provided in this embodiment belongs to the same inventive concept as the aforementioned method embodiment. For technical details not described in this embodiment, reference can be made to the relevant description in the aforementioned method embodiment, and will not be repeated here.

[0061] Figure 5 FIG. 1 is a schematic diagram of the structure of an embodiment of an electronic device of the present invention, which can implement the process of the embodiment of the method of the present invention, such as Figure 5 As shown, the electronic device may include: a housing 51, a processor 52, a memory 53, a circuit board 54 and a power supply circuit 55, wherein the circuit board 54 is arranged inside the space enclosed by the housing 51, and the processor 52 and the memory 53 are arranged on the circuit board 54; the power supply circuit 55 is used to supply power to various circuits or devices of the electronic device; the memory 53 is used to store executable program codes; the processor 52 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 53, so as to execute the maximum operating frequency determination method described in any of the aforementioned embodiments.

[0062] The specific execution process of the above steps by the processor 52 and the steps further executed by the processor 52 by running the executable program code can be found in the description of the method embodiment of the present invention, which will not be repeated here.

[0063] This electronic device exists in many forms, including but not limited to: (1) Server: A device that provides computing services. The server consists of a processor, hard disk, memory, system bus, etc. The server has a similar architecture to general computers, but because it needs to provide highly reliable services, it has higher requirements in terms of processing power, stability, reliability, security, scalability, and manageability. (2) Other electronic equipment with data processing and communication functions.

[0064] Furthermore, an embodiment of the present invention also provides a computer-readable storage medium, which stores one or more programs. The one or more programs can be executed by one or more processors to implement the maximum operating frequency determination method described in the above embodiment.

[0065] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0066] In the embodiments of the present invention, the term "and / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent three situations: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0067] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments.

[0068] In particular, for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0069] For the convenience of description, the above device is described by dividing the functions into various units / modules. Of course, when implementing the present invention, the functions of each unit / module can be implemented in the same or multiple software and / or hardware.

[0070] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. The storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0071] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for determining a maximum operating frequency, characterized in that: The method comprises: Obtaining the benchmark operating frequency at which the target chip can pass the functional test; Applying a clock frequency greater than the reference operating frequency to a target component on the target chip, applying the reference operating frequency to a non-target component on the target chip, and performing a functional test on the target chip under a set voltage; If the functional test passes, gradually increasing the clock frequency applied to the target component, and continuing the functional test until the test fails; A maximum operating frequency of the target component is determined based on a clock frequency applied to the target component when the test fails.

2. The method according to claim 1, characterized in that The step of obtaining a reference operating frequency at which the target chip can pass a functional test includes: Determine the maximum operating frequency of the target chip that can pass the functional test through clock decomposition test; A frequency not exceeding the maximum operating frequency is set as the reference operating frequency.

3. The method according to claim 1, characterized in that: The determining the maximum operating frequency of the target component based on the clock frequency applied to the target component when the test fails includes: When the test fails, determining whether the step size of each increase in the clock frequency applied to the target component exceeds a preset threshold; If not, the clock frequency applied to the target component when the test last passed before the test failed is used as the maximum operating frequency of the target component; If yes, then the step size is reduced, the step of gradually increasing the clock frequency applied to the target component is performed, and the functional test is continued until the test fails.

4. The method according to claim 1, characterized in that Before obtaining a reference operating frequency at which the target chip can pass the functional test, the method further includes: From the chip pool that has passed the basic test, select candidate chips whose electrical parameters of the metal oxide semiconductor (MOS) devices contained therein meet the preset requirements; The target chip is evenly selected from the screened candidate chips according to the saturation current data of the MOS device.

5. The method according to claim 4, characterized in that The step of uniformly selecting the target chip from the screened candidate chips according to the saturation current data of the MOS device comprises: Based on the saturation current data of MOS devices, the selected candidate chips are classified according to different process corner conditions; A chip is selected from the candidate chips of each category as the target chip.

6. The method according to claim 1, characterized in that The target component is a level 3 cache; the non-target component includes a processing core.

7. A device for determining a maximum operating frequency, characterized in that: The device comprises: A reference operating frequency acquisition unit, used to acquire a reference operating frequency at which the target chip can pass the functional test; A chip function test unit, used to: apply a clock frequency greater than the reference operating frequency to a target component on the target chip, apply the reference operating frequency to a non-target component on the target chip, and perform a function test on the target chip under a set voltage; if the function test passes, gradually increase the clock frequency applied to the target component, and continue the function test until the test fails; The maximum operating frequency determination unit is used to determine the maximum operating frequency of the target component based on the clock frequency applied to the target component when the test fails.

8. The device according to claim 7, characterized in that The reference operating frequency acquisition unit is specifically used for: Determine the maximum operating frequency of the target chip that can pass the functional test through clock decomposition test; A frequency not exceeding the maximum operating frequency is set as the reference operating frequency.

9. The device according to claim 7, characterized in that The maximum operating frequency determination unit is specifically used for: When the test fails, determining whether the step size of each increase in the clock frequency applied to the target component exceeds a preset threshold; If not, the clock frequency applied to the target component when the test last passed before the test failed is used as the maximum operating frequency of the target component; If yes, then the step size is reduced, the chip functional test unit is triggered to execute the step of gradually increasing the clock frequency applied to the target component, and continuing the functional test until the test fails.

10. The device according to claim 7, characterized in that The device further includes a chip selection unit, which is used for: before the reference operating frequency acquisition unit acquires the reference operating frequency of the target chip that can pass the functional test: From the chip pool that has passed the basic test, select candidate chips whose electrical parameters of the metal oxide semiconductor (MOS) devices contained therein meet the preset requirements; The target chip is evenly selected from the screened candidate chips according to the saturation current data of the MOS device.

11. The device according to claim 10, characterized in that The chip selection unit is specifically used for: Based on the saturation current data of MOS devices, the selected candidate chips are classified according to different process corner conditions; A chip is selected from the candidate chips of each category as the target chip.

12. The device according to claim 7, characterized in that The target component is a level 3 cache; the non-target component includes a processing core.

13. An electronic device, characterized in that: The electronic device comprises: a housing, a processor, a memory, a circuit board and a power supply circuit, wherein the circuit board is placed inside the space enclosed by the housing, and the processor and the memory are arranged on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program codes; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, so as to execute any of the methods described in claims 1 to 6 above.

14. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the method of any one of the preceding claims 1-6.

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