Memory dynamic configuration method and electronic equipment

Abstract

The invention provides a memory dynamic configuration method and electronic equipment, which are applied to the technical field of terminals, and can set a larger TSD for a process with a larger memory demand and set a smaller TSD for a process with a smaller memory demand, so that the system performance and the memory occupation are better considered. The method comprises the following steps: when a process is started, acquiring a local memory allocation value corresponding to historical running of the process; according to the prediction model and the local memory allocation value corresponding to the historical running of the process, obtaining a local memory prediction value corresponding to the current running of the process; determining a first TSD number corresponding to the process according to a local memory predicted value corresponding to the current running of the process; obtaining a second TSD number corresponding to the process, wherein the second TSD number is an initial TSD number corresponding to the process; and under the condition that the first TSD number is different from the second TSD number, adjusting the second TSD number corresponding to the process to the first TSD number.

Description

Technical Field

[0001] The present disclosure relates to the field of terminal technology, and in particular to a memory dynamic configuration method and an electronic device. Background Art

[0002] Scudo is a new memory allocator introduced in Android 11 and above. Its main purpose is to provide more secure and reliable memory allocation services for local applications.

[0003] When a thread in the operating system needs to allocate memory, Scudo can first obtain thread-specific data (TSD), and then allocate memory blocks from TSD. Since the number of TSDs is limited, when there are multiple threads to be allocated, there will be competition for allocation. Generally, you can reduce competition by increasing TSDs, which can also improve system performance. However, increasing TSDs will lead to more cache and memory usage. Therefore, how to balance system performance and memory usage is an urgent problem to be solved. Summary of the invention

[0004] The disclosed embodiments provide a memory dynamic configuration method and an electronic device, which sets a larger TSD for a process with a larger memory requirement and a smaller TSD for a process with a smaller memory requirement, thereby better balancing system performance and memory usage.

[0005] To achieve the above objectives, the embodiments of the present disclosure adopt the following technical solutions:

[0006] In a first aspect, the present disclosure provides a memory dynamic configuration method, which includes: first, when a process starts, obtaining a local memory allocation value corresponding to the historical runtime of the process; then, based on a prediction model and the local memory allocation value corresponding to the historical runtime of the process, obtaining a local memory prediction value corresponding to the current runtime of the process; then, based on the local memory prediction value corresponding to the current runtime of the process, determining a first TSD number corresponding to the process; then, obtaining a second TSD number corresponding to the process, the second TSD number being an initial TSD number corresponding to the process; finally, when the first TSD number and the second TSD number are different, adjusting the second TSD number corresponding to the process to the first TSD number.

[0007] Based on the memory dynamic configuration method of the first aspect, after the process is started, the present disclosure can predict the local memory prediction value corresponding to the current runtime of the process based on the local memory allocation value corresponding to the historical runtime of the process and the prediction model. Then, based on the local memory prediction value corresponding to the current runtime of the process, the first TSD number corresponding to the process is obtained. Then the second TSD number is obtained. Since the second TSD number (i.e., the initial TSD number) is generated during the compilation phase and does not refer to the real memory data of the process (i.e., the local memory allocation value corresponding to the historical runtime), the second TSD number corresponding to the process does not necessarily meet the memory requirements. Therefore, when the first TSD number and the second TSD number are different, the TSD number of the process can be adjusted to the first TSD number. In this way, a larger TSD can be set for processes with larger memory requirements, and a smaller TSD can be set for processes with smaller memory requirements, so as to better balance system performance and memory usage.

[0008] In combination with the first aspect, in another possible implementation, the method further includes: obtaining the actual value of local memory corresponding to the current runtime of the process; when the actual value of local memory corresponding to the current runtime of the process is different from the predicted value of local memory corresponding to the current runtime of the process, determining the third TSD number based on the actual value of local memory corresponding to the current runtime of the process, and adjusting the first TSD number corresponding to the process to the third TSD number. Based on this scheme, the present disclosure also takes into account the actual value of local memory corresponding to the runtime of the process. If the actual value of local memory corresponding to the current runtime and the predicted value of local memory corresponding to the current runtime are different, the actual value of local memory corresponding to the current runtime can be used as the basis to determine a new third TSD number, thereby adjusting the TSD number corresponding to the process according to the third TSD number. In this way, not only can the TSD number of the process be dynamically configured, but also the TSD number corresponding to the process can be made more in line with the usage requirements of the process.

[0009] In combination with the first aspect, in another possible implementation, the method further includes: the local memory allocation value corresponding to the historical runtime of the process includes the local memory allocation value corresponding to the process at multiple historical runtimes; according to the prediction model and the local memory allocation value corresponding to the historical runtime of the process, the local memory prediction value corresponding to the current runtime of the process is obtained, including: obtaining the weight coefficient corresponding to the process at each historical runtime in the prediction model; according to the weight coefficient corresponding to the process at each historical runtime and the local memory allocation value corresponding to each historical runtime, the local memory prediction value corresponding to the current runtime of the process is obtained. Based on this scheme, it can be known that the local memory prediction value corresponding to the current runtime of the process is obtained based on the data of multiple historical runtimes (i.e., the local memory allocation value corresponding to the process at multiple historical runtimes) and the weight coefficient corresponding to each historical runtime in the prediction model, which is equivalent to referring to the data of multiple historical runtimes of the process when determining the local memory prediction value corresponding to the current runtime of the process, so that the local memory prediction value corresponding to the current runtime of the process obtained can be made more accurate.

[0010] In combination with the first aspect, in another possible implementation, the prediction model satisfies the following expression:

[0011] M n =c 1 M n-1 +c 2 M n-2 +c 3 M n-3

[0012] Among them, M n M is the local memory prediction value corresponding to the current running process; n-1 The local memory allocation value corresponding to the process's n-1th execution, M n-2 The local memory allocation value corresponding to the process's n-2th execution; M n-3 The local memory allocation value corresponding to the process's n-3rd execution; c 1 is the weight coefficient corresponding to the process when it runs at the n-1th time, c 2 is the weight coefficient corresponding to the process when it runs at the n-2th time, c 3 is the weight coefficient corresponding to the process when it runs for the n-2th time; 0 <c 1 ≤1; 0 <c 2 ≤1; 0 <c 3 ≤1; and c 1 +c 2 +c 3 = 1. An example of a prediction model is presented.

[0013] In combination with the first aspect, in another possible implementation, the number of first TSDs corresponding to the process is determined according to the local memory prediction value corresponding to the current running process, including: when the local memory prediction value corresponding to the current running process is less than the first memory threshold, the number of first TSDs is determined to be the first value; when the local memory prediction value corresponding to the current running process is greater than the first memory threshold and less than the second memory threshold, the number of first TSDs is determined to be the second value; the second value is greater than the first value; when the local memory prediction value corresponding to the current running process is greater than the second memory threshold, the number of first TSDs is determined to be the third value; the third value is greater than the second value. Based on this scheme, it can be seen that the present disclosure classifies the number of first TSDs more finely through the first memory threshold and the second memory threshold, so that it can be ensured that when the local memory prediction value corresponding to the current running process is within different memory threshold ranges, the number of first TSDs that better matches the local memory prediction value corresponding to the current running process can be obtained, thereby efficiently utilizing TSDs.

[0014] In combination with the first aspect, in another possible implementation, the first TSD quantity satisfies the following expression:

[0015]

[0016] Among them, M n is the local memory prediction value corresponding to the current running process, σ 1 is the first memory threshold, σ 2 is the second memory threshold. An example of an expression that the first number of TSDs satisfies is presented.

[0017] In combination with the first aspect, in another possible implementation, the number of third TSDs is determined based on the actual value of local memory corresponding to the current runtime of the process, including: when the actual value of local memory corresponding to the current runtime of the process is less than the third memory threshold, the number of third TSDs is determined to be a fourth value; when the predicted value of local memory corresponding to the current runtime of the process is greater than the third memory threshold and less than the fourth memory threshold, the number of third TSDs is determined to be a fifth value; the fifth value is greater than the fourth value; when the predicted value of local memory corresponding to the current runtime of the process is greater than the fourth memory threshold, the number of third TSDs is determined to be a sixth value; the sixth value is greater than the fifth value. Based on this scheme, it can be seen that the present disclosure classifies the number of third TSDs more finely through the third memory threshold and the fourth memory threshold, so that when the actual value of local memory corresponding to the current runtime of the process is within different memory threshold ranges, a third TSD number that better matches the actual value of local memory corresponding to the current runtime can be obtained, thereby efficiently utilizing TSDs.

[0018] In combination with the first aspect, in another possible implementation, the third TSD quantity satisfies the following expression:

[0019]

[0020] Among them, M i is the actual value of the local memory corresponding to the current runtime of the process, σ 3 is the third memory threshold, σ 4 It is the fourth memory threshold.

[0021] In combination with the first aspect, in another possible implementation, the method further includes: determining that the process is a core system process, and adjusting the number of TSDs corresponding to the process to a first threshold; determining that the process is a non-core system process, and adjusting the number of TSDs corresponding to the process to a second threshold, wherein the second threshold is less than the first threshold. Based on this solution, the present disclosure sets the number of TSDs corresponding to the core system process to be greater than the number of TSDs corresponding to the non-core system process. Since the core system process requires more memory, this can better balance system performance and memory usage.

[0022] In combination with the first aspect, in another possible implementation, the method further includes: determining that the process is a process of a preset application, and adjusting the number of TSDs corresponding to the main process and sub-processes of the preset application to a third threshold; the preset application is an application that occupies 1G or more of memory; determining that the process is a process of a non-preset application, and adjusting the number of TSDs corresponding to the main process of the non-preset application to the third threshold, and adjusting the number of TSDs corresponding to the sub-processes of the non-preset application to the fourth threshold. Generally, the main process requires more memory than the sub-process. Therefore, the present disclosure sets the number of TSDs corresponding to the main process, sub-processes of the preset application, and the main process of the non-preset application to be greater than the number of TSDs corresponding to the sub-processes of the non-preset application. In this way, system performance and memory usage can be better balanced.

[0023] In a second aspect, an embodiment of the present disclosure provides a memory dynamic configuration device, which can be applied to an electronic device to implement the method in the first aspect above. The functions of the memory dynamic configuration device can be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions, such as an acquisition module, a creation module, and a storage module.

[0024] Among them, the acquisition module is configured to obtain the local memory allocation value corresponding to the historical runtime of the process when the process starts; the determination module is configured to obtain the local memory prediction value corresponding to the current runtime of the process based on the prediction model and the local memory allocation value corresponding to the historical runtime of the process; determine the first TSD number corresponding to the process based on the local memory prediction value corresponding to the current runtime of the process; the acquisition module is also configured to obtain the second TSD number corresponding to the process, the second TSD number is the initial TSD number corresponding to the process; the adjustment module is configured to adjust the second TSD number corresponding to the process to the first TSD number when the first TSD number and the second TSD number are different.

[0025] In combination with the second aspect, in a possible implementation method, the acquisition module is also configured to obtain the actual value of the local memory corresponding to the current execution of the process; the determination module is also configured to determine the third TSD number based on the actual value of the local memory corresponding to the current execution of the process when the actual value of the local memory corresponding to the current execution of the process is different from the predicted value of the local memory corresponding to the current execution of the process, and adjust the first TSD number corresponding to the process to the third TSD number.

[0026] In combination with the second aspect, in a possible implementation method, the local memory allocation value corresponding to the historical runtime of the process includes the local memory allocation value corresponding to the process at multiple historical runtime moments; the acquisition module is also configured to obtain the weight coefficient corresponding to the process at each historical runtime in the prediction model; the determination module is also configured to obtain the local memory prediction value corresponding to the current runtime of the process based on the weight coefficient corresponding to the process at each historical runtime and the local memory allocation value corresponding to each historical runtime.

[0027] In conjunction with the second aspect, in a possible implementation, the prediction model satisfies the following expression:

[0028] M n =c 1 M n-1 +c 2 M n-2 +c 3 M n-3

[0029] Among them, M n M is the local memory prediction value corresponding to the current running process; n-1 The local memory allocation value corresponding to the process's n-1th execution, M n-2 The local memory allocation value corresponding to the process's n-2th execution; M n-3 The local memory allocation value corresponding to the process's n-3rd execution; c 1 is the weight coefficient corresponding to the process when it runs at the n-1th time, c2 is the weight coefficient corresponding to the process when it runs at the n-2th time, c 3 is the weight coefficient corresponding to the process when it runs for the n-2th time; 0 <c 1 ≤1; 0 <c 2 ≤1; 0 <c 3 ≤1; and c 1 +c 2 +c 3 =1.

[0030] In combination with the second aspect, in a possible implementation method, the determination module is also configured to determine that the number of first TSDs is a first value when the corresponding local memory prediction value when the process is currently running is less than the first memory threshold; when the corresponding local memory prediction value when the process is currently running is greater than the first memory threshold and less than the second memory threshold, determine that the number of first TSDs is a second value; the second value is greater than the first value; when the corresponding local memory prediction value when the process is currently running is greater than the second memory threshold, determine that the number of first TSDs is a third value; the third value is greater than the second value.

[0031] In conjunction with the second aspect, in a possible implementation, the first TSD quantity satisfies the following expression:

[0032]

[0033] Among them, M n is the local memory prediction value corresponding to the current running process, σ 1 is the first memory threshold, σ 2 is the second memory threshold.

[0034] In combination with the second aspect, in a possible implementation method, the determination module is also configured to determine that the number of the third TSD is a fourth value when the actual value of the local memory corresponding to the current execution of the process is less than the third memory threshold; when the predicted local memory value corresponding to the current execution of the process is greater than the third memory threshold and less than the fourth memory threshold, determine that the number of the third TSD is a fifth value; the fifth value is greater than the fourth value; when the predicted local memory value corresponding to the current execution of the process is greater than the fourth memory threshold, determine that the number of the third TSD is a sixth value; the sixth value is greater than the fifth value.

[0035] In combination with the second aspect, in a possible implementation manner, the third TSD quantity satisfies the following expression:

[0036]

[0037] Among them, M i is the actual value of the local memory corresponding to the current runtime of the process, σ 3is the third memory threshold, σ 4 It is the fourth memory threshold.

[0038] In combination with the second aspect, in a possible implementation method, the determination module is also configured to determine that the process is a core system process, and adjust the number of TSDs corresponding to the process to a first threshold; determine that the process is a non-core system process, and adjust the number of TSDs corresponding to the process to a second threshold, and the second threshold is less than the first threshold.

[0039] In combination with the second aspect, in a possible implementation method, the determination module is also configured to determine that the process is a process of a preset application, and adjust the number of TSDs corresponding to the main process and child processes of the preset application to a third threshold; the preset application is an application that occupies 1G or more of memory; determine that the process is a process of a non-preset application, and adjust the number of TSDs corresponding to the main process of the non-preset application to the third threshold, and adjust the number of TSDs corresponding to the child processes of the non-preset application to a fourth threshold, and the fourth threshold is less than the third threshold.

[0040] In a third aspect, the present disclosure provides an electronic device, comprising: a memory, a display screen, and one or more processors; the memory, the display screen, and the processor are coupled. The memory is used to store computer program codes, and the computer program codes include computer instructions; when the electronic device is running, the processor is used to execute one or more computer instructions stored in the memory, so that the electronic device executes the memory dynamic configuration method as described in any one of the first aspects above.

[0041] In a fourth aspect, the present disclosure provides a computer storage medium, comprising computer instructions, which, when executed on an electronic device, enable the electronic device to execute the memory dynamic configuration method as described in any one of the first aspects.

[0042] In a fifth aspect, the present disclosure provides a computer program product. When the computer program product is executed on an electronic device, the electronic device executes the memory dynamic configuration method as described in any one of the first aspects.

[0043] In a sixth aspect, a device (for example, the device may be a chip system) is provided, the device including a processor for supporting an electronic device to implement the functions involved in the first aspect above. In one possible design, the device also includes a memory for storing program instructions and data necessary for the electronic device. When the device is a chip system, it may be composed of a chip, or may include a chip and other discrete devices.

[0044] It should be understood that the beneficial effects of the second to sixth aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 A software structure block diagram of an electronic device provided in an embodiment of the present disclosure.

[0046] Figure 2 A schematic diagram of Primary memory allocation provided in an embodiment of the present disclosure.

[0047] Figure 3 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present disclosure.

[0048] Figure 4 This is one of the software structure diagrams of an electronic device provided in an embodiment of the present disclosure.

[0049] Figure 5 The second schematic diagram of the software structure of an electronic device provided in an embodiment of the present disclosure.

[0050] Figure 6 A flowchart of a memory dynamic configuration method provided in an embodiment of the present disclosure.

[0051] Figure 7 A schematic diagram of the structure of a chip system provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0052] The technical solution in the embodiment of the present disclosure will be described below in conjunction with the drawings in the embodiment of the present disclosure. Among them, in the description of the present disclosure, unless otherwise specified, " / " indicates that the objects associated before and after are in an "or" relationship, for example, A / B can represent A or B; "and / or" in the present disclosure is only a kind of association relationship describing the associated objects, indicating that there can be three relationships, for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. And, in the description of the present disclosure, unless otherwise specified, "multiple" refers to two or more than two. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple. In addition, in order to facilitate the clear description of the technical solutions of the embodiments of the present disclosure, in the embodiments of the present disclosure, the words "first", "second" and the like are used to distinguish between the same items or similar items with substantially the same functions and effects. Those skilled in the art will understand that the words "first", "second" and the like do not limit the quantity and execution order, and the words "first", "second" and the like do not necessarily limit the differences. At the same time, in the embodiments of the present disclosure, words such as "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present disclosure should not be interpreted as being more preferred or more advantageous than other embodiments or design. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete manner for easy understanding.

[0053] In addition, the network architecture and business scenarios described in the embodiments of the present disclosure are intended to more clearly illustrate the technical solutions of the embodiments of the present disclosure, and do not constitute a limitation on the technical solutions provided by the embodiments of the present disclosure. Ordinary technicians in this field can know that with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided by the embodiments of the present disclosure are also applicable to similar technical problems.

[0054] In order to make the description of the following embodiments clear and concise, a brief introduction to the relevant concepts or technologies is first given:

[0055] (1) Process: An instance of a program running in an operating system. A process has its own memory space, registers, stack, file descriptors, and other resources. A process can communicate and interact with other processes through system calls.

[0056] (2) Thread: It is the smallest unit that the operating system can schedule operations on. Threads are contained in processes and are the actual operating units of processes. A thread refers to a single sequential control flow in a process. Multiple threads can run concurrently in a process, and each thread executes different tasks in parallel.

[0057] (3) Memory: used to store programs and data when a process or thread is running, also known as executable memory.

[0058] (4) Freelist: refers to a collection of memory blocks used to store available memory blocks. In Scudo, each TSD has a corresponding freelist to store memory blocks available for use by threads. When the memory blocks in the TSD are insufficient, the TSD will obtain new memory blocks from its corresponding freelist and fill them into the cache.

[0059] With the development of operating systems (such as Android operating system), the Android operating system has been updated to Andriod 13. The operating system is the system software running on the hardware of electronic devices (such as mobile phones, computers, etc.), which manages and controls the hardware resources of electronic devices and provides a good operating environment for upper-level applications.

[0060] In order to better manage the memory allocation of processes in electronic devices, starting from Android 11, electronic devices use Scudo as the main memory allocator for memory allocation and management.

[0061] Figure 1 A software structure block diagram of an electronic device is exemplarily shown.

[0062] Generally speaking, the realization of electronic device functions requires not only hardware support but also software cooperation. The software system of electronic devices can adopt layered architecture, event-driven architecture, micro-kernel architecture, micro-service architecture, or cloud architecture. Figure 1 The embodiment shown is based on a layered architecture. Taking the system as an example, the software structure of the electronic device is illustrated. Figure 1 The software structure diagram shown is specifically used to illustrate the memory allocation architecture of the electronic device. Figure 1 As shown, the layered architecture divides the software into several layers, which are the application layer, the system library (also called the Native layer) and the kernel layer from top to bottom.

[0063] The application layer includes applications running on the operating system of the electronic device. These applications require memory to store data and code.

[0064] The system library includes Scudo. Scudo is used to help applications better manage and release memory. Scudo can also provide some other functions, such as memory checking, memory leak detection, and memory allocation optimization. As an intermediate layer, Scudo can play a better control and monitoring role between the application layer and the kernel layer.

[0065] The kernel layer includes a memory management module. When the application process is running, the memory management module is used to allocate memory space for the process and release memory space.

[0066] In some examples, such as Figure 1 As shown, the application in the application layer can use the malloc function to request memory from Scudo in the system library, and use the free function to release memory from Scudo. Among them, the malloc function and the free function are functions provided in the C language. The malloc function is used to dynamically allocate memory. The free function is used to release memory. When the application needs to allocate memory, the malloc function can be called. The malloc function can receive memory parameters and return the allocated memory address. The memory parameter is used to describe the size of the memory to be allocated. When the application does not need the memory, the free function can be called to release the memory.

[0067] For example, when an application is running, the application process can send a memory request to Scudo through the malloc function. When Scudo receives the memory request, Scudo can allocate memory to the application process in response to the memory request. The application process can also send a memory release request to Scudo through the free function. When Scudo receives the memory release request, Scudo can release the memory in response to the memory release request.

[0068] In some examples, such as Figure 1 As shown, Scudo can use the memory mapping function (mmap) to request the memory management module in the kernel layer to map a file or device into the memory, and can also use the munmap function to request the memory management module to release the memory.

[0069] The mmap function can map files or devices to memory, so that the application process can access these resources more efficiently. The mmap function maps files or devices to the virtual address space of the process, allowing the process to access these resources like accessing memory, thereby avoiding unnecessary file I / O operations and improving efficiency.

[0070] When the application process no longer needs a block of memory, it can call the munmap function to release the memory. The munmap function can remove the memory from the virtual address space of the process and release the corresponding resources.

[0071] In addition, the memory management module can also provide other memory management functions through some functions, such as the madvise function. Through the madvise function, the memory management module can determine the memory area corresponding to the read and write operations of the application process. In this way, the memory management module can better optimize memory management and improve the overall performance of the operating system.

[0072] Combined with the above Figure 1 As can be seen from the memory allocation architecture shown, Scudo plays a vital role in the memory allocation process. Scudo is a dynamic user-mode memory allocator (also known as a heap allocator) designed to defend against heap-related vulnerabilities (such as heap-based buffer overflows, use-after-free, and double-free) while maintaining good performance.

[0073] Scudo consists of four components: Primary Allocator, Secondary Allocator, TSD, and Quarantine. Primary is the core part of Scudo, which is responsible for quickly and efficiently allocating smaller memory blocks. The memory blocks allocated by Primary are usually smaller than 1 page in size, so that allocation requests can be responded to quickly. Secondary is responsible for allocating larger memory blocks, usually between several pages. TSD is used to store thread-specific data. Usually, each thread has a unique TSD.

[0074] Quarantine is one of the safety mechanisms of the Scudo allocator, which is used to isolate the released memory blocks. When the application releases memory, the memory block is not immediately returned to the backend (i.e. Primary Allocator) collection, but is first placed in Quarantine. In this way, it can be ensured that the released memory block will not be reallocated immediately to avoid possible use-after-free vulnerabilities. Quarantine will periodically check these memory blocks and put them back to the backend collection for reuse.

[0075] Since Primary is the core part of Scudo, we can combine Figure 2 The process of Primary memory allocation is described in detail. Figure 2As shown, in order to improve memory allocation efficiency, Scudo can use multiple TSDs in the TSD Array (e.g., TSD1, ..., TSD8) as cache. When multiple threads (e.g., thread 0, thread 1, ..., thread n-1, thread n) access concurrently, Scudo can use multiple TSDs to support concurrent access by multiple threads.

[0076] To facilitate the execution of multiple threads, Figure 2 A thread scheduling algorithm Round robin is also proposed in the paper, which can allocate time slices to each thread in a round-robin order to ensure that each thread gets an execution opportunity.

[0077] When multiple TSDs are used as caches, each TSD also stores a cache array (i.e., PerClassArray) for allocating and releasing memory. Scudo also includes a memory allocator SizeClassAllocatorLocalCache, and PerClassArray is set in SizeClassAllocatorLocalCache. SizeClassAllocatorLocalCache classifies memory blocks by size and stores the classified memory blocks in PerClassArray. In this way, when a thread requests to allocate memory of a specific size, TSD can quickly find and allocate the corresponding memory block through SizeClassAllocatorLocalCache.

[0078] like Figure 2 As shown, PerClassArray contains multiple PerClassArray[i] (e.g., PerClassArray[0], PerClassArray[1], ..., PerClassArray

[38] , etc.), where i represents a different class. Each PerClassArray[i] stores a memory chunk belonging to the same class.

[0079] PerClassArray also includes a data structure PerClass for organizing multiple classes and their memory blocks. PerClass includes multiple Classes, each of which contains one or more memory blocks (e.g., memory block [0], memory block [1], ..., memory block [n], etc.), each of which stores object instances belonging to the same class. In Scudo, memory block [0], memory block [1], ..., memory block [n] represent memory blocks of different classes in PerClass. They are managed and cached through PerClassArray to quickly allocate and release memory when needed.

[0080] In addition, Scudo also includes the data structure RegionInfoArray. RegionInfoArray is used to track and manage the status and metadata of each TSD. RegionInfoArray is an array, and each element in the array corresponds to a class. RegionInfoArray includes the status information of multiple classes (for example, Class0, Class1, Class38, etc.) in the cache array. For example, the status information can be a list of free memory blocks, pointers to other classes, the number of free memory blocks, the number of allocated memory blocks, etc. Each class corresponds to a memory block of a specific size, which is used to allocate and release memory of that size.

[0081] Scudo also includes the data structure TransferBatch, which is used to fill a batch of memory blocks obtained from the freelist into the TSD. TransferBatch includes information about the memory blocks, such as the starting address and size of the memory blocks. RegionInfoArray can be used together with TransferBatch. Combined with the above, it can be seen that RegionInfoArray is used to track the status and metadata of each TSD. After RegionInfoArray tracks the status and metadata of each TSD, RegionInfoArray can manage and operate the TransferBatch process based on the tracked status and metadata of each TSD to ensure correctness and consistency when filling TSD.

[0082] Combination Figure 2 When a thread needs to allocate memory, it can first obtain available memory blocks from the TSD cache array (i.e., PerClassArray) instead of obtaining them from the freelist of the Primary allocator every time. When the memory blocks in the PerClassArray in the TSD are used up, the TransferBatch mechanism can be used to obtain a batch of memory blocks from the freelist of the Primary allocator and fill them into the PerClassArray in the TSD.

[0083] When a thread needs to release memory, it can first try to release the memory to the Class corresponding to the PerClassArray in the TSD. If the TSD is full, that is, there are not enough free memory blocks in the PerClassArray in the TSD, Scudo will choose to release half of the memory blocks and return them to the backend freelist so that other threads can allocate and use them from the freelist again. In this way, Scudo supports multi-threaded concurrent access while also providing an efficient memory allocation and release mechanism.

[0084] Based on the above content, we can know that when a thread allocates memory, it needs to first obtain TSD and then allocate memory blocks from TSD. Since the number of TSDs is limited, when multiple threads need to allocate memory, there will inevitably be competition. In this case, you can reduce competition by increasing TSD, thereby improving the system's memory allocation performance. However, increasing TSD will lead to more cache and memory usage. Therefore, how to balance system performance and memory usage is an urgent problem to be solved.

[0085] Moreover, there are at least more than 200 processes in the Android operating system, and the number of threads and memory requirements corresponding to different processes vary greatly. To this end, the disclosed embodiment provides a method for dynamic memory configuration, which sets a larger TSD for processes with larger memory requirements and a smaller TSD for processes with smaller memory requirements, thereby better balancing system performance and memory usage.

[0086] The electronic device in the present disclosure may be a mobile phone, a tablet computer, an ultra-mobile personal computer (UMPC), a netbook, a cellular phone, a personal digital assistant (PDA), a personal computer (PC), an augmented reality (AR) or virtual reality (VR) device, etc., which can interact with other devices. The embodiments of the present disclosure do not impose any special restrictions on the specific form of the electronic device.

[0087] For example, Figure 3 A schematic diagram of the structure of an electronic device is shown. Figure 3As shown, the electronic device may include a processor 310, an external memory interface 320, an internal memory 321, a universal serial bus (USB) interface 330, a charging management module 340, a power management module 341, a battery 342, an antenna 1, an antenna 2, a mobile communication module 350, a wireless communication module 360, an audio module 370, a speaker 370A, a receiver 370B, a microphone 370C, an earphone interface 370D, a sensor module 380, a button 390, a motor 391, an indicator 392, a camera 393, a display screen 394, and a subscriber identification module (SIM) card interface 395, etc. Among them, the sensor module 380 may include a pressure sensor 380A, a gyroscope sensor 380B, an air pressure sensor 380C, a magnetic sensor 380D, an acceleration sensor 380E, a distance sensor 380F, a proximity light sensor 380G, a fingerprint sensor 380H, a temperature sensor 380J, a touch sensor 380K, an ambient light sensor 380L, a bone conduction sensor 380M, etc.

[0088] It is to be understood that the structure illustrated in this embodiment does not constitute a specific limitation on the electronic device. In other embodiments, the electronic device may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0089] The processor 310 may include one or more processing units, for example, the processor 310 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0090] The controller can be the nerve center and command center of the electronic device. The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of fetching and executing instructions.

[0091] The processor 310 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 310 is a cache memory. The memory may store instructions or data that the processor 310 has just used or cyclically used. If the processor 310 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 310, and thus improves the efficiency of the system.

[0092] In some embodiments, the processor 310 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0093] The wireless communication function of the electronic device can be implemented through antenna 1, antenna 2, mobile communication module 350, wireless communication module 360, modem processor and baseband processor.

[0094] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in the electronic device can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of the antennas. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0095] The mobile communication module 350 can provide solutions for wireless communications including 2G / 3G / 4G / 5G applied in electronic devices. The mobile communication module 350 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 350 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 350 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 350 can be set in the processor 310. In some embodiments, at least some of the functional modules of the mobile communication module 350 can be set in the same device as at least some of the modules of the processor 310.

[0096] The wireless communication module 360 ​​can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to electronic devices. The wireless communication module 360 ​​can be one or more devices integrating at least one communication processing module. The wireless communication module 360 ​​receives electromagnetic waves via the antenna 2, modulates the frequency of the electromagnetic wave signal and performs filtering, and sends the processed signal to the processor 310. The wireless communication module 360 ​​can also receive the signal to be sent from the processor 310, modulate the frequency of it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0097] In some embodiments, the antenna 1 of the electronic device is coupled to the mobile communication module 350, and the antenna 2 is coupled to the wireless communication module 360, so that the electronic device can communicate with the network and other devices through wireless communication technology. The wireless communication technology may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology, etc.

[0098] The electronic device implements the display function through a GPU, a display screen 394, and an application processor. The GPU is a microprocessor for image processing, connecting the display screen 394 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 310 may include one or more GPUs that execute program instructions to generate or change display information.

[0099] The display screen 394 is used to display images, videos, etc. The display screen 394 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light emitting diode or an active-matrix organic light emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device may include 1 or N display screens 394, where N is a positive integer greater than 1.

[0100] The electronic device can realize the shooting function through the ISP, the camera 393, the video codec, the GPU, the display screen 394 and the application processor, etc. In some embodiments, the electronic device can include 1 or N cameras 393, where N is a positive integer greater than 1.

[0101] The internal memory 321 can be used to store computer executable program codes, and the executable program codes include instructions. The processor 310 executes various functional applications and data processing of the electronic device by running the instructions stored in the internal memory 321. The internal memory 321 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data established during the use of the electronic device (such as audio data, a phone book, etc.), etc. In addition, the internal memory 321 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0102] In addition, an operating system runs on top of the above components, such as Windows Etc. Application programs can be installed and run on the operating system. In other embodiments, there can be multiple operating systems running in the electronic device.

[0103] It should be understood that Figure 3 The hardware modules included in the electronic device shown are only described for example, and do not limit the specific structure of the electronic device. In fact, the electronic device provided by the embodiment of the present disclosure may also include other hardware modules that have an interactive relationship with the hardware modules illustrated in the figure, which are not specifically limited here. For example, the electronic device may also include a flashlight, a micro-projection device, etc. For another example, if the electronic device is a PC, then the electronic device may also include components such as a keyboard and a mouse.

[0104] It is understandable that, generally speaking, the realization of electronic device functions requires not only hardware support but also software cooperation.

[0105] The software system of the electronic device can adopt a layered architecture, an event-driven architecture, a micro-core architecture, a micro-service architecture, or a cloud architecture. Taking the system as an example, the software structure of the electronic device is illustrated.

[0106] Figure 4 It is a software structure block diagram of the electronic device provided by the embodiment of the present disclosure.

[0107] The layered architecture divides the software into several layers, each with clear roles and division of labor. The layers communicate with each other through software interfaces. In some embodiments, the Android operating system is divided into four layers, from top to bottom, namely, the application layer, the application framework layer, the Android runtime and system library, and the kernel layer.

[0108] The application layer can include a series of application packages. Figure 4 As shown, the application package may include applications such as camera, gallery, calendar, phone, map, navigation, WLAN, Bluetooth, music, video, short message, etc. The application framework layer provides an application programming interface (API) and programming framework for the applications in the application layer. The application framework layer includes some predefined functions.

[0109] It is understandable that the application layer may include multiple applications, and the types of the multiple applications may be the same or different. For example, the application layer may include multiple shopping applications, and the multiple shopping applications are of the same type, all of which are shopping applications. The application layer may also include a map application and a communication application, and the map application and the communication application are of different types.

[0110] like Figure 4 As shown, the application framework layer may include a window manager, a content provider, a view system, a phone manager, a resource manager, a notification manager, and the like.

[0111] The window manager is used to manage window programs. The window manager can obtain the display screen size, determine whether there is a status bar, lock the screen, capture the screen, etc.

[0112] Content providers are used to store and retrieve data and make it accessible to applications. The data can include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

[0113] The view system includes visual controls, such as controls for displaying text, controls for displaying images, etc. The view system can be used to build applications. A display interface can be composed of one or more views. For example, a display interface including a text notification icon can include a view for displaying text and a view for displaying images.

[0114] The phone manager is used to provide communication functions for electronic devices, such as the management of call status (including answering, hanging up, etc.).

[0115] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0116] The notification manager enables applications to display notification information in the status bar. It can be used to convey notification-type messages and can disappear automatically after a short stay without user interaction. For example, the notification manager is used to notify download completion, message reminders, etc. The notification manager can also be a notification that appears in the system top status bar in the form of a chart or scroll bar text, such as notifications of applications running in the background, or a notification that appears on the screen in the form of a dialog window. For example, a text message is displayed in the status bar, a prompt sound is emitted, an electronic device vibrates, an indicator light flashes, etc.

[0117] Android Runtime includes core libraries and virtual machines. Android runtime is responsible for scheduling and management of the Android system. The core library consists of two parts: one is the function that the Java language needs to call, and the other is the Android core library. The application layer and the application framework layer run in the virtual machine. The virtual machine executes the Java files of the application layer and the application framework layer as binary files. The virtual machine is used to perform object life cycle management, stack management, thread management, security and exception management, and garbage collection.

[0118] The system library may include multiple functional modules, such as surface manager, media library, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

[0119] The surface manager is used to manage the display subsystem and provide the fusion of two-dimensional and three-dimensional layers for multiple applications.

[0120] The media library supports playback and recording of a variety of commonly used audio and video formats, as well as static image files, etc. The media library can support a variety of audio and video encoding formats.

[0121] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0122] A 2D graphics engine is a drawing engine for 2D drawings.

[0123] The kernel layer is the layer between hardware and software. The kernel layer contains at least display driver, camera driver, audio driver, and sensor driver.

[0124] The methods in the following embodiments can all be implemented in an electronic device having the above hardware structure or software structure.

[0125] In some examples, in order to implement the memory dynamic configuration method provided in the embodiments of the present disclosure, Figure 4 Based on the software structure diagram of the electronic device shown in Figure 5 As shown, the application framework layer may also include system services. The system services include a memory management module, and the memory management module includes a local memory prediction submodule and a TSD quantity decision submodule.

[0126] Among them, the memory management module is used to control the number of TSDs of all processes.

[0127] The local memory prediction submodule is used to obtain the local memory allocation values ​​corresponding to the historical runtime of all processes; based on the local memory allocation values ​​corresponding to the historical runtime of the processes and the prediction module, determine the local memory prediction value corresponding to the current runtime of the process; and generate a first notification based on the local memory prediction value corresponding to the current runtime of the process, and send the first notification to the TSD quantity decision submodule. The first notification is used to request the TSD quantity decision submodule to determine the first TSD quantity corresponding to the process based on the local memory prediction value corresponding to the current runtime of the process. The first notification includes the local memory prediction value corresponding to the current runtime of the process.

[0128] The TSD quantity decision submodule is used to receive a first notification; in response to the first notification, determine the first TSD quantity corresponding to the process based on the local memory prediction value corresponding to the current running process; obtain the second TSD quantity corresponding to the process; and compare the first TSD quantity and the second TSD quantity. If the first TSD quantity and the second TSD quantity are different, generate a second notification and send the second notification to the local cache setting module. The second notification is used to request the local cache setting module to adjust the TSD quantity corresponding to the process to the first TSD quantity. The second notification includes the first TSD quantity.

[0129] For example, when a process needs to interact with hardware, it needs to use the resources of the system library. For example, when a process needs to read a file from a hard disk, the file system driver of the system library can be used to implement file access. In addition, the system library can also perform some tasks through the process, such as starting a service, running an application, etc.

[0130] like Figure 5 As shown, the system library may further include a local cache setting module and Scudo. The local cache setting module is used to receive the second notification; in response to the second notification, adjust the number of TSDs corresponding to the process to the first number of TSDs.

[0131] Scudo is integrated in the process and is used to set the memory allocation of the process. Scudo also includes a local cache dynamic adjustment module and TSD. The local cache dynamic adjustment module is used to obtain the actual value of the local memory corresponding to the current runtime of the process and the predicted value of the local memory corresponding to the current runtime of the process; and to compare the actual value of the local memory corresponding to the current runtime of the process and the predicted value of the local memory corresponding to the current runtime of the process. When the actual value of the local memory corresponding to the current runtime of the process and the predicted value of the local memory corresponding to the current runtime of the process are different, the number of third TSDs corresponding to the process is determined according to the actual value of the local memory corresponding to the current runtime of the process, and the number of TSDs corresponding to the process is adjusted to the third TSD number. Generally, Scudo can apply for and release memory through malloc function, calloc function, free function, etc.

[0132] In some examples, when a process starts, the memory management module in the system service can control the number of TSDs of the process based on the memory requirements of the process. Exemplarily, when a process starts, the local memory prediction submodule can determine the local memory prediction value corresponding to the current operation of the process based on the local memory allocation value corresponding to the historical operation of the process. And based on the local memory prediction value corresponding to the current operation of the process, a first notification is generated, and then the first notification is sent to the TSD number decision submodule, so that the TSD number decision submodule responds to the first notification, and determines the first TSD number corresponding to the process based on the local memory prediction value corresponding to the current operation of the process in the first notification. The TSD number decision submodule can also obtain the second TSD number of the process. Then compare the first TSD number and the second TSD number, and send a second notification to the local cache setting module when the first TSD number and the second TSD number are different. So that the local cache setting module responds to the second notification and adjusts the TSD number corresponding to the process to the first TSD number.

[0133] In addition, the local cache dynamic adjustment module in Scudo can also obtain the actual value of the local memory corresponding to the current running of the process and the predicted value of the local memory corresponding to the current running of the process. Then compare the actual value of the local memory corresponding to the current running of the process and the predicted value of the local memory corresponding to the current running of the process. If the actual value of the local memory corresponding to the current running of the process and the predicted value of the local memory corresponding to the current running of the process are different, determine the number of third TSDs corresponding to the process according to the actual value of the local memory corresponding to the current running of the process, and adjust the number of TSDs corresponding to the process to the third TSD number.

[0134] The following is a detailed description of a memory dynamic configuration method provided by an embodiment of the present disclosure in conjunction with the accompanying drawings. The method can be applied to the above electronic device. Figure 6 As shown, the method specifically includes:

[0135] Step 601: When a process starts, the local memory prediction submodule obtains the local memory allocation value corresponding to the historical runtime of the process.

[0136] The local memory allocation value corresponding to the historical running time of the process includes the local memory allocation values ​​corresponding to the process at multiple historical running times.

[0137] When a process starts, the local memory prediction submodule can obtain the local memory allocation value corresponding to the historical runtime of the process, so as to use the local memory allocation value corresponding to the historical runtime of the process to determine the local memory prediction value corresponding to the current runtime of the process.

[0138] In some examples, when an application in the operating system is triggered, the application can call the corresponding process to start, thereby realizing the function of the application. For example, for a music player application, the process can be the foreground playback process, background playback process, foreground display process, background cache process, etc. corresponding to the music player application. The process can also be the process corresponding to the system application, such as the foreground shooting process corresponding to the camera application. The background Bluetooth data transmission process corresponding to the Bluetooth application, etc. The process can also be a system service (system server) process, such as Android TM System process. The process may also be some middleware process, for example: a process using C or C++ code; a file encryption / decryption process; an encoding / decoding process, etc. The process may also be an empty process run by the operating system when executing the process management function, etc. The disclosed embodiment does not impose any restrictions on the type of process.

[0139] In some examples, the local memory allocation values ​​corresponding to the multiple historical running times obtained by the local memory prediction submodule may be: the local memory prediction submodule obtains the local memory allocation values ​​corresponding to the latest three historical running times of the process. For example, the process is process A, and the local memory allocation values ​​corresponding to the latest three historical running times of process A are MA n-1 、MA n-2 and MA n-3 Among them, MA n-1 The local memory allocation value corresponding to the n-1th execution of process A. MA n-2 The local memory allocation value corresponding to the n-2th execution of process A. MA n-3 The local memory allocation value corresponding to the n-3th execution of process A.

[0140] In some examples, the local memory prediction submodule can obtain the local memory allocation values ​​corresponding to the historical runtime of all processes in the operating system.

[0141] In some examples, since the local memory prediction submodule can obtain the local memory allocation values ​​corresponding to the historical runtimes of all processes in the operating system, when a process starts, the local memory prediction submodule can find the local memory allocation value corresponding to the historical runtime of the process from the local memory allocation values ​​corresponding to the historical runtimes of all processes according to the process name of the process.

[0142] Step 602: The local memory prediction submodule determines the local memory prediction value corresponding to the current execution of the process based on the local memory allocation value corresponding to the historical execution of the process and the prediction model.

[0143] After the local memory prediction submodule determines the local memory allocation value corresponding to the historical running time of the process, the local memory prediction submodule can determine the local memory prediction value corresponding to the current running time of the process based on the local memory allocation value corresponding to the historical running time of the process and the prediction model. Then, the number of TSDs can be set according to the local memory prediction value corresponding to the current running time of the process. In this way, when the process is subsequently running, the system performance can be avoided from being affected by the insufficient number of TSDs.

[0144] In some examples, the local memory prediction submodule obtains a local memory prediction value corresponding to the current runtime of the process based on the prediction model and the local memory allocation value corresponding to the historical runtime of the process.

[0145] In some examples, the local memory allocation value corresponding to the historical runtime of the process includes the local memory allocation value corresponding to the process at multiple historical runtimes. Based on the local memory allocation value corresponding to the historical runtime of the process and the prediction model, the process of determining the local memory prediction value corresponding to the current runtime of the process can be: obtaining the weight coefficient corresponding to the process at each historical runtime in the prediction model; according to the weight coefficient corresponding to the process at each historical runtime and the local memory allocation value corresponding to each historical runtime, obtaining the local memory prediction value corresponding to the current runtime of the process.

[0146] For example, the local memory allocation values ​​corresponding to multiple historical running times are the local memory allocation values ​​M corresponding to the n-1th running time of the process. n-1 ; The local memory allocation value M corresponding to the process's n-2th run n-2 , and the local memory allocation value M corresponding to the process's n-3rd run n-3 The corresponding weight coefficient when the process runs for the n-1th time can be c 1 ; The corresponding weight coefficient when the process runs for the n-2th time can be c 2 ; The corresponding weight coefficient when the process runs for the n-3th time can be c 3 . According to c 1 、c 2 、c 3、M n-1 、M n-2 and M n-3 Get the local memory prediction value corresponding to the current running process.

[0147] In addition, in different operation scenarios, the weight coefficients corresponding to the processes at various historical operation moments may be the same or different. In some examples, in different operation scenarios, the weight coefficients corresponding to the processes at various historical operation moments may be obtained through a large number of experiments.

[0148] In some examples, based on the local memory allocation value corresponding to the historical runtime of the process and the prediction model, the process of determining the local memory prediction value corresponding to the current runtime of the process can be: inputting the local memory allocation value corresponding to the historical runtime of the process into the prediction model, and the prediction model outputting the local memory prediction value corresponding to the current runtime of the process.

[0149] In some examples, the prediction model satisfies the following expression:

[0150] M n =c 1 M n-1 +c 2 M n-2 +c 3 M n-3

[0151] Among them, M n M is the local memory prediction value corresponding to the current running process; n-1 The local memory allocation value corresponding to the process's n-1th execution, M n-2 The local memory allocation value corresponding to the process's n-2th execution; M n-3 The local memory allocation value corresponding to the process's n-3rd execution; c 1 is the weight coefficient corresponding to the process when it runs at the n-1th time, c 2 is the weight coefficient corresponding to the process when it runs at the n-2th time, c 3 It is the weight coefficient corresponding to the process when it runs for the n-2th time. <c 1 ≤1; 0 <c 2 ≤1; 0 <c 3 ≤1; and c 1 +c 2 +c 3 =1.

[0152] For example, when c 2 = 0 and c 3 = 0, due to c 1 +c 2 +c 3 =1, then c 1= 1. The local memory allocation value corresponding to the historical runtime of the process is input into the prediction model, and the M output by the prediction model is n =M n-1 That is, the local memory prediction value corresponding to the current execution of the process is consistent with the local memory allocation value corresponding to the previous execution. If the state of the operating system has not changed significantly, it is generally believed that in this case, the local memory prediction value corresponding to the current execution of the process obtained is more accurate. If the state of the operating system has changed significantly, it is believed that the local memory prediction value corresponding to the current execution of the process obtained based on this method will have a certain deviation.

[0153] Step 603: The local memory prediction submodule generates a first notification based on the local memory prediction value corresponding to the current running process, and sends the first notification to the TSD quantity decision submodule.

[0154] The first notification may also be referred to as a TSD quantity determination signal. The first notification is used to request the TSD quantity decision submodule to determine the first TSD quantity corresponding to the process according to the local memory prediction value corresponding to the current running of the process. The first notification includes the local memory prediction value corresponding to the current running of the process.

[0155] After the local memory prediction submodule determines the local memory prediction value of the process when it is currently running, it can generate a first notification based on the local memory prediction value corresponding to the current execution of the process, and send the first notification to the TSD quantity decision submodule, so that the TSD quantity decision submodule determines the first TSD quantity corresponding to the process based on the local memory prediction value corresponding to the current execution of the process in the first notification.

[0156] Step 604: The TSD quantity decision submodule receives the first notification.

[0157] Step 605: In response to the first notification, the TSD quantity decision submodule determines a first TSD quantity corresponding to the process based on a local memory prediction value corresponding to the current execution of the process.

[0158] After the TSD quantity decision submodule receives the first notification, the TSD quantity decision submodule can determine the first TSD quantity corresponding to the process according to the local memory prediction value corresponding to the current running of the process in the first notification. Then, the TSD quantity corresponding to the process can be set according to the first TSD quantity, so as to avoid the system performance being affected by insufficient TSD quantity during the subsequent running of the process.

[0159] In some examples, the process in which the TSD quantity decision submodule determines the first TSD quantity corresponding to the process based on the local memory prediction value corresponding to the current running of the process may be: when the local memory prediction value corresponding to the current running of the process is less than the first memory threshold, the first TSD quantity is determined to be the first value. When the local memory prediction value corresponding to the current running of the process is greater than the first memory threshold and less than the second memory threshold, the first TSD quantity is determined to be the second value; the second value is greater than the first value. When the local memory prediction value corresponding to the current running of the process is greater than the second memory threshold, the first TSD quantity is determined to be the third value; the third value is greater than the second value.

[0160] Exemplarily, the first memory threshold is 100, and the second memory threshold is 200. The first value is 2, the second value is 4, and the third value is 8. It is understandable that with the update of memory configuration technology, the first memory threshold, the second memory threshold, the first value, the second value, and the third value may change. The present disclosure does not limit the values ​​of the first memory threshold, the second memory threshold, the first value, the second value, and the third value, and the specific actual application shall prevail.

[0161] In some examples, the process in which the TSD quantity decision submodule determines the first TSD quantity corresponding to the process based on the local memory prediction value corresponding to the current execution of the process may be: the TSD quantity decision submodule inputs the local memory prediction value corresponding to the current execution of the process into the allocation model, and the allocation model outputs the first TSD quantity corresponding to the process.

[0162] In some examples, the allocation model satisfies the following expression:

[0163]

[0164] Among them, M n It is the predicted value of local memory corresponding to the current running process. 1 is the first memory threshold, σ 2 is the second memory threshold. 1 =100,σ 2 =200.

[0165] When the local memory prediction value of the process is currently running is less than σ 1 , it indicates that the memory requirement of the process is not high, so the number of first TSDs corresponding to the process is set to 2. When the local memory prediction value corresponding to the current running process is greater than σ 1 Less than σ 2 , it indicates that the memory demand of the process is large, so the number of first TSDs corresponding to the process is set to 4. When the local memory prediction value corresponding to the current running process is greater than σ 2, indicating that the memory requirement of the process is very high, the first TSD number corresponding to the process is set to 8. That is, the embodiment of the present disclosure sets a larger TSD for a process with a larger memory requirement and a smaller TSD for a process with a smaller memory requirement, so that the system performance and memory usage can be better balanced.

[0166] Exemplarily, the local memory prediction value MA corresponding to the current execution of process A is 150, and the local memory prediction value corresponding to the current execution of process A is input into the above allocation model, and the allocation model outputs the first TSD number corresponding to process A as 4.

[0167] Combined with the above process of determining the first TSD number corresponding to the process based on the local memory prediction value corresponding to the current running of the process, it can be known that if the local memory prediction value corresponding to the current running of the process is larger, it means that the demand for the process to call Scudo to allocate memory is also greater. Then the probability of the process competing with other processes for the number of TSDs is also greater. Therefore, when the process requires more memory, the TSD number decision submodule can meet the memory requirements of the process by increasing the number of TSDs. In addition, increasing the number of TSDs corresponding to the process can enable the process to respond quickly to control instructions during operation, and can also improve the processing efficiency of the operating system.

[0168] If the local memory prediction value corresponding to the current running process is small, it means that the process has a smaller need to call Scudo to allocate memory. Then the probability of the process competing with other processes for the number of TSDs is smaller. In the process of memory application, even if there are certain delays or efficiency issues, it will not have a significant impact on the overall performance of the process. Therefore, when the memory required by the process is small, the TSD number decision submodule can reduce the number of TSDs to avoid memory occupation in the process.

[0169] Step 606: The TSD quantity decision submodule obtains the second TSD quantity corresponding to the process.

[0170] The second TSD number may also be referred to as the initial TSD number. The second TSD number is the initial TSD number allocated by Scudo to the process.

[0171] In some examples, the number of second TSDs that Scudo allocates to the process is set at the compile stage. For example, Scudo supports 2 TSDs by default and 8 TSDs at most. Therefore, the number of second TSDs that Scudo allocates to the process can be 2 or 8.

[0172] Step 607 , the TSD quantity decision submodule compares the first TSD quantity and the second TSD quantity. When the first TSD quantity and the second TSD quantity are different, the TSD quantity decision submodule sends a second notification to the local cache setting module.

[0173] The second notification may also be referred to as an adjustment signal, and the second notification is used to request the local cache setting module to adjust the number of TSDs corresponding to the process. The second notification includes the first number of TSDs.

[0174] Since the second TSD number is generated during the compilation phase, that is to say, the TSD number currently set for the process is the second TSD number. Since the TSD number set during the compilation phase does not refer to the real memory data of the process (i.e., the local memory allocation value corresponding to the historical runtime), the second TSD number corresponding to the process may not necessarily meet the memory requirements. In order to make the TSD number corresponding to the process more reasonably set, after the TSD number decision submodule obtains the first TSD number and the second TSD number, the TSD number decision submodule can determine whether the TSD number needs to be adjusted based on the first TSD number and the second TSD number, and then perform the next step of processing based on the determination result, so that the processed TSD number can meet the memory requirements of the process.

[0175] In some examples, the process in which the TSD quantity decision submodule determines whether the TSD quantity needs to be adjusted based on the first TSD quantity and the second TSD quantity may be: the TSD quantity decision submodule compares the first TSD quantity and the second TSD quantity, and determines that the TSD quantity does not need to be adjusted when the first TSD quantity and the second TSD quantity are the same. When the first TSD quantity and the second TSD quantity are different, it is determined that the TSD quantity needs to be adjusted. When it is determined that the TSD quantity needs to be adjusted, the TSD quantity decision submodule may send a second notification to the local cache setting module to instruct the local cache setting module to adjust the TSD quantity of the process to the first TSD quantity.

[0176] In some scenarios, the TSD quantity decision submodule compares the first TSD quantity and the second TSD quantity. If the first TSD quantity and the second TSD quantity are the same, it means that during the compilation phase, the TSD quantity allocated by Scudo to the process meets the memory requirements of the process, and there is no need to adjust the TSD quantity corresponding to the process through the second notification.

[0177] The TSD quantity decision submodule compares the first TSD quantity and the second TSD quantity. If the first TSD quantity and the second TSD quantity are different, it means that during the compilation phase, the TSD quantity allocated by Scudo to the process does not meet the memory requirements of the process, so it is necessary to adjust the TSD quantity corresponding to the process through the second notification so that the adjusted TSD quantity can meet the memory requirements of the process.

[0178] In some examples, the Android operating system may call a bionic function library, which includes an adjustment signal. When the TSD quantity decision submodule determines that the first TSD quantity and the second TSD quantity are different, the adjustment signal in the bionic function library may be called and sent to the local cache setting module, so that the local cache setting module adjusts the TSD quantity of the process based on the adjustment signal.

[0179] Among them, bionic is a C library that complies with the Portable Operating System Interface (POSIX) standard and is provided by the Android operating system for C / C++ developers to develop native applications. It is a derivative library of the Android operating system BSD (a branch of the UNIX operating system) standard C library. Bionic provides the minimum set of constructs required to develop any type of functional native code on the Android operating system.

[0180] Step 608: The local cache setting module receives the second notification.

[0181] Step 609: In response to the second notification, the local cache setting module adjusts the number of TSDs corresponding to the process to the first number of TSDs.

[0182] After receiving the second notification, the local cache setting module may adjust the number of TSDs corresponding to the process in response to the second notification based on the first number of TSDs in the second notification.

[0183] In some examples, in response to the second notification, the process by which the local cache setting module adjusts the TSD number corresponding to the process to the first TSD number may be: after the local cache setting module receives the second notification, based on the first TSD number in the second notification, the cache setting interface is called to adjust the TSD number corresponding to the process to the first TSD number.

[0184] Exemplarily, calling the cache setting interface to adjust the number of TSDs corresponding to the process to the first number of TSDs may be to use the mallopt function in the signal processing function to adjust the number of TSDs of the process to the first number of TSDs. It is understandable that the local cache setting module may also use other functions to adjust the number of TSDs corresponding to the process, and the present disclosure does not limit this.

[0185] In some examples, reference Figure 5 Calling the cache setting interface to adjust the number of TSDs corresponding to the process to the first number of TSDs may be a local cache setting module calling the cache setting interface to adjust the number of TSDs integrated in the Scudo of the process to the first number of TSDs.

[0186] Step 610: The local cache dynamic adjustment module obtains the actual value of the local memory corresponding to the current execution of the process and the predicted value of the local memory corresponding to the current execution of the process.

[0187] In order to accurately understand the memory requirements of the process, the local cache dynamic adjustment module can also obtain the actual local memory value corresponding to the current execution of the process and the predicted local memory value corresponding to the current execution of the process, and then compare the actual local memory value corresponding to the current execution of the process with the predicted local memory value corresponding to the current execution of the process, so as to further determine whether it is necessary to adjust the number of TSDs corresponding to the process based on the comparison results of the actual local memory value corresponding to the current execution of the process and the predicted local memory value corresponding to the current execution of the process.

[0188] In combination with the above steps 601 to 609, it can be known that the first TSD number corresponding to the process can be obtained based on the local memory prediction value corresponding to the current running process. Therefore, determining whether to adjust the TSD number corresponding to the process means adjusting the first TSD number corresponding to the process.

[0189] Step 611, the local cache dynamic adjustment module compares the actual value of the local memory corresponding to the current execution of the process with the predicted value of the local memory corresponding to the current execution of the process. If the actual value of the local memory corresponding to the current execution of the process and the predicted value of the local memory corresponding to the current execution of the process are different, determine the third TSD number corresponding to the process according to the actual value of the local memory corresponding to the current execution of the process, and adjust the TSD number corresponding to the process to the third TSD number.

[0190] In some examples, after the local cache dynamic adjustment module obtains the actual value of the local memory corresponding to the current running of the process, the local cache dynamic adjustment module can also obtain the local memory prediction value corresponding to the current running of the process generated by the local memory prediction submodule. Then compare the actual value of the local memory corresponding to the current running of the process with the predicted value of the local memory corresponding to the current running of the process; and further adjust the number of TSDs of the process based on the comparison result of the actual value of the local memory corresponding to the current running of the process and the predicted value of the local memory corresponding to the current running of the process.

[0191] In some examples, the local cache dynamic adjustment module further adjusts the number of TSDs of the process based on the comparison result of the actual local memory value corresponding to the current execution of the process and the predicted local memory value corresponding to the current execution of the process. The process may be: the local cache dynamic adjustment module compares the actual local memory value corresponding to the current execution of the process and the predicted local memory value corresponding to the current execution of the process, and determines that there is no need to adjust the number of TSDs if the actual local memory value corresponding to the current execution of the process and the predicted local memory value corresponding to the current execution of the process are the same.

[0192] It can be understood that when the actual local memory value corresponding to the current execution of the process is the same as the predicted local memory value corresponding to the current execution of the process, it means that the currently set first TSD number meets the memory requirements of the process, and there is no need to set the TSD number corresponding to the process again.

[0193] When the actual local memory value corresponding to the current execution of the process is different from the predicted local memory value corresponding to the current execution of the process (or the actual local memory value corresponding to the current execution of the process is significantly different from the predicted local memory value corresponding to the current execution of the process), it is determined that the number of TSDs needs to be adjusted.

[0194] It can be understood that when the actual local memory value corresponding to the current execution of the process is different from the predicted local memory value corresponding to the current execution of the process, it means that the currently set first TSD number does not meet the memory requirements of the process, and the TSD number corresponding to the process needs to be set again.

[0195] When it is determined that the number of TSDs needs to be adjusted, the local cache dynamic adjustment module determines the third number of TSDs based on the actual value of the local memory corresponding to the current running process, and finally adjusts the number of TSDs corresponding to the process to the third number of TSDs.

[0196] In some examples, when it is determined that the number of TSDs needs to be adjusted, the local cache dynamic adjustment module determines the third number of TSDs based on the actual value of the local memory corresponding to the current running of the process. The process may be: when the actual value of the local memory corresponding to the current running of the process is less than the third memory threshold, the third number of TSDs is determined to be a fourth value. When the predicted value of the local memory corresponding to the current running of the process is greater than the third memory threshold and less than the fourth memory threshold, the third number of TSDs is determined to be a fifth value; the fifth value is greater than the fourth value. When the predicted value of the local memory corresponding to the current running of the process is greater than the fourth memory threshold, the third number of TSDs is determined to be a sixth value; the sixth value is greater than the fifth value.

[0197] Exemplarily, the third memory threshold is 100, the fourth memory threshold is 200, the fourth value is 2, the fifth value is 4, and the sixth value is 8. It is understandable that, with the update of memory allocation technology, the values ​​of the third memory threshold, the fourth memory threshold, the fourth value, the fifth value, and the sixth value may change, and the present disclosure does not limit the values ​​of the third memory threshold, the fourth memory threshold, the fourth value, the fifth value, and the sixth value, which shall be subject to actual application.

[0198] In some examples, when it is determined that the number of TSDs needs to be adjusted, the local cache dynamic adjustment module determines the third number of TSDs based on the actual value of the local memory corresponding to the current execution of the process. The process can be: the local cache dynamic adjustment module determines the third number of TSDs corresponding to the process based on the actual value of the local memory corresponding to the current execution of the process and the adjustment model.

[0199] In some examples, the local cache dynamic adjustment module determines the number of third TSDs corresponding to the process based on the actual value of the local memory corresponding to the current execution of the process and the adjustment model. The process may be: inputting the actual value of the local memory corresponding to the current execution of the process into the adjustment model, and the adjustment model outputs the number of third TSDs corresponding to the process.

[0200] In some examples, the adjustment model satisfies the following expression:

[0201]

[0202] Among them, M i The actual value of the local memory corresponding to the current running process. 3 is the third memory threshold, σ 4 is the fourth memory threshold. For example, σ 3 =100,σ 4 =200.

[0203] Based on the adjustment model, we know that when the actual value of the local memory corresponding to the current running process is less than σ 3 , then the number of the third TSD corresponding to the process is set to 2. When the actual value of the local memory corresponding to the current running process is greater than σ 3 Less than σ 4 , then the number of the third TSD corresponding to the process is set to 4. When the actual value of the local memory corresponding to the current running process is greater than σ 4 , the number of the third TSD corresponding to the process is set to 8.

[0204] In some examples, if the local cache dynamic adjustment module determines that the third TSD number corresponding to the process is greater than the first TSD number based on the actual value of the local memory corresponding to the current running of the process, the number of TSDs corresponding to the process can be adjusted based on the third TSD number. If the third TSD number corresponding to the process is equal to the first TSD number based on the actual value of the local memory corresponding to the current running of the process, the number of TSDs corresponding to the process will not be adjusted. If the third TSD number corresponding to the process is less than the first TSD number based on the actual value of the local memory corresponding to the current running of the process, the number of TSDs corresponding to the process will not be adjusted.

[0205] In some examples, if the local cache dynamic adjustment module determines that the third TSD number corresponding to the process is less than the first TSD number based on the actual value of the local memory corresponding to the current running process, the TSD number corresponding to the process is adjusted according to the third TSD number.

[0206] In some examples, combined with step 602, it can be known that the local memory prediction value corresponding to the current running of the process is obtained based on the local memory allocation value corresponding to the historical running of the process. For the process running for the first time, since there is no local memory allocation value corresponding to the historical running of the process, the local memory prediction submodule cannot determine the local memory prediction value corresponding to the current running of the process based on the local memory allocation value corresponding to the historical running of the process and the prediction model. Correspondingly, the TSD quantity decision submodule cannot determine the number of TSDs corresponding to the process based on the local memory prediction value corresponding to the current running of the process. So in this case, the local cache dynamic adjustment module can be directly used to obtain the actual value of the local memory corresponding to the current running of the process, and then the number of TSDs corresponding to the process can be determined based on the actual value of the local memory corresponding to the current running of the process. When the determined number of TSDs corresponding to the process is different from the second number of TSDs, the second number of TSDs can be adjusted to the number of TSDs corresponding to the process. When the determined number of TSDs corresponding to the process is the same as the second number of TSDs, no adjustment is required.

[0207] In some scenarios, a memory dynamic configuration method proposed in the present disclosure can dynamically configure the number of TSDs according to the memory requirements of the process and the changes in the scenario. The memory dynamic configuration method disclosed in the present disclosure can also include a variety of adjustment strategies. In actual applications, a suitable adjustment strategy can be selected according to the state of the Android operating system and the actual scenario. The adjustment strategy provided by the present disclosure is described in detail below.

[0208] Adjustment strategy 1: For the core system process of the Android operating system, the number of TSDs of the core system process can be directly increased. For example, the number of TSDs of the core system process can be adjusted to 8. The core system processes of the Android operating system may include system service (system_server) processes, launcher processes, systemui processes, surfaceflinger processes, etc.

[0209] Since the above core system processes provide core services of the Android operating system, these processes have a large number of threads. Correspondingly, these processes also have a high memory requirement. Therefore, increasing the number of TSDs for these processes can improve memory allocation efficiency and thus improve system performance.

[0210] Adjustment strategy 2: For non-core system processes of the Android operating system, the number of TSDs of the non-core system processes can be directly reduced. For example, the number of TSDs of the non-core system processes can be adjusted to 2. The non-core system processes of the Android operating system may include a calendar process, a Bluetooth process, and the like.

[0211] Since the number of threads corresponding to the above non-core system processes is small, the memory requirements of these processes are also low. Even if there are certain delays or efficiency issues in the memory application process, it will not have a significant impact on the overall performance of the process. Therefore, the number of TSDs for these processes can be adjusted to a smaller value, so as to more reasonably utilize the memory resources of the operating system.

[0212] Adjustment strategy 3: For the preset applications in the Android operating system, you can directly increase the number of TSDs corresponding to the main process and sub-processes of the preset application. For example, adjust the number of TSDs corresponding to the main process and sub-processes of the preset application to 8. The preset application can also be called TOP third-party applications. The memory occupied by the preset application is basically 1G or more. For example, the preset application can be And other large-scale mobile games.

[0213] The preset application needs to consume a lot of system resources when processing user requests or performing specific tasks, which will cause the preset application to respond slowly or reduce processing capabilities. As a result, the preset application may not run smoothly, or even crash or become unresponsive. Therefore, the present disclosure can increase the number of TSDs corresponding to the main process and sub-processes of the preset application to avoid the above phenomenon and improve the performance of the preset application.

[0214] Adjustment strategy 4: For non-preset applications in the Android operating system, you can directly increase the number of TSDs corresponding to the main process of the non-preset application and reduce the number of TSDs corresponding to the sub-processes of the non-preset application. For example, adjust the number of TSDs corresponding to the main process of the non-preset application to 8, and adjust the number of TSDs corresponding to the sub-processes of the non-preset application to 2. In this way, the memory usage of non-preset applications can be reduced.

[0215] It is understandable that the memory dynamic configuration method corresponding to the above steps 601 to 611 can also be considered as an adjustment strategy, namely, adjustment strategy 5. In practical applications, one or a combination of the above adjustment strategies can be selected for use, and the present disclosure does not limit this.

[0216] In some examples, the above-mentioned memory dynamic configuration method also includes: determining that the process is a core system process, and adjusting the number of TSDs corresponding to the process to a first threshold; determining that the process is a non-core system process, and adjusting the number of TSDs corresponding to the process to a second threshold, and the second threshold is less than the first threshold.

[0217] Exemplarily, the first threshold is 8, and the second threshold is 2. It can be understood that the first threshold and the second threshold can be adjusted according to actual memory requirements, and the present disclosure does not limit this.

[0218] In some examples, the above-mentioned memory dynamic configuration method also includes: the method also includes: determining that the process is a process of a preset application, and adjusting the number of TSDs corresponding to the main process and child processes of the preset application to a third threshold; the preset application is an application that occupies 1G or more of memory; determining that the process is a process of a non-preset application, and adjusting the number of TSDs corresponding to the main process of the non-preset application to the third threshold, and adjusting the number of TSDs corresponding to the child processes of the non-preset application to a fourth threshold, and the fourth threshold is less than the third threshold.

[0219] Exemplarily, the third threshold is 8, and the fourth threshold is 2. It can be understood that the third threshold and the fourth threshold can be adjusted according to actual memory requirements, and the present disclosure does not limit this.

[0220] Therefore, by adopting this scheme, after the process is started, the present disclosure can predict the local memory prediction value corresponding to the current runtime of the process based on the local memory allocation value corresponding to the historical runtime of the process and the prediction model. Then, based on the local memory prediction value corresponding to the current runtime of the process, the first TSD number corresponding to the process is obtained. Then, the second TSD number is obtained. Since the second TSD number (i.e., the initial TSD number) is generated during the compilation phase and does not refer to the real memory data of the process (i.e., the local memory allocation value corresponding to the historical runtime), the second TSD number corresponding to the process may not meet the memory requirements. Therefore, when the first TSD number and the second TSD number are different, the TSD number of the process can be adjusted to the first TSD number. In this way, a larger TSD can be set for processes with larger memory requirements, and a smaller TSD can be set for processes with smaller memory requirements, so as to better balance system performance and memory usage.

[0221] In addition, the present disclosure also takes into account the actual value of local memory corresponding to the runtime of the process. If the actual value of local memory corresponding to the current runtime is different from the predicted value of local memory corresponding to the current runtime, the actual value of local memory corresponding to the current runtime can be used as the basis to determine the new third TSD number, thereby adjusting the TSD number corresponding to the process according to the third TSD number. In this way, not only can the TSD number of the process be dynamically configured, but also the TSD number corresponding to the process can be made more in line with the usage requirements of the process.

[0222] It should be understood that each step in the above method embodiment provided by the present disclosure can be completed by an integrated logic circuit of hardware in a processor or by instructions in the form of software. The method steps disclosed in the embodiments of the present disclosure can be directly embodied as being executed by a hardware processor, or by a combination of hardware and software modules in a processor.

[0223] In one example, the unit in the above apparatus may be one or more integrated circuits configured to implement the above method, such as one or more ASICs, or one or more DSPs, or one or more FPGAs, or a combination of at least two of these integrated circuit forms.

[0224] For another example, when the units in the device can be implemented in the form of a processing element scheduling program, the processing element can be a general-purpose processor, such as a CPU or other processor that can call a program. For another example, these units can be integrated together and implemented in the form of a system on a chip SOC.

[0225] In one implementation, the units of the above apparatus implementing the corresponding steps in the above method can be implemented in the form of a processing element scheduling program. For example, the apparatus may include a processing element and a storage element, and the processing element calls the program stored in the storage element to execute the method of the above method embodiment. The storage element may be a storage element on the same chip as the processing element, that is, an on-chip storage element.

[0226] In another implementation, the program for executing the above method may be in a storage element on a different chip from the processing element, i.e., an off-chip storage element. In this case, the processing element calls or loads the program from the off-chip storage element to the on-chip storage element to call and execute the method of the above method embodiment.

[0227] For example, the embodiments of the present disclosure may also provide a device, such as an electronic device, which may include a processor and a memory for storing instructions executable by the processor. When the processor is configured to execute the above instructions, the electronic device implements the memory dynamic configuration method of the above embodiment. The memory may be located inside the electronic device or outside the electronic device. And the processor includes one or more.

[0228] In another implementation, the unit of the device implementing each step in the above method may be configured as one or more processing elements, which may be arranged on the corresponding electronic device, and the processing element here may be an integrated circuit, for example: one or more ASICs, or one or more DSPs, or one or more FPGAs, or a combination of these integrated circuits. These integrated circuits may be integrated together to form a chip.

[0229] The present disclosure also provides a chip, such as Figure 7 As shown, the chip system includes at least one processor 701 and at least one interface circuit 702. The processor 701 and the interface circuit 702 can be interconnected through a line. For example, the interface circuit 702 can be used to receive signals from other devices. For another example, the interface circuit 702 can be used to send signals to other devices (such as the processor 701).

[0230] For example, the interface circuit 702 can read the instructions stored in the memory in the device and send the instructions to the processor 701. When the instructions are executed by the processor 701, the electronic device (such as Figure 3 The electronic device 300 shown in the figure performs each step in the above embodiment. Of course, the chip system may also include other discrete devices, which is not specifically limited in the embodiment of the present disclosure.

[0231] The embodiment of the present disclosure also provides a computer-readable storage medium on which computer program instructions are stored. When the computer program instructions are executed by an electronic device, the electronic device can implement the above-mentioned memory dynamic configuration method.

[0232] The disclosed embodiments also provide a computer program product, including computer instructions for the electronic device as described above to be executed, and when the computer instructions are executed in the electronic device, the electronic device can implement the memory dynamic configuration method as described above. Through the description of the above implementation methods, technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0233] In the several embodiments provided in the present disclosure, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0234] The units described as separate components may or may not be physically separated, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0235] In addition, each functional unit in each embodiment of the present disclosure may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0236] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present disclosure is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, such as a program. The software product is stored in a program product, such as a computer-readable storage medium, including a number of instructions for an electronic device (which can be a single-chip microcomputer, chip, etc.) or a processor (processor) to perform all or part of the steps of the methods of each embodiment of the present disclosure. The aforementioned storage medium includes: U disk, mobile hard disk, ROM, RAM, disk or optical disk and other media that can store program codes.

[0237] For example, the embodiments of the present disclosure may also provide a computer-readable storage medium on which computer program instructions are stored. When the computer program instructions are executed by an electronic device, the electronic device implements the memory dynamic configuration method in the aforementioned method embodiment.

[0238] The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A memory dynamic configuration method, It is characterized in that The method comprises: When a process is started, the local memory allocation value corresponding to the historical runtime of the process is obtained; Obtain a local memory prediction value corresponding to the current runtime of the process according to the prediction model and the local memory allocation value corresponding to the historical runtime of the process; Determine the number of first TSDs corresponding to the process according to the local memory prediction value corresponding to the current running time of the process; Obtain the second TSD number corresponding to the process, where the second TSD number is the initial TSD number corresponding to the process; When the first TSD number is different from the second TSD number, the second TSD number corresponding to the process is adjusted to the first TSD number.

2. The method according to claim 1, It is characterized in that The method further comprises: Obtain the actual value of the local memory corresponding to the current running of the process; When the actual value of the local memory corresponding to the current execution of the process is different from the predicted value of the local memory corresponding to the current execution of the process, the third TSD number is determined based on the actual value of the local memory corresponding to the current execution of the process, and the first TSD number corresponding to the process is adjusted to the third TSD number.

3. The method according to claim 1 or 2, It is characterized in that The local memory allocation value corresponding to the historical running time of the process includes the local memory allocation value corresponding to the process at multiple historical running times; the local memory prediction value corresponding to the current running time of the process is obtained according to the prediction model and the local memory allocation value corresponding to the historical running time of the process, including: Obtaining a weight coefficient in the prediction model corresponding to the process at each of the historical running moments; According to the weight coefficient corresponding to each of the historical running moments of the process and the local memory allocation value corresponding to each of the historical running moments, the local memory prediction value corresponding to the current running of the process is obtained.

4. The method according to any one of claims 1 to 3, It is characterized in that The prediction model satisfies the following expression: M n =c 1 M n-1 +c 2 M n-2 +c 3 M n-3 Among them, the M n is the local memory prediction value corresponding to the current running of the process; n-1 is the local memory allocation value corresponding to the n-1th execution of the process, the M n-2 M is the local memory allocation value corresponding to the n-2th execution of the process; n-3 is the local memory allocation value corresponding to the n-3th execution of the process; the c 1 is the weight coefficient corresponding to the process when it is run at the n-1th time, the c 2 is the weight coefficient corresponding to the process when it is run at the n-2th time, the c 3 is the weight coefficient corresponding to the process when it is run at the n-2th time; 0 <c 1 ≤1; 0 <c 2 ≤1; 0 <c 3 ≤1; and c 1 +c 2 +c 3 =1.

5. The method according to any one of claims 1 to 4, It is characterized in that The determining, according to the local memory prediction value corresponding to the current running of the process, the first TSD quantity corresponding to the process includes: When the local memory prediction value corresponding to the current running of the process is less than the first memory threshold, determining the first TSD quantity to be a first value; When the local memory prediction value corresponding to the current running of the process is greater than the first memory threshold and less than the second memory threshold, determining that the first TSD quantity is a second value; the second value is greater than the first value; When the local memory prediction value corresponding to the current execution of the process is greater than the second memory threshold, the first TSD quantity is determined to be a third value; and the third value is greater than the second value.

6. The method according to claim 5, It is characterized in that The first TSD quantity satisfies the following expression: Among them, the M n is the local memory prediction value corresponding to the current running of the process, and the σ 1 is the first memory threshold, the σ 2 is the second memory threshold.

7. The method according to claim 2, It is characterized in that The determining the number of third TSDs based on the actual value of the local memory corresponding to the current running of the process includes: When the actual value of the local memory corresponding to the current running of the process is less than the third memory threshold, determining the third TSD number to be a fourth value; When the local memory prediction value corresponding to the current running of the process is greater than the third memory threshold and less than the fourth memory threshold, determining that the third TSD quantity is a fifth value; the fifth value is greater than the fourth value; When the local memory prediction value corresponding to the current execution of the process is greater than the fourth memory threshold, the third TSD quantity is determined to be a sixth value; and the sixth value is greater than the fifth value.

8. The method according to claim 7, It is characterized in that The third TSD quantity satisfies the following expression: Among them, the M i is the actual value of the local memory corresponding to the current running process, and the σ 3 is the third memory threshold, the σ 4 is the fourth memory threshold.

9. The method according to any one of claims 1 to 8, It is characterized in that The method further comprises: Determine that the process is a core system process, and adjust the number of TSDs corresponding to the process to a first threshold; Determine that the process is a non-core system process, and adjust the number of TSDs corresponding to the process to a second threshold, where the second threshold is less than the first threshold.

10. The method according to any one of claims 1 to 9, It is characterized in that The method further comprises: Determine that the process is a process of a preset application, and adjust the number of TSDs corresponding to the main process and the subprocess of the preset application to a third threshold; the preset application is an application that occupies a memory of 1G or more; Determine that the process is a process of a non-preset application, adjust the number of TSDs corresponding to the main process of the non-preset application to the third threshold, and adjust the number of TSDs corresponding to the sub-process of the non-preset application to a fourth threshold, wherein the fourth threshold is less than the third threshold.

11. An electronic device, It is characterized in that The electronic device comprises a processor and a memory for storing instructions executable by the processor; when the processor is configured to execute the instructions, the electronic device implements the method according to any one of claims 1 to 10.

12. A computer-readable storage medium having computer program instructions stored thereon; It is characterized in that When the computer program instructions are executed by an electronic device, the electronic device implements the method according to any one of claims 1 to 10.

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