Display panel and display device

Abstract

Embodiments of the present application provide a display panel and a display device. The display panel comprises a substrate, a display light emitting device, a privacy light emitting device, a shielding layer, a display pixel circuit and a privacy pixel circuit. In a direction perpendicular to a plane in which the substrate is located, the shielding layer completely covers the privacy light emitting device, and the shielding layer does not overlap with the display light emitting device. The display pixel circuit is electrically connected with the display light emitting device, and the privacy pixel circuit is electrically connected with the privacy light emitting device. In a normal display mode, the display light emitting device emits light, and the privacy light emitting device does not emit light. In a privacy display mode, the display light emitting device and the privacy light emitting device both emit light. The privacy pixel circuit and the display pixel circuit are both electrically connected with a same voltage signal line, and / or the privacy pixel circuit and the display pixel circuit are both electrically connected with a same scanning signal line. The present application can realize an active privacy function of the display panel, and is conducive to reducing the structural complexity of a peripheral circuit of the display panel.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and display device. Background Technology

[0002] Currently, display devices have become an indispensable part of modern work and life. However, in public places, people around may unintentionally or intentionally peek at the content displayed on other people's display devices, which can easily lead to the leakage of sensitive information.

[0003] Therefore, people have an increasingly urgent need for privacy protection features on display devices, and a solution is urgently needed. Summary of the Invention

[0004] In view of this, embodiments of this application provide a display panel and a display device to solve the above problems.

[0005] In a first aspect, embodiments of this application provide a display panel, including a substrate, a plurality of light-emitting devices, a shielding layer, a display pixel circuit, and a privacy pixel circuit. The light-emitting devices are located on one side of the substrate, and the plurality of light-emitting devices include a display light-emitting device and a privacy light-emitting device. The shielding layer is located on the side of the privacy light-emitting device away from the substrate, and along a direction perpendicular to the plane of the substrate, the shielding layer completely covers the privacy light-emitting device, and the shielding layer does not overlap with the display light-emitting device. The display pixel circuit and the privacy pixel circuit are located between the substrate and the light-emitting devices, the display pixel circuit is electrically connected to the display light-emitting device, and the privacy pixel circuit is electrically connected to the privacy light-emitting device.

[0006] The display panel includes a normal display mode and a privacy display mode. In the normal display mode, the display light-emitting device emits light, while the privacy light-emitting device does not emit light. In the privacy display mode, both the display light-emitting device and the privacy light-emitting device emit light.

[0007] The privacy pixel circuit and the display pixel circuit are both electrically connected to the same voltage signal line, and / or the privacy pixel circuit and the display pixel circuit are both electrically connected to the same scan signal line.

[0008] Secondly, based on the same inventive concept, embodiments of this application provide a display device, including the display panel as provided in the first aspect.

[0009] In this embodiment, in the normal display mode of the display panel, the display light-emitting device is set to emit light, while the privacy light-emitting device does not emit light. Therefore, the light emitted by the display light-emitting device is not interfered with by the privacy light-emitting device, allowing the display light-emitting device to display normally. In the privacy display mode of the display panel, both the display light-emitting device and the privacy light-emitting device emit light. The small-angle light emitted by the privacy light-emitting device is blocked by the shielding layer, while the large-angle light emitted interferes with the large-angle display of the display light-emitting device. Thus, without affecting the front display of the display panel, large-angle privacy protection can be achieved, which helps prevent people in the surrounding area from peeping at the display content of the display panel, meeting the user's need for active privacy protection of the display panel.

[0010] Furthermore, setting the privacy pixel circuit and the display pixel circuit to share the same voltage signal line and / or the same scan signal line can help reduce the structural complexity of the peripheral circuits driving the privacy pixel circuit and the display pixel circuit, and simplify the structure of the display panel. Attached Figure Description

[0011] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application;

[0013] Figure 2 A schematic diagram of a display pixel circuit provided in an embodiment of this application;

[0014] Figure 3 for Figure 2 The diagram shown is a schematic of a pixel circuit.

[0015] Figure 4 for Figure 2 The diagram shown is another schematic of a pixel circuit.

[0016] Figure 5 This application provides a schematic diagram illustrating the connection between a display pixel circuit and a privacy pixel circuit in an embodiment of the present application.

[0017] Figure 6 A schematic diagram illustrating the connection between a display pixel circuit and a privacy pixel circuit provided in an embodiment of this application;

[0018] Figure 7 A schematic diagram of a privacy pixel circuit provided in an embodiment of this application;

[0019] Figure 8This is a waveform diagram of a reset voltage signal line provided in an embodiment of this application;

[0020] Figure 9 A schematic diagram illustrating the connection between the privacy pixel circuit and the display pixel circuit provided in an embodiment of this application;

[0021] Figure 10 for Figure 9 The diagram shows a schematic of a privacy pixel circuit and a display pixel circuit.

[0022] Figure 11 for Figure 10 The diagram shows a timing diagram of the privacy pixel circuit and the display pixel circuit.

[0023] Figure 12 for Figure 9 The diagram shows another schematic of the privacy pixel circuit and the display pixel circuit.

[0024] Figure 13 A waveform diagram of a bias voltage signal line provided in an embodiment of this application;

[0025] Figure 14 A schematic diagram illustrating the connection between the privacy pixel circuit and the display pixel circuit provided in an embodiment of this application;

[0026] Figure 15 This is a waveform diagram of a first voltage signal line provided in an embodiment of this application;

[0027] Figure 16 This is a partial plan view of a display panel provided in an embodiment of this application;

[0028] Figure 17 This is a schematic diagram of the structure of another display panel provided in an embodiment of this application;

[0029] Figure 18 A partial plan view of another display panel provided in an embodiment of this application;

[0030] Figure 19 This is a schematic diagram of the structure of another display panel provided in an embodiment of this application;

[0031] Figure 20 This is a schematic diagram of the structure of another display panel provided in an embodiment of this application;

[0032] Figure 21 This is a schematic diagram of a display device provided in an embodiment of this application. Detailed Implementation

[0033] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0034] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0035] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0036] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Furthermore, the character " / " in this article generally indicates that the related objects before and after it have an "or" relationship.

[0037] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0038] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application.

[0039] This application embodiment provides a display panel 01, such as Figure 1 As shown, the display panel 01 includes a substrate 10, multiple light-emitting devices 20, a shielding layer 30, a display pixel circuit 40, and a privacy pixel circuit 50. The light-emitting devices 20 are located on one side of the substrate 10. Among the multiple light-emitting devices 20, there are display light-emitting devices 21 and privacy light-emitting devices 22. The display light-emitting devices 21 are used to display images, and the privacy light-emitting devices 22 are used for privacy display.

[0040] Optionally, the light-emitting device 20 is one of an organic light-emitting diode (OLED), a micro light-emitting diode (Micro-LED), or a sub-millimeter light-emitting diode (Mini-LED). Figure 1 The illustration only uses an organic light-emitting diode as the light-emitting device 20.

[0041] Optional, such as Figure 1 As shown, the light-emitting device 21 and the privacy light-emitting device 22 are arranged on the same layer.

[0042] The shielding layer 30 is located on the side of the privacy light-emitting device 22 away from the substrate 10. Along the direction H perpendicular to the plane of the substrate 10, the shielding layer 30 completely covers the privacy light-emitting device 22, and the shielding layer 30 does not overlap with the display light-emitting device 21. In this way, the shielding layer 30 can be used to block the front light emission of the privacy light-emitting device 22 without affecting the front light emission of the display light-emitting device 21.

[0043] The display pixel circuit 40 and the privacy pixel circuit 50 are located between the substrate 10 and the light-emitting device 20. The display pixel circuit 40 is electrically connected to the display light-emitting device 21 and is used to drive the display light-emitting device 21 to emit light. The display pixel circuit 40 may include multiple transistors. Figure 1 This only illustrates one transistor in the display pixel circuit 40.

[0044] The privacy pixel circuit 50 is electrically connected to the privacy light-emitting device 22 and is used to drive the privacy light-emitting device 22 to emit light. The privacy pixel circuit 50 may include at least one transistor. Figure 1 This only illustrates one transistor in the privacy pixel circuit 50.

[0045] The display panel 01 includes a normal display mode and a privacy display mode. In the normal display mode, the display light-emitting device 21 emits light, while the privacy light-emitting device 22 does not emit light. In the privacy display mode, both the display light-emitting device 21 and the privacy light-emitting device 22 emit light.

[0046] The privacy pixel circuit 50 and the display pixel circuit 40 are both electrically connected to the same voltage signal line, and / or the privacy pixel circuit 50 and the display pixel circuit 40 are both electrically connected to the same scan signal line.

[0047] In other words, the privacy pixel circuit 50 and the display pixel circuit 40 can share the same voltage signal line, or share the same scan signal line, or share both the same voltage signal line and the same scan signal line.

[0048] In this embodiment, in the normal display mode of the display panel 01, the display light-emitting device 21 emits light while the privacy light-emitting device 22 does not emit light. Therefore, the light emitted by the display light-emitting device 21 is not interfered with by the privacy light-emitting device 22, allowing the display light-emitting device 21 to display normally. In the privacy display mode of the display panel 01, both the display light-emitting device 21 and the privacy light-emitting device 22 emit light. The small-angle light emitted by the privacy light-emitting device 22 is blocked by the shielding layer 30, while the large-angle light emitted interferes with the large-angle display of the display light-emitting device 21. Thus, without affecting the front display of the display panel 01, a large-angle privacy feature can be achieved, which helps prevent people in the surrounding area from peeping at the display content of the display panel 01, meeting the user's need for active privacy protection of the display panel 01.

[0049] Furthermore, setting the privacy pixel circuit 50 and the display pixel circuit 40 to share the same voltage signal line and / or the same scan signal line is beneficial to reducing the structural complexity of the peripheral circuits driving the privacy pixel circuit 50 and the display pixel circuit 40, and simplifying the structure of the display panel 01.

[0050] Optional, such as Figure 2 As shown, Figure 2 This is a schematic diagram of a display pixel circuit provided in an embodiment of this application. The display pixel circuit 40 includes a driving transistor Td, a first reset module 41, and a second reset module 42. The input terminal of the first reset module 41 is electrically connected to a first reset voltage signal line SL1, and the output terminal of the first reset module 41 is electrically connected to the gate of the driving transistor Td. The first reset voltage signal line SL1 is used to transmit a first reset voltage VREF1 to the first reset module 41, and the first reset module 41 is used to transmit the first reset voltage VREF1 to the gate of the driving transistor Td to reset the gate of the driving transistor Td.

[0051] The input terminal of the second reset module 42 is electrically connected to the second reset voltage signal line SL2, and the output terminal of the second reset module 42 is electrically connected to the first electrode of the display light-emitting device 21. The second reset voltage signal line SL2 is used to transmit the second reset voltage VREF2 to the second reset module 42, and the second reset module 42 is used to transmit the second reset voltage VREF2 to the first electrode of the display light-emitting device 21 to reset the first electrode of the display light-emitting device 21. The first electrode of the display light-emitting device 21 can be its anode.

[0052] It is understandable that the first reset voltage VREF1 and the second reset voltage VREF2 can be the same or different, and can be set according to actual needs.

[0053] In addition, such as Figure 2 As shown, the display pixel circuit 40 also includes a power supply voltage writing module 43, a data writing module 44, a threshold grasping module 45, a light emission control module 46, and a first storage capacitor C1. The input terminal of the power supply voltage writing module 43 is electrically connected to the power supply voltage signal line DL1, and the output terminal is electrically connected to the first electrode of the driving transistor Td. The power supply voltage signal line DL1 is used to transmit the power supply voltage PVDD to the power supply voltage writing module. The input terminal of the data writing module 44 is electrically connected to the data signal line DL2, and the output terminal is electrically connected to the first electrode of the driving transistor Td. The data signal line DL2 is used to transmit the data voltage Vdata to the data writing module 44.

[0054] The input terminal of the threshold grasping module 45 is electrically connected to the second electrode of the driving transistor Td, and the output terminal is electrically connected to the gate of the driving transistor Td. The input terminal of the light emission control module 46 is electrically connected to the second electrode of the driving transistor Td, and the output terminal is electrically connected to the first electrode of the display light emission device 21. One plate of the first storage capacitor C1 is electrically connected to the gate of the driving transistor Td, and the other plate is electrically connected to the power supply voltage signal line DL1.

[0055] For example, such as Figure 3 As shown, Figure 3 for Figure 2 The diagram shows a schematic of a pixel circuit. A first reset module 41 includes a first transistor T1, whose first terminal is electrically connected to a first reset voltage signal line SL1, its second terminal is electrically connected to the gate of a driving transistor Td, and its gate is electrically connected to a first scan signal line S1. A second reset module 42 includes a second transistor T2, whose first terminal is electrically connected to a second reset voltage signal line SL2, its second terminal is electrically connected to the first terminal of the display light-emitting device 21, and its gate is electrically connected to the first scan signal line S1.

[0056] The power supply voltage writing module 43 includes a third transistor T3. The first terminal of the third transistor T3 is electrically connected to the power supply voltage signal line DL1, the second terminal is electrically connected to the first terminal of the driving transistor Td, and the gate is electrically connected to the light emission control signal line EM. The data writing module 44 includes a fourth transistor T4. The first terminal of the fourth transistor T4 is electrically connected to the data signal line DL2, the second terminal is electrically connected to the first terminal of the driving transistor Td, and the gate is electrically connected to the second scan signal line S2.

[0057] The threshold capture module 45 includes a fifth transistor T5. The first terminal of the fifth transistor T5 is electrically connected to the second terminal of the driving transistor Td, the second terminal is electrically connected to the gate of the driving transistor Td, and the gate is electrically connected to the second scan signal line S2. The light emission control module 46 includes a sixth transistor T6. The first terminal of the sixth transistor T6 is electrically connected to the second terminal of the driving transistor Td, the second terminal is electrically connected to the first terminal of the display light emission device 21, and the gate is electrically connected to the light emission control signal line EM.

[0058] For example, such as Figure 3 As shown, the driving transistor Td, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all P-type transistors (low level is the enable signal, and high level is the disable signal).

[0059] For example, such as Figure 4 As shown, Figure 4 for Figure 2 The diagram shown is another schematic of a pixel circuit. Figure 4The image shows the pixel circuit and Figure 3 The difference in the pixel circuits shown lies in the fact that the driving transistor Td, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all N-type transistors (high level is the enable signal, low level is the disable signal). The gate of the second transistor T2 is electrically connected to the second scan signal line S2, and the gate of the fifth transistor T5 is electrically connected to the third scan signal line S3. It should be noted that the third scan signal line S3 connected to the previous-level pixel circuit 40 can be electrically connected to the first scan signal line S1 connected to the next-level pixel circuit 40.

[0060] Figure 5 This is a schematic diagram showing the connection between a display pixel circuit and a privacy pixel circuit, provided in an embodiment of this application.

[0061] In one embodiment of this application, such as Figure 5 As shown, the privacy pixel circuit 50 includes a privacy driving module 51. The input terminal of the privacy driving module 51 is electrically connected to the first reset voltage signal line SL1, and the output terminal of the privacy driving module 51 is electrically connected to the first pole of the privacy light-emitting device 22. The first reset voltage signal line SL1 is also used to transmit the privacy driving voltage VH to the privacy driving module 51. The privacy driving module 51 transmits the privacy driving voltage VH to the privacy light-emitting device 22 to drive the privacy light-emitting device 22 to emit light.

[0062] In the privacy display mode, the activation times of the first reset module 41 and the privacy drive module 51 are at least partially different, and the first reset voltage signal line SL1 transmits the first reset voltage VREF1 and the privacy drive voltage VH in a time-division manner.

[0063] Based on this configuration, in this embodiment, the privacy pixel circuit 50 and the display pixel circuit 40 can share the same first reset voltage signal line SL1. In privacy display mode, the first reset voltage signal line SL1 can transmit the privacy driving voltage VH during the activation period of the privacy driving module 51 to drive the privacy light-emitting device 22 to emit light. During the activation period of the first reset module 41, the first reset voltage VREF1 is transmitted to reset the gate of the driving transistor Td in the display pixel circuit 50.

[0064] Figure 6 This is a schematic diagram showing the connection between a display pixel circuit and a privacy pixel circuit, as provided in an embodiment of this application.

[0065] In one embodiment of this application, such as Figure 6As shown, the privacy pixel circuit 50 includes a privacy driving module 51. The input terminal of the privacy driving module 51 is electrically connected to the second reset voltage signal line SL2, and the output terminal of the privacy driving module 51 is electrically connected to the first pole of the privacy light-emitting device 22. The second reset voltage signal line SL2 is also used to transmit the privacy driving voltage VH to the privacy driving module 51. The privacy driving module 51 transmits the privacy driving voltage VH to the privacy light-emitting device 22 to drive the privacy light-emitting device 22 to emit light.

[0066] In the privacy display mode, the activation times of the second reset module 42 and the privacy drive module 51 are at least partially different, and the second reset voltage signal line SL2 transmits the second reset voltage VREF2 and the privacy drive voltage VH in a time-division manner.

[0067] Based on this configuration, in this embodiment, the privacy pixel circuit 50 and the display pixel circuit 40 can share the same second reset voltage signal line SL2. In privacy display mode, the second reset voltage signal line SL2 can transmit the privacy driving voltage VH during the activation period of the privacy driving module 51 to drive the privacy light-emitting device 22 to emit light. During the activation period of the second reset module 42, the second reset voltage VREF1 is transmitted to reset the first electrode of the display light-emitting device 21 in the display pixel circuit 50.

[0068] For example, such as Figure 7 As shown, Figure 7 This is a schematic diagram of a privacy pixel circuit provided in an embodiment of this application. The privacy driving module 51 includes a privacy transistor M1. The first terminal of the privacy transistor M1 is electrically connected to the input terminal of the privacy driving module 51, and the second terminal is electrically connected to the output terminal of the privacy driving module 51. That is, the first terminal of the privacy transistor M1 can be electrically connected to the first reset voltage signal line SL1 or the second reset voltage signal line SL2. The second terminal of the privacy driving transistor M2 is electrically connected to the first terminal of the privacy light-emitting device 22.

[0069] Thus, the privacy pixel circuit 50 can include only one transistor, which simplifies its structure. In this embodiment, the privacy transistor M1 can be a single-gate transistor or a dual-gate transistor. When the privacy transistor M1 is a dual-gate transistor, its two gates can be connected to the same scan signal line. Furthermore, the privacy transistor M1 can also include multiple sub-transistors connected in series to reduce the impact of leakage current from the privacy transistor M1 on the brightness of the privacy light-emitting device 22.

[0070] Combination Figure 3 and Figure 7As shown, in one embodiment of this application, the display panel 01 includes multiple scanning signal lines, including a first scanning signal line S1, a second scanning signal line S2, and a light emission control signal line EM.

[0071] The control terminals of both the first reset module 41 and the second reset module 42 are electrically connected to the first scan signal line S1. The display pixel circuit 40 also includes a data writing module 44 and a light-emitting control module 46. The input terminal of the data writing module 44 is electrically connected to the data signal line DL2, the output terminal is electrically connected to the driving transistor Td, and the control terminal is electrically connected to the second scan signal line S2. The input terminal of the light-emitting control module 46 is electrically connected to the driving transistor Td, the output terminal is electrically connected to the first electrode of the display light-emitting device 21, and the gate is electrically connected to the light-emitting control signal line EM.

[0072] The control terminal of the privacy protection drive module 51 is electrically connected to the second scan line S2 or the light emission control signal line EM.

[0073] In this embodiment, the control terminal of the privacy drive module 51 is electrically connected to the second scan line S2 or the light emission control signal line EM. In the privacy display mode, the privacy drive module 51 can be turned on simultaneously with the data writing module 44 or the light emission control module 46, but at different times than the first reset module 41 and the second reset module 42.

[0074] When the input terminal of the privacy driving module 51 is electrically connected to the first reset voltage signal line SL1, the first reset voltage signal line SL1 can transmit the privacy driving voltage VH and the first reset voltage VREF1 in a time-division manner to meet the driving requirements of the privacy light-emitting device 21 to emit light, as well as the requirements for resetting the gate of the driving transistor Td.

[0075] When the input terminal of the privacy driving module 51 is electrically connected to the second reset voltage signal line SL2, the first reset voltage signal line SL1 can transmit the privacy driving voltage VH and the second reset voltage VREF2 in a time-division manner to meet the driving requirements of the privacy light-emitting device 21 to emit light, as well as the requirement to reset the first electrode of the display light-emitting device 21.

[0076] Moreover, based on this configuration, the privacy pixel circuit 50 and the display pixel circuit 40 can share the second scan signal line S2 or the light emission control signal line EM, which helps to reduce the number of scan signal lines in the display panel 01 and further reduce the structural complexity of the peripheral circuits driving the privacy pixel circuit 50 and the display pixel circuit 40, thereby further simplifying the structure of the display panel 01.

[0077] For example, in combination Figure 3 and Figure 7As shown, when the gate of the privacy transistor M1 is electrically connected to the second scan line S2, the channel type of the privacy transistor M1 can be the same as the channel type of the fourth transistor T4. When the gate of the privacy transistor M1 is electrically connected to the light emission control signal line EM, the channel type of the privacy transistor M1 can be the same as the channel type of the sixth transistor T6.

[0078] For example, the privacy transistor M1, the fourth transistor T4, and the sixth transistor T6 are all P-type transistors.

[0079] It should be noted that when the structure of the display pixel circuit 50 is as follows... Figure 4 As shown, since the control terminal of the first reset module 41 is electrically connected to the first scan signal line S1, and the control terminal of the second reset module 42 is electrically connected to the second scan signal line S2, the control terminals of the first reset module 41 and the second reset module 42 are not connected to the same scan signal line.

[0080] Therefore, when the input terminal of the privacy drive module 51 is electrically connected to the first reset voltage signal line SL1, the control terminal of the privacy drive module 51 can be electrically connected to other scan signal lines except for the first scan signal line S1, as long as the opening time of the privacy drive module 51 is at least partially different from the opening time of the first reset module 41.

[0081] When the input terminal of the privacy drive module 51 is electrically connected to the second reset voltage signal line SL2, the control terminal of the privacy drive module 51 can be electrically connected to other scan signal lines except for the second scan signal line S2, as long as the opening time of the privacy drive module 51 is at least partially different from the opening time of the second reset module 42.

[0082] In one embodiment of this application, during the period when the privacy driving module 51 is turned on in the normal display mode, the input terminal of the privacy driving module 51 receives a reset voltage, which is used to reset the first electrode of the privacy light-emitting device 22.

[0083] Based on this configuration, when the privacy pixel circuit 50 and the display pixel 40 share the same scanning signal line, even if the privacy drive module 51 is turned on in the normal display mode, the privacy light-emitting device 22 will not emit light because the input terminal of the privacy drive module 51 receives a reset voltage at this time. This helps to avoid the privacy light-emitting device 21 affecting the full-view display of the display light-emitting device 21 in the normal display mode.

[0084] For example, such as Figure 8 As shown, Figure 8This is a waveform diagram of a reset voltage signal line provided in an embodiment of this application. The reset voltage signal line SL can be a first reset voltage signal line SL1 or a second reset voltage signal line SL2. In the normal display mode, the reset voltage signal line SL transmits the reset voltage VREF. The reset voltage VREF can be the first reset voltage VREF1 transmitted by the first reset voltage signal line SL1, or the second reset voltage VREF2 transmitted by the second reset voltage signal line SL2, so as to prevent the privacy light-emitting device 22 from emitting light in the normal display mode.

[0085] In privacy display mode, the reset voltage signal line SL can transmit the reset voltage VREF and the privacy drive voltage VH in a time-division manner to meet the light emission requirements of the privacy light-emitting device 22 and the normal operation of the display pixel circuit 40.

[0086] Figure 9 This is a schematic diagram showing the connection between a privacy pixel circuit and a display pixel circuit, as provided in an embodiment of this application.

[0087] In one embodiment of this application, such as Figure 9 As shown, the display pixel circuit 40 also includes a bias adjustment module 47. The input terminal of the bias adjustment module 47 is electrically connected to the bias voltage signal line DL3, and the output terminal of the bias adjustment module 47 is electrically connected to the driving transistor Td. The bias voltage signal line DL3 is used to transmit the bias adjustment voltage VD to the bias adjustment module 47. The bias adjustment module 47 transmits the bias adjustment voltage VD to the driving transistor Td to improve the bias state of the driving transistor Td.

[0088] For example, such as Figure 9 As shown, both the bias adjustment module 47 and the data writing module 44 are electrically connected to the first electrode of the driving transistor Td.

[0089] For example, such as Figure 9 As shown, the display pixel circuit 40 also includes a second storage capacitor C2. One plate of the second storage capacitor C2 is electrically connected to the gate of the driving transistor Td, and the other plate is electrically connected to the control terminal of the data writing module 44, so as to improve the accuracy of the data voltage Vdata being transmitted to the gate of the driving transistor Td.

[0090] The privacy pixel circuit 50 includes a privacy driving module 51. The input terminal of the privacy driving module 51 is electrically connected to the bias voltage signal line DL3, and the output terminal of the privacy driving module 51 is electrically connected to the first pole of the privacy light-emitting device 22. The bias voltage signal line DL3 is also used to transmit the privacy driving voltage VH to the privacy driving module 51. In the privacy display mode, the bias adjustment voltage VD is multiplexed as the privacy driving voltage VH.

[0091] In other words, in privacy display mode, the bias adjustment voltage VD received by the display pixel circuit 40 can be used to drive the privacy light-emitting device 22 to emit light.

[0092] Based on this configuration, in this embodiment, the display pixel circuit 40 and the privacy pixel circuit 50 can share the same bias voltage signal line DL3. In privacy display mode, the bias adjustment voltage VD transmitted by the bias voltage signal line DL3 is multiplexed as the privacy driving voltage VH, which can both adjust the bias of the driving transistor Td in the display pixel circuit 40 and drive the privacy light-emitting device 22 to emit light.

[0093] Furthermore, in privacy display mode, the voltage on the bias voltage signal line DL3 does not need to change, which helps to reduce the power consumption of the display panel 01.

[0094] For example, such as Figure 10 As shown, Figure 10 for Figure 9 The diagram shows a schematic of a privacy pixel circuit and a display pixel circuit. In the display pixel circuit 40, the bias adjustment module 47 includes a seventh transistor T7. The first terminal of the seventh transistor T7 is electrically connected to the bias voltage signal line DL3, the second terminal is electrically connected to the first terminal of the driving transistor Td, and the gate is connected to the bias scan signal line SP. Electrical connection.

[0095] The first transistor T1 has its first terminal electrically connected to the first reset voltage signal line SL1, its second terminal electrically connected to the gate of the driving transistor Td, and its gate electrically connected to the reset scan signal line SC. The second transistor T2 has its first terminal electrically connected to the second reset voltage signal line SL2, its second terminal electrically connected to the first terminal of the display light-emitting device 21, and its gate electrically connected to the bias scan signal line SP. Electrical connection.

[0096] The first terminal of the third transistor T3 is electrically connected to the power supply voltage signal line DL1, the second terminal is electrically connected to the first terminal of the driving transistor Td, and the gate is electrically connected to the light emission control signal line EM. The first terminal of the fourth transistor T4 is electrically connected to the data signal line DL2, the second terminal is electrically connected to the first terminal of the driving transistor Td, and the gate is electrically connected to the data scan signal line SP.

[0097] The first terminal of the fifth transistor T5 is electrically connected to the second terminal of the driving transistor Td, the second terminal of the transistor T5 is electrically connected to the gate of the driving transistor Td, and the gate is electrically connected to the threshold scan signal line SN. The first terminal of the sixth transistor T6 is electrically connected to the second terminal of the driving transistor Td, the second terminal of the transistor T6 is electrically connected to the first terminal of the display light-emitting device 21, and the gate is electrically connected to the light-emitting control signal line EM.

[0098] In the privacy pixel circuit 50, the privacy driving module 51 includes a privacy transistor M1. The first terminal of the privacy transistor M1 is electrically connected to the bias voltage signal line DL3, the second terminal is electrically connected to the first terminal of the privacy light-emitting device 22, and the gate is electrically connected to the first scan line S1.

[0099] For example, such as Figure 10 As shown, the driving transistor Td, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the privacy transistor M1 are all N-type transistors.

[0100] Figure 11 for Figure 10 The diagram shows a timing diagram of the privacy pixel circuit and the display pixel circuit.

[0101] For example, such as Figure 11 As shown, in a single frame of the display image, the operation of the display pixel circuit 40 includes a reset stage Z1, a data writing stage Z2, a bias adjustment stage Z3, and an emission stage Z4.

[0102] During the reset phase Z1, the first transistor T1 is turned on, and the first reset voltage VREF1 is transmitted to the gate of the driving transistor Td through the first transistor T1, thus completing the reset of the gate of the driving transistor Td.

[0103] During the data writing phase Z2, the fourth transistor T4 and the fifth transistor T5 are turned on, and the data voltage Vdata is transmitted to the gate of the driving transistor Td through the fourth transistor T4, the driving transistor Td, and the fifth transistor T5.

[0104] During the bias adjustment phase Z3, the seventh transistor T7 and the second transistor T2 are turned on. The bias adjustment voltage VD is transmitted through the seventh transistor T7 to the first terminal of the driving transistor Td, adjusting the bias state of the driving transistor Td. The second reset voltage VREF2 is transmitted through the second transistor T2 to the first terminal of the display light-emitting device 21, completing the reset of the first terminal of the display light-emitting device 21.

[0105] During the light-emitting stage Z4, the third transistor T3 and the sixth transistor T6 are turned on, and the light-emitting driving current generated by the driving transistor Td is transmitted to the display light-emitting device 21, driving the display light-emitting device 21 to emit light.

[0106] In the privacy display mode, the privacy drive module 51 is turned on in at least one of the following stages: reset stage Z1, data writing stage Z2, bias adjustment stage Z3, and light emission stage Z4.

[0107] For example, such as Figure 11As shown, during the data writing stage Z2, the first scan line S1 transmits an enable signal, controlling the privacy transistor M1 to turn on. That is, in privacy display mode, the privacy driver module 51 can be turned on simultaneously with the data writing module 44.

[0108] Based on this configuration, the duration of the privacy light-emitting device 22's illumination is more flexible within a single frame of the privacy display module, which helps to improve the flexibility of driving the privacy light-emitting device 22 to emit light.

[0109] Figure 12 for Figure 9 The diagram shows another schematic of the privacy pixel circuit and the display pixel circuit. Figure 12 The circuit shown is Figure 10 The only difference in the circuit shown is that the gate of the fourth transistor T4 is electrically connected to the first scan line S1.

[0110] In one embodiment of this application, such as Figure 12 As shown, the display panel 01 includes multiple scan signal lines, among which the first scan signal line S1 is included.

[0111] The privacy protection drive module 51 is electrically connected to the first scan signal line S1, and the display pixel circuit 40 is also electrically connected to the first scan signal line S1.

[0112] In other words, the privacy pixel circuit 50 and the display pixel circuit 40 can not only share the same bias voltage signal line DL3, but also the same first scan signal line S1. The privacy drive module 51 can be turned on simultaneously with the data writing module 44.

[0113] This helps to reduce the number of scanning signal lines in the display panel 01, further reducing the structural complexity of the peripheral circuits of the driving privacy pixel circuit 50 and the display pixel circuit 40, thereby further simplifying the structure of the display panel 01.

[0114] It should be noted that the privacy protection driver module 51 can share a scan signal line with any one of the following components in the display pixel circuit 40: the first reset module 41, the second reset module 42, the power supply voltage writing module 43, the data writing module 44, the threshold compensation module 45, and the light emission control module 46. Figure 12 This is merely an illustration of the situation where the privacy protection driver module 51 and the data writing module 44 share the same scan signal line.

[0115] In one embodiment of this application, in the normal display mode, the bias voltage signal line DL3 transmits the bias adjustment voltage VD and the reset voltage in a time-division multiplexing manner.

[0116] During the period when the privacy protection drive module 51 is turned on, the privacy protection drive module 51 receives a reset voltage, which is used to reset the first electrode of the privacy protection light-emitting device 22.

[0117] Based on this configuration, when the privacy pixel circuit 50 and the display pixel 40 share the same scanning signal line, even if the privacy drive module 51 is turned on in the normal display mode, the privacy light-emitting device 22 will not emit light because the privacy drive module 51 receives a reset voltage at this time. This helps to avoid the privacy light-emitting device 21 affecting the full-view display of the display light-emitting device 21 in the normal display mode.

[0118] For example, such as Figure 13 As shown, Figure 13 This is a waveform diagram of a bias voltage signal line provided in an embodiment of this application. In the privacy display mode, the bias voltage signal line DL3 transmits the bias adjustment voltage VD. The bias adjustment voltage VD can satisfy the normal operation of the display pixel circuit 40 and can also be reused as the privacy driving voltage VH to drive the privacy light-emitting device 22 to emit light.

[0119] In the normal display mode, the bias voltage signal line DL3 transmits the bias adjustment voltage VD and the reset voltage VREF in a time-division manner, which can both meet the normal operation of the display pixel circuit 40 and prevent the privacy light-emitting device 22 from emitting light.

[0120] In one embodiment of this application, the display panel 01 includes multiple scanning signal lines, and the scanning signal lines electrically connected to the privacy pixel circuit 40 are different from the scanning signal lines electrically connected to the display pixel circuit 40.

[0121] For example, such as Figure 10 As shown, the privacy pixel circuit 50 is only electrically connected to the first scan signal line S1, while the display pixel circuit 40 is not electrically connected to the first scan signal line S1.

[0122] In other words, the privacy pixel circuit 50 and the display pixel circuit 40 can share only the voltage signal line, but not the scanning signal line.

[0123] This allows the privacy pixel circuit 50 and the display pixel circuit 40 to operate independently, reducing the difficulty of driving the privacy pixel circuit 50 and the display pixel circuit 40.

[0124] Figure 14 This is a schematic diagram showing the connection between a privacy pixel circuit and a display pixel circuit, as provided in an embodiment of this application.

[0125] like Figure 14As shown, in one embodiment of this application, the display panel 01 includes multiple scan signal lines, among which a first scan signal line S1 is included, and the first scan signal line S1 is electrically connected to the display pixel circuit 40.

[0126] For example, such as Figure 14 As shown, the first scan signal line S1 is electrically connected to the gates of the first transistor T1 and the second transistor T2 in the display pixel circuit 40.

[0127] The privacy pixel circuit 50 includes a privacy driving module 51. The input terminal of the privacy driving module 51 is electrically connected to the first voltage signal line XL1, the output terminal of the privacy driving module 51 is electrically connected to the first pole of the privacy light-emitting device 22, and the control terminal of the privacy driving module 51 is electrically connected to the first scanning signal line S1.

[0128] In the privacy display mode, the first voltage signal line XL1 transmits the privacy drive voltage VH to the privacy drive module 51. In the normal display mode, the first voltage signal line XL1 transmits the reset voltage VREF to the privacy drive module 51.

[0129] For example, such as Figure 14 As shown, the privacy driving module 51 includes a privacy transistor M1. The first electrode of the privacy transistor M1 is electrically connected to the first voltage signal line XL1, the second electrode is electrically connected to the first electrode of the privacy light-emitting device 22, and the gate is electrically connected to the first scan signal line S1.

[0130] In privacy display mode, privacy transistor M1 transmits the privacy drive voltage VH on the first voltage signal line XL1 to privacy light-emitting device 22 to drive privacy light-emitting device 22 to emit light. In normal display mode, privacy transistor M1 transmits the reset voltage VREF on the first voltage signal line XL1 to privacy light-emitting device 22 to prevent privacy light-emitting device 22 from emitting light.

[0131] For example, such as Figure 15 As shown, Figure 15 The diagram shows a waveform of a first voltage signal line provided in an embodiment of this application. In the privacy display mode, the first voltage signal line XL1 only transmits the privacy drive voltage VH, and in the normal display mode, the first voltage signal line XL1 only transmits the reset voltage VREF.

[0132] The first voltage signal line XL1 is electrically insulated from the display pixel circuit 40.

[0133] In this embodiment of the application, the privacy pixel circuit 50 and the display pixel circuit 40 may share only the scan signal line and not the voltage signal line.

[0134] Based on this configuration, while reducing the number of scanning signal lines in the display panel 01, the first voltage signal line XL1 does not need to transmit switching voltage signals in both privacy display mode and normal display mode, which helps to save power consumption and reduce the driving difficulty of the display panel 01.

[0135] Figure 16 This is a partial planar schematic diagram of a display panel provided in an embodiment of this application.

[0136] In one embodiment of this application, such as Figure 16 As shown, the privacy light-emitting device 22 is located between two adjacent display light-emitting devices 21.

[0137] For example, such as Figure 16 As shown, the display light-emitting devices 21 are arranged in an array along the first direction X and the second direction Y. The privacy light-emitting device 22 can be located between two adjacent display light-emitting devices 21 along the first direction X, or between two adjacent display light-emitting devices 21 along the second direction Y.

[0138] The first direction X can be the row direction in display panel 01, and the second direction Y can be the column direction in display panel 01.

[0139] In this embodiment, the privacy light-emitting device 22 is positioned between two adjacent display light-emitting devices 21, which makes the privacy light-emitting device 22 closer to the display light-emitting device 21. This is beneficial to improving the interference effect of the privacy light-emitting device 22 on the wide-viewing-angle light emission of the display light-emitting device 21, thereby improving the privacy effect of the display panel 01 in the privacy display mode.

[0140] As one possible implementation method, such as Figure 1 As shown, the same light-emitting device 20 includes a first electrode 201, a first light-emitting layer 202 and a second electrode 203 stacked together, with the second electrode 203 located on the side of the first electrode 201 away from the substrate 10.

[0141] The first electrode 201 can be the anode of the light-emitting device 20, and the second electrode 203 can be the cathode of the light-emitting device 20. Multiple light-emitting devices 20 can share the second electrode 203.

[0142] The first electrode 201 of the privacy light-emitting device 22 is independent of the first electrode 201 of the adjacent display light-emitting device 21. The first light-emitting layer 202 of the privacy light-emitting device 22 is integrally formed with the first light-emitting layer 202 of the adjacent display light-emitting device 21.

[0143] Optional, such as Figure 17 As shown, Figure 17This is a schematic diagram of another display panel provided in an embodiment of the present application. The shaded portion of the first light-emitting layer 202 of the display light-emitting device 21 can be reused as the first light-emitting layer 202 of the privacy light-emitting device 22.

[0144] When the light-emitting device 20 is an organic light-emitting diode (OLED), a pixel definition layer (PDL) is typically provided in the display panel 01, and a first opening K1 is provided in the pixel definition layer PDL to define the position of the display light-emitting device 21. In the process of fabricating the first light-emitting layer 202 of the display light-emitting device 21, the material of the first light-emitting layer 202 can be deposited into the first opening K1 of the pixel definition layer PDL using a mask to form the first light-emitting layer of the display light-emitting device 21.

[0145] Since the cutout portion of the photomask is usually larger than the first opening K1 of the pixel definition layer, during the deposition of the first light-emitting layer 202 of the display light-emitting device 21, a portion of the material of the first light-emitting layer 202 will fall between the first openings K1 of two adjacent pixel definition layers (PDLs). This portion of the first light-emitting layer 202 material is usually referred to as the shadow portion of the first light-emitting layer 202 of the display light-emitting device 21. In this embodiment, a second opening K2 can be provided in the pixel definition layer (PDL), and the first electrode 201 of the privacy light-emitting device 22 can be provided in the second opening K2. During the fabrication of the first light-emitting layer 202 of the display light-emitting device 21, the shadow portion of the first light-emitting layer 202 of the display light-emitting device 21 is made to fall in the second opening K2, serving as the first light-emitting layer 202 of the privacy light-emitting device 22.

[0146] Based on this configuration, the individual illumination of adjacent display light-emitting devices 21 and privacy light-emitting devices 22 can be controlled by driving the independent first electrodes 201. Simultaneously, the shadow portion of the first light-emitting layer 202 of the display light-emitting device 21 can be used as the first light-emitting layer of the privacy light-emitting device 22. This helps avoid the impact of the privacy light-emitting device 22's placement on the pixel aperture ratio of the display panel 01, thus achieving the privacy function of the display panel 01 while minimizing the impact on the resolution of the display panel 01 and ensuring display quality.

[0147] Optional, such as Figure 17 As shown, in the direction H perpendicular to the plane of the substrate 10, the projected area of ​​the second opening K2 is smaller than the projected area of ​​the first opening K1. This allows the privacy light-emitting device 22 to be set smaller, which helps to reduce the area of ​​the shielding layer 30 covering the privacy light-emitting device 22 and ensures that the display panel 01 has high transmittance.

[0148] Optionally, the privacy light-emitting device 22 includes at least one of a red light-emitting device and a green light-emitting device. That is, the privacy light-emitting device 22 can share the same first light-emitting layer with the red display light-emitting device, or it can share the same first light-emitting layer with the green display light-emitting device.

[0149] Compared to blue light-emitting devices, red and green light-emitting devices generally have a longer lifespan. Therefore, including at least one of red or green light-emitting devices in the privacy light-emitting device 22 is beneficial to improving the lifespan of the privacy light-emitting device 22, thereby improving the reliability of the privacy display of the display panel 01.

[0150] Figure 18 This is a partial plan view of another display panel provided in an embodiment of this application.

[0151] like Figure 18 As shown, in one embodiment of this application, the display panel 01 includes a plurality of pixel units PX, and each pixel unit PX includes at least three adjacent display light-emitting devices 21 with different colors.

[0152] For example, such as Figure 18 As shown, the display light-emitting device 21 includes a red display light-emitting device 21A, a green display light-emitting device 21B, and a blue display light-emitting device 21C. A pixel unit PX includes the red display light-emitting device 21A, the green display light-emitting device 21B, and the blue display light-emitting device 21C that are adjacent in the first direction X.

[0153] In the same pixel unit PX, a privacy light-emitting device 22 is disposed between at least two adjacent display light-emitting devices 21. That is, the same pixel unit PX also includes at least one privacy light-emitting device 22.

[0154] In this embodiment of the application, at least one privacy light-emitting device 22 is provided in the same pixel unit PX. In the privacy display mode, when the pixel unit PX and its included privacy light-emitting device 22 emit light, the wide-viewing-angle light emitted by the privacy light-emitting device 22 can effectively interfere with the wide-viewing-angle display screen of the pixel unit PX, which is beneficial to improving the privacy effect of the display panel 01.

[0155] Figure 19 This is a schematic diagram of the structure of another display panel provided in an embodiment of this application.

[0156] In one embodiment of this application, such as Figure 19 As shown, the display panel 01 includes a first edge B1 and a second edge B2 disposed opposite to each other along the first direction X, and the shielding layer 30 includes a first side surface 31 and a second side surface 32 disposed opposite to each other along the first direction X, with the first side surface 31 being closer to the first edge B1 relative to the second side surface 32.

[0157] The privacy light-emitting device 22 includes a third side surface 22A and a fourth side surface 22B disposed opposite to each other along the first direction X, with the third side surface 22A being closer to the first edge B1 relative to the fourth side surface 22B.

[0158] In the first direction X, the first side surface 31 is closer to the first edge B1 relative to the third side surface 22A. The angle between the line connecting the third side surface 22A and the first side surface 31 and the normal of the substrate 10 is θ1, where 0° < θ1 ≤ 60°.

[0159] In this embodiment, on the first edge B1 side of the display panel 01, the small-angle light emitted by the privacy light-emitting device 22 with a viewing angle no greater than θ1 can be blocked by the shielding layer 30, while the large-angle light emitted by the privacy light-emitting device 22 with a viewing angle greater than θ1 can be emitted, affecting the large-angle display screen of the display panel with a viewing angle greater than θ1. Thus, without affecting the front display of the display panel, privacy can be provided on the large-angle screen of the display panel 01 on the first edge B1 side.

[0160] For example, θ1 = 45°.

[0161] In one embodiment of this application, please continue to refer to Figure 19 In the first direction X, the second side surface 32 is closer to the second edge B2 relative to the fourth side surface 22B. The angle between the line connecting the fourth side surface 22B and the second side surface 32 and the normal to the substrate 10 is θ2. Wherein, θ2=θ1.

[0162] In this embodiment, on the second edge B2 side of the display panel 01, the small-angle light emitted by the privacy light-emitting device 22 with a viewing angle no greater than θ2 can be blocked by the shielding layer 30, while the large-angle light emitted by the privacy light-emitting device 22 with a viewing angle greater than θ2 can be emitted, affecting the display screen with a viewing angle greater than θ2. Thus, without affecting the front display of the display panel, privacy can be provided on the second edge B2 side for the large-angle display screen of the display panel 01.

[0163] Moreover, by setting θ2=θ1, the privacy protection level of the display panel 01 on the first edge B1 side and the second edge B2 side can be made consistent. This not only increases the privacy protection range of the display panel 01, but also helps to reduce the structural complexity of the display panel 01.

[0164] Figure 20 This is a schematic diagram of the structure of another display panel provided in an embodiment of this application.

[0165] In one embodiment of this application, such as Figure 20As shown, in the first direction X, the second side surface 32 is closer to the second edge B2 relative to the fourth side surface 22B. The angle between the line connecting the fourth side surface 22B and the second side surface 32 and the normal to the substrate 10 is θ2. Wherein, 0°<θ2≤60°, and θ2≠θ1.

[0166] In this embodiment, on the second edge B2 side of the display panel 01, the small-angle light emitted by the privacy light-emitting device 22 with a viewing angle no greater than θ2 can be blocked by the shielding layer 30, while the large-angle light emitted by the privacy light-emitting device 22 with a viewing angle greater than θ2 can be emitted, affecting the display screen with a viewing angle greater than θ2. Thus, without affecting the front display of the display panel, privacy can be provided on the second edge B2 side for the large-angle display screen of the display panel 01.

[0167] Moreover, by setting θ2≠θ1, different degrees of privacy protection can be achieved on the first edge B1 side and the second edge B2 side of the display panel 01. This not only increases the privacy protection range of the display panel 01, but also allows for flexible setting of the privacy protection effect on different edge sides according to the actual privacy protection requirements of the display panel 01.

[0168] In one embodiment of this application, such as Figure 1 As shown, the display panel 01 includes a touch trace TM, which is located on the side of the light-emitting device 20 away from the substrate 10, and the touch trace TM is reused as a shielding layer 30.

[0169] Based on this configuration, the display panel 01 provided in this embodiment can also have a touch function. Furthermore, by using the touch trace TM as a shielding layer 30, there is no need to additionally set up a shielding layer 30 in the display panel 01, which is beneficial for achieving a thinner and lighter display panel 01.

[0170] Figure 21 This is a schematic diagram of a display device provided in an embodiment of this application.

[0171] This application provides a display device 02, such as... Figure 21 As shown, the display device 02 includes the display panel 01 as provided in the above embodiments. Exemplary examples include electronic devices such as mobile phones, laptops, tablets, vehicle displays, and wearable displays; this application does not impose any specific limitations.

[0172] In the display device 02, in the normal display mode of the display panel 01, the display light-emitting device 21 emits light while the privacy light-emitting device 22 does not emit light. Therefore, the light emitted by the display light-emitting device 21 is not interfered with by the privacy light-emitting device 22, allowing the display light-emitting device 21 to display normally. In the privacy display mode of the display panel 01, both the display light-emitting device 21 and the privacy light-emitting device 22 emit light. The small-angle light emitted by the privacy light-emitting device 22 is blocked by the shielding layer 30, while the large-angle light emitted interferes with the large-angle display of the display light-emitting device 21. Thus, without affecting the front display of the display panel 01, a large-angle privacy feature can be achieved, which helps prevent people in the surrounding area from peeping at the display content of the display panel 01, meeting the user's need for active privacy protection in the display device 02.

[0173] Furthermore, setting the privacy pixel circuit 50 and the display pixel circuit 40 to share the same voltage signal line and / or the same scan signal line is beneficial to reducing the structural complexity of the peripheral circuits driving the privacy pixel circuit 50 and the display pixel circuit 40, and simplifying the structure of the display panel 01.

[0174] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A display panel, characterized by, The display panel comprises a substrate, a plurality of light emitting devices on one side of the substrate, wherein the plurality of light emitting devices comprise display light emitting devices and anti-peep light emitting devices; a shielding layer on the side of the anti-peep light emitting device away from the substrate, wherein the shielding layer completely covers the anti-peep light emitting device in a direction perpendicular to the plane on which the substrate lies, and the shielding layer does not overlap with the display light emitting devices; display pixel circuits and anti-peep pixel circuits between the substrate and the light emitting devices, wherein the display pixel circuits are electrically connected with the display light emitting devices, and the anti-peep pixel circuits are electrically connected with the anti-peep light emitting devices; the display panel comprises a normal display mode and an anti-peep display mode, wherein in the normal display mode, the display light emitting devices emit light, and the anti-peep light emitting devices do not emit light; in the anti-peep display mode, the display light emitting devices and the anti-peep light emitting devices both emit light; wherein the anti-peep pixel circuits and the display pixel circuits are both electrically connected with the same voltage signal line, and the same voltage signal line is one of a first reset voltage signal line, a second reset voltage signal line and a bias voltage signal line.

2. The display panel of claim 1, wherein the display pixel circuits comprise a drive transistor, a first reset module and a second reset module, an input end of the first reset module is electrically connected with a first reset voltage signal line, an output end of the first reset module is electrically connected with a gate of the drive transistor, and the first reset voltage signal line is used for transmitting a first reset voltage to the first reset module; an input end of the second reset module is electrically connected with a second reset voltage signal line, and an output end of the second reset module is electrically connected with a first electrode of the display light emitting device, and the second reset voltage signal line is used for transmitting a second reset voltage to the second reset module.

3. The display panel of claim 2, wherein the anti-peep pixel circuits comprise an anti-peep drive module, an input end of the anti-peep drive module is electrically connected with the first reset voltage signal line, an output end of the anti-peep drive module is electrically connected with a first electrode of the anti-peep light emitting device, and the first reset voltage signal line is used for transmitting an anti-peep drive voltage to the anti-peep drive module; in the anti-peep display mode, the opening time periods of the first reset module and the anti-peep drive module are at least partially different, and the first reset voltage signal line is used for transmitting the first reset voltage and the anti-peep drive voltage at different times; the anti-peep pixel circuits comprise an anti-peep drive module, an input end of the anti-peep drive module is electrically connected with the second reset voltage signal line, an output end of the anti-peep drive module is electrically connected with a first electrode of the anti-peep light emitting device, and the second reset voltage signal line is used for transmitting an anti-peep drive voltage to the anti-peep drive module; in the anti-peep display mode, the opening time periods of the second reset module and the anti-peep drive module are at least partially different, and the second reset voltage signal line is used for transmitting the second reset voltage and the anti-peep drive voltage at different times. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ 4. The display panel of claim 2, wherein, ​ ​ 5. The display panel of claim 3 or 4, wherein, The display panel comprises a plurality of scan signal lines, and the plurality of scan signal lines comprise a first scan signal line, a second scan signal line, and a light-emitting control signal line; The control end of the first reset module and the control end of the second reset module are electrically connected with the first scan signal line, the display pixel circuit further comprises a data writing module and a light-emitting control module, the input end of the data writing module is electrically connected with a data signal line, the output end is electrically connected with the driving transistor, and the control end is electrically connected with the second scan signal line; the input end of the light-emitting control module is electrically connected with the driving transistor, the output end is electrically connected with the first electrode of the display light-emitting device, and the gate electrode is electrically connected with the light-emitting control signal line; The control end of the anti-peep driving module is electrically connected with the second scan signal line or the light-emitting control signal line.

6. The display panel of claim 5, wherein, In the normal display mode, during the period when the anti-peep driving module is turned on, the input end of the anti-peep driving module receives a reset voltage.

7. The display panel of claim 2, wherein, The display pixel circuit further comprises a bias adjustment module, the input end of the bias adjustment module is electrically connected with a bias voltage signal line, the output end of the bias adjustment module is electrically connected with the driving transistor, and the bias voltage signal line is used for transmitting a bias adjustment voltage to the bias adjustment module; The anti-peep pixel circuit comprises an anti-peep driving module, the input end of the anti-peep driving module is electrically connected with the bias voltage signal line, the output end of the anti-peep driving module is electrically connected with the first electrode of the anti-peep light-emitting device, and the bias voltage signal line is used for transmitting an anti-peep driving voltage to the anti-peep driving module; in the anti-peep display mode, the bias adjustment voltage is multiplexed as the anti-peep driving voltage.

8. The display panel of claim 7, wherein, The working process of the display pixel circuit comprises a reset phase, a data writing phase, a bias adjustment phase, and a light-emitting phase; in the anti-peep display mode, the anti-peep driving module is turned on in at least one of the reset phase, the data writing phase, the bias adjustment phase, and the light-emitting phase.

9. The display panel of claim 8, wherein, The display panel comprises a plurality of scan signal lines, and the plurality of scan signal lines comprise a first scan signal line; The anti-peep driving module is electrically connected with the first scan signal line, and the display pixel circuit is electrically connected with the first scan signal line.

10. The display panel of claim 9, wherein, In the normal display mode, the bias voltage signal line transmits the bias adjustment voltage and a reset voltage in time division; In the period when the anti-peep driving module is turned on, the anti-peep driving module receives the reset voltage.

11. The display panel of claim 1, wherein, The display panel comprises a plurality of scan signal lines; The scan signal line to which the anti-peep pixel circuit is electrically connected is different from the scan signal line to which the display pixel circuit is electrically connected.

12. The display panel of claim 1, wherein, The display panel comprises a plurality of scan signal lines, and the plurality of scan signal lines comprise a first scan signal line, the first scan signal line is electrically connected with the display pixel circuit; The privacy pixel circuit comprises a privacy driving module, an input end of the privacy driving module is electrically connected with a first voltage signal line, an output end of the privacy driving module is electrically connected with a first electrode of the privacy light emitting device, and a control end of the privacy driving module is electrically connected with the first scan signal line; in the privacy display mode, the first voltage signal line transmits a privacy driving voltage to the privacy driving module; and in the normal display mode, the first voltage signal line transmits a reset voltage to the privacy driving module. The first voltage signal line is electrically insulated from the display pixel circuit.

13. The display panel of claim 1, wherein, The privacy light emitting device is located between two adjacent display light emitting devices.

14. The display panel of claim 13, wherein, The same light emitting device comprises a first electrode, a first light emitting layer and a second electrode which are arranged in a stack, and the second electrode is located on a side of the first electrode away from the substrate. The first electrode of the privacy light emitting device is independent of the first electrode of the display light emitting device adjacent to the privacy light emitting device; and the first light emitting layer of the privacy light emitting device is integrally formed with the first light emitting layer of the display light emitting device adjacent to the privacy light emitting device.

15. The display panel of claim 14, wherein, The privacy light emitting device comprises at least one of a red light emitting device and a green light emitting device.

16. The display panel of claim 13, wherein, The display panel comprises a plurality of pixel units, and each pixel unit comprises at least three adjacent display light emitting devices which are different in color. At least two adjacent display light emitting devices in the same pixel unit are provided with the privacy light emitting device.

17. The display panel of claim 1, wherein, The display panel comprises a first edge and a second edge which are oppositely arranged along a first direction, the shielding layer comprises a first side and a second side which are oppositely arranged along the first direction, and the first side is closer to the first edge than the second side. The privacy light emitting device comprises a third side and a fourth side which are oppositely arranged along the first direction, and the third side is closer to the first edge than the fourth side. In the first direction, the first side is closer to the first edge than the third side, an included angle between a line connecting the first side and the third side and a normal line of the substrate is θ1, and 0°<θ1≤60°.

18. The display panel of claim 17, wherein, In the first direction, the second side is closer to the second edge than the fourth side, an included angle between a line connecting the second side and the fourth side and the normal line of the substrate is θ2, and θ2=θ1.

19. The display panel of claim 17, wherein, In the first direction, the second side is closer to the second edge than the fourth side, an included angle between a line connecting the second side and the fourth side and the normal line of the substrate is θ2, 0°<θ2≤60°, and θ2≠θ1.

20. The display panel of claim 1, wherein, The display panel comprises a touch control wire, the touch control wire is located on a side of the light emitting device away from the substrate, and the touch control wire is multiplexed as the shielding layer.

21. A display device comprising: The display panel comprises the display panel according to any one of claims 1-20.

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