Process kit and semiconductor processing apparatus

Abstract

A process suite and semiconductor processing equipment relate to the technical field of physical vapor deposition, the process suite comprises a shielding member, the shielding member comprises a cylindrical side wall, the cylindrical side wall encloses to form a first accommodating cavity, and the first accommodating cavity is used for accommodating a target material; the inner wall surface of the cylindrical side wall comprises a first inner ring wall surface and a second inner ring wall surface which are adjacently connected in the axial direction of the cylindrical side wall, and the first inner ring wall surface and the target material are arranged at an interval; a second containing cavity is formed in the wall face of the second inner ring, the first containing cavity communicates with the second containing cavity, and the second containing cavity is used for containing particles falling from the target material. According to the process suite provided by the invention, the second accommodating cavity is formed in the second inner ring wall surface, and the second accommodating cavity can prevent a particle source from being generated on the surface of the target material, so that particle defects caused by the fact that particles fall onto the surface of a wafer are avoided, and the process yield of semiconductor device production is improved. And meanwhile, the life cycle of the process suite is also prolonged, the maintenance cycle of semiconductor processing equipment is prolonged, and the production cost is reduced.

Description

Technical Field

[0001] This application relates to the technical field of physical vapor deposition, and particularly relates to a process kit and a semiconductor processing device. Background Art

[0002] Physical vapor deposition (PVD) is one of the important processes widely used in semiconductor processes, mainly applied to the preparation of each layer of thin films of integrated circuits, devices and components, as well as the modification of surface functional films, etc. The process kit is widely used in the magnetron sputtering chamber of physical vapor deposition, mainly used to isolate the process space where the thin film needs to be deposited from the non-process space, preventing the thin film from being deposited on the cavity and other non-process areas.

[0003] For the deposition process of the thin film, particle control needs to be considered. As the target material is consumed, the thin film is likely to be deposited on the side wall and bottom of the process kit. When the thin film deposited on the process kit is thick enough, it is easy to form a source of particle defects. These particles may fall off onto the wafer surface, resulting in particle defects, thereby affecting the device performance. If in order to eliminate the source of particle defects, the process kit needs to be frequently replaced and cleaned, which affects the service life of the process kit. Summary of the Invention

[0004] This application provides a process kit and a semiconductor processing device, which can prevent the generation of particle sources on the surface of the target material, thereby avoiding particles falling onto the wafer surface to generate particle defects, and improving the process yield of semiconductor device production.

[0005] In a first aspect, this application provides a process kit for installation in a process chamber, including a shielding member. The shielding member includes a cylindrical side wall, and the cylindrical side wall encloses a first accommodation cavity for accommodating a target material; an inner wall surface of the cylindrical side wall includes a first inner ring wall surface and a second inner ring wall surface adjacent to each other in the axial direction of the cylindrical side wall. The first inner ring wall surface is used to be spaced from the target material; a second accommodation cavity is provided on the second inner ring wall surface, and the first accommodation cavity and the second accommodation cavity are communicated with each other. The second accommodation cavity is used to accommodate the particles dropped from the target material.

[0006] The process kit provided by this application, by providing a second accommodation cavity on the second inner ring wall surface, the second accommodation cavity can effectively prevent atoms or ions released from the surface of the target material from accumulating on the second inner ring wall surface and gradually accumulating towards the edge of the target material, can prevent the generation of particle sources on the surface of the target material, thereby avoiding particles falling onto the wafer surface to generate particle defects, and can improve the process yield of production. At the same time, it also improves the service life of the process kit, extends the maintenance cycle of the semiconductor processing device, and reduces the production cost.

[0007] In a possible implementation, at least part of the second accommodation cavity is located on the side of the second inner ring wall surface close to the first inner ring wall surface. The second accommodation cavity can better accommodate atoms or ions released from the surface of the target, preventing them from gradually depositing on the edge of the target as the process progresses, avoiding the formation of particle sources on the surface of the target, and thus preventing particles from falling onto the wafer surface and causing particle defects.

[0008] In a possible implementation, the second accommodation cavity includes a groove. The groove has an opening that faces the radial direction of the cylindrical side wall. The depth of the groove in the radial direction of the cylindrical side wall is in the range of 2 mm to 5 mm, so as to facilitate the loading or collection of atoms or ions escaping from the surface of the target. It can also enable the groove to accommodate more atoms or ions escaping from the surface of the target while ensuring the overall structural strength of the cylindrical side wall.

[0009] In a possible implementation, the height of the groove in the axial direction of the cylindrical side wall is in the range of 10 mm to 100 mm. By designing different heights of the groove, the volume of the groove can be changed, thereby enabling the control of the position and thickness of the film deposited in the groove, avoiding further deposition of the film on the edge of the target, and increasing the life cycle of the process kit.

[0010] In a possible implementation, the second accommodation cavity includes a groove. The groove has an opening that faces the axial direction of the cylindrical side wall. The depth of the groove in the axial direction of the cylindrical side wall is in the range of 5 mm to 50 mm, so as to facilitate the loading or collection of atoms or ions escaping from the surface of the target.

[0011] In a possible implementation, the cross-section of the groove in the axial direction of the cylindrical side wall is at least one of an arc shape, a straight line shape, a broken line shape, and an irregular shape.

[0012] In a possible implementation, the groove includes an annular groove. The annular groove is continuous in the circumferential direction of the cylindrical side wall and is coaxially arranged with the cylindrical side wall. The setting of the annular groove can increase the space on the second inner ring wall surface for accommodating atoms or ions escaping from the surface of the target, thereby preventing the film from accumulating at the edge of the target to form a particle source, avoiding affecting the production of devices, and at the same time extending the life cycle of the process kit.

[0013] In a possible implementation, the number of the annular grooves is at least two. At least two of the annular grooves are arranged at intervals in the axial direction of the cylindrical side wall. There is more space on the second inner ring wall surface for accommodating atoms or ions escaping from the surface of the target, thereby reducing the risk of generating particle sources at the edge of the target, avoiding affecting the production of devices, and at the same time extending the life cycle of the process kit.

[0014] In a possible implementation, the groove includes an arc-shaped groove, and the arc-shaped groove can improve the structural strength of the shielding member.

[0015] In a possible implementation, the number of the arc-shaped grooves is at least two, and the at least two arc-shaped grooves are arranged at intervals in the circumferential direction of the cylindrical side wall and / or in the axial direction of the cylindrical side wall. A plurality of arc-shaped grooves can accommodate more atoms or ions escaping from the surface of the target, thereby avoiding the generation of particle sources at the edge of the target.

[0016] In a possible implementation, the shielding member further includes a bottom wall. One end of the bottom wall is connected to the bottom of the cylindrical side wall and extends from the bottom of the cylindrical side wall toward the inside of the cylindrical side wall in the radial direction of the cylindrical side wall. The other end of the bottom wall is bent toward the inside of the cylindrical side wall in the axial direction of the cylindrical side wall. There is a corner at the connection between the bottom wall and the cylindrical side wall, and the surface of the corner is covered with a rough layer. The rough layer can enable the atoms or ions sputtered out from the target to be more firmly combined with the second inner ring wall surface. These atoms or ions are difficult to fall off from the surface of the second inner ring wall and accumulate at the corner, avoiding the formation of particle sources at the corner, and further avoiding the appearance of particle defects on the surface of the wafer. The design of the rough layer can improve the yield of the semiconductor device process production and extend the life cycle of the process kit.

[0017] In a possible implementation, the roughness of the rough layer is greater than 20 microns, which can increase the friction force with the atoms or ions sputtered out from the target.

[0018] In a possible implementation, the rough layer is made by at least one of the processes of thermal spraying or sandblasting.

[0019] In a possible implementation, the thickness of the rough layer is in the range of 100 microns to 300 microns. The thickness of the rough layer can increase the roughness of the surface of the rough layer, improve the bonding force with atoms or ions, and help prevent the accumulation and formation at the particle corners. In addition, the thickness of the rough layer can also improve the uniformity and stability of the rough layer, and improve the quality and durability of the rough layer.

[0020] In a possible implementation, the bottom wall includes a lapping portion for connecting the covering ring. The covering ring can shield the edge of the wafer and can also shield the gap between the base and the cylindrical side wall, thereby avoiding the deposition of sediments in the semiconductor process on the edge of the base and passing through the gap between the base and the cylindrical side wall and depositing on the bottom of the process chamber, causing pollution to the bottom of the process chamber.

[0021] In a possible implementation, a raised portion is provided on the outer circumferential wall surface of the cylindrical side wall. The raised portion extends in a direction away from the first accommodation cavity. The raised portion is used to connect to the inner wall of the process chamber. The cylindrical side wall is connected to the inner wall of the process chamber through the raised portion, so as to divide the process chamber into a process space and a non-process space.

[0022] In a second aspect, the present application provides a process kit for being installed in a process chamber, including a shielding member. The shielding member includes a cylindrical side wall and a bottom wall. The cylindrical side wall encloses to form a first accommodation cavity for accommodating a target; one end of the bottom wall is connected to the bottom of the cylindrical side wall and extends along the radial direction of the cylindrical side wall from the bottom of the cylindrical side wall. The other end of the bottom wall is bent towards the axial direction of the cylindrical side wall. A corner is formed at the connection between the bottom wall and the cylindrical side wall, and a rough layer covers the surface of the corner.

[0023] For the process kit provided by the present application, by designing a rough layer on the surface of the corner, the rough layer can increase the adhesion ability between the second inner circumferential wall surface and the atoms or ions sputtered out from the target, can prevent these atoms or ions from falling off the surface of the second inner circumferential wall surface and accumulating at the corner, can prevent the formation of a particle source at the corner, thereby avoiding these particles from falling onto the wafer surface and causing particle defects on the wafer surface, and can improve the process yield of production. At the same time, it also improves the service life of the process kit, extends the maintenance cycle of the semiconductor processing equipment, and reduces the production cost.

[0024] In a possible implementation, the roughness of the rough layer is greater than 20 microns, which can increase the frictional force with the atoms or ions sputtered out from the target.

[0025] In a possible implementation, the rough layer is made by at least one of the processes of thermal spraying and sandblasting. By at least one of the processes of thermal spraying and sandblasting, a rough layer can be formed on the second inner circumferential wall surface. The rough layer can provide better adhesion, enabling the atoms or ions sputtered out from the target to be more firmly combined with the second inner circumferential wall surface.

[0026] In a possible implementation, the thickness of the rough layer ranges from 100 microns to 300 microns. The thickness of the rough layer can increase the roughness of the rough layer surface, improve the binding force with atoms or ions, and help prevent the accumulation and formation of particles at the corner. In addition, the thickness of the rough layer can also improve the uniformity and stability of the rough layer, and improve the quality and durability of the rough layer.

[0027] In a third aspect, the present application further provides a semiconductor processing apparatus, which includes a process chamber, a target, and the process kit described in any one of the above. The target and the process kit are both located in the process chamber. The process kit is connected to the inner wall of the process chamber, and the process kit surrounds the target. At least a part of the target is located in the first accommodation cavity. The semiconductor processing apparatus provided by the present application is provided with a process kit, which can prevent particles from falling onto the surface of the wafer carried on the base, thereby improving the process yield of the wafer and reducing the manufacturing cost.

[0028] In a possible implementation, the semiconductor processing apparatus further includes a target backplane, which is connected to the target. The side of the target backplane connected to the target is connected to the top of the shielding member. The target backplane can provide support for the target to ensure that the target maintains a stable position and posture during the sputtering process. The target backplane can also transfer direct current or radio frequency current to the target.

[0029] In a possible implementation, the semiconductor processing apparatus further includes a base and a wafer. The base is connected to the bottom of the process chamber, the wafer is located on the base, and at least a part of the wafer is located in the first accommodation cavity. The base is used to carry the wafer. Description of the Drawings

[0030] Figure 1 is a schematic structural diagram of the shielding member provided by an embodiment of the present application;

[0031] Figure 2 is a schematic diagram of the size of the second accommodation cavity of the process kit provided by an embodiment of the present application;

[0032] Figure 3 is a schematic structural diagram of the second accommodation cavity of the process kit provided by another embodiment of the present application;

[0033] Figure 4 is a schematic structural diagram of the second accommodation cavity of the process kit provided by another embodiment of the present application;

[0034] Figure 5 is a schematic structural diagram of the second accommodation cavity of the process kit provided by another embodiment of the present application;

[0035] Figure 6 is a schematic structural diagram of the second accommodation cavity of the process kit provided by another embodiment of the present application;

[0036] Figure 7 is a schematic structural diagram of the shielding member provided by an embodiment of the present application;

[0037] Figure 8 is Figure 7 the sectional view taken along line A-A in

[0038] Figure 9 It is a schematic structural view of the second accommodation cavity of the process kit provided by another embodiment of the present application;

[0039] Figure 10 is Figure 7 the sectional view taken along line A-A in

[0040] Figure 11 It is a schematic structural view of a rough layer provided inside the process kit according to an embodiment of the present application;

[0041] Figure 12 It is a schematic structural view of a rough layer provided inside the process kit according to an embodiment of the present application;

[0042] Figure 13 It is a schematic structural view of the process chamber of a semiconductor processing apparatus provided according to an embodiment of the present application. Detailed Embodiments

[0043] The embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.

[0044] For ease of understanding, the English abbreviations and related technical terms involved in the embodiments of the present application will be explained and described below first.

[0045] It should be clear that the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0046] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms of "a", "the" and "said" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0047] It should be understood that the term " / and" used herein is only a description of the same field of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0048] Depending on the context, as used herein, the word "if" can be interpreted as "when" or "while" or "in response to determining" or "in response to detecting". Similarly, depending on the context, the phrase "if determined" or "if detected (stated condition or event)" can be interpreted as "when determined" or "in response to determining" or "when detected (stated condition or event)" or "in response to detecting (stated condition or event)".

[0049] It should be understood that the "first", "second", etc. used in this application are only for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying an order.

[0050] In the description of this application, the orientation or positional relationship indicated by terms such as "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to this application.

[0051] As used in this application, "within... range", unless specifically stated that the end values are not included, by default includes the two end values of the range. For example, within the range of 1 to 5, both the values 1 and 5 are included.

[0052] In the description of this application, it should be noted that unless otherwise clearly specified and limited, the terms "installed", "connected", "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or a contact connection or an integral connection; for those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0053] In the process of semiconductor processing, physical vapor deposition (PVD) technology is a commonly used processing method for depositing thin films on wafers or other workpieces to be processed. During the PVD process, a target (such as a titanium target) is usually fixed on the cathode, and then a working gas (such as argon) is introduced into the process chamber, and the wafer is fixed at a certain distance from the cathode as the anode. At this time, a negative voltage is applied between the cathode and the anode, and the working gas is ionized into plasma. At the same time, a magnetic field generated by a magnetron device is used to confine the movement of the plasma to prevent its diffusion. The plasma impacts the surface of the target, causing atoms, ions, and other particles of the target material to be released from the surface of the target, and then deposited on the workpiece such as the wafer, thereby forming a thin film on the workpiece to be processed.

[0054] To prevent atoms or ions sputtered from the target from depositing on the inner wall of the process chamber, a process kit is generally provided in the process chamber. The process kit can isolate the process space where the film needs to be deposited from the non-process space, preventing the film from depositing in other non-process areas.

[0055] A part of the atoms or ions released from the surface of the target will also deposit on the surface of the process kit exposed to the plasma. The thickness of the film deposited on these surfaces increases as the PVD process progresses and gradually accumulates towards the edge of the target. The film accumulated at the edge of the target is difficult to clean thoroughly, easily forming a particle source, falling onto the wafer surface and thus generating particle defects, which affects the device performance. In addition, the process gas will also blow up the particles deposited at the bottom of the process kit, carrying some particles above the wafer and depositing them on the wafer surface, thus generating particle defects.

[0056] To avoid generating a particle source in the process chamber, when the film deposited on the process kit reaches a certain thickness (i.e., the trend of particle increase is obvious), it is necessary to replace or clean the process kit in time, which greatly shortens the maintenance cycle of the semiconductor processing equipment and increases the usage cost.

[0057] To solve the above problems, the present application provides a process kit 100. Referring to Figure 1 and Figure 13 as shown, the process kit 100 is used to be installed in the process chamber 200. The process kit 100 is connected to the inner wall surface of the process chamber 200. The process kit 100 divides the interior of the process chamber 200 into a process space and a non-process space. The process kit 100 includes a shielding member 110. During the process of physical vapor deposition using magnetron sputtering, the wafer 500 is carried on the pedestal 400, and a power supply applies a bias voltage to the target 300 to ionize the argon gas introduced into the process chamber 200 to generate plasma. The bias voltage of the target 300 and the magnetic field generated by the magnetron device 240 can attract argon ions to bombard the target 300, causing atoms or ions on the target 300 to escape from the target 300. The escaped atoms or ions diffuse in the process chamber 200 and deposit on the wafer 500, thereby depositing a film on the wafer 500. The shielding member 110 is used to be connected to the inner wall surface of the process chamber 200. The shielding member 110 can shield the atoms or ions sputtered from the target, avoiding the atoms or ions sputtered from the target from depositing in other non-process spaces of the process chamber and causing damage to other structures in the process chamber.

[0058] The shielding member 110 includes a cylindrical sidewall 111. The cylindrical sidewall 111 encloses to form a first accommodation cavity 1111 for accommodating the target 300. The first accommodation cavity 1111 can accommodate at least a part of the target 300. The shielding member 110 is disposed at an interval from the target 300, and the cylindrical sidewall 111 can surround the target 300. The target 300 is located at the top of the shielding member 110. The plane where one side of the target 300 is located can be coplanar with the plane where the top of the shielding member 110 is located, that is, one side surface of the target 300 can be flush with the top end of the shielding member 110.

[0059] The inner wall surface of the cylindrical sidewall 111 includes a first inner ring wall surface 1112 and a second inner ring wall surface 1113 that are adjacent along the axial direction of the cylindrical sidewall 111. The axial direction of the cylindrical sidewall 111 can be Figure 1 the Y direction in Figure 1 (the meaning of the axial direction of the cylindrical sidewall 111 appearing hereinafter is the same as that here). The cross-sections of the first inner ring wall surface 1112 and the second inner ring wall surface 1113 along Figure 1 the Y direction in Figure 1 can both be linear; or can be a smoothly transitioning curved shape; alternatively, the cross-section of the first inner ring wall surface 1112 along

[0060] the Y direction is linear, and the cross-section of the second inner ring wall surface 1113 along

[0061] the Y direction is a broken line shape, and so on. The first inner ring wall surface 1112 is disposed at an interval from the target 300. Specifically, there is a gap between the first inner ring wall surface 1112 and the target 300. The interval region between the shielding member 110 and the target 300 can be a dark space, that is, the dark space is located between the first inner ring wall surface 1112 and the target 300.

[0060] A second accommodation cavity 112 is provided on the second inner ring wall surface 1113. The first accommodation cavity 1111 and the second accommodation cavity 112 are in communication. The second accommodation cavity 112 is used for accommodating the particles dropped from the target 300. The particles dropped from the target 300 can be atoms or ions sputtered and escaping from the target 300. When the atoms or ions sputtered and escaping from the target 300 are deposited on the inner wall of the second accommodation cavity 112, a thin film will be formed and deposited in the second accommodation cavity 112 first. Thus, the thin film is not likely to gradually accumulate on the second inner ring wall surface 1113 to the dark space region as the process proceeds. This avoids the further accumulation of the thin film towards the edge of the target 300, thereby preventing the generation of particle sources on the surface of the target 300, avoiding the generation of particle defects when the particles fall onto the wafer surface, and improving the process yield of subsequent semiconductor device production.

[0061] The process kit 100 provided by the present application can effectively prevent atoms or ions released from the surface of the target 300 from accumulating on the second inner ring wall surface 1113 and gradually accumulating toward the edge of the target 300 by providing a second accommodation cavity 112 on the second inner ring wall surface 1113. This can prevent the generation of particle sources on the surface of the target 300, thereby avoiding particle defects caused by particles falling onto the wafer surface, improving the process yield of production. At the same time, it also extends the life cycle of the process kit, prolongs the maintenance cycle of the semiconductor processing equipment, and reduces the production cost.

[0062] In a possible implementation, the process kit 100 includes a shield 110, a deposition ring 130, and a cover ring 140. The deposition ring 130 is disposed on the base 400 and surrounds the outer periphery of the electrostatic chuck 420. The cover ring 140 can be lapped on the bottom of the shield 110 to block the gap between the shield 110 and the deposition ring 130. During the physical vapor deposition process using magnetron sputtering, the wafer 500 is carried on the base 400. The base 400 rises to make the deposition ring 130 contact the cover ring 140 and lift the cover ring 140, so that the cover ring 140 is separated from the shield 110. A bias voltage is applied to the target 300 by the power supply to ionize the argon gas introduced into the process chamber 200 to generate plasma. The bias voltage of the target 300 and the magnetic field generated by the magnetron device 240 can attract argon ions to bombard the target 300, causing atoms or ions on the target 300 to escape. The escaped atoms or ions diffuse in the process chamber 200 and are deposited on the wafer 500, thereby depositing a thin film on the wafer 500. After that, the base 400 descends to make the cover ring 140 contact the shield 110, separating the cover ring 140 from the deposition ring 130.

[0063] In a possible implementation, at least a part of the second accommodation cavity 112 is located on the side of the second inner ring wall surface 1113 close to the first inner ring wall surface 1112. The second inner ring wall surface 1113 has a median line. Taking the median line of the second inner ring wall surface 1113 as the demarcation line, the second inner ring wall surface 1113 can be divided into two parts with equal lengths in the Y direction. Taking the median line of the second inner ring wall surface 1113 as the demarcation line, the side of the second inner ring wall surface 1113 close to the first inner ring wall surface 1112 is the upper part of the second inner ring wall surface 1113, that is, at least a part of the second accommodation cavity 112 is located at a position above the middle of the second inner ring wall surface 1113. The second accommodation cavity 112 can be completely located on the wall surface above the median line of the second inner ring wall surface 1113, or a part of the second accommodation cavity 112 can be located on the wall surface above the median line of the second inner ring wall surface 1113, and the other part can be located on the wall surface below the median line of the second inner ring wall surface 1113. At least a part of the second accommodation cavity 112 is located on the side of the second inner ring wall surface 1113 close to the first inner ring wall surface 1112, and the second accommodation cavity 112 can better accommodate the atoms or ions escaping from the surface of the target 300, preventing them from gradually depositing on the edge of the target 300 as the process progresses, avoiding the formation of particle sources on the surface of the target 300, and further avoiding particles falling onto the wafer surface and generating particle defects.

[0064] In one embodiment, referring to Figure 1 As shown, one end of the target 300 faces the second inner ring wall surface 1113. At least a part of the second accommodation cavity 112 is located on the side of the second inner ring wall surface 1113 close to the first inner ring wall surface 1112. The second accommodation cavity 112 is set at a first distance from the edge of the target 300 close to the second inner ring wall surface 1113. The first distance is L1, and the first distance L1 is in the range of 0 mm to 20 mm. It can be understood that the first distance L1 can be any value within the range of 0 mm to 20 mm. For example, the first distance L1 can be 0 mm, and the plane where the edge of the second accommodation cavity 112 in the positive Y direction is located is coplanar with the plane where the edge of the target 300 in the negative Y direction is located. The first distance L1 can also be 10 mm, and the first distance L1 can also be 20 mm.

[0065] In a possible implementation, the second accommodation cavity 112 includes a groove 114a. The atoms or ions released from the surface of the target 300 can be deposited and accumulated in the groove 114a to form a thin film. The groove 114a has an opening, and the opening faces the radial direction of the cylindrical side wall 111, that is, the opening of the groove 114a faces the inside of the shielding member 110. The depth of the groove 114a in the radial direction of the cylindrical side wall 111 is in the range of 2 mm to 5 mm. Referring to Figure 2As shown, the depth d1 of the groove 114a in the radial direction of the cylindrical sidewall 111 is within the range of 2 mm to 5 mm. For example, the depth d1 can be 2 mm, the depth d1 can also be 3.1 mm, and the depth d1 can also be 5 mm.

[0066] The depth d1 of the groove 114a in the radial direction of the cylindrical sidewall 111 is within the range of 2 mm to 5 mm, so as to facilitate the loading or collection of atoms or ions escaping from the surface of the target 300, enabling the groove to accommodate more atoms or ions escaping from the surface of the target 300, and at the same time ensuring the overall structural strength of the cylindrical sidewall 111.

[0067] In a possible implementation manner, the height of the groove 114a in the axial direction of the cylindrical sidewall 111 is within the range of 10 mm to 100 mm. Refer to Figure 1 As shown, the height of the groove 114a in the axial direction of the cylindrical sidewall 111 is H1, and the value of the height H1 is within the range of 10 mm to 100 mm. In some possible embodiments, the height H1 can be 10 mm, the height H1 can also be 50 mm, and the height H1 can also be 100 mm. By designing different heights H1 of the groove 114a, the volume of the groove 114a can be changed, thereby being able to control the position and thickness of the film deposited in the groove 114a, avoiding further deposition of the film to the edge of the target, and improving the service life of the process kit 100.

[0068] In a possible implementation manner, the second accommodation cavity 112 includes a groove 114a, and the groove 114a has an opening facing the axial direction of the cylindrical sidewall 111. Specifically, the opening faces Figure 3 the positive direction of the Y direction in Figure 3 that is, the opening of the groove 114a faces the top of the shielding member 110. The depth of the groove 114a in the axial direction of the cylindrical sidewall 111 is within the range of 5 mm to 50 mm. Refer to

[0069] As shown, the depth of the groove 114a in the axial direction of the cylindrical sidewall 111 is d2, and d2 is within the range of 5 mm to 50 mm. For example, the depth d2 can be 5 mm, the depth d2 can also be 25 mm, and the depth d2 can also be 50 mm.

[0070] In a possible implementation manner, the length of the groove 114a in the radial direction of the cylindrical sidewall 111 is within the range of 2 mm to 50 mm. Refer to Figure 3As shown, the length of the groove 114a in the radial direction of the cylindrical sidewall 111 is L2, and the value of the length L2 ranges from 2 mm to 50 mm. In some possible embodiments, the length L2 can be 2 mm, the length L2 can also be 5 mm, the length L2 can also be 25 mm, and the length L2 can also be 50 mm. By designing different lengths L2 of the groove 114a, the volume of the groove 114a can be changed, so as to control the position and thickness of the thin film deposited in the groove 114a, avoid further deposition of the thin film to the edge of the target, and improve the service life of the process kit 100.

[0071] In a possible implementation manner, the cross-section of the groove 114a in the axial direction of the cylindrical sidewall 111 is at least one of an arc shape, a straight line shape, a broken line shape, and an irregular shape. It can be understood that the cross-section of the groove 114a in the axial direction of the cylindrical sidewall 111 can be variable. Among them, Figure 1 is a schematic diagram of the cross-section being an arc shape, Figure 4 is a schematic diagram of the cross-section being a straight line shape, Figure 5 is a schematic diagram of the cross-section being a broken line shape, Figure 6 is a schematic diagram of the cross-section being an irregular shape. The cross-section of the groove 114a in the axial direction of the cylindrical sidewall 111 can be freely designed according to actual needs, so that the groove 114a can accommodate more atoms or ions escaping from the surface of the target 300, and avoid the generation of particle defects at the edge of the target.

[0072] In a possible implementation manner, refer to Figure 7 and Figure 8 As shown, the groove 114a includes an annular groove, the annular groove is continuous in the circumferential direction of the cylindrical sidewall 111, the annular groove can surround the second inner ring wall surface 1113 of the cylindrical sidewall 111, the cross-section (transverse section) of the annular groove in the radial direction of the cylindrical sidewall 111 is annular, and both ends of the annular groove are closed and connected to form a complete ring. The annular groove is coaxially arranged with the cylindrical sidewall 111, and the axial direction of the annular groove is the same as the axial direction of the cylindrical sidewall 111, and can both be the Figure 1 Y direction in

[0073] In a possible implementation manner, refer to Figure 9As shown, the number of annular grooves is at least two, and the at least two annular grooves are arranged at intervals along the axial direction of the cylindrical side wall 111. The distance between the at least two arc-shaped grooves can be arbitrary. The number of annular grooves is at least two (at least two in this application can be interpreted as multiple). The number of annular grooves can be 2, or the number of annular grooves can be 3, or the number of annular grooves can be 4. All the annular grooves can be arranged at intervals along the axial direction of the cylindrical side wall 111. There is more space on the second inner annular wall surface 1113 for accommodating atoms or ions escaping from the surface of the target 300, thereby reducing the risk of the source of particles generated at the edge of the target 300, avoiding affecting the production of the device, and at the same time extending the service life of the process kit.

[0074] In a possible implementation manner, referring to Figure 7 and Figure 10 As shown, the groove includes an arc-shaped groove. The size of the arc-shaped groove can be arbitrary. For example, the length of the arc-shaped groove can be arbitrary, or the shape of the arc-shaped groove can also be arbitrary, including circular arc and elliptical arc, etc.

[0075] In a possible implementation manner, the number of arc-shaped grooves is at least two, and the at least two arc-shaped grooves are arranged at intervals along the circumferential direction of the cylindrical side wall, and / or, the at least two arc-shaped grooves are arranged at intervals along the axial direction of the cylindrical side wall. The distance between the at least two arc-shaped grooves can be arbitrary.

[0076] Exemplarily, the arc-shaped grooves can be arranged only at intervals along the circumferential direction of the cylindrical side wall 111, that is, a plurality of arc-shaped grooves can be arranged on the circumferential surface of the second inner annular wall surface, and the plurality of arc-shaped grooves are arranged at intervals.

[0077] Exemplarily, the arc-shaped grooves can be arranged only at intervals along the axial direction of the cylindrical side wall 111, that is, along Figure 1 the Y direction in

[0078] a plurality of arc-shaped grooves can be vertically arranged on the second inner annular wall surface 1113, and the plurality of arc-shaped grooves are arranged at intervals. Figure 1 Exemplarily, the arc-shaped grooves can be arranged at intervals along both the circumferential direction and the axial direction of the cylindrical side wall 111, that is, a plurality of arc-shaped grooves can be arranged at intervals on the circumferential surface of the second inner annular wall surface, and along

[0079] the Y direction in

[0080] a plurality of arc-shaped grooves are also vertically arranged at intervals on the second inner annular wall surface 1113. Figure 11As shown, the shielding member 110 further includes a bottom wall 113. One end of the bottom wall 113 is connected to the bottom of the cylindrical side wall 111 and extends from the bottom of the cylindrical side wall 111 towards the inside of the shielding member 110 in the radial direction of the cylindrical side wall 111. The other end of the bottom wall 113 bends towards the inside of the shielding member 110 in the axial direction of the cylindrical side wall 111. A corner 1131 is formed at the connection between the bottom wall 113 and the cylindrical side wall 111, and the surface of the corner 1131 is covered with a rough layer 1132.

[0081] The side surface of the shielding member 110 is a cylindrical side wall 111 in a cylindrical shape, and the bottom of the shielding member 110 is a bottom wall 113, and the bottom wall 113 is connected to the cylindrical side wall 111. The bottom wall 113 can be integrally formed with the cylindrical side wall 111, or the bottom wall 113 can be connected to the cylindrical side wall 111 by one or a combination of welding, riveting, and bonding.

[0082] One end of the bottom wall 113 is connected to the bottom of the cylindrical side wall 111 and extends towards the inside of the cylindrical side wall 111 in the radial direction of the cylindrical side wall 111 to form the bottom of the shielding member 110. The other end of the bottom wall 113 bends towards the inside of the cylindrical side wall 111 in the axial direction of the cylindrical side wall 111, that is, bends inward.

[0083] A corner 1131 is formed at the connection between the bottom wall 113 and the cylindrical side wall 111. The corner 1131 is the corner position where the bottom wall 113 and the cylindrical side wall 111 intersect and are connected. The surface of the corner 1131 is covered with a rough layer 1132. The rough layer 1132 can be prepared by a thermal spraying process, that is, thermal spraying treatment is performed at the corner 1131, and a rough layer 1132 is formed on the surface of the corner 1131 after the thermal spraying treatment. The rough layer 1132 can provide better adhesion. The atoms or ions sputtered out from the target 300 are likely to accumulate not only on the second inner ring wall surface 1113, but also at the position on the second inner ring wall surface 1113 close to the bottom wall 113 ( Figure 11The dotted line position in) will also accumulate the atoms or ions sputtered out from the target 300. When the atoms or ions sputtered out from the target 300 reach the second inner ring wall surface 1113, they have traveled a relatively long distance, and most of the energy of the atoms or ions has been consumed. Therefore, the energy of the atoms or ions accumulated on the second inner ring wall surface 1113 is relatively low, and the binding force with the second inner ring wall surface 1113 is weak. Furthermore, the atoms or ions will fall onto the corner 1131 under the influence of gravity and other acting forces, deposit and accumulate to form a film on the corner 1131. As the film accumulates, a particle source is gradually formed. When the process gas enters the interior of the process chamber 200, the particle source accumulated at the corner 1131 is blown to the periphery of the wafer 500 along the gas flow direction, and then the particles fall onto the surface of the wafer 500, forming particle defects and affecting the subsequent production of semiconductor devices. In this embodiment, a rough layer is covered on the surface of the corner 1131, and the rough layer 1132 has better adhesion. The rough layer 1132 can make the atoms or ions sputtered out from the target 300 bind more firmly with the second inner ring wall surface. These atoms or ions are difficult to fall off from the surface of the second inner ring wall surface 1113 and accumulate on the corner 1131, avoiding the formation of a particle source at the corner 1131, and thus avoiding particle defects on the surface of the wafer 500. The design of the rough layer 1132 can improve the yield of the process production and extend the life cycle of the process kit.

[0084] In a possible embodiment, the roughness of the rough layer 1132 is greater than 20 microns. The rough surface of the rough layer 1132 can increase the frictional force with the atoms or ions sputtered out from the target 300, and can effectively prevent these atoms or ions from detaching from the second inner ring wall surface 1113, which helps to prevent the formation of a particle source at the corner 1131, thereby avoiding the appearance of particle defects on the surface of the wafer 500 caused by these particles falling onto the surface of the wafer 500.

[0085] In a possible embodiment, the rough layer 1132 is made by at least one of the processes of thermal spraying and sandblasting. The rough layer 1132 can be prepared by thermal spraying, that is, thermal spraying treatment is performed at the corner 1131, and a rough layer 1132 is formed on the surface of the corner 1131 after the thermal spraying treatment. The rough layer 1132 can also be prepared by sandblasting. Abrasives (such as sand grains, glass beads, etc.) are sprayed onto the second inner ring wall surface 1113 by high-pressure air flow to form the rough layer 1132 and increase the roughness. The rough layer 1132 can be formed on the second inner ring wall surface by at least one of the processes of thermal spraying and sandblasting. The rough layer 1132 can provide better adhesion and make the atoms or ions sputtered out from the target 300 bind more firmly with the second inner ring wall surface 1113.

[0086] In a possible implementation, the thickness of the rough layer 1132 ranges from 100 micrometers to 300 micrometers. The thickness d3 of the rough layer 1132 can be 100 micrometers, can also be 200 micrometers, and can also be 300 micrometers. When the thickness of the rough layer 1132 ranges from 100 micrometers to 300 micrometers, the rough layer 1132 has a higher roughness, which can improve the bonding force with atoms or ions and help prevent the formation and accumulation of particles at the corner 1131. In addition, the thickness of the rough layer 1132 can also improve the uniformity and stability of the rough layer 1132, and improve the quality and durability of the rough layer 1132.

[0087] In a possible implementation, the bottom wall 113 includes a lapping portion 1133 for connecting the covering ring 140. Refer to Figure 13 As shown, the covering ring 140 can be lapped on the lapping portion 1133. The bottom wall 113 has a second opening that communicates with the first accommodating cavity 1111. The second opening on the bottom wall 113 can surround the wafer 500. The covering ring 140 is connected to the bottom wall 113 of the shielding member 110. The covering ring 140 can block the edge of the wafer 500 and can block the gap between the base 400 and the cylindrical side wall 111, thereby preventing the deposition of sediments in the semiconductor process on the edge of the base 400 and passing through the gap between the base 400 and the cylindrical side wall 111 and depositing on the bottom of the process chamber 200, causing pollution to the bottom of the process chamber.

[0088] In a possible implementation, refer to Figure 13 As shown, a protrusion 115 is provided on the outer circumferential wall surface 1114 of the cylindrical side wall 111. The protrusion 115 extends in a direction away from the first accommodating cavity 1111, and the protrusion 115 is used for connecting with the inner wall of the process chamber 200. The protrusion 115 can be arranged along the circumferential direction of the cylindrical side wall 111, that is, a continuous protrusion 115 is arranged on one circle of the outer circumferential wall surface 1114 of the cylindrical side wall 111, and the protrusion 115 surrounds the outer circumferential wall surface 1114 of the cylindrical side wall 111. The protrusion 115 extends in a direction away from the first accommodating cavity 1111 so that the protrusion 115 can be connected to the inner wall of the process chamber 200. The cylindrical side wall 111 and the bottom wall 113 are connected to the inner wall of the process chamber 200 through the protrusion 115 to divide the process chamber 200 into a process space and a non-process space.

[0089] The present application also provides a process kit 100 for installation in the process chamber 200. Refer to Figure 12As shown, the process kit 100 is connected to the inner wall surface of the process chamber 200. The process kit 100 divides the interior of the process chamber 200 into a process space and a non-process space. The process kit 100 includes a shielding member 110, which is used to connect to the inner wall surface of the process chamber 200. The shielding member 110 can shield atoms or ions sputtered from the target, preventing the atoms or ions sputtered from the target from depositing on other non-process spaces in the process chamber and causing damage to other structures in the process chamber.

[0090] The shielding member 110 includes a cylindrical side wall 111 and a bottom wall 113. The cylindrical side wall 111 encloses a first accommodation cavity 1111, which is used to accommodate the target 300. The first accommodation cavity 1111 can accommodate at least part of the target 300. The shielding member 110 is spaced from the target 300, and the cylindrical side wall 111 can surround the target 300. The target 300 is located at the top of the shielding member 110. The plane where one side of the target 300 is located can be coplanar with the plane where the top of the shielding member 110 is located, that is, one side surface of the target 300 can be flush with the top end of the shielding member 110.

[0091] One end of the bottom wall 113 is connected to the bottom of the cylindrical side wall 111 and extends towards the inside of the shielding member 110 along the radial direction of the cylindrical side wall 111. The other end of the bottom wall 113 bends towards the inside of the shielding member 110 along the axial direction of the cylindrical side wall 111. There is a corner 1131 at the connection between the bottom wall 113 and the cylindrical side wall 111, and the surface of the corner 1131 is covered with a rough layer 1132.

[0092] Specifically, the side surface of the shielding member 110 is the cylindrical side wall 111 in a cylindrical shape, and the bottom of the shielding member 110 is the bottom wall 113, and the bottom wall 113 is connected to the cylindrical side wall 111. The bottom wall 113 can be integrally formed with the cylindrical side wall 111, or the bottom wall 113 can be connected to the cylindrical side wall 111 by one or a combination of welding, riveting, and bonding.

[0093] One end of the bottom wall 113 is connected to the bottom of the cylindrical side wall 111 and extends towards the inside of the cylindrical side wall 111 along the radial direction of the cylindrical side wall 111 to form the bottom of the shielding member 110. The other end of the bottom wall 113 bends towards the inside of the cylindrical side wall 111 along the axial direction of the cylindrical side wall 111, that is, bends inward.

[0094] A corner 1131 is formed at the connection between the bottom wall 113 and the cylindrical side wall 111. The corner 1131 is the corner position where the bottom wall 113 and the cylindrical side wall 111 intersect and connect. The surface of the corner 1131 is covered with a rough layer 1132. The rough layer 1132 can be prepared by a thermal spraying process, that is, thermal spraying treatment is carried out at the corner 1131, and a rough layer 1132 is formed on the surface of the corner 1131 after the thermal spraying treatment. The rough layer 1132 can provide better adhesion. In addition to being easily accumulated on the second inner ring wall surface 1113, the atoms or ions sputtered out from the target 300 will also accumulate at the position of the second inner ring wall surface 1113 close to the bottom wall 113 ( Figure 12 the dotted line position in). The atoms or ions sputtered out from the target 300 accumulated here have lower energy and weaker binding force with the second inner ring wall surface 1113, and will fall onto the corner 1131 under the influence of gravity and other acting forces, deposit and accumulate to form a film on the corner 1131. As the film accumulates, a particle source is gradually formed. When the process gas enters the interior of the process chamber 200, the particle source accumulated at the corner 1131 is blown to the periphery of the wafer 500 along the gas flow direction, and then the particles fall onto the surface of the wafer 500, forming particle defects and affecting the subsequent production of the device. In the embodiment of the present application, a rough layer is covered on the surface of the corner 1131, and the rough layer 1132 has better adhesion. The rough layer 1132 can make the atoms or ions sputtered out from the target 300 bind more firmly with the second inner ring wall surface. These atoms or ions are difficult to fall off from the surface of the second inner ring wall surface 1113 and accumulate on the corner 1131, avoiding the formation of a particle source at the corner 1131, and further avoiding the appearance of particle defects on the surface of the wafer 500. The design of the rough layer 1132 can improve the yield of the process production and extend the life cycle of the process kit.

[0095] The process kit provided by the present application designs a rough layer 1132 on the surface of the corner 1131. The rough layer 1132 can increase the adhesion ability between the second inner ring wall surface 1113 and the atoms or ions sputtered out from the target 300, can prevent these atoms or ions from falling off the surface of the second inner ring wall surface 1113 and accumulating at the corner 1131, can prevent the formation of a particle source at the corner 1131, thereby avoiding these particles from falling onto the surface of the wafer 500 and causing particle defects on the surface of the wafer 500, and can improve the process yield of the production. At the same time, it also improves the life cycle of the process kit, extends the maintenance cycle of the semiconductor processing equipment, and reduces the production cost.

[0096] In a possible implementation, the roughness of the rough layer 1132 is greater than 20 microns. The rough surface of the rough layer 1132 can increase the frictional force between the atoms or ions sputtered out from the target 300, effectively preventing these atoms or ions from detaching from the second inner ring wall surface 1113, which helps prevent the formation of a particle source at the corner 1131, thereby avoiding the occurrence of particle defects on the surface of the wafer 500 due to these particles falling onto the surface of the wafer 500.

[0097] In a possible implementation, the rough layer 1132 is made by at least one of the processes of thermal spraying and sandblasting. The rough layer 1132 can be prepared by thermal spraying, that is, thermal spraying treatment is performed at the corner 1131, and a rough layer 1132 is formed on the surface of the corner 1131 after the thermal spraying treatment. The rough layer 1132 can also be prepared by sandblasting. Abrasives (such as sand grains, glass beads, etc.) are sprayed onto the second inner ring wall surface 1113 by high-pressure air flow to form the rough layer 1132 and increase the roughness. The rough layer 1132 can be formed on the second inner ring wall surface by at least one of the processes of thermal spraying and sandblasting. The rough layer 1132 can provide better adhesion, enabling the atoms or ions sputtered out from the target 300 to be more firmly bonded to the second inner ring wall surface 1113.

[0098] In a possible implementation, the thickness of the rough layer 1132 is in the range of 150 microns to 250 microns. The thickness d3 of the rough layer 1132 can be 150 microns, the thickness d3 can also be 200 microns, and the thickness d3 can also be 250 microns. The thickness of the rough layer 1132 can increase the roughness of the surface of the rough layer 1132, improve the bonding force with atoms or ions, and help prevent the accumulation and formation at the particle corner 1131. In addition, the thickness of the rough layer 1132 can also improve the uniformity and stability of the rough layer 1132, and improve the quality and durability of the rough layer 1132.

[0099] This application also provides a semiconductor processing device. The semiconductor processing is used for the processing and preparation of semiconductors. The semiconductor processing includes the process chamber 200, the target 300, and the process kit 100 described in any of the above embodiments. The embodiments of this application do not limit the specific type of the process chamber 200 and the specific process executed. For example, the process chamber 200 can be a magnetron sputtering process chamber in a PVD device or a process chamber in a chemical vapor deposition device. The specific process executed can be DC PVD, RF PVD, UHF PVD, etc. The thin films deposited in the process chamber 200 can include, but are not limited to, titanium nitride (TiN), titanium (Ti), cobalt (Co), aluminum (Al), copper (Cu), and so on. The embodiments of this application are not limited thereto, and those skilled in the art can adjust the settings according to the actual situation.

[0100] The semiconductor processing equipment provided by this application is provided with a process kit 100, which can prevent particles from falling onto the surface of the wafer 500 carried on the base 400, thereby improving the process yield of the wafer 500 and reducing the manufacturing cost.

[0101] In a possible implementation, the semiconductor processing equipment further includes a target backplane 310, which is connected to the target 300. The side of the target backplane 310 connected to the target 300 is connected to the top of the shielding member 110. The target backplane 310 can cover the top of the shielding member 110. The target backplane 310 can provide support for the target 300 to ensure that the target maintains a stable position and posture during the sputtering process. The target backplane 310 can also transfer direct current or radio frequency current to the target.

[0102] In a possible implementation, the semiconductor processing equipment further includes a base 400, which is connected to the bottom of the process chamber 200. The wafer 500 is located on the base 400, and at least part of the wafer 500 is located in the first accommodation chamber 1111.

[0103] In one embodiment, refer to Figure 13 As shown, the semiconductor processing equipment includes a process chamber 200, in which a source electrode 220 is provided, and the source electrode is located at the top of the process chamber 200. An air inlet device 230 is provided in the process chamber 200, and the air inlet device 230 is used to deliver process gas into the process chamber 200; a magnetron device 240 is arranged between the target 300 and the source electrode 220 to generate a magnetic field to excite the process gas in the process chamber 200 to form a plasma. A target backplane 310 is arranged below the magnetron device 240. The process kit 100 can be connected to the target backplane 310 through an insulating member 120 to insulate between the target backplane 310 and the process kit 100. The process kit 100 surrounds the target 300 to prevent atoms or ionic atoms on the target 300 from sputtering on the inner wall of the process chamber 200. A base 400 is also provided in the process chamber 200, and the base 400 is used to carry the wafer 500. The base 400 can be connected to the bottom wall of the process chamber 200 through a lifting shaft 410. An electrostatic chuck 420 is further arranged between the base 400 and the wafer 500. The electrostatic chuck 420 fixes the wafer 500 on the base 400 by applying an electrostatic force, and can achieve precise positioning of the wafer 500. A deposition ring 130 is also arranged on the periphery of the base 400. In the sputtering process, the deposition ring 130 is used to prevent particles from depositing on the side of the wafer 500 and falling into the bottom of the process chamber 200.

[0104] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included within the protection scope of the present application.

Claims

1. A process kit for installation in a process chamber, characterized in that: A shielding member is included, wherein the shielding member includes a cylindrical side wall, and the cylindrical side wall is enclosed to form a first accommodating cavity, and the first accommodating cavity is used to accommodate a target material; The inner wall surface of the cylindrical side wall comprises a first inner ring wall surface and a second inner ring wall surface adjacent to each other in the axial direction of the cylindrical side wall, wherein the first inner ring wall surface is spaced apart from the target material; A second accommodating cavity is provided on the second inner ring wall surface, the first accommodating cavity and the second accommodating cavity are interconnected, and the second accommodating cavity is used to accommodate particles dropped from the target material.

2. The process kit according to claim 1, characterized in that: At least a portion of the second accommodating cavity is located on a side of the second inner ring wall surface close to the first inner ring wall surface.

3. The process kit according to claim 2, characterized in that: The second accommodating cavity includes a groove having an opening, the opening facing the radial direction of the cylindrical side wall, and the depth of the groove along the radial direction of the cylindrical side wall is in the range of 5 mm to 50 mm.

4. The process kit according to claim 3, characterized in that: The height of the groove along the axial direction of the cylindrical side wall is in the range of 10 mm to 100 mm.

5. The process kit according to claim 2, characterized in that: The second accommodating cavity includes a groove having an opening, the opening facing the axial direction of the cylindrical side wall, and a depth of the groove along the axial direction of the cylindrical side wall is in a range of 5 mm to 50 mm.

6. The process kit according to any one of claims 3 to 5, characterized in that: The cross section of the groove along the axial direction of the cylindrical side wall is at least one of an arc shape, a straight line shape, a broken line shape and an irregular shape.

7. The process kit according to any one of claims 3 to 5, characterized in that: The groove comprises an annular groove, the annular groove is continuous along the circumferential direction of the cylindrical side wall, and the annular groove is coaxially arranged with the cylindrical side wall.

8. The process kit according to claim 7, characterized in that: The number of the annular grooves is at least two, and at least two of the annular grooves are spaced apart along the axial direction of the cylindrical side wall.

9. The process kit according to any one of claims 3 to 5, characterized in that: The groove comprises an arc-shaped groove.

10. The process kit according to claim 9, characterized in that: The number of the arcuate grooves is at least two, and at least two of the arcuate grooves are spaced apart along the circumferential direction of the cylindrical side wall, and / or at least two of the arcuate grooves are spaced apart along the axial direction of the cylindrical side wall.

11. The process kit according to any one of claims 1 to 5, characterized in that: The shielding member also includes a bottom wall, one end of which is connected to the bottom of the cylindrical side wall and extends from the bottom of the cylindrical side wall along the radial direction of the cylindrical side wall toward the interior of the cylindrical side wall; the other end of the bottom wall is bent along the axial direction of the cylindrical side wall toward the interior of the cylindrical side wall, and the connection between the bottom wall and the cylindrical side wall has a corner, and the surface of the corner is covered with a rough layer.

12. The process kit according to claim 11, characterized in that: The roughness of the rough layer is greater than 20 micrometers.

13. The process kit according to claim 11, characterized in that: The rough layer is made by at least one of melt spraying and sand blasting.

14. The process kit according to claim 11, characterized in that: The thickness of the rough layer is in the range of 100 micrometers to 300 micrometers.

15. The process kit according to any one of claims 12 to 14, characterized in that: The bottom wall includes an overlapping portion for connecting to a cover ring.

16. The process kit according to any one of claims 1 to 5, characterized in that: The outer annular wall surface of the cylindrical side wall is provided with a protrusion, the protrusion extends in a direction away from the first accommodating cavity, and the protrusion is used to be connected to the inner wall of the process chamber.

17. A process kit for installation in a process chamber, characterized in that: A shielding member is included, wherein the shielding member includes a cylindrical side wall and a bottom wall, wherein the cylindrical side wall encloses a first accommodating cavity, and the first accommodating cavity is used to accommodate a target material; One end of the bottom wall is connected to the bottom of the cylindrical side wall, and extends from the bottom of the cylindrical side wall along the radial direction of the cylindrical side wall toward the interior of the shielding component; the other end of the bottom wall is bent toward the axial direction of the cylindrical side wall, and the connection between the bottom wall and the cylindrical side wall has a corner, and the surface of the corner is covered with a rough layer.

18. The process kit according to claim 17, characterized in that: The roughness of the rough layer is greater than 20 micrometers.

19. The process kit according to claim 17, characterized in that: The rough layer is made by at least one of melt spraying and sand blasting.

20. The process kit according to claim 17, characterized in that: The thickness of the rough layer is in the range of 100 micrometers to 300 micrometers.

21. A semiconductor processing device, characterized in that: It includes a process chamber, a target material and a process kit according to any one of claims 1 to 20, wherein the target material and the process kit are both located in the process chamber, the process kit is connected to the inner wall of the process chamber, the process kit surrounds the target material, and at least a portion of the target material is located in the first accommodating cavity.

22. The semiconductor processing equipment according to claim 21, characterized in that The semiconductor processing equipment further includes a target backing plate connected to the target, wherein one side of the target backing plate connected to the target is connected to the top of the shielding component.

23. The semiconductor processing equipment according to claim 21, characterized in that The semiconductor processing equipment further includes a base, which is connected to the bottom of the process chamber and is used to fix the wafer. The first accommodating cavity is used to accommodate at least part of the wafer.

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