Semiconductor packaging graphical photoetching system based on CRT (cathode ray tube) electron tube

Abstract

The invention discloses a semiconductor packaging graphical photoetching system based on a CRT (cathode ray tube) electron tube. The system comprises a vacuum cavity, a CRT electron gun module, a precise moving platform and an in-situ optical monitoring unit. Wherein the CRT electron gun module is integrated with a multi-stage dynamic focusing system and a digital deflection correction algorithm, the focus position of an electron beam can be adjusted in real time, geometric distortion can be corrected, and high-precision photoetching is ensured. The system is also provided with a charge neutralization unit, and is suitable for photoetching requirements of a non-conductive substrate. By means of the improved CRT electron tube technology, a multi-stage dynamic focusing system and a digital deflection correction algorithm are combined, and high-precision graphical photoetching is achieved.

Description

Technical Field

[0001] The present invention relates to the field of lithography technology, and particularly to a semiconductor packaging patterning lithography system based on a CRT electron tube. Background Art

[0002] In the field of semiconductor manufacturing, especially in AI chip packaging and large-area panel-level packaging, patterning lithography technology is a key link in realizing the manufacture of high-precision interconnect structures. Conventional lithography technologies, such as deep ultraviolet lithography (DUV), electron beam lithography (EBL), etc., although capable of achieving nanometer-level precision, have problems such as high equipment costs (the price of a single device exceeds 100 million yuan), complex maintenance, and demanding production environment requirements (such as a cleanroom). In addition, these technologies have obvious performance redundancy and cost waste in non-cutting-edge process technologies (such as line widths from hundreds of nanometers to micrometers).

[0003] In recent years, with the development of semiconductor packaging technology towards higher density and larger area, panel-level packaging (PLP) has gradually become the mainstream trend. However, the application of existing lithography technologies on large-area substrates faces many challenges: on the one hand, step-and-repeat lithography machines require multiple exposures and stitching, resulting in high equipment costs and low throughput (<4 wafers / hour); on the other hand, the use of non-conductive materials such as glass substrates increases the process complexity of electron beam lithography, and an additional charge neutralization system is required.

[0004] In addition, existing alternative technologies such as inkjet printing and laser direct writing have limitations in terms of resolution, material compatibility, etc., and are difficult to meet the requirements of high-precision and high-throughput patterning manufacturing for high-performance computing (HPC) and AI chip packaging. As a mature electron beam emission device, a CRT electron tube has the characteristics of low cost and high scanning speed, but its inherent defects (such as geometric distortion and insufficient electron beam focusing accuracy) limit its application in the field of lithography. Summary of the Invention

[0005] Based on this, the embodiments of the present application provide a semiconductor packaging patterning lithography system based on a CRT electron tube, which solves the problems existing in the prior art by combining dynamic focusing, distortion correction, and charge neutralization means.

[0006] In the first aspect, a semiconductor packaging patterning lithography system based on a CRT electron tube is provided, and the system includes:

[0007] A vacuum chamber for providing a low-vacuum environment to ensure the stable transmission of the electron beam and the high precision of the lithography process;

[0008] The CRT electron gun module is disposed within the vacuum chamber and is used to emit electron beams for graphic lithography. Among them, the CRT electron gun module integrates a multi-stage dynamic focusing system and a digital deflection correction algorithm, capable of adjusting the focal position of the electron beam in real time and correcting geometric distortion.

[0009] The precision moving platform is disposed within the vacuum chamber and is used to carry the semiconductor substrate to be lithographed, and to achieve high-precision positioning and movement to cooperate with the electron beam scanning of the CRT electron gun module.

[0010] The in-situ optical monitoring unit is disposed within the vacuum chamber and is used to monitor the graphic alignment status and exposure quality during the lithography process in real time, and to feedback the monitoring data to the system to dynamically adjust the lithography parameters of the CRT electron gun module.

[0011] Optionally, the CRT electron gun module includes a plurality of CRT electron tube units arranged in a two-dimensional pattern to form a two-dimensional CRT array module for realizing graphic lithography of a large-area substrate.

[0012] The two-dimensional CRT array module is arranged in a honeycomb pattern, and the exposure areas of adjacent CRT electron tube units partially overlap, and the splicing seams are eliminated through a digital gray-scale fusion algorithm.

[0013] Optionally, the system further includes a high-rigidity frame for supporting the CRT electron gun module to ensure its structural stability and accuracy during the lithography process.

[0014] Optionally, the system further includes a charge neutralization unit disposed within the vacuum chamber and used to neutralize the charges generated by the electron beam irradiation during the lithography of a non-conductive substrate to avoid graphic distortion.

[0015] Optionally, the precision moving platform is a multi-degree-of-freedom stage supporting at least translational movements in the X, Y, and Z directions and rotational movements around the X, Y, and Z axes to meet the requirements of complex graphic processes.

[0016] Optionally, the multi-stage dynamic focusing system is composed of an electromagnetic lens group driven by piezoelectric ceramics, with a response frequency ≥ 1 kHz, capable of adjusting the focal position of the electron beam in real time.

[0017] Optionally, the multi-stage dynamic focusing system includes:

[0018] An electromagnetic lens group driven by piezoelectric ceramics, installed on the electron beam path of the CRT electron gun module, for adjusting the focal position of the electron beam in real time.

[0019] The electromagnetic lens group is composed of multiple lens units, and each lens unit is controlled by an independent piezoelectric ceramic driver, which can dynamically adjust the focal length of the lens according to the deflection angle and scanning position of the electron beam.

[0020] Optionally, the multi-stage dynamic focusing system further includes a feedback controller, which is used to receive the monitoring data from the in-situ optical monitoring unit and adjust the driving signal of the piezoelectric ceramic driver according to the data to ensure the precise adjustment of the electron beam focus.

[0021] Optionally, the digital deflection correction algorithm includes:

[0022] In the system initialization stage, by measuring the landing position of the electron beam of the CRT electron gun module at different deflection angles, a distortion mapping table is established, and the distortion mapping table records the deviation between the actual landing point and the ideal landing point of the electron beam at different positions.

[0023] During the lithography process, according to the distortion mapping table, the deflection coil current of the CRT electron gun module is dynamically compensated to correct the geometric distortion of the electron beam and ensure the precise alignment of the electron beam on the substrate.

[0024] In a second aspect, there is provided a process flow of the semiconductor package patterning lithography system as described in the first aspect, including:

[0025] Spin-coat a photoresist on the AI chip package substrate and perform a pre-baking treatment.

[0026] Load the pre-baked substrate into the vacuum chamber and maintain a low vacuum environment to ensure the stable transmission of the electron beam.

[0027] According to the preset pattern, drive the CRT electron gun module to emit an electron beam for scanning lithography, and at the same time, adjust the focus position of the electron beam in real time through the multi-stage dynamic focusing system, and dynamically correct the deflection parameters of the electron beam through the digital deflection correction algorithm.

[0028] Develop and etch the lithographed substrate to form the required RDL circuit or bump mask.

[0029] Repeat the above steps to complete the manufacture of the multi-layer package structure.

[0030] The beneficial effects brought by the technical solutions provided in the embodiments of the present application at least include:

[0031] (1) Through the improved CRT electron tube technology, combined with a multi-stage dynamic focusing system and a digital deflection correction algorithm, the present invention achieves high-precision graphic lithography, while significantly reducing the equipment cost and energy consumption. Compared with traditional electron beam lithography, the equipment cost is reduced to less than one-tenth of the traditional equipment, the energy consumption is reduced to 1 / 10 of the traditional equipment, and the throughput is increased to more than 20 times that of the traditional equipment, which is particularly suitable for the mid-range line width requirements (100nm - 1μm) of AI chip packaging and large-area panel-level packaging.

[0032] (2) Through the dynamic focusing system and the deflection correction algorithm, the present invention solves the problems of geometric distortion and insufficient focusing accuracy of traditional CRT electron tubes, achieving high-precision exposure over the entire area (≥200mm × 200mm), and controlling the lithography line width error within ±5%. At the same time, the digital deflection correction algorithm is used to eliminate geometric distortion, ensuring the graphic accuracy of large-area substrates, which is suitable for the high-precision requirements of large-area panel-level packaging.

[0033] (3) The present invention uses a negative photoresist containing nanoscale metal particles. The local thermal effect induced by the CRT electron beam enhances the development contrast, reducing the requirement for electron beam energy, while improving the resolution and graphic quality of the photoresist. In addition, the system is equipped with a charge neutralization unit, which can directly perform lithography on non-conductive substrates (such as glass substrates) without an additional conductive layer, further expanding the application range of materials. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only exemplary, and for those of ordinary skill in the art, without creative efforts, other implementation drawings can be obtained based on the provided drawings.

[0035] Figure 1 Schematic diagram of single-head CRT electron beam lithography provided by an embodiment of the present application;

[0036] Figure 2 Schematic diagram of multi-head CRT electron beam lithography provided by an embodiment of the present application;

[0037] Figure 3 Process flow chart of the semiconductor packaging graphic lithography system provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0038] In order to make the objectives, technical solutions and advantages of the present application clearer, the following further details the present application in conjunction with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0039] In the description of the present invention, the terms "include", "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily limit to those steps or units that are explicitly listed, but may also include other steps or units that are inherent to these processes, methods, products or devices although not explicitly listed, or steps or units added based on further optimization schemes of the concept of the present invention.

[0040] The following specifically describes the semiconductor packaging patterning lithography system based on CRT electron tubes and its process flow of the present invention in conjunction with specific embodiments. These embodiments are only used to illustrate the technical solutions of the present invention and do not limit the protection scope of the present invention.

[0041] The lithography system of this embodiment includes the following main components:

[0042] Vacuum chamber: The vacuum chamber is the basis of the entire lithography system and is used to provide a low-vacuum environment (at the level of 10 -4 Pa) to ensure the stable transmission of the electron beam and the high precision of the lithography process. The vacuum chamber is made of stainless steel material, and its inner surface is specially treated to reduce electron beam scattering and secondary electron interference. The vacuum chamber is equipped with a high-performance vacuum pump system, which can reach and maintain the required vacuum degree in a short time. At the same time, a temperature control system is also provided inside the vacuum chamber to ensure the temperature stability during the lithography process and avoid substrate deformation or electron beam drift caused by temperature changes.

[0043] CRT electron gun module: The CRT electron gun module is the core component of the lithography system and is set inside the vacuum chamber for emitting electron beams and performing patterning lithography. This module integrates a multi-stage dynamic focusing system and a digital deflection correction algorithm, which can adjust the focus position of the electron beam in real time and correct geometric distortion. The CRT electron gun module adopts an improved cathode ray tube structure, and its electron gun part includes a tungsten filament cathode, an accelerating electrode and a deflection coil. By optimizing the design of the electron gun, the brightness and stability of the electron beam are improved, and at the same time, the divergence angle of the electron beam is reduced, thereby improving the lithography resolution.

[0044] Specifically, the cathode ray tube (CRT) display technology is briefly introduced. A CRT monitor is a monitor that uses a cathode ray tube (Cathode Ray Tube). It is the earliest used monitor, with mature technology, low price, long service life and high reliability. It is mainly divided into two categories: black and white CRT monitors and color CRT monitors.

[0045] A black-and-white CRT, that is, a monochrome (Monochrome Monitor) CRT, has only a single electron gun and can only produce two colors, black and white. Its main uses are to display images in early black-and-white televisions and to be used as a monitor in industrial control equipment. A black-and-white CRT mainly consists of a conical glass envelope, a fluorescent screen on the front of the glass envelope for display (i.e., the object to be exposed), an electron gun system enclosed in the glass envelope for emitting an electron beam, and a yoke device located outside the glass envelope for controlling the deflection and scanning of the electron beam, which are four parts in total.

[0046] Figure 1 Schematic diagram of single-head CRT electron beam lithography provided by an embodiment of the present application; Figure 1 Specifically included are:

[0047] CRT electron gun module: Located at the upper part of the device, it contains a filament and a cathode and is used to generate and emit an electron beam. The design of the electron gun enables precise control of the emission of the electron beam, laying a foundation for subsequent focusing and deflection.

[0048] Focusing system: Located below the electron gun, it consists of a series of lenses or electromagnetic fields and is used to focus the electron beam into a fine beam. The focusing system ensures that the electron beam has the required precision and resolution when irradiating the substrate surface.

[0049] Level controller: Located above the focusing system, it is used to adjust the intensity of the electron beam. By adjusting the level, the exposure amount of the photoresist during the exposure process can be controlled, thereby affecting the size and shape of the final pattern.

[0050] Acceleration system: Located below the focusing system, it is used to accelerate the electron beam so that it has sufficient energy for lithography. The design of the acceleration system takes into account the energy distribution of the electron beam to ensure the uniformity of exposure.

[0051] Electrostatic deflection system: It includes horizontal deflection plates and vertical deflection plates and is used to control the scanning path of the electron beam. The electrostatic deflection system realizes patterned exposure of the substrate surface by changing the deflection angle of the electron beam.

[0052] Scanning electron beam: After being emitted from the electron gun, it undergoes focusing and deflection and finally irradiates the object to be exposed. The path and shape of the scanning electron beam are precisely controlled by the electrostatic deflection system to achieve high-precision patterned lithography.

[0053] Object to be exposed: Located at the bottom of the device, it represents a semiconductor substrate or other materials to be lithographed. The object is placed on a high-precision moving platform to ensure precise positioning during the exposure process.

[0054] High-precision moving platform: It is used to carry the object to be exposed and achieve high-precision positioning and movement. The design of the moving platform takes into account stability and repeatability to ensure the alignment accuracy during multi-layer exposure.

[0055] Vacuum chamber: It surrounds the entire device and maintains a low-vacuum environment inside to reduce the scattering and energy loss of the electron beam during transmission. The design of the vacuum chamber takes into account sealing and stability to ensure high precision and high repeatability in the lithography process.

[0056] Figure 2 Schematic diagram of a multi-head CRT electron beam lithography provided by an embodiment of the present application; The figure shows three CRT electron gun modules arranged side by side, and each module includes a filament and a cathode for generating and emitting an electron beam. This multi-head design allows the substrate to be exposed simultaneously or sequentially, significantly improving the lithography efficiency.

[0057] Specifically, precision moving platform: The precision moving platform adopts a high-precision multi-degree-of-freedom stage, supporting translational movements in the X, Y, and Z directions and rotational movements around the X, Y, and Z axes, for carrying the semiconductor substrate to be lithographed and achieving high-precision positioning and movement. The positioning accuracy of the moving platform reaches ±0.1 μm, which can meet the requirements of complex patterning processes. The moving platform uses air-bearing technology to reduce mechanical friction and improve the smoothness and repeatability of movement. At the same time, the moving platform is equipped with a high-precision laser interferometer for real-time monitoring of the position and attitude of the platform to ensure high-precision alignment in the lithography process.

[0058] In-situ optical monitoring unit: The in-situ optical monitoring unit includes a CCD camera and a laser interferometer, for real-time monitoring of the pattern alignment status and exposure quality during the lithography process, and feeding the monitoring data back to the system to dynamically adjust the lithography parameters of the CRT electron gun module. The CCD camera can capture images of the lithography pattern in real time, and analyze the alignment accuracy and defect conditions of the pattern through image processing algorithms. The laser interferometer is used to accurately measure the focus position and deflection angle of the electron beam, providing a real-time feedback signal for the multi-level dynamic focusing system. Through the feedback mechanism of the in-situ optical monitoring unit, the system can adjust the lithography parameters of the electron beam in real time to ensure high precision and high repeatability in the lithography process.

[0059] Charge neutralization unit: The charge neutralization unit is used to neutralize the charges generated by electron beam irradiation when lithographing on a non-conductive substrate to avoid pattern distortion. This unit sprays low-energy argon ions onto the substrate surface to neutralize the charges accumulated by electron beam irradiation, thus ensuring the stability and uniformity of the lithography pattern. The design of the charge neutralization unit takes into account the uniformity and stability of the ion beam, and through optimizing the design and control parameters of the ion source, ensures that the charge neutralization efficiency reaches more than 99.5%.

[0060] In an alternative embodiment of the present application, the system further includes the following components:

[0061] Two-dimensional CRT array module: The two-dimensional CRT array module is composed of multiple CRT tube units, arranged in a honeycomb pattern. Each CRT tube unit is responsible for the graphic projection of a sub-region of the substrate. The exposure areas of adjacent units partially overlap (5%-10%), and the stitching seams are eliminated through a digital grayscale fusion algorithm. The design of the two-dimensional CRT array module takes into account the lithography requirements of large-area substrates. By optimizing the arrangement of CRT tube units and the exposure strategy, seamless patterning of large-area substrates is achieved. The acceleration voltage of each CRT tube unit is set to 25 kV, the beam current is 0.8 μA, and the scanning speed is 8 m / s. Through sub-region synchronous exposure, the two-dimensional CRT array module can complete the lithography of large-area substrates in a short time, significantly improving the production efficiency.

[0062] High-rigidity frame: The high-rigidity frame adopts a carbon fiber-ceramic composite structure, with a thermal expansion coefficient matching that of the glass substrate (CTE≈3.2 ppm / °C). It is used to support the two-dimensional CRT array module to ensure its structural stability and accuracy during the lithography process. The design of the high-rigidity frame takes into account the mechanical stability during large-area lithography. By optimizing the frame structure and material selection, the lithography errors caused by mechanical vibration and thermal expansion are reduced. There is also a shock-absorbing device inside the frame, further improving the stability of the system.

[0063] As Figure 3 , the process flow of the semiconductor packaging patterning lithography system provided by the embodiments of the present application may include:

[0064] S1, Spin-coat a photoresist on the AI chip packaging substrate and perform a pre-baking treatment.

[0065] S2, Load the pre-baked substrate into the vacuum chamber and maintain a low-vacuum environment to ensure the stable transmission of the electron beam.

[0066] S3, According to the preset pattern, drive the CRT electron gun module to emit an electron beam for scanning lithography. At the same time, adjust the focus position of the electron beam in real time through a multi-stage dynamic focusing system, and dynamically correct the deflection parameters of the electron beam through a digital deflection correction algorithm.

[0067] S4, Develop and etch the lithographed substrate to form the required RDL circuit or bump mask.

[0068] S5, Repeat the above steps to complete the manufacturing of the multi-layer packaging structure.

[0069] Specifically, the specific steps are as follows:

[0070] S1 specifically includes spin - coating a photoresist (such as SU - 8 + 5wt% silver nanowires with a diameter of 50 nm) on an AI chip packaging substrate (such as a 12 - inch silicon interposer with a 2 - μm - thick copper deposition on the surface), and performing a pre - baking treatment to remove the solvent in the photoresist and improve its adhesion. The pre - baking temperature is usually set at 90°C for a duration of 10 minutes. The thickness of the pre - baked photoresist is uniform and the surface is flat, meeting the requirements of high - precision lithography.

[0071] S2 specifically includes loading the pre - baked substrate into a vacuum chamber, starting the vacuum pump, and maintaining a low - vacuum environment (at the Pa level) to ensure the stable transmission of the electron beam. The vacuum degree in the vacuum chamber is monitored in real - time by a vacuum gauge to ensure a stable vacuum state throughout the lithography process. At the same time, start the temperature control system to maintain the temperature in the chamber at 25°C ± 0.5°C, avoiding substrate deformation or electron beam drift caused by temperature changes. - 4 S3 specifically includes driving the CRT electron gun module to emit an electron beam for scanning lithography according to a preset pattern. The acceleration voltage of the electron beam is set at 30 kV, the beam current is 1 μA, and the scanning speed is 10 m / s. The scanning path of the electron beam on the substrate surface is precisely controlled by a computer control system to ensure the accuracy and consistency of the lithography pattern.

[0072] A multi - stage dynamic focusing system adjusts the focal position of the electron beam in real - time through an electromagnetic lens group driven by piezoelectric ceramics, ensuring that the lithography line - width error is controlled within ±5% (reaching a 300 - nm line - width in the embodiment). The electromagnetic lens group consists of multiple lens units, and each lens unit is controlled by an independent piezoelectric ceramic driver, capable of dynamically adjusting the focal length of the lens according to the deflection angle and scanning position of the electron beam. The feedback controller receives the monitoring data from the in - situ optical monitoring unit and adjusts the driving signal of the piezoelectric ceramic driver based on these data, thereby achieving precise adjustment of the electron beam focus.

[0073] The digital deflection correction algorithm dynamically compensates the deflection coil current according to a pre - stored distortion mapping table to eliminate the geometric distortion at the edge of the CRT screen, ensuring the uniformity of full - area (≥200 mm × 200 mm) exposure. The distortion mapping table is established during the system initialization stage by measuring the landing positions of the electron beam of the CRT electron gun module at different deflection angles, recording the deviation between the actual landing point and the ideal landing point of the electron beam at different positions. During the lithography process, the correction controller calculates the compensation values of the deflection coil current in real - time according to the distortion mapping table and applies these compensation values to the deflection coil, thereby achieving precise deflection control of the electron beam.

[0074]

[0075] ​Specifically, S4 includes taking out the substrate from the vacuum chamber after lithography is completed, performing a development process to form the required RDL circuit or bump mask. A dedicated negative photoresist developer is used as the developer, the development time is 3 minutes, and the development temperature is 25°C. The developed photoresist pattern is clear, and the line width is uniform, which can meet the requirements of subsequent etching processes. Subsequently, an etching process is carried out, using plasma etching technology, the etching depth reaches 2 μm, and the sidewalls of the etched pattern are steep, the bottom is flat, and there are no obvious residues.

[0076] Specifically, S5 includes repeating the above steps to complete the manufacture of the multi-layer packaging structure. During the multi-layer packaging process, the accuracy and repeatability of each layer of lithography and etching processes are crucial. By optimizing the selection of photoresist and process parameters, combined with a multi-stage dynamic focusing system and a digital deflection correction algorithm, the present invention can achieve the manufacture of a high-precision multi-layer packaging structure to meet the requirements of AI chip packaging for complex interconnect structures.

[0077] In an alternative embodiment of the present application, a photoresist (such as SU-8) is spin-coated on a glass substrate (such as 510 mm × 515 mm soda-lime glass with a copper seed layer plated on the surface), and a pre-baking process is carried out. The pre-baking temperature is set to 90°C, and the duration is 15 minutes. The thickness of the pre-baked photoresist is uniform, and the surface is flat, which can meet the requirements of large-area lithography.

[0078] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0079] The above-described embodiments only represent several implementation manners of the present application. Their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A semiconductor packaging graphic lithography system based on a CRT electron tube, characterized in that: The system comprises: Vacuum chamber, used to provide a low vacuum environment to ensure stable transmission of the electron beam and high precision of the lithography process; A CRT electron gun module is disposed in the vacuum chamber and is used to emit an electron beam and perform patterning lithography; wherein the CRT electron gun module integrates a multi-level dynamic focusing system and a digital deflection correction algorithm, and is capable of adjusting the focus position of the electron beam in real time and correcting geometric distortion; A precision moving platform is arranged in the vacuum chamber, and is used to carry the semiconductor substrate to be photoetched, and realize high-precision positioning and movement to cooperate with the electron beam scanning of the CRT electron gun module; The in-situ optical monitoring unit is arranged in the vacuum chamber and is used for real-time monitoring of the pattern alignment state and exposure quality during the photolithography process, and feeding back the monitoring data to the system to dynamically adjust the photolithography parameters of the CRT electron gun module.

2. The semiconductor packaging patterning lithography system according to claim 1, characterized in that: The CRT electron gun module includes a plurality of two-dimensionally arranged CRT electron tube units to form a two-dimensional CRT array module for realizing patterned lithography of large-area substrates; The two-dimensional CRT array module is arranged in a honeycomb shape, the exposure areas of adjacent CRT electron tube units partially overlap, and the joint seams are eliminated by a digital grayscale fusion algorithm.

3. The semiconductor packaging patterning lithography system according to claim 1, characterized in that: The system also includes a high-rigidity frame for supporting the CRT electron gun module to ensure its structural stability and accuracy during the photolithography process.

4. The semiconductor packaging patterning lithography system according to claim 1, characterized in that: The system also includes a charge neutralization unit, which is arranged in the vacuum chamber and is used to neutralize the charge generated by electron beam irradiation when performing photolithography on a non-conductive substrate to avoid pattern distortion.

5. The semiconductor packaging patterning lithography system according to claim 1, characterized in that: The precision mobile platform is a multi-degree-of-freedom stage that supports translational motion in at least three directions, X, Y, and Z, and rotational motion around the X, Y, and Z axes to meet the needs of complex graphic processes.

6. The semiconductor packaging patterning lithography system according to claim 1, characterized in that: The multi-stage dynamic focusing system is composed of an electromagnetic lens group driven by piezoelectric ceramics, has a response frequency of ≥1kHz, and can adjust the focal position of the electron beam in real time.

7. The semiconductor packaging patterning lithography system according to claim 1, characterized in that: The multi-stage dynamic focusing system comprises: A piezoelectric ceramic driven electromagnetic lens group is installed on the electron beam path of the CRT electron gun module and is used to adjust the focus position of the electron beam in real time; The electromagnetic lens group is composed of a plurality of lens units, each of which is controlled by an independent piezoelectric ceramic driver and can dynamically adjust the focal length of the lens according to the deflection angle and scanning position of the electron beam.

8. The semiconductor packaging patterning lithography system according to claim 7, characterized in that: The multi-stage dynamic focusing system also includes a feedback controller for receiving monitoring data from the in-situ optical monitoring unit and adjusting the driving signal of the piezoelectric ceramic driver according to the data to ensure accurate adjustment of the electron beam focus.

9. The semiconductor packaging patterning lithography system according to claim 1, characterized in that: The digital deflection correction algorithm includes: In the system initialization stage, by measuring the electron beam landing position of the CRT electron gun module at different deflection angles, a distortion mapping table is established, wherein the distortion mapping table records the deviation between the actual landing point and the ideal landing point of the electron beam at different positions; During the photolithography process, the deflection coil current of the CRT electron gun module is dynamically compensated according to the distortion mapping table to correct the geometric distortion of the electron beam and ensure the accurate alignment of the electron beam on the substrate.

10. A process flow of a semiconductor packaging patterning lithography system according to any one of claims 1 to 9, characterized in that: include: Spin-coat photoresist on the AI ​​chip packaging substrate and perform pre-baking; The pre-baked substrate is placed into a vacuum chamber and a low vacuum environment is maintained to ensure stable transmission of the electron beam; According to the preset pattern, the CRT electron gun module is driven to emit an electron beam for scanning lithography. At the same time, the focus position of the electron beam is adjusted in real time through a multi-level dynamic focusing system, and the deflection parameters of the electron beam are dynamically corrected through a digital deflection correction algorithm; Developing and etching the photolithographic substrate to form the required RDL circuit or bump mask; Repeat the process to complete the manufacture of multi-layer packaging structure.

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