Hidden Markov model forward algorithm classifier based on memristor array and control method thereof

Abstract

The invention belongs to the related technical field of microelectronic devices, and discloses a hidden Markov model forward algorithm classifier based on a memristor array and a control method thereof, and the classifier comprises the memristor array, a trans-impedance amplifier, an analog-to-digital converter, a digital-to-analog converter, a data distributor, a serial-to-parallel converter and a parallel-to-serial converter. The parallel-serial converter and the data distributor are used for successively inputting newly received parallel digital signals beta p1-beta pN into different bit lines of the first memristor array in a serial mode to obtain serial digital signals beta s1-beta sN; and the serial-to-parallel converter simultaneously inputs the serial digital signals beta s1-beta sN into different bit lines of the second memristor array in a parallel mode to obtain parallel digital signals beta p1-beta pN, and inputs the parallel digital signals beta p1-beta pN into the parallel-to-serial converter to realize iteration of calculation. Based on the classifier, the calculation efficiency of the forward algorithm of the hidden Markov model can be improved, and the calculation power consumption can be reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field related to microelectronic devices, and more specifically, relates to a hidden Markov model forward algorithm classifier based on a memristor array and a control method thereof. Background Art

[0002] Hidden Markov Model (HMM) is a statistical learning model that is widely used in pattern recognition, speech recognition, biological sequence analysis and other fields. Traditional HMM classifiers are mainly implemented in software. The traditional architecture uses the von Neumann architecture design that separates storage and computing. Data needs to be frequently transferred between the memory and the computing unit, which not only leads to reduced computing efficiency, but also causes higher power consumption. In addition, large-scale computing unit and data storage unit designs often occupy a large chip area, which is not suitable for embedded devices with limited resources and edge computing scenarios. With the development of artificial intelligence technology, the demand for algorithm hardware acceleration is becoming increasingly urgent.

[0003] How to improve the computational efficiency of the forward algorithm of the hidden Markov model and reduce the computational power consumption is an important topic that needs to be explored at present. Summary of the invention

[0004] In view of the above defects or improvement needs of the prior art, the present invention provides a hidden Markov model forward algorithm classifier based on a memristor array and a control method thereof, which aims to improve the computational efficiency of the forward algorithm of the hidden Markov model and reduce computational power consumption.

[0005] To achieve the above object, according to one aspect of the present invention, there is provided a hidden Markov model forward algorithm classifier based on a memristor array, comprising: first and second memristor arrays, first and second transimpedance amplifiers, first and second analog-to-digital converters, first and second digital-to-analog converters, a data distributor, a serial-to-parallel converter, and a parallel-to-serial converter;

[0006] The basic unit of each memristor array includes a non-volatile memristor and a switch connected in series, the conductance of the memristor is adjustable, the switch control end of the basic unit in the same column is connected to the same word line, the input end of the basic unit in the same row is connected to the same bit line, and the output end of the basic unit in the same column is connected to the same selection line;

[0007] The parallel-to-serial converter is used to convert the newly received parallel digital signal β p1 ~β pN The data distributor is input in series one by one; the data distributor is used to select only one row of the first memristor array at a time so that the digital signal β p1 ~β pNThe digital signal of the input row is converted into a voltage by the first digital-to-analog converter and then input into the bit line of the corresponding row and is calculated by the memristor of the selected column. The selection line of the selected column outputs the serial current I successively. s1 ~I sN ;I s1 ~I sN After being converted into a voltage by the first transimpedance amplifier, it is then converted into a serial digital signal β by the first analog-to-digital converter. s1 ~β sN ;

[0008] The serial-to-parallel converter is used to convert the serial digital signal β s1 ~β sN The N rows of the second memristor array are input in parallel at the same time. The digital signal of the input row is converted into a voltage by the second digital-to-analog converter and then input into the bit line of the corresponding row and is calculated by the memristor of the gated column. The selection line of the gated column simultaneously outputs a parallel current I p1 ~I pN ;I p1 ~I pN After being converted into a voltage by the second transimpedance amplifier, it is then converted into a new parallel digital signal β by the second analog-to-digital converter. p1 ~β pN and input into the parallel-to-serial converter.

[0009] Optionally, the classifier further comprises a data selector located between the first analog-to-digital converter and the serial-to-parallel converter, and the data selector is used to enable only a selection line corresponding to a selected column of the first memristor array at a time.

[0010] Optionally, the serial-to-parallel converter and the parallel-to-serial converter are both shift registers.

[0011] Optionally, the classifier also includes a writing module for mapping the transposed matrix of the state transfer matrix in the forward algorithm into the second memristor array in the form of a conductivity state matrix, and mapping the emission matrix B in the forward algorithm into the first memristor array in the form of a conductivity state matrix.

[0012] Optionally, the classifier further includes a first timing control module, a second timing control module and a first address control module;

[0013] The first timing control module is used to control the parallel-to-serial converter to convert the newly received parallel digital signal β p1 ~β pN inputting the data distributor one by one in a serial manner;

[0014] The first address control module is used to control the data distributor to successively select N rows of the first memristor array so that α p1 ~β pNInput to the selected row of the array one by one;

[0015] The second timing control module is used to control the serial-to-parallel converter to convert the serial digital signal β s1 ~β sN The N rows of the second memristor array are input simultaneously in parallel.

[0016] Optionally, the memristor used is a memristor with a TiN / Ti / HfOx / TiN stacked structure.

[0017] Optionally, the switches used are transistors.

[0018] The present invention also provides a method for controlling the hidden Markov model forward algorithm classifier based on the memristor array as described above, which comprises:

[0019] At the same time, the 1st to Nth columns of the second memristor array are selected; the second memristor array stores the transposed matrix of the N*N state transfer matrix in the forward algorithm in the form of a conductance matrix;

[0020] The first memristor array is column-selected according to the observation sequence O=(O1, O2, ..., OT), Ot is the t-th observation component, T is the total number of moments, and the Ot-th column is selected at the t-th moment; the first memristor array stores the N*M emission matrix in the forward algorithm in the form of a conductance matrix;

[0021] At the time t=1, the voltage vector components converted from the initial state probability π are serially input to the 1st to Nth bit lines of the first memristor array one by one; at the time t=2, 3, ..., T, the parallel-to-serial converter and the data distributor are controlled to convert the digital signal β received at each time t p1 ~β pN The first memristor array is inputted into the 1st to Nth rows one by one and converted into voltage by the first digital-to-analog converter and then inputted into the 1st to Nth bit lines one by one. At each moment, the memristor in the Otth column performs calculations one by one and outputs the serial current I on the selection line of the column one by one. s1 ~I sN , I s1 ~I sN After being converted into a voltage by the first transimpedance amplifier, it is then converted into a serial digital signal β by the first analog-to-digital converter. s1 ~β sN ;

[0022] Control the serial-to-parallel converter to convert the β obtained at each moment t s1 ~β sN The 1st to Nth rows of the second memristor array are input simultaneously in parallel, β s1 ~β sNAfter being converted into voltage by the second digital-to-analog converter, it is simultaneously input into the 1st to Nth bit lines of the second memristor array, so that the memristors in the 1st to Nth columns simultaneously perform calculations and simultaneously output parallel currents I on the selection lines in the 1st to Nth columns. p1 ~I pN ;I p1 ~I pN After being converted into a voltage by the second transimpedance amplifier, it is then converted into a parallel digital signal β by the second analog-to-digital converter. p1 ~β pN And input the parallel-to-serial converter at the next time t+1;

[0023] The N voltages serially output by the first transimpedance amplifier at time T are summed to output the observation sequence O=(O 1 ,O 2 ,...,O T ) under the hidden Markov model.

[0024] Optionally, it also includes: mapping the transposed matrix of the state transfer matrix into the second memristor array in the form of a conductivity state matrix, and mapping the emission matrix B into the first memristor array in the form of a conductivity state matrix.

[0025] Optionally, the process of mapping any element of the matrix to a selected memristor in the form of a conductance state includes:

[0026] First, a reset operation is performed on the selected memristor, and the reset operation includes: applying a fixed high level to the selection line end of the selected memristor, applying a fixed low level to the bit line end, and applying a step-shaped square wave voltage pulse with gradually increasing amplitude to the word line end until the memristor is completely reset;

[0027] Then, the selected memristor is set to make it reach a preset conductance value. The set operation includes: applying a fixed high level to the bit line end of the selected memristor, applying a fixed low level to the selection line end, and applying a step-shaped square wave pulse with gradually increasing amplitude to the word line end. After each pulse is applied, a read pulse is applied to check whether the memristor reaches the preset conductance value. If the conductance of the memristor reaches the preset value, the pulse application is stopped.

[0028] In general, compared with the prior art, the above technical solutions conceived by the present invention mainly have the following beneficial effects:

[0029] 1. In the present invention, the parallel-to-serial converter, the data distributor, the first digital-to-analog converter, the first memristor array, and the first analog-to-digital converter can constitute the first part, and the serial-to-parallel converter, the second digital-to-analog converter, the second memristor array, the second transimpedance amplifier, and the second analog-to-digital converter can constitute the second part. The above two parts actually realize the cyclic iterative calculation of the signal flow. The cyclic iterative design is compatible with the iterative calculation in the hidden Markov model forward algorithm. Therefore, when the hidden Markov model forward algorithm needs to be executed, it is only necessary to transpose the state transition matrix of the hidden Markov model. T By mapping to the second memristor array in the form of a conductivity state matrix, mapping the emission matrix B of the hidden Markov model to the first memristor array in the form of a conductivity state matrix, and controlling the word line gating of the first memristor array based on the observation sequence, the hidden Markov model forward algorithm can be implemented through hardware.

[0030] 2. The present invention fully utilizes the parallel computing capability of the memristor array by implementing the forward algorithm of the hidden Markov model on the memristor array. According to the non-volatile characteristics of the memristor, the state transfer matrix and the emission matrix are directly stored in the memristor array in the form of conductance values ​​without the need for additional storage units. The calculation results can be directly read out in the form of current, avoiding the data transfer overhead in the traditional architecture. Compared with the traditional digital circuit-based calculation method, the computational complexity is reduced by O(N), making the classifier more efficient when processing large-scale sequence data.

[0031] 3. The implementation of traditional hidden Markov models depends on the software computing platform and is limited by memory and computing resources. This invention innovatively maps the core parameters of the hidden Markov model (such as the state transfer matrix and the emission matrix) into the conductivity weight matrix of the memristor array, and implements the recursive operation of the forward probability vector through hardware circuits. This design greatly reduces the hardware footprint of the model and provides an efficient and compact implementation for embedded devices and edge computing scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 is a schematic structural diagram of a hidden Markov model forward algorithm classifier based on a memristor array in one embodiment of the present invention;

[0033] Figure 2 is a schematic structural diagram of a memristor array in one embodiment of the present invention;

[0034] Figure 3 is a schematic structural diagram of an array basic unit in an embodiment of the present invention;

[0035] Figure 4 is a schematic diagram of simulated conductance change of a 1T1R memristor under gate voltage regulation in one embodiment of the present invention;

[0036] Figure 5 is a schematic diagram of a conductance weight matrix of a memristor array according to an embodiment of the present invention;

[0037] Figure 6 is a schematic diagram of the hidden Markov model forward algorithm performing calculations in a memristor array;

[0038] Figure 7 is a comparison diagram of the probability of observing a sequence calculated by a memristor array and software in one embodiment;

[0039] Figure 8 It is a comparison diagram between memristor array calculation and software calculation in one embodiment. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0041] For the hidden Markov model, there are N hidden states and M observable values. The state transfer matrix A is an N*N matrix, and the value of each position represents the probability of transferring from one state to another. The emission matrix B is an N*M matrix, and the value of each position represents the probability of a certain observation value in a certain state. The initial state probability π is a vector of length N. Suppose the observation sequence O = (O 1 ,O 2 ,...,O T ), T is the length of the observation sequence, and the hidden Markov model forward algorithm is used to calculate the probability of the observation sequence at a certain time t and the total probability under given model parameters A, B and π.

[0042] The forward algorithm of the hidden Markov model needs to perform an initial forward probability calculation (a Hadamard product) and then perform T-1 forward probability iterations (a matrix-vector multiplication and a Hadamard product) to complete a complete calculation. Finally, a summation calculation is performed.

[0043] First, perform the initial forward probability calculation for t=1, the formula is:

[0044] In the formula, π is the initial probability vector of the input, B(O 1 ) is the index in matrix B is O 1 , is π and B(O 1 )’s Hadamard product, α1 is the required initial forward probability vector for t=1.

[0045] Then perform T-1 forward probability iterations with t=2, 3, …, T, and the formula is:

[0046] In the formula, A T is the transpose of the state transfer matrix A, α t-1 is the forward probability vector of the previous moment, that is, the α calculated in the previous step t-1 , B(O t ) is the index in matrix B is O t The column vector of the transposed matrix A T and the forward probability vector α obtained at time t-1 t-1 The vector obtained after matrix multiplication is then added to the column vector B(O t ) are multiplied to obtain the Hadamard product of the two, and the forward probability vector α obtained at time t is obtained. t .

[0047] Finally, the components of the forward probability vectors of all hidden states at time T are summed to obtain the observation sequence O = (O 1 ,O 2 ,...,O T ) under the hidden Markov model, the formula is:

[0048] In the formula, α T [i] is β T The i-th component of .

[0049] The purpose of the present invention is to implement the above hidden Markov model forward algorithm through hardware structure to improve the calculation rate.

[0050] like Figure 1 The figure shows a schematic diagram of the structure of a hidden Markov model forward algorithm classifier based on a memristor array in an embodiment of the present invention, which includes a first and a second memristor array, a first and a second transimpedance amplifier, a first and a second analog-to-digital converter, a first and a second digital-to-analog converter, a data distributor, a serial-to-parallel converter, and a parallel-to-serial converter. The first and the second analog-to-digital converters are used to realize analog-to-digital conversion, and are abbreviated as ADC in the figure, the first and the second digital-to-analog converters are used to realize digital-to-analog conversion, and are abbreviated as DAC in the figure, and the first and the second transimpedance amplifiers are used to realize the conversion of current into voltage, and are abbreviated as TIA in the figure.

[0051] like Figure 2 FIG. 4 is a schematic diagram of the structure of a memristor array in an embodiment of the present invention. Figure 3FIG. 4 is a schematic diagram showing the structure of an array basic unit in an embodiment of the present invention.

[0052] The basic unit of the array can adopt a 1T1R structure, that is, a non-volatile memristor is connected in series with a switch, and the switch can select a transistor. In the array, the upper electrode of the memristor is connected to the bit line BL for row selection, the lower electrode of the memristor is connected to the drain of the transistor, the gate of the transistor is connected to the word line WL for column selection, and the source of the transistor is connected to the selection line SL. In addition, the upper electrodes of the 1T1R memristor units in the same row are connected to the same bit line BL, the gates of the transistors of the 1T1R memristor units in the same column are connected to the same sub-line WL, and the sources of the transistors of the 1T1R memristor units in the same column are connected to the same selection line SL.

[0053] Among them, the conductance of the memristor is adjustable, and the conductance of the memristor can be regulated (written) by the gate voltage regulation method, specifically: applying a positive fixed voltage to BL, applying a 0V fixed voltage to SL, applying a pulse square wave voltage with a gradually increasing amplitude to WL to gradually set the memristor to a low resistance state, applying a positive fixed voltage to SL, applying a 0V fixed voltage to BL, applying a pulse square wave voltage with a gradually increasing amplitude to WL to gradually reset the memristor to a high resistance state. Figure 4 The figure shows a schematic diagram of the analog conductivity transition of a 1T1R memristor under gate voltage regulation in an embodiment. A relatively linear and symmetrical analog conductivity state transition is achieved on the 1T1R memristor through the gate voltage regulation method, and more than 100 stable conductivity states are achieved. Moreover, each conductivity state of the memristor is continuously read for 10^5s at room temperature, and the conductivity state remains unchanged, indicating that it has good stability.

[0054] In the hidden Markov model forward algorithm classifier, the transimpedance amplifier, analog-to-digital converter (ADC) and digital-to-analog converter (DAC) can be referred to as the signal processing module of the array periphery. The transimpedance amplifier is used to convert the current output by the memristor array into a suitable voltage and convert it into a digital signal through the ADC. The DAC is used to convert the digital signal into a voltage signal and re-input it into the memristor array for matrix calculation. The serial-to-parallel converter, the parallel-to-serial converter and the data distributor can be referred to as the data distribution and selection module. The serial-to-parallel converter is used to convert serial data into parallel data and output it, the parallel-to-serial converter is used to convert parallel data into serial data and output it, and the data distributor is used to select the rows of the memristor array. In a specific embodiment, the serial-to-parallel converter and the parallel-to-serial converter can be implemented by a shift register.

[0055] In the present invention, a hidden Markov model forward algorithm classifier is constructed by using a memristor array, a signal processing module, and a data allocation and selection module to implement the hidden Markov model forward algorithm. In the classifier, the following two structures are actually included:

[0056] Part 1: The parallel-to-serial converter is used to convert the newly received parallel digital signal β p1 ~β pN The data distributor is input serially one by one; the data distributor is used to select only one row of the first memristor array at a time so that the digital signal β p1 ~β pN The digital signal of the input row is converted into a voltage by the first digital-to-analog converter and then input into the bit line of the corresponding row and is calculated by the memristor of the selected column. The selection line of the selected column outputs the serial current I successively. s1 ~I sN ;I s1 ~I sN After being converted into a voltage by the first transimpedance amplifier, it is then converted into a serial digital signal β by the first analog-to-digital converter. s1 ~β sN ;

[0057] Part 2: The serial-to-parallel converter is used to convert the serial digital signal into s1 ~β sN The N rows of the second memristor array are input in parallel at the same time. The digital signal of the input row is converted into a voltage by the second digital-to-analog converter and then input into the bit line of the corresponding row and is calculated by the memristor of the selected column. The selection line of the selected column simultaneously outputs the parallel current I p1 ~I pN ;I p1 ~I pN After being converted into a voltage by the second transimpedance amplifier, it is then converted into a parallel digital signal β by the second analog-to-digital converter. p1 ~β pN And input the parallel-to-serial converter at the next moment.

[0058] It can be seen that the above two parts actually realize the cyclic iterative calculation of the signal flow. The cyclic iterative design is compatible with the iterative calculation in the forward algorithm of the hidden Markov model. Therefore, when the forward algorithm of the hidden Markov model needs to be executed, it is only necessary to transpose the state transition matrix of the hidden Markov model. T By mapping the hidden Markov model to the second memristor array in the form of a conductivity state matrix, mapping the emission matrix B of the hidden Markov model to the first memristor array in the form of a conductivity state matrix, and controlling the word line gating of the first memristor array based on the observation sequence, the hidden Markov model forward algorithm can be implemented through hardware. Compared with the traditional digital circuit-based calculation method, the computational complexity is reduced by O(N), making the classifier more efficient when processing large-scale sequence data, and the recursive operation of the forward probability vector is realized through hardware circuits. This design greatly reduces the hardware footprint of the model and provides an efficient and compact implementation method for embedded devices and edge computing scenarios.

[0059] In one embodiment, the classifier further includes a data selector located between the first analog-to-digital converter and the serial-to-parallel converter, and the data selector is used to select only the selection line corresponding to the selected column of the first memristor array at a time. In this way, adding the data selector can ensure that only the output result of the selected column of the first memristor array is transmitted to the serial-to-parallel converter, thereby ensuring the accuracy of data flow.

[0060] In one embodiment, the classifier further includes a writing module for mapping the transposed matrix of the state transfer matrix in the forward algorithm to the second memristor array in the form of a conductivity state matrix, and mapping the emission matrix B in the forward algorithm to the first memristor array in the form of a conductivity state matrix. Based on the writing module, the parameters in the memristor array can be updated as needed to adapt to different hidden Markov models.

[0061] In one embodiment, a memristor with a TiN / Ti / HfOx / TiN structure is selected, and the transistor width may be 6um to 70um, and the length may be 300nm to 400nm.

[0062] The present invention also provides a method for controlling a hidden Markov model forward algorithm classifier based on a memristor array, so as to implement a hidden Markov model forward algorithm based on the classifier, and the method comprises:

[0063] At the same time, the 1st to Nth columns of the second memristor array are selected; the second memristor array stores the transposed matrix of the N*N state transfer matrix in the forward algorithm in the form of a conductance matrix;

[0064] The first memristor array is column-selected according to the observation sequence O=(O1, O2, ..., OT), Ot is the t-th observation component, T is the total number of moments, and the Ot-th column is selected at the t-th moment; the first memristor array stores the N*M emission matrix in the forward algorithm in the form of a conductance matrix;

[0065] At the time t=1, the voltage vector components converted from the initial state probability π are serially input to the 1st to Nth bit lines of the first memristor array one by one; at the time t=2, 3, ..., T, the parallel-to-serial converter and the data distributor are controlled to convert the digital signal β received at each time t p1 ~β pN The first memristor array is inputted into the 1st to Nth rows one by one and converted into voltage by the first digital-to-analog converter and then inputted into the 1st to Nth bit lines one by one. At each moment, the memristor in the Otth column performs calculations one by one and outputs the serial current I on the selection line of the column one by one. s1 ~I sN , I s1 ~I sN After being converted into a voltage by the first transimpedance amplifier, it is then converted into a serial digital signal β by the first analog-to-digital converter.s1 ~β sN ;

[0066] Control the serial-to-parallel converter to convert the β obtained at each moment t s1 ~β sN The 1st to Nth rows of the second memristor array are input simultaneously in parallel, β s1 ~β sN After being converted into voltage by the second digital-to-analog converter, it is simultaneously input into the 1st to Nth bit lines of the second memristor array, so that the memristors in the 1st to Nth columns simultaneously perform calculations and simultaneously output parallel currents I on the selection lines in the 1st to Nth columns. p1 ~I pN ;I p1 ~I pN After being converted into a voltage by the second transimpedance amplifier, it is then converted into a parallel digital signal β by the second analog-to-digital converter. p1 ~β pN And input the parallel-to-serial converter at the next time t+1;

[0067] The N voltages serially output by the first transimpedance amplifier at time T are summed to output the observation sequence O=(O 1 ,O 2 ,...,O T ) under the hidden Markov model.

[0068] The following is a detailed description of the operation process.

[0069] Preparation: Transpose the N*N state transition matrix A of the hidden Markov model T The N*M emission matrix B of the hidden Markov model is mapped to the first memristor array in the form of a conductivity state matrix.

[0070] Among them, matrix A and matrix B are model parameters determined through training. The classifier designed by the present invention determines the model parameters through training in the training stage, and then maps the model parameters to the classifier designed by the present invention, and uses the classifier to predict the probability of the input observation sequence.

[0071] Specifically, the operations performed in the training phase include: first preparing the training data to ensure that the observations of the sequence come from a fixed set; then initializing the model parameters, including the initial state distribution π, the state transition matrix A, and the emission matrix B; then using the Baum-Welch algorithm to train the model, calculating the expected value through the forward-backward algorithm, and iteratively updating the parameters until convergence. Finally, verify the model performance and save the trained model parameters (i.e., the final matrix A and matrix B) for subsequent applications.

[0072] When writing a matrix, the matrix parameters can be mapped to the memristor array by a gate voltage control method. Taking mapping an element in the matrix to a selected memristor in the array as an example, the matrix gate voltage control method includes the following steps S01-S02.

[0073] Step S01: performing a reset operation on the selected memristor.

[0074] The reset operation includes: applying a fixed high level to the SL terminal of the selected memristor, applying a fixed low level to the BL terminal, and applying a stepped square wave voltage pulse with gradually increasing amplitude to the WL terminal until the memristor is completely reset.

[0075] Specifically, a fixed voltage of 1.4V is applied to the SL end of the selected memristor, a fixed voltage of 0V is applied to the BL end, and a stepped square wave voltage pulse with gradually increasing amplitude is applied to the WL end. The initial amplitude of the voltage signal is 0.4V, and it gradually increases in steps of 0.01V until it reaches 3.3V. The pulse width is 100NS, and 290 consecutive step pulses are applied to completely reset the memristor.

[0076] Step S02: performing a setting operation on the selected memristor to make it reach a preset conductance value.

[0077] The set operation includes: applying a fixed high level to the BL end of the selected memristor, applying a fixed low level to the SL end, and applying a step-shaped square wave pulse with gradually increasing amplitude to the WL end. After each pulse is applied, a read pulse is applied to check whether the memristor reaches the preset conductance value. If the conductance of the memristor reaches the preset value, stop applying the pulse.

[0078] Specifically, a fixed voltage of 1.0V is applied to the BL end of the selected memristor, a fixed voltage of 0V is applied to the SL end, and a stepped square wave pulse with gradually increasing amplitude is applied to the WL end. The initial pulse of the voltage signal is 0.7V, and gradually increases with a step size of 0.001V until it reaches 1.5V. The pulse width is 100NS. A read pulse is applied after each pulse is applied to check whether the memristor reaches the preset conductance value. If the conductance of the memristor reaches the preset value, the pulse application is stopped.

[0079] If the memristor is operated for the first time, an activation operation needs to be performed before step S01.

[0080] The activation operation includes: fixing a high level at the BL end of the selected memristor, applying a fixed low level to the SL end, and applying a square wave pulse to the WL end to activate the memristor. A read pulse is applied after each activation pulse to verify whether the memristor is activated successfully. The upper limit of the number of activation pulses is set to 40. The SL and BL corresponding to the unselected memristor unit are both floating.

[0081] Specifically, a fixed voltage of 2.8V is applied to the BL end of the selected memristor, a fixed voltage of 0V is applied to the SL end, and a square wave pulse with an amplitude of 1.5V and a pulse width of 100NS is applied to the WL end to form the memristor. A read pulse is applied after each forming pulse to verify whether the memristor is formed successfully. The upper limit of the forming pulse is set to 40. The SL and BL corresponding to the unselected memristor unit are both floating.

[0082] When performing a read operation, a fixed voltage of 0.1V can be applied to the SL end of the selected memristor, a fixed voltage of 0V can be applied to the BL end, and a square wave voltage pulse with an amplitude of 3.3V and a pulse width of 100NS can be applied to the WL end. The conductance of the memristor can be calculated by detecting the current of SL.

[0083] Furthermore, after the conductance mapping is performed on the memristors at all positions, a post-verification may be performed by applying a read pulse to the memristors at all positions to determine the conductance mapping accuracy.

[0084] The transposed matrix A of the state transfer matrix of a hidden Markov model obtained through training T After the emission matrix B is written into the memristor array in the form of a conductance weight matrix, its conductance weight matrix is ​​as follows: Figure 5 As shown, the normalized mean square error (NMSE) with the target model matrix is ​​4.73%, indicating that the writing accuracy is very high.

[0085] After the matrix parameters of the model are mapped to the memristor array in the classifier by the above method, the classifier can be started to perform forward operations. The operations include word line control of the second memristor array, word line control of the first memristor array, initial bit line control of the first memristor array, data distributor, serial-to-parallel converter and parallel-to-serial converter.

[0086] The word line control of the second memristor array includes: during the entire operation period, simultaneously selecting the 1st to Nth columns of the second memristor array, and implementing A in the hidden Markov forward algorithm through the second memristor array T α t-1 Matrix multiplication operation.

[0087] The word line control of the first memristor array includes: performing column gating on the first memristor array according to an observation sequence O=(O1, O2, . . . , OT), and gating the Ot-th column at the t-th time.

[0088] The initial bit line control of the first memristor array includes: at time t=1, inputting the voltage vector components converted from the initial state probability π to the 1st to Nth bit lines of the first memristor array in series.

[0089] The control of the parallel-to-serial converter and the data distributor includes controlling the parallel-to-serial converter and the data distributor to convert the digital signal β received at each time t into p1 ~β pN The 1st to Nth rows of the first memristor array are inputted sequentially and converted into voltages by the first digital-to-analog converter, and then are inputted sequentially to the 1st to Nth bit lines.

[0090] At each time t, after the bit line of the first memristor array receives the voltage, the memristors in the Otth column perform calculations one by one and output serial currents I on the selection lines of the column one by one. s1 ~I sN , I s1 ~I sN After being converted into a voltage by the first transimpedance amplifier, it is then converted into a serial digital signal β by the first analog-to-digital converter. s1 ~β sN .

[0091] The control of the serial-to-parallel converter includes: at each time t, the β obtained at this time s1 ~β sN The 1st to Nth rows of the second memristor array are input simultaneously in parallel, β s1 ~β sN After being converted into voltage by the second digital-to-analog converter, it is simultaneously input into the 1st to Nth bit lines of the second memristor array. At each time t, after the bit lines of the second memristor array receive the voltage, the memristors in the 1st to Nth columns simultaneously perform calculations and simultaneously output parallel currents I on the selection lines in the 1st to Nth columns. p1 ~I pN ;I p1 ~I pN After being converted into a voltage by the second transimpedance amplifier, it is then converted into a parallel digital signal β by the second analog-to-digital converter. p1 ~β pN And input the parallel-to-serial converter at the next time t+1.

[0092] Through the above operations, the initial forward probability calculation and the forward probability iterative calculation in the hidden Markov forward algorithm can be realized. Finally, the N voltages serially output by the first transimpedance amplifier at the Tth moment are summed up to obtain the observation sequence O=(O 1 ,O 2 ,...,O T )’s total probability.

[0093] like Figure 6 The figure shows the schematic diagram of the hidden Markov model forward algorithm performing calculations in the memristor array, combined with Figure 6 Further explanation of the operation of the classifier and its working:

[0094] (1) At time t=1, the initial state probability π of the hidden Markov model is converted into a voltage vector and input one by one to each BL end of the first memristor array mapped by the emission matrix B. When each π component is applied to the corresponding BL end, at the first observation value O 1 The corresponding WL O1 Apply a square wave pulse with an amplitude of 3.3V and a pulse width of 100NS to select the observation value O 1 The column of the index, the column selection line SL O1 The π component is gradually applied to the corresponding BL terminal and then applied to the WL terminal. O1 Apply synchronization pulse, WL O1 The memristors of the column calculate successively and output the serial current I successively on the selection line of the column s1 ~I sN , I s1 ~I sN After being converted into a serial voltage by TIA, the serial voltage is Hadamard product of the hidden Markov model to achieve the initial forward probability calculation of the forward algorithm

[0095] (2) TIA output serial voltage α 1 The serial digital signal β is obtained after ADC processing s1 ~β sN The serial data is then converted into parallel data by a serial-to-parallel converter and then converted by a DAC and input into the transposed matrix A of the state transfer matrix in parallel. T The corresponding BL end of the second memristor array is mapped to all A T A square wave pulse with an amplitude of 3.3V and a pulse width of 100NS is applied to the WL end of the corresponding memristor array to select all A T The corresponding memristor array column, all SL terminals output current I in parallel p1 ~I pN , I s1 ~I sN The parallel voltage is converted into a parallel voltage by TIA, and the parallel voltage is A T α 1 The matrix product of

[0096] (3) Parallel output A T α 1 , and the parallel digital signal β is obtained after ADC processing p1 ~β pN , and input the parallel-to-serial converter at time t=2, convert the parallel data into serial data through the parallel-to-serial converter, and then gradually input the voltage signal to each BL end of the second memristor array mapped by the transmission matrix B through the data distributor. When each voltage value is applied to the corresponding BL end, the second observation value O2 The corresponding WL O2 Apply a square wave pulse with an amplitude of 3.3V and a pulse width of 100NS to select the observation value O 2 Indexed columns, SL O2 Output serial current I s1 ~I sN , by gradually putting A T α 1 The component is applied to the corresponding BL terminal and O2 Apply synchronization pulse, WL O2 The memristors of the column calculate successively and output the serial current I successively on the selection line of the column s1 ~I sN , I s1 ~I sN After being converted into a serial voltage by TIA, the serial voltage is Hadamard product of the hidden Markov model forward algorithm to achieve the second forward probability calculation

[0097] (4) Iterate in the same way as steps (2) and (3). For the observation sequence O=(O 1 ,O 2 ,...,O T ), and then calculate α through the above process t until all observed values ​​O 1 ,O 2 ,...,O T The corresponding forward probability α t Until all are calculated, in each operation, the forward probability α output from the previous step is used t-1 The transposed matrix A of the state transition matrix T A matrix-vector multiplication operation is performed in the mapped memristor array, and a column-vector Hadamard product operation is performed in the memristor array mapped by the emission matrix B based on the current observation value.

[0098] (5) Based on step (4), the forward probability vector α at time T is obtained recursively T , α T Sum all components and we get the observation sequence O = (O 1 ,O 2 ,...,O T ) under a given hidden Markov model

[0099] The effects of the present invention are verified as follows.

[0100] Based on 5 sets of speech data, 5 sets of observation sequence data are obtained through feature extraction and vector quantization, and 5 hidden Markov models are obtained through training of 5 sets of observation sequence data. The training process is as follows: initialize the model parameters, including the initial state distribution π, the state transfer matrix A and the emission matrix B, then use the Baum-Welch algorithm to train the model, calculate the expected value through the forward-backward algorithm, and iteratively update the parameters until convergence.

[0101] The five hidden Markov models are mapped to the memristor arrays respectively, and the calculation process from step (1) to step (5) is performed on the 150 observation sequences in the test set in the memristor arrays corresponding to all the five hidden Markov models. For each observation sequence, the maximum probability calculated in the five models is selected as the classification result of the sequence. The classification result is compared with the true label of the test set, and the classification accuracy is calculated. The accuracy is 94%.

[0102] The same forward algorithm is executed by the CPU and by the memristor array, respectively, and the two methods are compared.

[0103] like Figure 7 The figure shows a comparison diagram of the probability of the observed sequence calculated by the memristor array and the software in one embodiment, from which it can be seen that the probability of the test set speech signal from the first group under model 1 obtained by executing the forward algorithm on the memristor array is much greater than the probability of other models, and the speech signal is successfully recognized.

[0104] like Figure 8 The figure shows a comparison between the calculation of the memristor array and the calculation of the software in an embodiment. It can be seen that the time complexity of executing the forward algorithm in the memristor array is increased from O(NT 2 ) is reduced to O(NT), computing power consumption is reduced by 6 orders of magnitude, and computing time is reduced by about 20 times.

[0105] In general, the present invention maps the transposition (AT) and emission matrix (B) of the state transfer matrix of the hidden Markov model to the memristor array in the form of a conductivity weight matrix, and realizes the multiplication calculation of the matrix and the vector by applying a voltage signal in the form of an input vector, combined with the conductivity characteristics of the memristor array, and generates an intermediate hidden state probability vector. In the memristor array mapped by the emission matrix, the intermediate hidden state probability vector and the observation probability vector are multiplied element by element (Hadamard product) to realize the weighted update of the observation value and complete the forward probability calculation. Each iteration result passes through a transimpedance amplifier, and the result is normalized to avoid numerical overflow and precision loss. According to the forward probability vector obtained by the final iteration of the forward algorithm, the hidden Markov model state category most likely corresponding to the observation sequence is determined by probability comparison to realize the classification function. The present invention realizes the forward algorithm of the hidden Markov model on the memristor array, makes full use of the parallel computing capability of the memristor array, and reduces the computational complexity of the traditional digital circuit-based calculation method by O (N), so that the classifier has higher efficiency when processing large-scale sequence data. The present invention innovatively maps the core parameters of the hidden Markov model (such as the state transfer matrix and the emission matrix) into the conductivity weight matrix of the memristor array, and implements the recursive operation of the forward probability vector through hardware circuits. This design greatly reduces the hardware footprint of the model and provides an efficient and compact implementation method for embedded devices and edge computing scenarios.

[0106] The technical features of the above-mentioned embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification. It should be noted that "in one embodiment", "for example", "for example", etc. of the present invention are intended to illustrate the present invention, rather than to limit the present invention.

[0107] The above-mentioned embodiments only express several implementation methods of the present invention, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent application. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention.

Claims

1. A hidden Markov model forward algorithm classifier based on a memristor array, characterized in that: include: First and second memristor arrays, first and second transimpedance amplifiers, first and second analog-to-digital converters, first and second digital-to-analog converters, a data distributor, a serial-to-parallel converter, and a parallel-to-serial converter; The basic unit of each memristor array includes a non-volatile memristor and a switch connected in series, the conductance of the memristor is adjustable, the switch control end of the basic unit in the same column is connected to the same word line, the input end of the basic unit in the same row is connected to the same bit line, and the output end of the basic unit in the same column is connected to the same selection line; The parallel-to-serial converter is used to convert the newly received parallel digital signal β p1 ~β pN The data distributor is input in series one by one; the data distributor is used to select only one row of the first memristor array at a time so that the digital signal β p1 ~β pN The digital signal of the input row is converted into a voltage by the first digital-to-analog converter and then input into the bit line of the corresponding row and is calculated by the memristor of the selected column. The selection line of the selected column outputs the serial current I successively. s1 ~I sN ;I s1 ~I sN After being converted into a voltage by the first transimpedance amplifier, it is then converted into a serial digital signal β by the first analog-to-digital converter. s1 ~β sN ; The serial-to-parallel converter is used to convert the serial digital signal β s1 ~β sN The N rows of the second memristor array are input in parallel at the same time. The digital signal of the input row is converted into a voltage by the second digital-to-analog converter and then input into the bit line of the corresponding row and is calculated by the memristor of the selected column. The selection line of the selected column simultaneously outputs the parallel current I p1 ~I pN ;I p1 ~I pN After being converted into a voltage by the second transimpedance amplifier, it is then converted into a new parallel digital signal β by the second analog-to-digital converter. p1 ~β pN and input into the parallel-to-serial converter.

2. The memristor array-based hidden Markov model forward algorithm classifier according to claim 1, characterized in that: The classifier further includes a data selector located between the first analog-to-digital converter and the serial-to-parallel converter, and the data selector is used to enable only a selection line corresponding to a selected column of the first memristor array at a time.

3. The memristor array-based hidden Markov model forward algorithm classifier according to claim 1, characterized in that: The serial-to-parallel converter and the parallel-to-serial converter are both shift registers.

4. The memristor array-based hidden Markov model forward algorithm classifier according to claim 1, characterized in that: The classifier also includes a writing module for mapping the transposed matrix of the state transfer matrix in the forward algorithm into the second memristor array in the form of a conductivity state matrix, and mapping the emission matrix B in the forward algorithm into the first memristor array in the form of a conductivity state matrix.

5. The memristor array-based hidden Markov model forward algorithm classifier according to claim 1, characterized in that: The classifier also includes a first timing control module, a second timing control module and a first address control module; The first timing control module is used to control the parallel-to-serial converter to convert the newly received parallel digital signal β p1 ~β pN inputting the data distributor one by one in a serial manner; The first address control module is used to control the data distributor to successively select N rows of the first memristor array so that β p1 ~β pN Input to the selected row of the array one by one; The second timing control module is used to control the serial-to-parallel converter to convert the serial digital signal β s1 ~β sN The N rows of the second memristor array are input simultaneously in parallel.

6. The memristor array-based hidden Markov model forward algorithm classifier according to claim 1, characterized in that: The memristor used is a memristor with a TiN / Ti / HfOx / TiN stacked structure.

7. The memristor array-based hidden Markov model forward algorithm classifier according to claim 1, characterized in that: The switches used are transistors.

8. A method for controlling a hidden Markov model forward algorithm classifier based on a memristor array as claimed in any one of claims 1 to 7, characterized in that: include: Simultaneously enable the 1st to Nth columns of the second memristor array; The second memristor array stores the transposed matrix of the N*N state transfer matrix in the forward algorithm in the form of a conductance matrix; The first memristor array is column-selected according to the observation sequence O=(O1, O2, ..., OT), Ot is the t-th observation component, T is the total number of moments, and the Ot-th column is selected at the t-th moment; the first memristor array stores the N*M emission matrix in the forward algorithm in the form of a conductance matrix; At the time t=1, the voltage vector components converted from the initial state probability π are serially input to the 1st to Nth bit lines of the first memristor array one by one; at the time t=2, 3, ..., T, the parallel-to-serial converter and the data distributor are controlled to convert the digital signal β received at each time t p1 ~β pN The first to N rows of the first memristor array are inputted one by one and converted into voltages by a first digital-to-analog converter and then inputted to the first to N bit lines one by one; At each moment, the memristors in the Otth column perform calculations one by one and output serial currents I on the selection lines of the column one by one. s1 ~I sN , I s1 ~I sN After being converted into a voltage by the first transimpedance amplifier, it is then converted into a serial digital signal β by the first analog-to-digital converter. s1 ~β sN ; Control the serial-to-parallel converter to convert the β obtained at each moment t s1 ~β sN The 1st to Nth rows of the second memristor array are input simultaneously in parallel, β s1 ~β sN After being converted into voltage by the second digital-to-analog converter, it is simultaneously input into the 1st to Nth bit lines of the second memristor array, so that the memristors in the 1st to Nth columns simultaneously perform calculations and simultaneously output parallel currents I on the selection lines in the 1st to Nth columns. p1 ~I pN ;I p1 ~I pN After being converted into a voltage by the second transimpedance amplifier, it is then converted into a parallel digital signal β by the second analog-to-digital converter. p1 ~β pN And input the parallel-to-serial converter at the next time t+1; The N voltages serially output by the first transimpedance amplifier at time T are summed to output the observation sequence O = (O1, O2, ..., O T ) under the hidden Markov model.

9. The control method according to claim 8, characterized in that: Also includes: The transposed matrix of the state transfer matrix is ​​mapped to the second memristor array in the form of a conductivity state matrix, and the emission matrix B is mapped to the first memristor array in the form of a conductivity state matrix.

10. The control method according to claim 9, characterized in that: The process of mapping any element of the matrix to a selected memristor in the form of a conductance state includes: First, a reset operation is performed on the selected memristor, and the reset operation includes: applying a fixed high level to the selection line end of the selected memristor, applying a fixed low level to the bit line end, and applying a step-shaped square wave voltage pulse with gradually increasing amplitude to the word line end until the memristor is completely reset; Then, the selected memristor is set to make it reach a preset conductance value. The set operation includes: applying a fixed high level to the bit line end of the selected memristor, applying a fixed low level to the selection line end, and applying a step-shaped square wave pulse with gradually increasing amplitude to the word line end. After each pulse is applied, a read pulse is applied to check whether the memristor reaches the preset conductance value. If the conductance of the memristor reaches the preset value, the pulse application is stopped.

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