Method and device for rapidly detecting hard disk backboard access, computer equipment and storage medium
Through the controller, the test signal is directly sent to the hard disk backplane and the detection results are compared, which solves the problems of long test cycles and difficult problem positioning in the existing technology, and achieves rapid detection and simplified problem positioning, improving production efficiency and detection accuracy.
Patent Information
- Application Number
- CN202510202999.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-24
- Publication Date
- 2025-06-10
AI Technical Summary
The existing server backplane testing methods have problems such as long test cycles and difficult problem positioning, resulting in low production efficiency and increased costs.
The controller directly sends a test signal to the hard disk backplane, generates a test result, and compares it with the expected set result, quickly determines whether the hard disk backplane function is normal, and records an error log for problem location.
Shorten the test cycle, simplify the problem positioning process, improve production efficiency and inspection accuracy, and reduce production and maintenance costs.
Smart Images

Figure CN120126539A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to hard disk backplane detection technology, and more specifically to a method, device, computer equipment and storage medium for rapid detection of hard disk backplane access. Background Art
[0002] With the rapid development of information technology, the stability and reliability of servers as core equipment for data storage, processing and transmission are crucial to ensure business continuity. As a key component connecting various components inside the server (such as CPU, memory, hard disk, network interface card, etc.), the performance and compatibility of the server backplane are directly related to the overall operating efficiency and quality of the server. Therefore, strict and comprehensive functional testing of the server backplane is an indispensable part of the production process.
[0003] At present, the server backplane testing method commonly used in the industry relies on full-function testing after the whole machine is assembled. Although this test mode can more realistically simulate the working state of the server in the actual application environment, it also exposes a series of problems, as follows:
[0004] Difficulty in problem location: When an abnormality occurs during the whole machine test, due to the high complexity of the system and the interaction of multiple hardware and software modules, it becomes extremely difficult to accurately and quickly locate the source of the problem - especially backplane-related problems. This often requires testers to have deep professional knowledge in hardware design, system architecture, and fault diagnosis, which increases labor and time costs.
[0005] Long test cycle: Full-function testing usually requires the server to complete the entire startup process, including a series of initialization steps such as BIOS self-test and operating system loading, which takes a long time. Especially in a large-scale production environment, each server needs to go through such a test process, which significantly prolongs the production cycle and reduces production efficiency.
[0006] Impact on production efficiency: Due to the long test cycle and complex problem location, the servers on the production line cannot pass the test in time and enter the next process, which in turn affects the overall production progress and delivery capabilities. In the fiercely competitive market environment, this is directly related to the company's production efficiency and customer satisfaction.
[0007] In summary, although the existing server backplane testing methods have ensured the comprehensiveness and authenticity of the test to a certain extent, their inherent problems such as long testing cycle and difficulty in problem location have become key factors restricting the improvement of server production efficiency. Therefore, developing a new server backplane testing method that can shorten the testing cycle, simplify the problem location process, and ensure the accuracy of the test is of great significance to improving server production efficiency and reducing costs. Summary of the invention
[0008] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a method, device, equipment and medium for quickly detecting hard disk backplane access.
[0009] In order to solve the above technical problems, the present invention adopts the following technical solutions:
[0010] In a first aspect, a method for quickly detecting a hard disk backplane path is provided, comprising:
[0011] The controller sends a test signal to the hard disk backplane for detecting the hard disk backplane and generates a detection result;
[0012] The controller obtains the test result fed back by the hard disk backplane;
[0013] Determine whether the test results meet the expected set results;
[0014] If the test results meet the expected set results, the test passes and a test log is generated.
[0015] In a second aspect, a device for quickly detecting a hard disk backplane path is provided, comprising:
[0016] A sending detection generating unit is used for the controller to send a test signal to the hard disk backplane for detecting the hard disk backplane and generating a detection result;
[0017] An acquisition unit is used for the controller to acquire the detection result fed back by the hard disk backplane;
[0018] A judgment unit, used to judge whether the detection result meets the expected setting result;
[0019] The generation unit is used to generate a test log if the test result meets the expected setting result, then the test passes.
[0020] In a third aspect, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned method for rapidly detecting hard disk backplane access when executing the computer program.
[0021] In a fourth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for quickly detecting hard disk backplane access are implemented.
[0022] The above-mentioned method for quickly detecting the hard disk backplane path directly sends a test signal to the hard disk backplane through the controller, eliminating the process of whole machine startup and complex system interaction in the traditional method, thereby greatly shortening the test cycle. This improvement enables the hard disk backplane on the production line to complete the test in a shorter time, speeding up the production rhythm and improving the overall production efficiency. In addition, in the traditional testing method, when an abnormality occurs in the whole machine test, problem locating is often time-consuming and laborious and requires deep professional knowledge. The present invention can directly obtain the test results fed back by the hard disk backplane through the controller, and quickly determine whether the hard disk backplane function is normal by comparing with the expected setting results. If the test fails, the controller will record an error log. The log information is clear and helps testers to quickly locate the position of the abnormal circuit, greatly simplifying the problem locating process.
[0023] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.
[0025] Figure 1 A schematic flow chart of a method for quickly detecting hard disk backplane access provided by an embodiment of the present invention;
[0026] Figure 2 A schematic diagram of an application scenario of the method for quickly detecting hard disk backplane access provided by an embodiment of the present invention;
[0027] Figure 3 A schematic diagram of an application scenario when the hard disk backplane path detection provided by an embodiment of the present invention is in a normal test;
[0028] Figure 4 A schematic diagram of an application scenario of a hard disk backplane path detection provided by an embodiment of the present invention when the hard disk backplane path detection is in a test open circuit;
[0029] Figure 5 A schematic diagram of an application scenario of a hard disk backplane path detection provided by an embodiment of the present invention when the hard disk backplane path detection is in a test short circuit;
[0030] Figure 6 A schematic block diagram of a device for quickly detecting hard disk backplane access provided by an embodiment of the present invention;
[0031] Figure 7 It is a schematic diagram of the structure of a computer device in an embodiment of the present invention. DETAILED DESCRIPTION
[0032] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0033] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.
[0034] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.
[0035] It should be further understood that the term "and / or" used in the present description and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.
[0036] See also Figures 1 to 5 In the specific embodiment shown, the present invention discloses a method for quickly detecting hard disk backplane access, comprising the following steps:
[0037] S110, the controller sends a test signal to the hard disk backplane for detecting the hard disk backplane, and generates a detection result;
[0038] Specifically, first, the controller is initialized and set to ensure that it is in normal working state. This includes configuring the communication parameters of the controller, such as baud rate, data bit, stop bit, etc., to ensure unimpeded communication with the hard disk backplane. The controller sends a test signal to the hard disk backplane through a preset communication interface (such as SATA, SAS, MCIO, PCI e, etc.). These test signals can be specific instruction sequences or data patterns, which are intended to activate various paths on the hard disk backplane and trigger corresponding responses. After receiving the test signal, the hard disk backplane will process the signal according to the logical relationship of the internal circuit and send a response signal to the controller through the same communication interface. These response signals contain status information of each path of the hard disk backplane, such as whether the path is conductive, signal attenuation, etc. The controller receives and analyzes the response signal sent by the hard disk backplane, evaluates the functional status of the hard disk backplane according to the preset judgment criteria, and finally generates a test result. The test result may include information such as the on / off status of each path of the hard disk backplane and the signal quality level.
[0039] By implementing the above controller to send a test signal to the hard disk backplane for hard disk backplane detection and generate a detection result, this technical feature brings the following technical effects:
[0040] Efficient detection: By sending a test signal to the hard disk backplane through the controller and receiving a response signal, each path of the hard disk backplane can be quickly detected. This method avoids the process of whole machine startup and complex system interaction in traditional methods, thus significantly improving the detection efficiency.
[0041] Accurate judgment: The controller analyzes and evaluates the response signal according to the preset judgment criteria, and can accurately judge the functional status of each channel of the hard disk backplane. This precise judgment ability helps to discover potential problems in time and provide a reliable basis for subsequent maintenance or replacement work.
[0042] High flexibility: This method is applicable to different types of hard disk backplane detection, and only needs to be configured according to the communication interface and protocol of the hard disk backplane. This flexibility enables this method to be widely used in various servers and storage devices to meet the detection needs in different scenarios.
[0043] Easy to integrate: As the core component of the detection system, the controller is relatively independent in design and implementation, and is easy to integrate with other detection modules or systems. This integration helps to build a more complete hard disk backplane detection system and improve the overall detection capability and efficiency.
[0044] S120, the controller obtains the detection result fed back by the hard disk backplane;
[0045] Specifically, after receiving the test request, the hard disk backplane will perform the corresponding detection operation and generate the test result. Then, the hard disk backplane sends the test result to the controller in the form of a feedback signal through the previously established communication connection. This feedback signal contains the status information of each channel of the hard disk backplane, such as the on / off status, signal quality, etc. After receiving the feedback signal, the controller will parse and process it. This includes extracting key information from the test result, such as channel status, error code, etc., and evaluating the test result according to the preset judgment criteria.
[0046] By implementing the above controller to obtain the test results fed back by the hard disk backplane, this technical feature brings the following technical effects:
[0047] Real-time feedback: The controller obtains the test results of the hard disk backplane in real time, and can immediately understand the working status and performance of the hard disk backplane. This real-time nature helps to promptly discover and deal with potential problems and avoid further expansion of faults.
[0048] Accurate evaluation: The controller can accurately analyze and process the test results fed back by the hard disk backplane, thereby achieving accurate evaluation of the hard disk backplane function and performance. This accuracy helps to ensure the reliability of the test results and provide strong support for subsequent decision-making and maintenance work.
[0049] Automated testing: The process of the controller obtaining the test results is automated, without human intervention. This reduces human errors in the testing process and improves testing efficiency and accuracy. At the same time, automated testing also helps to meet the rapid testing needs of large-scale production lines.
[0050] Easy to integrate and maintain: As the core component of the detection system, the controller is relatively independent in design and implementation, and is easy to integrate with other detection modules or systems. This integration helps to build a more complete hard disk backplane detection system and facilitates subsequent maintenance and upgrades.
[0051] S130, determining whether the detection result meets the expected setting result;
[0052] Specifically, before the test begins, a series of expected results are set according to the technical specifications and performance requirements of the hard disk backplane. These expected results may include the path conduction status, signal quality indicators, response time, etc. These set values should accurately reflect the performance of the hard disk backplane under normal working conditions. The controller compares the received test results with the preset expected results one by one. This step usually involves data parsing, conversion and comparison operations. Through comparison, it can be determined whether the performance of the hard disk backplane in the actual test meets expectations. Based on the comparison results, the controller generates a judgment result. If the test results meet the expected set results, the test is judged to have passed; if the test results are significantly different from the expectations, the test is judged to have failed and further inspection or repair may be required.
[0053] By implementing the above-mentioned judgment on whether the test results meet the expected set results, this technical feature brings the following technical effects:
[0054] Ensure detection accuracy: By comparing the detection results with the expected set results, the accuracy of the detection can be ensured. This comparison method helps to reduce wrong decisions caused by misjudgment or missed judgment and improve the credibility of the detection.
[0055] Improve detection efficiency: Automating the comparison and judgment process can significantly improve detection efficiency. The controller can process a large amount of data in a short time and quickly generate judgment results, thereby speeding up the detection process.
[0056] Reduce human error: Compared with manual judgment, the automated comparison and judgment process reduces human intervention and reduces the risk of human error. This helps ensure the objectivity and consistency of the test results.
[0057] Convenient for subsequent processing: Based on the judgment results, it can be quickly determined whether further inspection or maintenance is required. This clear judgment result helps guide subsequent processing and improves overall inspection and maintenance efficiency.
[0058] Support customized requirements: This implementation also supports customization of expected setting results according to specific requirements. This enables the detection method to be flexibly applied to the detection of hard disk backplanes of different models and specifications, improving the applicability and flexibility of the detection.
[0059] S140: If the test result meets the expected setting result, the test passes and a test log is generated.
[0060] Specifically, when the test is judged to be passed, the controller automatically generates a test log. The test log usually contains key information such as test time, test environment, test parameters, test results, and judgment results. This information helps to trace the test process, analyze test data, and provide important reference for subsequent decision-making and maintenance work. The generated test log will be stored in the specified database or file system for subsequent review and analysis. At the same time, in order to ensure the security of data, the test log can also be backed up to prevent data loss or damage.
[0061] By implementing the above-mentioned judgment on whether the test results meet the expected set results, this technical feature brings the following technical effects:
[0062] Automated judgment and recording: Through the automated comparison and judgment process, as well as the function of automatically generating test logs, the automation and efficiency of the detection process can be significantly improved. This helps to reduce manual intervention, reduce the risk of human error, and ensure the objectivity and consistency of test results.
[0063] Easy to trace and analyze: The generated test log contains rich test information, which helps to trace the test process, analyze test data, and identify potential problems or improvement points. This is of great significance for improving product quality and optimizing production processes.
[0064] Support decision-making and maintenance: The test log provides an important reference for subsequent decision-making and maintenance work. By consulting the test log, you can quickly understand the working status and performance of the hard disk backplane, providing a basis for formulating targeted maintenance plans or upgrade plans.
[0065] Improve data security: By storing and backing up test logs, data security and integrity can be ensured. This helps prevent data loss or corruption and ensures the reliability and traceability of test results.
[0066] In one embodiment, after the step of determining whether the test result meets the expected setting result, the method further includes: S150, if the test result does not meet the expected setting result, the test fails, an error alarm is issued, and a test abnormality log is generated.
[0067] Specifically, once the test is determined to have failed, the controller immediately triggers the error alarm mechanism. This can be achieved through audio and video alarms, system log records, SMS or email notifications, etc., so as to promptly notify relevant personnel to pay attention and take corresponding measures. At the same time, the controller generates a test exception log. The test exception log records the specific information of the test failure in detail, including test time, test environment, test parameters, actual test results, expected setting results and judgment results. This information is helpful for subsequent problem analysis and troubleshooting. The generated test exception log is stored in the specified database or file system for subsequent review and analysis. At the same time, in order to ensure the security and integrity of the data, the test exception log can also be backed up.
[0068] By implementing the above test failure, issuing error alarms and generating test exception logs, this technical feature brings the following technical effects:
[0069] Timely alert and response: By triggering the error alert mechanism, relevant personnel can be informed of test failures in a timely manner and take appropriate measures to troubleshoot and repair the problem. This helps reduce downtime and improve system availability and stability.
[0070] Detailed records and analysis: The generated test exception log contains rich test failure information, which is helpful for subsequent problem analysis and troubleshooting. By consulting the test exception log, you can quickly locate the problem and develop a corresponding solution.
[0071] Improved detection accuracy: By accurately comparing the test results with the expected results and automatically determining the test status, the accuracy and reliability of the test can be improved. This helps ensure that the quality and performance of the hard disk backplane meet the design requirements.
[0072] Data security and integrity: By storing and backing up test exception logs, data security and integrity can be ensured. This helps prevent data loss or corruption and provides reliable data support for subsequent problem analysis and troubleshooting.
[0073] Optimize the testing process: By recording and analyzing test failures, the testing process and methods can be continuously optimized to improve testing efficiency and accuracy. This helps reduce testing costs and improve overall production efficiency and product quality.
[0074] In one embodiment, the test fails, an error alarm is issued, and a test abnormality log is generated. The test failure includes an open circuit or a short circuit scenario on the hard disk backplane.
[0075] Specifically, during the test, the system determines whether there is an open circuit by detecting the signal transmission path on the hard disk backplane. Specifically, the system sends a test signal to the hard disk backplane and monitors the return signal. If the return signal is not received within the specified time, or the return signal is abnormal (such as too low signal strength, waveform distortion, etc.), it is determined to be an open circuit scenario. The system determines whether there is a short circuit by monitoring the current and voltage changes on the hard disk backplane. If the current is abnormally increased (exceeding the preset threshold) or the voltage is abnormally reduced (lower than the preset threshold), it is determined to be a short circuit scenario. In addition, the system may also use a resistance measurement tool to directly measure the resistance value on the backplane to further confirm the short circuit. Once a test failure is detected (including open circuit or short circuit scenarios), the system immediately triggers an error alarm mechanism. The alarm information may include detailed information such as failure type (open circuit / short circuit), failure location (specific backplane location or number), and failure time. The alarm method may include sound and light alarm, screen display alarm, or sending alarm information through the network. When the system triggers an error alarm, it will also generate a test abnormality log. The log content may include detailed information on the test failure (such as failure type, failure location, failure time, etc.), test environment parameters (such as temperature, humidity, power supply voltage, etc.), key data during the test (such as the test signal sent, the return signal received, etc.) and possible failure cause analysis.
[0076] That is to say, by real-time monitoring of the signal transmission path and current and voltage changes on the hard disk backplane, the system can accurately determine whether there is an open circuit or short circuit, thereby improving the accuracy of fault detection. Once a test failure is detected, the system can immediately trigger the error alarm mechanism and promptly notify relevant personnel to handle it. This helps to reduce the impact of the fault on the normal operation of the system and improve the reliability and stability of the system. The generated test exception log provides detailed fault information and possible fault cause analysis, which helps relevant personnel quickly locate the fault point and take corresponding repair measures.
[0077] In one embodiment, the test signal is a high level signal.
[0078] Specifically, in the test system, the high-level signal is usually generated by a signal generator or a signal source inside the test equipment. These devices can accurately control the voltage level and timing of the signal to meet the test requirements. When setting the high-level signal, it is necessary to determine the voltage range, duration, waveform and other parameters of the signal. For TTL (transistor-transistor logic) circuits, the high level is usually set between 2.4V and 5V. For CMOS (complementary metal oxide semiconductor) circuits, the high level is usually set above 70% VDD (VDD is the power supply voltage). The high-level signal is transmitted to the input end of the device or component under test through the transmission line on the test cable or circuit board. During the transmission process, it is necessary to ensure the integrity of the signal and avoid problems such as signal attenuation, reflection and interference. At the output end of the device or component under test, test instruments such as oscilloscopes and logic analyzers are used to detect the state of the high-level signal. These instruments can accurately measure parameters such as the voltage level, rise / fall time and timing of the signal to determine whether the device or component under test is working properly.
[0079] More specifically, testing with high-level signals can more accurately reflect the electrical characteristics of the device or component under normal working conditions. Because high-level signals have clear voltage ranges and timing requirements, potential faults or anomalies can be more easily detected. High-level signals usually have large voltage amplitudes and stable level states, so they can better resist the influence of noise and interference. This helps to ensure the reliability and stability of test results. Testing with high-level signals can simplify the test process because the state of high-level signals is clear and easy to detect. This helps to reduce test costs and improve test efficiency. High-level signal testing can cover multiple electrical characteristics of the device or component under test, including voltage levels, timing, and waveforms. This helps to ensure that the device or component under test can work properly under various working conditions. High-level signal testing is suitable for a variety of test scenarios, including functional testing, performance testing, reliability testing, and compatibility testing, which helps to meet different types of test requirements and ensure the overall quality of the device or component under test.
[0080] See also Figure 2As shown, the method for quickly detecting the hard disk backplane path is implemented based on the hard disk backplane path detection module. The hard disk backplane path detection module is mainly composed of MCIO cables, MCIO connectors, SAS connectors and BMC. Among them, the MCIO cable is used to transmit data-type signals to the loop card and the signals returned from the loop card. The connector is used to define the signal type, sort and process it according to the specification. The BMC is used to collect the test IO return signal results and compare them with the original design to find out the IO that does not meet the return signal to generate an error log. The hard disk backplane path detection module is used to solve the long test process and improve the maintenance efficiency of abnormal circuits when the test is abnormal. The module uses software to send a high-level signal, simulates the hard disk through the loop card, and returns a high level to the BMC GPIO. The BMC judges whether the tested backplane is open or short-circuited by returning the high-level state of the IO. The wrong log information can quickly locate the line where the problem occurs, and the fault can be quickly eliminated. That is to say, by sending a high level to the hard disk backplane to the loop card, and then returning a new high level signal to the BMC GPIO, a loop is formed to determine whether the line is open or short-circuited. When a problem occurs, the abnormal line can be quickly located by finding the corresponding error information, and then the abnormal line can be repaired. Compared with the traditional full-function test, it can save testing and repair positioning time. The hard disk backplane detection channel module is a functional testing device for servers, suitable for backplanes with multiple hard disk interfaces and backplanes of different models in mass production. It can cope with flexible and changeable backplane design specifications, while reducing testing time for mass production projects and improving production efficiency.
[0081] See also Figure 3 As shown in the figure, when the hard disk backplane path detection is in normal test, the detection process is as follows:
[0082] The master control BMC chip IO sends a high level, which passes through the main test MCIO interface to the interface → Cab le → tested hard disk backplane MC IO interface → tested backplane PCB trace → U.2 interface → U.2 loop card → U.2 interface → tested backplane PCB trace → tested hard disk backplane MCIO interface → main test MCIO interface to the interface → BMCIO receiving end, and then compare the test results. If they meet the expected test results, the test passes and a test log is generated.
[0083] See also Figure 4 As shown in the figure, when the hard disk backplane path detection is in the test open circuit, the detection process is as follows:
[0084] The main control BMC chip IO sends a high level, which passes through the main test MCIO interface to the interface → Cable → MC IO interface of the hard disk backplane under test → an open circuit occurs → the BMC IO receiving end does not receive the high level, and then compares the test results. If it does not meet the expected test results, the test fails and an error log is generated.
[0085] See also Figure 5 As shown in the figure, when the hard disk backplane path detection is in the test short circuit, the detection process is as follows:
[0086] The master BMC chip IO sends a high level, which passes through the main test MCIO interface to the interface → Cab le → MCIO interface of the hard disk backplane under test → PCB trace of the backplane under test → short circuit of the PCB trace of the backplane under test → U.2 interface → U.2 loop card → U.2 interface → PCB trace of the backplane under test → MCIO interface of the hard disk backplane under test → main test MCIO interface to the interface → BMC IO receiving end 1 and 2 receive the high level at the same time, and then compare the test results. If the test results do not meet the expected test results, the test fails and an error log is generated.
[0087] The present invention directly sends a test signal to the hard disk backplane through a controller, eliminating the process of whole machine startup and complex system interaction in the traditional method, thereby greatly shortening the test cycle. This improvement enables the hard disk backplane on the production line to complete the test in a shorter time, speeding up the production rhythm and improving the overall production efficiency. In addition, in the traditional test method, when the whole machine test is abnormal, the problem location is often time-consuming and laborious and requires deep professional knowledge, while the present invention can directly obtain the test result fed back by the hard disk backplane through the controller, and quickly judge whether the hard disk backplane function is normal by comparing with the expected setting result. If the test fails, the controller will record the error log. These log information is clear and concise, which helps the tester to quickly locate the position of the abnormal line, greatly simplifying the process of problem location. In addition, when abnormal error log information is found, the maintenance personnel can quickly lock the problem according to the detailed error information provided in the log, without the need for cumbersome troubleshooting. This targeted maintenance method not only improves the maintenance efficiency, but also reduces the maintenance resource waste caused by misjudgment or missed judgment. In addition, the present invention is not only applicable to hard disk backplane testing on large-scale production lines, but can also play an important role in multiple links such as research and development and quality inspection. Its fast and accurate testing capabilities enable each link in the production process to operate more flexibly and efficiently, which helps companies improve their overall competitiveness. In addition, by shortening the test cycle, simplifying the problem location process and improving maintenance efficiency, the present invention helps companies reduce production costs; on the one hand, it reduces the production line downtime caused by long test cycles; on the other hand, it reduces the maintenance cost and time cost caused by difficult problem location.
[0088] Figure 6 FIG. 3 is a schematic block diagram of a device 300 for quickly detecting hard disk backplane paths provided by an embodiment of the present invention. Figure 6 As shown, corresponding to the above method for quickly detecting hard disk backplane access, the present invention also provides a device 300 for quickly detecting hard disk backplane access. The device 300 for quickly detecting hard disk backplane access includes a unit for executing the above method for quickly detecting hard disk backplane access, and the device can be configured in a server. Specifically, please refer to Figure 6 , the device 300 for quickly detecting hard disk backplane access includes a sending detection generating unit 301, an acquiring unit 302, a judging unit 303 and a generating unit 304;
[0089] The sending detection generating unit 301 is used for the controller to send a test signal to the hard disk backplane for the detection of the hard disk backplane and generate a detection result;
[0090] An acquisition unit 302 is used for the controller to acquire the detection result fed back by the hard disk backplane;
[0091] A judging unit 303 is used to judge whether the detection result meets the expected setting result;
[0092] The generating unit 304 is used to generate a test log if the test result meets the expected setting result, then the test passes.
[0093] In one embodiment, the test signal is a high level signal.
[0094] In one embodiment, the device further comprises: an issuing generating unit 305, which is used to issue an error alarm and generate a test exception log if the detection result does not meet the expected setting result, indicating that the test fails.
[0095] In one embodiment, in the generation unit 305, the test failure includes an open circuit scenario or a short circuit scenario on the hard disk backplane.
[0096] It should be noted that technicians in the relevant field can clearly understand that the specific implementation process of the above-mentioned device 300 for quickly detecting the hard disk backplane path and each unit can refer to the corresponding description in the aforementioned method embodiment, and for the convenience and brevity of description, it will not be repeated here.
[0097] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Figure 7As shown. The computer device includes a processor, a memory, a network interface and a database connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile and / or volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external client via a network connection. When the computer program is executed by the processor, the server-side functions or steps of a method for quickly detecting a hard disk backplane path are implemented.
[0098] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program:
[0099] The controller sends a test signal to the hard disk backplane for the detection of the hard disk backplane and generates a test result; the controller obtains the test result fed back by the hard disk backplane; determines whether the test result meets the expected setting result; if the test result meets the expected setting result, the test passes and a test log is generated.
[0100] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:
[0101] The controller sends a test signal to the hard disk backplane for the detection of the hard disk backplane and generates a test result; the controller obtains the test result fed back by the hard disk backplane; determines whether the test result meets the expected setting result; if the test result meets the expected setting result, the test passes and a test log is generated.
[0102] It should be noted that the above functions or steps that can be implemented by the computer-readable storage medium or computer device can refer to the relevant descriptions on the server side and the client side in the aforementioned method embodiment. To avoid repetition, they will not be described one by one here.
[0103] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
[0104] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.
[0105] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.
Claims
1. A method for quickly detecting hard disk backplane access, characterized in that: include: The controller sends a test signal to the hard disk backplane for detecting the hard disk backplane and generates a detection result; The controller obtains the test result fed back by the hard disk backplane; Determine whether the test results meet the expected set results; If the test results meet the expected set results, the test passes and a test log is generated.
2. The method for quickly detecting hard disk backplane access according to claim 1, characterized in that: The test signal is a high level signal.
3. The method for quickly detecting hard disk backplane access according to claim 1, characterized in that: After the step of determining whether the test result meets the expected setting result, the method further includes: if the test result does not meet the expected setting result, the test fails, an error alarm is issued, and a test abnormality log is generated.
4. The method for quickly detecting hard disk backplane access according to claim 3, characterized in that: The test fails, an error alarm is issued and a test exception log is generated. The test failure includes an open circuit or a short circuit scenario on the hard disk backplane.
5. A device for quickly detecting hard disk backplane access, characterized in that: include: A sending detection generating unit is used for the controller to send a test signal to the hard disk backplane for detecting the hard disk backplane and generating a detection result; An acquisition unit is used for the controller to acquire the detection result fed back by the hard disk backplane; A judgment unit, used to judge whether the detection result meets the expected setting result; The generation unit is used to generate a test log if the test result meets the expected setting result, then the test passes.
6. The device for quickly detecting hard disk backplane access according to claim 5, characterized in that: The test signal is a high level signal.
7. The device for quickly detecting hard disk backplane access according to claim 5, characterized in that: The device also includes: a generating unit, which is used to indicate that the test fails, issue an error alarm and generate a test abnormality log if the detection result does not meet the expected setting result.
8. The device for quickly detecting hard disk backplane access according to claim 7, characterized in that: In the generating unit, the test failure includes an open circuit or a short circuit scenario on the hard disk backplane.
9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method for quickly detecting hard disk backplane access as described in any one of claims 1 to 4 are implemented.
10. A storage medium, wherein the computer-readable storage medium stores a computer program, characterized in that: When the computer program is executed by a processor, the steps of the method for quickly detecting hard disk backplane access as claimed in any one of claims 1 to 4 are implemented.
Citation Information
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