Oscillator circuit based on bipolar device

Abstract

The invention provides an oscillator circuit based on a bipolar device. The oscillator circuit comprises a starting module based on the bipolar device, a comparator, a first proportional current mirror, a second proportional current mirror, a third proportional current mirror, a charging and discharging module, a trigger level control module and an output level control module. Each of the first proportional current mirror and the charging and discharging module comprises a first current control unit, each of the second proportional current mirror and the charging and discharging module comprises a second current control unit, and each of the second proportional current mirror and the trigger level control module comprises a third current control unit; the output of the trigger level control module is connected with the comparator, a first comparison voltage signal is output to the comparator, and the third current control unit controls the output of the trigger level control module; the first current control unit is connected with the second current control unit, and outputs a second comparison voltage signal to the comparator after connection. According to the invention, the oscillator circuit of a pure bipolar process is improved, so that the oscillator circuit meets the high-density integration requirement.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and particularly to an oscillator circuit based on bipolar devices. Background Art

[0002] In analog integrated circuits, the core function of an oscillator is to provide a stable local oscillation source or clock signal for a modulation / demodulation system, and its performance directly affects the frequency accuracy and signal integrity of a communication system.

[0003] Oscillators with different processes have significant differences in performance, and thus are suitable for different application scenarios. For example, in application scenarios that require ultra-low phase noise (such as radar and satellite communications) or high-voltage drive, oscillators based on pure bipolar processes are more relied on. In application scenarios of on-chip clock generation and low-power mixed-signal systems, oscillators with CMOS processes have advantages such as low power consumption, high-density integration, and compatibility with digital logic, and are more suitable.

[0004] However, the pure bipolar process can no longer meet the high-density integration requirements of modern chips. Therefore, current mainstream oscillators usually use hybrid processes, mainly MOS devices, hybridizing processes such as CMOS, BiCMOS, and BCD. Summary of the Invention

[0005] Aiming at the deficiencies in the prior art, the present invention provides an oscillator circuit based on bipolar devices, which solves the problem that in the prior art, the pure bipolar process cannot meet the high-density integration requirements. Therefore, in application scenarios where oscillators based on pure bipolar processes are applicable, hybrid-process oscillators are still used, reducing the performance of the oscillators, and further reducing the frequency accuracy and signal integrity of the communication system.

[0006] According to an embodiment of the present invention, an oscillator circuit based on bipolar devices includes: a startup module based on bipolar devices, a comparator, a first proportional current mirror, a second proportional current mirror, a third proportional current mirror, a charge and discharge module, a trigger level control module, and an output level control module;

[0007] The first proportional current mirror and the charge and discharge module both include a first current control unit, the second proportional current mirror and the charge and discharge module both include a second current control unit, and the second proportional current mirror and the trigger level control module both include a third current control unit;

[0008] The startup module is connected to the second proportional current mirror and the trigger level control module; the comparator is connected to the first proportional current mirror, the second proportional current mirror, and the third proportional current mirror; the output of the trigger level control module is connected to the comparator, and outputs a first comparison voltage signal to the comparator, and the third current control unit controls the output of the trigger level control module; the first current control unit is connected to the second current control unit, and after connection, outputs a second comparison voltage signal to the comparator; the third proportional current mirror is further connected to the first proportional current mirror and is connected to the input end of the output level control module.

[0009] Optionally, the startup module includes a first triode, a second triode, and a first resistor;

[0010] The collector of the first triode is connected to the positive power supply voltage and is connected to the base of the first triode; the emitter of the first triode is connected to the emitter of the second triode, the collector of the second triode is connected to one end of the first resistor, and the other end of the first resistor is connected to the trigger level control module; the base of the second triode is connected to the collector of the second triode, and the base of the second triode is also connected to the first proportional current mirror circuit.

[0011] Optionally, the first proportional current mirror includes: a second resistor, a third resistor, a fourth resistor, a third triode, a fourth triode, and a fifth triode; the fourth triode is the first current control unit;

[0012] One end of the second resistor, one end of the third resistor, and one end of the fourth resistor are connected to the positive power supply voltage, the other end of the second resistor is connected to the emitter of the third triode, the other end of the third resistor is connected to the emitter of the fourth triode, and the other end of the fourth resistor is connected to the emitter of the fifth triode;

[0013] The collector of the third triode is connected to the comparator, the collector of the fourth triode is connected to the second current control unit, and the collector of the fifth triode is connected to the third proportional current mirror and is connected to the input end of the output level control module.

[0014] Optionally, the second proportional current mirror includes a fifth resistor, a sixth resistor, a seventh resistor, a sixth triode, a seventh triode, and an eighth triode; the eighth triode is the second current control unit; the sixth triode and the fifth resistor are the third current control unit, and the emitter of the sixth triode is connected to one end of the fifth resistor;

[0015] The collector of the sixth triode is connected to the output of the trigger level control module at the first intersection point. The base of the sixth triode is connected to the bases of the seventh triode and the eighth triode. The collector of the seventh triode is connected to the comparator. The collector and the base of the seventh triode are connected. The emitter of the seventh triode is connected to one end of the sixth resistor. The emitter of the eighth triode is connected to one end of the seventh resistor. The collector of the eighth triode is connected to the first current control unit. The other ends of the fifth resistor, the sixth resistor, and the seventh resistor are connected to the negative power supply voltage.

[0016] Optionally, the third proportional current mirror includes an eighth resistor, a ninth triode, and a thirteenth triode;

[0017] The collector of the ninth triode is connected to the comparator. The collector and the base of the ninth triode are connected. The base of the ninth triode is connected to one end of the eighth resistor. The collector of the thirteenth triode is connected to the first proportional current mirror and to the input end of the output level control module; the other ends of the ninth triode, the eighth resistor, and the emitter of the thirteenth triode are connected to the negative power supply voltage.

[0018] Optionally, the charge and discharge module includes a fourth triode, an eighth triode, and a first capacitor; the fourth triode is the first current control module, and the eighth triode is the second current control module;

[0019] The collector of the fourth triode is connected to the collector of the eighth triode and then connected to the comparator at the second intersection point, and is connected to one end of the first capacitor at the third intersection point. The other end of the first capacitor is grounded.

[0020] Optionally, the trigger level control module includes a fifth resistor, a ninth resistor, and a sixth triode; the ninth resistor and the sixth triode are the third current control module;

[0021] One end of the ninth resistor is connected to the start module and then grounded. The other end of the ninth resistor is the output end of the trigger level control module and is connected to the collector of the sixth triode. The emitter of the sixth triode is connected to one end of the fifth resistor. The other end of the fifth resistor is connected to the negative power supply voltage.

[0022] Optionally, the output level control module includes: a tenth resistor, an eleventh resistor, a twelfth resistor, a first diode, a second diode, a third diode, and a fourth diode;

[0023] One end of the tenth resistor, the input end of the first diode, the output end of the third diode, and one end of the eleventh resistor are the input ends of the output level control module; the output end of the first diode is connected to the input end of the second diode, the input end of the third diode is connected to the output end of the fourth diode, and the other end of the eleventh resistor is connected to one end of the twelfth resistor; the other end of the tenth resistor, the output end of the second diode, the input end of the fourth diode, and the other end of the twelfth resistor are grounded; the other end of the eleventh resistor and one end of the twelfth resistor are the output of the output level control module.

[0024] Optionally, the comparator includes an eleventh triode and a twelfth triode;

[0025] The base of the eleventh triode receives a first comparison voltage signal, the base of the twelfth triode receives a second comparison voltage signal, the emitter of the eleventh triode is connected to the emitter of the twelfth triode and is connected to the first proportional current mirror, the collector of the eleventh triode is connected to the second proportional current mirror, and the collector of the twelfth triode is connected to the third proportional current mirror.

[0026] Optionally, the comparator includes a first junction field effect transistor and a second junction field effect transistor;

[0027] The gate of the first junction field effect transistor receives a first comparison voltage signal, the gate of the second junction field effect transistor receives a second comparison voltage signal, the source of the first junction field effect transistor is connected to the source of the second junction field effect transistor and is connected to the first proportional current mirror, the drain of the first junction field effect transistor is connected to the second proportional current mirror, and the drain of the second junction field effect transistor is connected to the third proportional current mirror.

[0028] An oscillator circuit based on bipolar devices according to an embodiment of the present invention controls the output of a trigger level control module through a first proportional current mirror, a second proportional current mirror, and a third proportional current mirror, controls the charge and discharge states of a charge and discharge module, and further enables the output level control module to output an oscillation signal, realizing the oscillator function under a pure bipolar process. At the same time, a first current control unit, a second current control unit, and a third current control unit are used to increase the integration density of the circuit. Therefore, the oscillator circuit based on bipolar devices provided by the embodiment of the present invention has applications in fields such as operational amplifiers, power management, and isolation devices of analog integrated circuits. Compared with a hybrid process, it can provide better oscillator performance and meet the high-density integration requirements of modern chips. Description of the Drawings

[0029] Figure 1It is the composition structure diagram of the oscillator circuit based on bipolar devices according to the embodiment of the present invention;

[0030] Figure 2 It is the detailed circuit structure diagram of the oscillator circuit based on bipolar devices according to the embodiment of the present invention;

[0031] Figure 3 It is the detailed circuit structure diagram of another oscillator circuit based on bipolar devices according to the embodiment of the present invention.

[0032] In the above-mentioned drawings: 10, start-up module; 20, comparator; 30, first proportional current mirror; 40, second proportional current mirror; 50, third proportional current mirror; 60, charge and discharge module; 70, trigger level control module; 80, output level control module; 91, first current control unit; 92, second current control unit; 93, third current control unit. Detailed implementation manners

[0033] The technical solutions in the present invention will be further described below with reference to the drawings and embodiments.

[0034] As Figure 1 shown, the embodiment of the present invention provides an oscillator circuit based on bipolar devices, including a start-up module 10, a comparator 20, a first proportional current mirror 30, a second proportional current mirror 40, a third proportional current mirror 50, a charge and discharge module 60, a trigger level control module 70 and an output level control module 80 based on bipolar devices. Among them, both the first proportional current mirror 30 and the charge and discharge module 60 include a first current control unit 91, both the second proportional current mirror 40 and the charge and discharge module 60 include a second current control unit 92, and both the second proportional current mirror 40 and the trigger level control module 70 include a third current control unit 93.

[0035] The connection relationships of the above-mentioned circuit parts are as follows:

[0036] The start-up module 10 is connected to the second proportional current mirror 40 and the trigger level control module 70; the comparator 20 is connected to the first proportional current mirror 30, the second proportional current mirror 40 and the third proportional current mirror 50; the output of the trigger level control module 70 is connected to the comparator 20, and a first comparison voltage signal is output to the comparator 20 based on point A, and the third current control unit 93 controls the output of the trigger level control module 70; the first current control unit 91 is connected to the second current control unit 92, and after connection, a second comparison voltage signal is output to the comparator 20 based on point B; the third proportional current mirror 50 is further connected to the first proportional current mirror 30 and is connected to the input end of the output level control module 80;

[0037] The detailed working process of the embodiment of the present invention is as follows:

[0038] The comparator 20 compares the first comparison voltage signal and the second comparison voltage signal, and determines whether the end receiving the first comparison voltage signal works or the end receiving the second comparison voltage signal works according to the comparison result. The first comparison voltage signal is provided by the output of the trigger level control module 70 controlled by the third current control unit 93, and the second comparison voltage signal is provided by the first current control unit 91 and the second current control unit 92. The third current control unit 93 is associated with the second proportional current mirror 40, the first current control unit 91 is associated with the first proportional current mirror 30 and the charge and discharge circuit, and the second current control unit 92 is associated with the second proportional current mirror 40 and the charge and discharge circuit. Therefore, the first proportional current mirror 30 and the second proportional current mirror 40 are used to control the operation of the comparator 20, and the working state of the comparator 20 can also be used to determine the on and off of the second current control unit 92 in the second proportional current mirror 40. In addition, the comparator 20 is connected to the third proportional current mirror 50, and the third proportional current mirror 50 is also connected to the first proportional current mirror 30 and the input end of the output level control module 80. The first proportional current mirror 30 is always on, and the on-off of the third proportional current mirror 50 can be controlled by the comparator 20, thereby controlling the charge and discharge module 60 to alternate between the charging state and the discharging state. Finally, according to the on-off of the third proportional current mirror 50, the alternating sink current and pull current are output to the output level control module 80, and the output level control module 80 implements a periodic output of an oscillation signal with a peak value of a preset voltage based on this.

[0039] Exemplarily, when the first voltage comparison signal is less than the second voltage comparison signal, the comparator 20 controls the second proportional current mirror 40 circuit to be connected, the third proportional current mirror 50 circuit to be disconnected, the current of the second proportional current mirror 40 circuit is greater than the current of the first proportional current mirror 30 circuit, the charge and discharge module 60 is in a discharging state, and the output level control module 80 outputs an oscillation signal with a peak value in a positive cycle; when the first voltage comparison signal is greater than the second voltage comparison signal, the comparator 20 controls the second proportional current mirror 40 circuit to be disconnected, the third proportional current mirror 50 circuit to be connected, the current of the second proportional current mirror 40 circuit is less than the current of the first proportional current mirror 30 circuit, the charge and discharge module 60 is in a charging state, and the output level control module 80 outputs an oscillation signal with a peak value in a negative cycle.

[0040] The embodiment of the present invention provides an oscillator circuit based on a bipolar device, which controls the output of a trigger level control module through a first proportional current mirror, a second proportional current mirror, and a third proportional current mirror, controls the charge and discharge state of a charge and discharge module, and then enables the output level control module to output an oscillation signal, thereby realizing an oscillator function under a pure bipolar process. At the same time, the first current control unit, the second current control unit, and the third current control unit are used to increase the integration density of the circuit. Therefore, the oscillator circuit based on a bipolar device provided by the embodiment of the present invention is used in the fields of operational amplifiers, power management, isolation devices, etc. of analog integrated circuits. Compared with hybrid processes, it can provide better oscillator performance and meet the high-density integration requirements of modern chips.

[0041] like Figure 2 As shown, the embodiments of the present invention respectively provide detailed circuit structures of a startup module 10, a comparator 20, a first proportional current mirror 30, a second proportional current mirror 40, a third proportional current mirror 50, a charge and discharge module 60, a trigger level control module 70 and an output level control module 80, and explain them.

[0042] In the embodiment of the present invention, the startup module 10 is a circuit designed for stable power-on operation, and the startup module 10 includes a first transistor Q1, a second transistor Q2 and a first resistor R1. Among them, the collector of the first transistor Q1 is connected to the positive power supply voltage VCC and is connected to the base of the first transistor Q1; the emitter of the first transistor Q1 is connected to the emitter of the second transistor Q2, the collector of the second transistor Q2 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the trigger level control module 70; the base of the second transistor Q2 is connected to the collector of the second transistor Q2, and the base of the second transistor Q2 is also connected to the first proportional current mirror 30 circuit.

[0043] In a preferred implementation, the first transistor Q1 is an NPN transistor, and the second transistor Q2 is a PNP transistor.

[0044] In the embodiment of the present invention, the first proportional current mirror 30 , the second proportional current mirror 40 and the third proportional current mirror 50 are used to control the trigger level of the comparator 20 and control the charging and discharging process of the charging and discharging module 60 .

[0045] The first proportional current mirror 30 includes: a second resistor R2, a third resistor R3, a fourth resistor R4, a third triode Q3, a fourth triode Q4, and a fifth triode Q5; the fourth triode Q4 is a first current control unit 91. One end of the second resistor R2, one end of the third resistor R3, and one end of the fourth resistor R4 are connected to the positive power supply voltage VCC, the other end of the second resistor R2 is connected to the emitter of the third triode Q3, the other end of the third resistor R3 is connected to the emitter of the fourth triode Q4, and the other end of the fourth resistor R4 is connected to the emitter of the fifth triode Q5; the collector of the third triode Q3 is connected to the comparator 20, the collector of the fourth triode Q4 is connected to the second current control unit 92, and the collector of the fifth triode Q5 is connected to the third proportional current mirror 50 and connected to the input end of the output level control module 80.

[0046] In a preferred implementation, the third transistor Q3, the fourth transistor Q4, and the fifth transistor Q5 are PNP transistors.

[0047] In one embodiment, in the first proportional current mirror 30 , the ratio of the collector areas of the third transistor Q3 , the fourth transistor Q4 , and the fifth transistor Q5 is 2:1:3, so as to achieve a current ratio of 2:1:3 in the first proportional current mirror 30 .

[0048] Among them, the second proportional current mirror 40 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a sixth transistor Q6, a seventh transistor Q7 and an eighth transistor Q8; the eighth transistor Q8 is a second current control unit 92; the sixth transistor Q6 and the fifth resistor R5 are a third current control unit 93, and the emitter of the sixth transistor Q6 is connected to one end of the fifth resistor R5. Among them, the collector of the sixth transistor Q6 and the output of the trigger level control module 70 are connected to the first intersection, that is, point A, the base of the sixth transistor Q6 is connected to the base of the seventh transistor Q7 and the base of the eighth transistor Q8, the collector of the seventh transistor Q7 is connected to the comparator 20, the collector of the seventh transistor Q7 and the base of the seventh transistor Q7 are connected, the emitter of the seventh transistor Q7 is connected to one end of the sixth resistor R6, the emitter of the eighth transistor Q8 is connected to one end of the seventh resistor R7, the collector of the eighth transistor Q8 is connected to the first current control unit 91, and the other end of the fifth resistor R5, the other end of the sixth resistor R6, and the other end of the seventh resistor R7 are connected to the negative power supply voltage VEE.

[0049] In a preferred implementation, the sixth transistor Q6, the seventh transistor Q7 and the eighth transistor Q8 are NPN transistors.

[0050] In one embodiment, in the second proportional current mirror 40, the ratio of the collector areas of the sixth transistor Q6, the seventh transistor Q7 and the eighth transistor Q8 is n:1:1, so as to achieve a current ratio relationship of n:1:1 in the second proportional current mirror 40, where n is the ratio of the emitter areas of the sixth transistor Q6 and the seventh transistor Q7.

[0051] The third proportional current mirror 50 includes an eighth resistor R8, a ninth transistor Q9 and a tenth transistor Q10. The collector of the ninth transistor Q9 is connected to the comparator 20, the collector of the ninth transistor Q9 is connected to the base of the ninth transistor Q9, the base of the ninth transistor Q9 is connected to one end of the eighth resistor R8, the collector of the tenth transistor Q10 is connected to the connection of the first proportional current mirror 30 and to the input end of the output level control module 80; the ninth transistor Q9, the other end of the eighth resistor R8 and the emitter of the tenth transistor Q10 are connected to the negative power supply voltage VEE.

[0052] In a preferred implementation, the ninth transistor Q9 and the tenth transistor Q10 are NPN transistors.

[0053] In one embodiment, in the third proportional current mirror 50 , the ratio of the collector areas of the ninth transistor Q9 and the tenth transistor Q10 is 1:3, so as to achieve a current ratio of 1:3 in the third proportional current mirror 50 .

[0054] In the embodiment of the present invention, the charge and discharge module 60 includes a fourth transistor Q4, an eighth transistor Q8 and a first capacitor C; the fourth transistor Q4 is a first current control module, and the eighth transistor Q8 is a second current control module. The collector of the fourth transistor Q4 is connected to the collector of the eighth transistor Q8 and then connected to the comparator 20 at the second intersection, i.e., point B, and is connected to one end of the first capacitor C at the third intersection, and the other end of the first capacitor C is grounded. In addition, according to the above embodiment, the fourth transistor Q4 is preferably a PNP transistor, and the eighth transistor Q8 is preferably an NPN transistor.

[0055] In an embodiment of the present invention, the output of the trigger level control module 70 is controlled by the third current control unit 93. In a better implementation, the trigger level control module 70 includes a fifth resistor R5, a ninth resistor R9 and a sixth transistor Q6; the ninth resistor R9 and the sixth transistor Q6 are the third current control module. Among them, one end of the ninth resistor R9 is connected to the start-up module 10 and then grounded, and the other end of the ninth resistor R9 is the output end of the trigger level control module 70, and is connected to the collector of the sixth transistor Q6, the emitter of the sixth transistor Q6 is connected to one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected to the negative power supply voltage VEE. Therefore, in a specific application, the output of the trigger level control module 70 is mainly controlled by the current of the sixth transistor Q6 flowing through the third current control unit 93, and the change in its trigger voltage is jointly determined by the resistance value of the fifth resistor R5 of the trigger level control module 70 and the current of the sixth transistor Q6. In addition, according to the above embodiment, the sixth transistor Q6 is preferably an NPN transistor.

[0056] In the embodiment of the present invention, the output level control module 80 is not only used to output the oscillation signal, but also introduces a limiting diode at the output end to prevent the output amplitude from being too large. Based on this, the output level control module 80 includes: a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a first diode, a second diode, a third diode and a fourth diode. Among them, one end of the tenth resistor R10, the input end of the first diode, the output end of the third diode, and one end of the eleventh resistor R11 are the input end of the output level control module 80; the output end of the first diode is connected to the input end of the second diode, the input end of the third diode is connected to the output end of the fourth diode, and the other end of the eleventh resistor R11 is connected to one end of the twelfth resistor R12; the other end of the tenth resistor R10, the output end of the second diode, the input end of the fourth diode, and the other end of the twelfth resistor R12 are grounded; the other end of the eleventh resistor R11 and one end of the twelfth resistor R12 are the output of the output level control module 80.

[0057] The embodiment of the present invention provides two detailed circuit structures of the comparator 20, such as Figure 2 As shown, it is an oscillator circuit for realizing a pure bipolar process, the comparator 20 includes an eleventh transistor Q11 and a twelfth transistor Q12; wherein, the base of the eleventh transistor Q11 receives a first comparison voltage signal, the base of the twelfth transistor Q12 receives a second comparison voltage signal, the emitter of the eleventh transistor Q11 is connected to the emitter of the twelfth transistor Q12 and is connected to the first proportional current mirror 30, the collector of the eleventh transistor Q11 is connected to the second proportional current mirror 40, and the collector of the twelfth transistor Q12 is connected to the third proportional current mirror 50.

[0058] likeFigure 3 As shown, it is an oscillator circuit for realizing a compatible PJFET bipolar process, the comparator 20 includes a first junction field effect transistor P1 and a second junction field effect transistor P2; wherein, the gate of the first junction field effect transistor P1 receives a first comparison voltage signal, the gate of the second junction field effect transistor P2 receives a second comparison voltage signal, the source of the first junction field effect transistor P1 is connected to the source of the second junction field effect transistor P2 and is connected to the first proportional current mirror 30, the drain of the first junction field effect transistor P1 is connected to the second proportional current mirror 40, and the drain of the second junction field effect transistor P2 is connected to the third proportional current mirror 50.

[0059] The embodiment of the present invention is also based on Figure 2 The oscillator circuit based on bipolar devices is shown in detail, and its working principle is explained in detail: based on Figure 2 The eleventh transistor Q11 and the twelfth transistor Q12 constitute a comparator 20 to compare the base input signal. The first transistor Q1, the second transistor Q2, and the first resistor R1 constitute a start-up circuit. The third transistor Q3, the fourth transistor Q4, and the fifth transistor Q5 constitute a first proportional current mirror 30. The current flowing through the third transistor Q3, the fourth transistor Q4, and the fifth transistor Q5 is determined according to the voltage V across both ends of the first transistor Q1. BE , and a resistor network consisting of a second resistor R2, a third resistor R3, and a fourth resistor R4. A fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a sixth transistor Q6, a seventh transistor Q7, and an eighth transistor Q8 constitute a second proportional current mirror 40. An eighth resistor R8, a ninth transistor Q9, and a tenth transistor Q10 constitute a third proportional current mirror 50.

[0060] The comparator 20 is used to control the eighth transistor Q8 of the second proportional current mirror 40 and the thirteenth transistor Q10 of the third proportional current mirror 50, and the on and off of the currents of these two branches, thereby controlling the current mirror branch currents where the seventh transistor Q7, the eighth transistor Q8, and the fourth transistor Q4 are located to charge and discharge the first capacitor C, so that the eleventh transistor Q11 and the twelfth transistor Q12 are switched alternately; the ninth transistor Q9 and the tenth transistor Q10 in the third proportional current mirror 50 control the output branch, and the alternate current injection and pull current are compared with the two groups of BE junction diodes in opposite directions on the tenth resistor R10, so that the periodic output peak value of ±V is achieved. BE82 The voltage oscillation signal. BEx is the BE junction voltage of Qx, and x is an Arabic numeral.

[0061] Based on this, the embodiment of the present invention also describes the period of the oscillation signal output by the provided oscillator. First, the period of the oscillation signal is determined by the capacitance c1 of the first capacitor C, the output current I1 of the fourth transistor Q4 in the charge and discharge module 60, and the input signal change ΔVC, which is expressed as: T = (2×c1×ΔVC) / I1. Assuming that the resistance of the ninth resistor R9 is r, the current flowing through the ninth resistor R9 during the discharge of the first capacitor C is n×I, where n is the emitter area ratio of the sixth transistor Q6 and the seventh transistor Q7, and is also the ratio of the collector current of the sixth transistor Q6 to the collector current of the seventh transistor Q7. The formula is expressed as: ΔVC = r×n×I, then the period can be calculated as T = 2×c1×r×n.

[0062] It can be seen that the period of the oscillation signal is related to the capacitance value c1 of the first capacitor C, the resistance value r of the ninth resistor R9, and the proportional factor n. Therefore, the frequency of the required oscillator can be designed by configuring the above parameters.

[0063] Exemplarily, according to the above embodiment, Figure 2 The parameters of the oscillator circuit based on the bipolar period are set, and the calculation of the period of the oscillation signal is explained. First, the transistors of each proportional current mirror satisfy the following current proportional relationship:

[0064] IQ3:IQ4:IQ5=2:1:3;

[0065] IQ6:IQ7:IQ8=n:1:1;

[0066] IQ9:IQ10=1:3;

[0067] Wherein, IQx is the collector current of the transistor Qx, x is an Arabic numeral, and n is the emitter area ratio of the sixth transistor Q6 and the seventh transistor Q7.

[0068] Secondly, the emitter area ratio of each proportional current mirror meets the following requirements:

[0069] Q3:Q4; Q5=2:1:3;

[0070] Q6:Q7:Q8=2:1:1;

[0071] Q9:Q10=1:3.

[0072] The collector current I1 of the fourth transistor Q4 is determined by the V BE and the resistance value r4 of the fourth resistor R4, therefore, I1=V BE1 / r4; where V BEx is the BE junction voltage of Qx, and x is an Arabic numeral.

[0073] Then, the whole circuit working process can be divided into two steps:

[0074] ① When the voltage V A is less than the voltage V at the second intersection B When the eleventh transistor Q11 is turned on and the twelfth transistor Q12 is turned off, the current of 2I1 flows through the eleventh transistor Q11 to the seventh transistor Q7, and I2 = 2I1. At this time, V A =-r9×nI2; and after the ninth transistor Q9 and the tenth transistor Q10 are turned off, the current can be approximately 0. The 3I1 current generated by the fifth transistor Q5 flows out from the output end.

[0075] It should be noted that the positive and negative signs in the formula indicate the direction of the current, with current flowing out of the device being positive and current flowing into the device being negative.

[0076] The output voltage V of the output level control module 80 O The calculation is as follows:

[0077] IO×(r10 / / (r11+r12))<2V BE When V O =[IO×(r10 / / (r11+r12))]×(r12 / (r10+r11));

[0078] IO×(r10 / / (r11+r12))>V BE When V O =2V BE ×(r12 / (r11=r12));

[0079] The current of the eighth transistor Q8 is I2=2I1. The current passing through the eighth transistor Q8 is greater than that of the fourth transistor Q4. Therefore, the first capacitor C discharges at the rate of the current I1 to B The voltage is continuously pulled down until V B <V A .

[0080] ②When the voltage at the first intersection V A Greater than the voltage V at the second intersection B When , the twelfth transistor Q12 is turned on, and the eleventh transistor Q11 is turned off. At this time, the current of 2I1 flows through the twelfth transistor Q12 to the ninth transistor Q9, and I3=2I1 is obtained. There is basically no current flowing through the eleventh transistor Q11, and I2=0. Similarly, the current flowing through the sixth transistor Q6, the seventh transistor Q7, and the eighth transistor Q8 is basically zero. At this time, V A=0, and the ninth transistor Q9 and the tenth transistor Q10 are turned on, and the current IQ9=IQ12=I3=2I1, IQ10=2I3=6I1. IQ10>IQ5, analysis shows that the current of 3I1 is all poured in from the output end.

[0081] The output voltage VO of the output level control module 80 is calculated as follows:

[0082] IO×(r10 / / (r11+r12))<2V BE When V O =-[IO×(r10 / / (r11+r12))]×(r12 / (r11+r12));

[0083] IO×(r10 / / (r11+r12))>2V BE When V O =-2V BE ×(r12 / (r11+r12));

[0084] The current of the eighth transistor Q8 is 0, and the current passing through the eighth transistor Q8 is less than that of the fourth transistor Q4. Therefore, the first capacitor C is charged at the rate of the current I1 to increase V B The voltage continues to rise until V B >V A , the cycle will begin again, thus completing a cycle.

[0085] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. An oscillator circuit based on a bipolar device, characterized in that: include: A startup module based on a bipolar device, a comparator, a first proportional current mirror, a second proportional current mirror, a third proportional current mirror, a charge and discharge module, a trigger level control module and an output level control module; The first proportional current mirror and the charge and discharge module both include a first current control unit, the second proportional current mirror and the charge and discharge module both include a second current control unit, and the second proportional current mirror and the trigger level control module both include a third current control unit; The startup module is connected to the second proportional current mirror and the trigger level control module; the comparator is connected to the first proportional current mirror, the second proportional current mirror and the third proportional current mirror; the output of the trigger level control module is connected to the comparator, outputs a first comparison voltage signal to the comparator, and the third current control unit controls the output of the trigger level control module; The first current control unit is connected to the second current control unit, and after the connection, outputs a second comparison voltage signal to the comparator; the third proportional current mirror is also connected to the first proportional current mirror and to the input end of the output level control module.

2. The bipolar device-based oscillator circuit according to claim 1, characterized in that: The startup module includes a first transistor, a second transistor and a first resistor; The collector of the first transistor is connected to the positive power supply voltage and to the base of the first transistor; the emitter of the first transistor is connected to the emitter of the second transistor, the collector of the second transistor is connected to one end of the first resistor, and the other end of the first resistor is connected to the trigger level control module; the base of the second transistor is connected to the collector of the second transistor, and the base of the second transistor is also connected to the first proportional current mirror circuit.

3. The bipolar device-based oscillator circuit according to claim 1, characterized in that: The first proportional current mirror includes: a second resistor, a third resistor, a fourth resistor, a third transistor, a fourth transistor, and a fifth transistor; the fourth transistor is the first current control unit; One end of the second resistor, one end of the third resistor, and one end of the fourth resistor are connected to a positive power supply voltage, the other end of the second resistor is connected to the emitter of the third transistor, the other end of the third resistor is connected to the emitter of the fourth transistor, and the other end of the fourth resistor is connected to the emitter of the fifth transistor; The collector of the third transistor is connected to the comparator, the collector of the fourth transistor is connected to the second current control unit, and the collector of the fifth transistor is connected to the third proportional current mirror and to the input end of the output level control module.

4. The bipolar device-based oscillator circuit according to claim 1, characterized in that: The second proportional current mirror includes a fifth resistor, a sixth resistor, a seventh resistor, a sixth transistor, a seventh transistor and an eighth transistor; the eighth transistor is the second current control unit; the sixth transistor and the fifth resistor are the third current control unit, and the emitter of the sixth transistor is connected to one end of the fifth resistor; The collector of the sixth transistor is connected to the output of the trigger level control module at a first intersection, the base of the sixth transistor is connected to the base of the seventh transistor and the base of the eighth transistor, the collector of the seventh transistor is connected to the comparator, the collector of the seventh transistor is connected to the base of the seventh transistor, the emitter of the seventh transistor is connected to one end of the sixth resistor, the emitter of the eighth transistor is connected to one end of the seventh resistor, the collector of the eighth transistor is connected to the first current control unit, and the other end of the fifth resistor, the other end of the sixth resistor, and the other end of the seventh resistor are connected to the negative power supply voltage.

5. The bipolar device-based oscillator circuit according to claim 1, characterized in that: The third proportional current mirror comprises an eighth resistor, a ninth transistor and a tenth transistor; The collector of the ninth transistor is connected to the comparator, the collector of the ninth transistor is connected to the base of the ninth transistor, the base of the ninth transistor is connected to one end of the eighth resistor, the collector of the tenth transistor is connected to the connection of the first proportional current mirror and to the input end of the output level control module; the ninth transistor, the other end of the eighth resistor and the emitter of the tenth transistor are connected to the negative power supply voltage.

6. The bipolar device-based oscillator circuit according to claim 1, characterized in that: The charging and discharging module includes a fourth triode, an eighth triode and a first capacitor; the fourth triode is the first current control module, and the eighth triode is the second current control module; The collector of the fourth transistor is connected to the collector of the eighth transistor and then connected to the comparator at a second intersection, and connected to one end of the first capacitor at a third intersection, and the other end of the first capacitor is grounded.

7. The bipolar device-based oscillator circuit according to claim 1, characterized in that: The trigger level control module includes a fifth resistor, a ninth resistor and a sixth transistor; the ninth resistor and the sixth transistor are the third current control module; One end of the ninth resistor is connected to the startup module and then grounded, the other end of the ninth resistor is the output end of the trigger level control module and is connected to the collector of the sixth transistor, the emitter of the sixth transistor is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to the negative power supply voltage.

8. The bipolar device-based oscillator circuit according to claim 1, characterized in that: The output level control module includes: a tenth resistor, an eleventh resistor, a twelfth resistor, a first diode, a second diode, a third diode and a fourth diode; One end of the tenth resistor, the input end of the first diode, the output end of the third diode, and one end of the eleventh resistor are the input ends of the output level control module; the output end of the first diode is connected to the input end of the second diode, the input end of the third diode is connected to the output end of the fourth diode, and the other end of the eleventh resistor is connected to one end of the twelfth resistor; the other end of the tenth resistor, the output end of the second diode, the input end of the fourth diode, and the other end of the twelfth resistor are grounded; the other end of the eleventh resistor and one end of the twelfth resistor are the outputs of the output level control module.

9. The bipolar device-based oscillator circuit according to any one of claims 1 to 8, characterized in that: The comparator comprises an eleventh triode and a twelfth triode; The base of the eleventh transistor receives a first comparison voltage signal, the base of the twelfth transistor receives a second comparison voltage signal, the emitter of the eleventh transistor is connected to the emitter of the twelfth transistor and to the first proportional current mirror, the collector of the eleventh transistor is connected to the second proportional current mirror, and the collector of the twelfth transistor is connected to the third proportional current mirror.

10. The bipolar device-based oscillator circuit according to any one of claims 1 to 8, characterized in that: The comparator includes a first junction field effect transistor and a second junction field effect transistor; The gate of the first junction field effect transistor receives a first comparison voltage signal, the gate of the second junction field effect transistor receives a second comparison voltage signal, the source of the first junction field effect transistor is connected to the source of the second junction field effect transistor and to the first proportional current mirror, the drain of the first junction field effect transistor is connected to the second proportional current mirror, and the drain of the second junction field effect transistor is connected to the third proportional current mirror.

Images