Optical engine and forming method thereof

Abstract

The invention relates to an optical engine and a forming method thereof, the optical engine comprises an adapter plate, an electric chip, an optical chip and a packaging substrate, the adapter plate comprises a first surface, a second surface opposite to the first surface, and a first through hole penetrating through the first surface and the second surface, the first surface of the adapter plate and the front surface of the electric chip are mounted on the optical chip and are electrically connected with the optical chip, and the second surface of the adapter plate is mounted on the packaging substrate and is electrically connected with the packaging substrate. According to the 3D fan-out type packaging optical engine integrated with the TSV adapter plate, the problems that an existing 3D fan-out type packaging optical engine is large in module size and cannot support the extremely high number of channels can be solved at the same time, and the problems that an existing 3D integrated optical engine with the TSV is high in cost and chip incoming materials are fixed can be solved at the same time.

Description

Technical Field

[0001] The present invention relates to the field of optical communication technologies, and in particular to an optical engine and a method for forming the same, and more particularly to a 3D fan-out packaged optical engine integrated with a TSV interposer and a method for forming the same. Background Art

[0002] Co-packaged optics (CPO) or optical I / O (OIO) has received extensive attention from leading manufacturers such as Intel, Broadcom, Cisco, Marvell, Ayar Labs, and Ranovus in recent years. CPO switches are recognized as the future development direction to replace traditional pluggable switches due to their advantages of low cost, low power consumption, low latency, and low loss. Optical I / O can overcome the bottlenecks in aspects such as power consumption, distance, bandwidth density, latency, and cost faced by electrical I / O, and has attracted more and more enterprises to invest in recent years. In a CPO switch or an OIO system, the optical engine, as a core component, has become the focus of research in this field in recent years.

[0003] Currently, there are mainly two optical engine structures in the industry: 3D fan-out packaged optical engines and 3D integrated optical engines with through-silicon vias (TSV). As Figure 1 shown, 3D fan-out packaging has the characteristics of high yield, low cost, short packaging cycle, flexible chip incoming materials (no need for the incoming materials to be a whole wafer), and low loss, so it is widely used in the packaging of optical engines for CPO scenarios. Since the 3D fan-out packaged optical engine uses through-mold vias (TMV) to achieve 3D interconnection, and TMV has problems such as a large critical dimension and a low aspect ratio, it is not suitable for the scenario of high-channel optical engines. Figure 2 Shown in is a 3D integrated optical engine with TSV. TSV has the advantages of small critical dimension and high aspect ratio, is suitable for the scenario of high-channel optical engines, and has the advantages of small module volume and the ability to support an extremely high number of channels. Therefore, it is widely used in the packaging of optical engines for OIO scenarios. However, the 3D integrated optical engine with TSV has the disadvantages of high cost, long packaging cycle, fixed chip incoming materials, and high loss due to using TSV to achieve 3D interconnection. Summary of the Invention

[0004] To solve at least some of the above problems in the prior art, the present invention provides an optical engine and a method for forming the same, and specifically provides a 3D fan-out packaged optical engine integrated with a TSV interposer and a method for forming the same.

[0005] The present invention provides an optical engine, including: An interposer, including a first surface, a second surface opposite to the first surface, and a first through hole penetrating the first surface and the second surface; An electrical chip (EIC); An optical chip (PIC), a first surface of the adapter board and a front surface of the electrical chip are surface-mounted on the optical chip and electrically connected to the optical chip; and A packaging substrate, a second surface of the adapter board is surface-mounted on the packaging substrate and electrically connected to the packaging substrate.

[0006] Furthermore, copper wirings are also provided in the packaging substrate, and the adapter board is electrically connected to the copper wirings. The first through-hole can achieve electrical connection in the vertical direction, and the copper wirings are responsible for electrical signal transmission to achieve electrical conduction.

[0007] Furthermore, through second through-holes are also provided in the packaging substrate. The second through-holes are beneficial to the heat dissipation of the electrical chip.

[0008] Furthermore, it further includes: A first redistribution layer (RDL), the first redistribution layer is located between the optical chip, the adapter board and the electrical chip, wherein the first redistribution layer includes a front surface and a back surface opposite to the front surface, the front surface is connected to the adapter board and the electrical chip, and the back plate is connected to the optical chip; a first redistribution layer and a second redistribution layer are respectively provided on the first surface and the second surface of the adapter board.

[0009] Furthermore, a third redistribution layer is also included, and the third redistribution layer is pre-integrated on the optical chip. That is, the redistribution layer includes a first redistribution layer, a second redistribution layer and a third redistribution layer. The electrical chip and the optical chip are connected to the adapter board through the redistribution layer.

[0010] Furthermore, the adapter board is a silicon adapter board.

[0011] Furthermore, the first through-hole is a TSV.

[0012] Furthermore, it further includes: An under-bump metal layer (UBM), which is electrically connected to the first redistribution layer, the second redistribution layer and / or the third redistribution layer; A solder ball (Pad), which is electrically connected to the under-bump metal layer; Underfill, which is filled on the surface-mounted surfaces of the optical chip, the electrical chip, the adapter board and the packaging substrate; Thermal conductive adhesive, which is provided between the packaging substrate and the electrical chip.

[0013] Wherein, the under-bump metal layer provides a metallization interface for subsequent connections; the underfill makes their mutual connections stable, enhances the structural stability, and in addition, the underfill can also play a role in relieving thermal stress; the thermal conductive adhesive is beneficial to the heat dissipation of the electrical chip.

[0014] Further, the under-bump metal layer includes a first under-bump metal layer and a second under-bump metal layer. The first under-bump metal layer is located on one side of the first redistribution layer, and the second under-bump metal layer is located on one side of the second redistribution layer.

[0015] Further, the solder balls include a first solder ball and a second solder ball. The first solder ball is located on the first under-bump metal layer, and the second solder ball is located on the second under-bump metal layer.

[0016] Further, the surface of the interposer is also covered with polyimide (PI), which plays an insulating and protective role.

[0017] The above optical engine is connected to an external fiber optic connector to ensure efficient transmission of optical signals.

[0018] The present invention provides a method for forming an optical engine, which includes: Forming an interposer, which includes a first surface, a second surface opposite to the first surface, and a first through hole penetrating the first surface and the second surface; Mounting the first surface of the interposer and the front side of the electrical chip on the optical chip; and Mounting the second surface of the interposer on the package substrate.

[0019] Further, forming the interposer includes: Vertically etching a first through hole on the front side of the silicon substrate; Fabricating a first redistribution layer and a first under-bump metal layer on the top of the first through hole, arranging a first solder ball on the first under-bump metal layer, and connecting the first solder ball to the first under-bump metal layer through a heat reflow process; Etching the back side of the silicon substrate to expose the first through hole from the back side; Fabricating a second redistribution layer and a second under-bump metal layer on the first through hole on the back side of the silicon substrate, arranging a second solder ball on the second under-bump metal layer, and connecting the second solder ball to the second under-bump metal layer through a heat reflow process.

[0020] Further, a third redistribution layer is pre-integrated on the optical chip, and the first surface of the interposer and the front side of the electrical chip are mounted on the third redistribution layer.

[0021] Further, the surface of the interposer is also covered with polyimide; a thermal conductive adhesive is provided between the package substrate and the electrical chip.

[0022] In this forming method, the third redistribution layer between the electrical chip / interposer and the optical chip is pre-integrated into the optical chip by conventional technical means, eliminating the need to fabricate the corresponding redistribution layer in subsequent packaging. A thermal conductive adhesive is added between the electrical chip and the interposer, which can improve the heat dissipation of the electrical chip.

[0023] The present invention provides a method for forming an optical engine, which includes: S1: Form an interposer, the interposer includes a first surface, a second surface opposite to the first surface, and a first through hole penetrating the first surface and the second surface; S2: Fabricate a first redistribution layer on a first carrier substrate, and fabricate a first under-bump metal layer on the front surface of the first redistribution layer to obtain a chip interconnection pre-treatment body with a multi-layer redistribution layer and a first under-bump metal layer structure; S3: Mount the first surface of the interposer and the electrical chip on the chip interconnection pre-treatment body, dispense molding compound around the interposer and the electrical chip, and then perform a thinning process to expose the first through hole on the second surface of the interposer; S4: Fabricate a second redistribution layer and a second under-bump metal layer on the molded structure, arrange second solder balls on the second under-bump metal layer, and connect the second solder balls to the second under-bump metal layer through a heat reflow process; S5: Bond the side with the second solder balls on the molded structure to a second carrier substrate, then remove the first carrier substrate to expose the back surface of the first redistribution layer, fabricate a first under-bump metal layer on the back surface of the first redistribution layer, arrange first solder balls on the first under-bump metal layer, and connect the first solder balls to the first under-bump metal layer through a heat reflow process, remove the second carrier substrate, and perform dicing; S6: Mount the optical chip through the first solder balls on the back surface of the first redistribution layer; and S7: Mount the package substrate through the second solder balls on the second redistribution layer.

[0024] Further, underfill is filled between the optical chip or the electrical chip and the interposer; the surface of the interposer is also covered with polyimide; a thermal conductive adhesive is provided between the package substrate and the electrical chip.

[0025] Further, in step S3, the molding compound is an epoxy molding compound (EMC).

[0026] In this forming method, a corresponding redistribution layer needs to be fabricated in subsequent packaging between the electrical chip / interposer and the optical chip. Here, a process of fabricating the redistribution layer first and then mounting the electrical chip and the interposer is adopted.

[0027] The present invention provides a method for forming an optical engine, which includes: S1: Form a transfer board, where the transfer board includes a first surface, a second surface opposite to the first surface, and a first through hole penetrating the first surface and the second surface; S2: Mount the first surface of the transfer board and the front surface of the electrical chip onto a first carrier board, arrange encapsulant around the transfer board and the electrical chip, and then perform a thinning process to expose the first through hole on the second surface of the transfer board; S3: Bond the second surface of the transfer board to a second carrier board, remove the first carrier board to expose the first surface of the transfer board and the front surface of the electrical chip, fabricate a first redistribution layer and a first under-bump metal layer on the first surface of the transfer board and the front surface of the electrical chip, then perform ball planting and heat reflow to form a first solder ball, then bond the surface where the first solder ball is located to a third carrier board, and remove the second carrier board to expose the second surface of the transfer board; S4: Fabricate a second redistribution layer and a second under-bump metal layer on the second surface of the transfer board, then successively perform ball planting and heat reflow to form a second solder ball, then remove the third carrier board and perform dicing; S5: Mount an optical chip through the first solder ball on the back surface of the first redistribution layer and perform dicing; and S6: Mount the package substrate through the second solder ball on the second surface of the transfer board.

[0028] Furthermore, underfill is filled between the optical chip or the electrical chip and the transfer board; the surface of the transfer board is also covered with polyimide; and a thermal conductive adhesive is provided between the package substrate and the electrical chip.

[0029] Furthermore, in step S2, the encapsulant is an epoxy encapsulant.

[0030] In this forming method, corresponding redistribution layers need to be fabricated between the electrical chip / transfer board and the optical chip during subsequent packaging. Here, the electrical chip and the transfer board are mounted first, and then the redistribution layers between the electrical chip / transfer board and the optical chip are fabricated.

[0031] The present invention has at least the following beneficial effects: 1) The present invention integrates a TSV transfer board into a 3D fan-out package optical engine, which can simultaneously solve the problems of large module volume and inability to support extremely high channel numbers existing in the existing 3D fan-out package optical engine, as well as the problems of high cost and fixed chip incoming materials existing in the existing 3D integrated optical engine with TSV; 2) For a 3D fan-out package optical engine integrating a TSV transfer board proposed by the present invention, the TSV is integrated in a passive silicon transfer board, avoiding the integration of TSV on the PIC and EIC, thereby being able to reduce the area of the EIC / PIC, obtaining an extremely low module volume, and having low cost and high yield. Description of the Drawings

[0032] To further clarify the above and other advantages and features of the embodiments of the present invention, a more specific description of the embodiments of the present invention will be presented with reference to the accompanying drawings. It is understood that these drawings only depict typical embodiments of the present invention and thus will not be considered as limiting its scope. In the drawings, for clarity, the same or corresponding components will be denoted by the same or similar reference numerals.

[0033] Figure 1 The figure shows a 3D fan-out package optical engine; Figure 2 The figure shows a 3D integrated optical engine with TSVs; Figure 3 The figure shows a schematic structural diagram of the optical engine in Embodiment 1; Figure 4 The figure shows a process flow chart of the packaging of the optical engine in Embodiment 1; Figure 5 The figure shows a process flow chart of the graphic packaging of the optical engine in Embodiment 1; Figure 6 The figure shows a schematic structural diagram of the optical engine in Embodiment 2; Figure 7 The figure shows a process flow chart of the graphic packaging of the optical engine in Embodiment 2; Figure 8 The figure shows a schematic structural diagram of the optical engine in Embodiment 3; Figure 9 The figure shows a process flow chart of the graphic packaging of the optical engine in Embodiment 3; Reference numerals: 1 - optical chip, 2 - optical fiber connector, 3 - interposer, 4 - first through hole, 5 - redistribution layer, 501 - first redistribution layer, 502 - second redistribution layer, 503 - third redistribution layer, 6 - solder ball, 7 - polyimide, 8 - electrical chip, 9 - thermal conductive adhesive, 10 - second through hole, 11 - under-bump metal layer, 1101 - first under-bump metal layer, 1102 - second under-bump metal layer, 12 - underfill, 13 - package substrate, 14 - copper wiring, 15 - molding compound, 16 - bump. Detailed embodiments

[0034] It should be noted that the components in the drawings may be exaggerated for illustration purposes and are not necessarily to scale.

[0035] In the present invention, the embodiments are only intended to illustrate the solutions of the present invention and should not be construed as restrictive.

[0036] In the present invention, unless otherwise specified, the quantifiers "a" and "one" do not exclude the scenario of multiple elements.

[0037] It should also be pointed out that in the embodiments of the present invention, for the sake of clarity and simplicity, only a portion of the parts or components may be shown, but a person of ordinary skill in the art will understand that under the teachings of the present invention, required parts or components may be added as needed in specific scenarios.

[0038] It should also be pointed out that within the scope of the present invention, the terms "same", "equal", "equal to" and the like do not mean that the two values ​​are absolutely equal, but allow a certain reasonable error, that is, the terms also cover "substantially the same", "substantially equal", and "substantially equal to".

[0039] It should also be pointed out that in the description of the present invention, the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than explicitly or implicitly indicating that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as explicitly or implicitly indicating relative importance.

[0040] In addition, the embodiments of the present invention describe the process steps in a specific order, but this is only for the convenience of distinguishing the steps, and does not limit the sequence of the steps. In different embodiments of the present invention, the sequence of the steps can be adjusted according to the adjustment of the process.

[0041] The following embodiment provides a method for forming a 3D fan-out packaged optical engine with an integrated TSV adapter plate. Figure 3 , Figure 6 and Figure 8Schematic diagram of the structure of the optical engine in the following embodiments. It can be seen that the optical engine includes: an interposer 3, an electrical chip 8, an optical chip 1, a package substrate 13, a second via hole 10 penetrating through the package substrate 13, a redistribution layer 5, an under-bump metal layer 11 electrically connected to the redistribution layer 5, solder balls 6 electrically connected to the under-bump metal layer 11, an underfill 12 filled on the mounting surfaces of the optical chip 1, the electrical chip 8, the interposer 3, and the package substrate 13, and a thermal conductive adhesive 9 disposed between the package substrate 13 and the electrical chip 8. The interposer 3 is a silicon interposer 3, and the first via hole 4 is a TSV. The interposer 3 includes a first surface, a second surface opposite to the first surface, and a first via hole 4 penetrating through the first surface and the second surface. The first surface of the interposer 3 and the front surface of the electrical chip 8 are mounted on the optical chip 1 and electrically connected to the optical chip 1, wherein the second surface of the interposer 3 is mounted on the package substrate 13 and electrically connected to the package substrate 13. The first via hole 4 can achieve electrical connection in the vertical direction. The copper wiring 14 is responsible for transmitting electrical signals to achieve electrical conduction, and the second via hole 10 is conducive to the heat dissipation of the electrical chip 8. The under-bump metal layer 11 provides a metallized interface for subsequent connections; the underfill 12 makes them firmly connected to each other, enhancing the structural stability. In addition, the underfill 12 can also play a role in alleviating thermal stress. The thermal conductive adhesive 9 is conducive to the heat dissipation of the electrical chip 8; the surface of the interposer 3 is also covered with polyimide 7, which plays an insulating and protective role. This optical engine is a 3D fan-out package optical engine integrated with a TSV interposer, which has the advantages of low cost and flexible chip incoming materials of 3D fan-out packaging, and also has the advantages of small module volume and the ability to support a very high number of channels of a 3D integrated optical engine with TSV.

[0042] In some embodiments, the redistribution layer 5 includes a first redistribution layer 501, a second redistribution layer 502, and a third redistribution layer 503. The first redistribution layer 501 is located between the optical chip 1, the interposer 3, and the electrical chip 8. The first redistribution layer 501 includes a front surface and a back surface opposite to the front surface. The front surface is connected to the interposer 3 and the electrical chip 8, and the backplane is connected to the optical chip 1; the first redistribution layer 501 and the second redistribution layer 502 are located on the first surface and the second surface of the interposer 3; the third redistribution layer 503 is pre-integrated on the optical chip 1. Copper wiring 14 is also provided in the package substrate 13, and the interposer 3 is electrically connected to the copper wiring 14. This optical engine is connected to an external fiber optic connector 2 to ensure efficient transmission of optical signals.

[0043] In some embodiments, the under-bump metal layer 11 includes a first under-bump metal layer 1101 and a second under-bump metal layer 1102. The first under-bump metal layer 1101 is located on one side of the first redistribution layer 501, and the second under-bump metal layer 1102 is located on one side of the second redistribution layer 502.

[0044] In some embodiments, the solder balls 6 include a first solder ball and a second solder ball. The first solder ball is located on the first under-bump metal layer 1101, and the second solder ball is located on the second under-bump metal layer 1102.

[0045] The following embodiments provide a method for forming the optical engine. Among them, the interposer 3 is a silicon interposer, and the encapsulant 15 is EMC. In addition, in different embodiments of the present invention, the order of each step can be adjusted according to the process adjustment.

[0046] Embodiment 1 This embodiment provides a method for forming an optical engine. Figure 4 is a process flow chart for encapsulating the optical engine. Figure 5 The process flow chart for graphic encapsulation of the optical engine. The forming method includes: A third redistribution layer 503 (not shown) is pre-integrated on the optical chip 1. The first side of the interposer 3 and the front side of the electrical chip 8 are mounted on the third redistribution layer 503. A first through-hole 4 is vertically etched on the front side of the silicon substrate. A first redistribution layer 501 and a first under-bump metal layer 1101 are fabricated on the top of the first through-hole 4. A first solder ball is disposed on the first under-bump metal layer 1101, and the first solder ball is connected to the first under-bump metal layer 1101 through a heat reflow process. The back side of the silicon substrate is etched so that the first through-hole 4 is exposed from the back side. A second redistribution layer 502 and a second under-bump metal layer 1102 are fabricated on the first through-hole 4 on the back side of the silicon substrate. A second solder ball is disposed on the second under-bump metal layer 1102, and the second solder ball is connected to the second under-bump metal layer 1102 through a heat reflow process. The first side of the interposer 3 and the front side of the electrical chip 8 are mounted on the optical chip 1; and The second side of the interposer 3 is mounted on the package substrate 13 to obtain an optical engine.

[0047] In this forming method, the third redistribution layer 503 between the electrical chip 8 / interposer 3 and the optical chip 1 is pre-integrated into the optical chip 1 by conventional technical means, eliminating the need to fabricate the corresponding redistribution layer in subsequent packaging and reducing subsequent packaging processes. The optical chip 1 is coupled with the fiber optic connector 2 to complete the construction of the optical signal transmission channel, enabling the entire optical engine to achieve optical-electrical signal interaction processing. In addition, a thermal conductive adhesive 9 is added between the electrical chip 8 / interposer 3, which can improve the heat dissipation of the electrical chip 8.

[0048] Embodiment 2 This embodiment provides a method for forming an optical engine, as Figure 7As shown, it is a process flow diagram of the graphic encapsulation of an optical engine. The forming method includes: S1: Vertically etch a first through-hole 4 on a silicon substrate; S2: Fabricate a first redistribution layer 501 on a first carrier board, and fabricate a first under-bump metal layer 1101 on the front surface of the first redistribution layer 501 to obtain a chip interconnection preprocessing body with a structure of multiple redistribution layers and the first under-bump metal layer 1101; S3: Mount the first surface of the adapter board 3 and the electrical chip 8 onto the chip interconnection preprocessing body, arrange molding compound 15 around the adapter board 3 and the electrical chip 8, and then perform a thinning process to expose the first through-hole 4 on the second surface of the adapter board 3; S4: Fabricate a second redistribution layer 502 and a second under-bump metal layer 1102 on the molded structure, arrange second solder balls on the second under-bump metal layer 1102, and connect the second solder balls to the second under-bump metal layer 1102 through a heat reflow process; S5: Bond the surface with the second solder balls on the molded structure to a second carrier board, then remove the first carrier board to expose the back surface of the first redistribution layer 501, fabricate a first under-bump metal layer 1101 on the back surface of the first redistribution layer 501, arrange first solder balls on the first under-bump metal layer 1101, and connect the first solder balls to the first under-bump metal layer 1101 through a heat reflow process, remove the second carrier board, and perform D2W (die-to-wafer) + dicing; S6: Mount the optical chip 1 through the first solder balls on the back surface of the first redistribution layer 501; and S7: Mount the package substrate 13 through the second solder balls on the second redistribution layer 502.

[0049] Wherein, there is a thermal conductive adhesive 9 between the package substrate 13 and the electrical chip 8, underfill 12 is filled between the optical chip 1 and the adapter board 3, and between the electrical chip 8 and the adapter board 3, and the surface of the adapter board 3 is also covered with PI.

[0050] In this forming method, corresponding redistribution layers need to be fabricated between the electrical chip 8 / adapter board 3 and the optical chip 1 during subsequent packaging. Here, the process of fabricating the redistribution layers first and then mounting the electrical chip 8 and the adapter board 3 is adopted. Additionally, compared with Example 3 below, there are micro-bumps 16 on the redistribution layer above the electrical chip 8 / silicon adapter board 3 in this example.

[0051] Example 3 This example provides a forming method of an optical engine. As Figure 9 shown, it is a process flow diagram of the graphic encapsulation of an optical engine. The forming method includes: S1: Vertically etch a first through-hole 4 on a silicon substrate; S2: Mount the first side of the adapter board 3 and the front side of the electrical chip 8 onto the first carrier board. Dispose the encapsulant 15 around the adapter board 3 and the electrical chip 8, and then perform a thinning process to expose the first through-holes 4 on the second side of the adapter board 3. S3: Bond the second side of the adapter board 3 to the second carrier board, and remove the first carrier board to expose the first side of the adapter board 3 and the front side of the electrical chip 8. Fabricate the first redistribution layer 501 and the first under-bump metal layer 1101 on the first side of the adapter board 3 and the front side of the electrical chip 8. Then, perform ball planting and heat reflow to form the first solder balls. Then, bond the surface where the first solder balls are located to the third carrier board, and remove the second carrier board to expose the second side of the adapter board 3. S4: Fabricate the second redistribution layer 502 and the second under-bump metal layer 1102 on the second side of the adapter board 3. Then, successively perform ball planting and heat reflow to form the second solder balls. Then, remove the third carrier board and perform dicing. S5: Mount the optical chip 1 through the first solder balls on the back side of the first redistribution layer 501, and perform D2W+ dicing; and S6: Mount the package substrate 13 through the second solder balls on the second side of the adapter board 3.

[0052] Wherein, an underfill 12 is filled between the optical chip 1 or the electrical chip 8 and the adapter board 3; the surface of the adapter board 3 is further covered with polyimide 7; a thermal conductive adhesive 9 is provided between the package substrate 13 and the electrical chip 8.

[0053] In this forming method, corresponding redistribution layers need to be fabricated between the electrical chip 8 / adapter board 3 and the optical chip 1 during subsequent packaging. Here, the electrical chip 8 and the adapter board 3 are mounted, and then the redistribution layers between the electrical chip 8 / adapter board 3 and the optical chip 1 are fabricated.

[0054] The optical engine in the above embodiment integrates a TSV adapter board, replacing the TMV in the traditional 3D fan-out package optical engine, and solving the problems of large key dimensions and low aspect ratio of the TMV. In addition, there will be problems in terms of process, optical device performance, and compatibility when integrating TSVs on the optical chip. When integrating TSVs on the electrical chip, the low-k layer on the electrical chip will pose challenges to TSV integration. In the above embodiment, the TSVs are integrated in the silicon adapter board, avoiding the integration of TSVs on the optical chip and the electrical chip, but integrating the TSVs in the silicon adapter board. This further reduces the area of the electrical chip / optical chip, and can obtain an extremely low module volume, achieving higher integration, lower cost, and higher performance to support a higher number of channels.

[0055] The above embodiments propose an optical engine for CPO / OIO application scenarios and various implementation methods thereof. The most important problem of CPO / OIO currently lies in solving the packaging of the optical engine. Therefore, this optical engine has great commercial value and is expected to be applied in CPO / OIO.

[0056] Although some embodiments of the present invention have been described in this application document, those skilled in the art can understand that these embodiments are merely shown as examples. Those skilled in the art can conceive numerous variant schemes, alternative schemes, and improvement schemes under the teaching of the present invention without exceeding the scope of the present invention. The appended claims are intended to define the scope of the present invention and thereby cover the methods and structures within the scope of these claims themselves and their equivalent transformations.

Claims

1. An optical engine, characterized in that: include: The adapter plate comprises a first surface, a second surface opposite to the first surface, and a first through hole penetrating the first surface and the second surface; Electronic chips; An optical chip, the first surface of the adapter plate and the front surface of the electrical chip are mounted on the optical chip and are electrically connected to the optical chip; as well as A packaging substrate, on which the second surface of the adapter board is mounted and electrically connected.

2. The optical engine according to claim 1, characterized in that: The packaging substrate also has a second through hole extending therethrough.

3. The optical engine according to claim 1, characterized in that: Also includes: A first redistribution layer, wherein the first redistribution layer is located between the optical chip and the adapter board and the electrical chip, wherein the first redistribution layer includes a front side and a back side opposite to the front side, the front side is connected to the adapter board and the electrical chip, and the back side is connected to the optical chip; the first redistribution layer and the second redistribution layer are respectively provided on the first side and the second side of the adapter board.

4. The optical engine according to claim 3, characterized in that: It also includes a third redistribution layer, which is pre-integrated on the optical chip.

5. The optical engine according to claim 4, characterized in that: Also includes: an under bump metallization layer, which is electrically connected to the first redistribution layer, the second redistribution layer and / or the third redistribution layer; A solder ball electrically connected to the under bump metal layer; An underfill is filled on the mounting surfaces of the optical chip, the electrical chip, the adapter board, and the packaging substrate; The thermal conductive adhesive is arranged between the packaging substrate and the electric chip.

6. A method for forming an optical engine as claimed in claim 1, characterized in that: The forming method comprises: forming an adapter plate, the adapter plate comprising a first surface, a second surface opposite to the first surface, and a first through hole penetrating the first surface and the second surface; Mounting the first surface of the adapter plate and the front surface of the electrical chip on the optical chip; and The second surface of the adapter board is mounted on the packaging substrate.

7. The method for forming an optical engine according to claim 6, characterized in that: Forming the adapter plate includes: A first through hole is vertically etched on the front surface of the silicon substrate; Fabricating a first redistribution layer and a first under bump metallization layer on the top of the first through hole, arranging a first solder ball on the first under bump metallization layer, and connecting the first solder ball to the first under bump metallization layer through a heating reflow process; Etching the back side of the silicon substrate to expose the first through hole from the back side; A second redistribution layer and a second under bump metallization layer are fabricated on the first through hole on the back side of the silicon substrate, a second solder ball is arranged on the second under bump metallization layer, and the second solder ball is connected to the second under bump metallization layer through a heating reflow process.

8. The method for forming an optical engine according to claim 6, wherein: A third redistribution layer is pre-integrated on the optical chip, and the first surface of the adapter board and the front surface of the electrical chip are mounted on the third redistribution layer.

9. The method for forming an optical engine according to claim 6, wherein: The surface of the adapter plate is also covered with polyimide; and heat-conducting glue is provided between the packaging substrate and the electric chip.

10. A method for forming an optical engine as claimed in claim 1, characterized in that: The forming method comprises: S1: forming an adapter plate, wherein the adapter plate comprises a first surface, a second surface opposite to the first surface, and a first through hole penetrating the first surface and the second surface; S2: manufacturing a first redistribution layer on a first carrier board, and manufacturing a first under bump metallurgy layer on the front surface of the first redistribution layer, so as to obtain a chip interconnection preprocessing body having a multi-layer redistribution layer and a first under bump metallurgy layer structure; S3: mounting the first surface of the adapter board and the electric chip onto the chip interconnection pre-processing body, placing a plastic encapsulation material around the adapter board and the electric chip, and then performing a thinning process to expose the first through hole on the second surface of the adapter board; S4: manufacturing a second redistribution layer and a second under bump metallization layer on the plastic-encapsulated structure, arranging a second solder ball on the second under bump metallization layer, and connecting the second solder ball to the second under bump metallization layer through a heating reflow process; S5: bonding the side of the plastic-encapsulated structure where the second solder ball is located to a second carrier, then removing the first carrier to expose the back side of the first redistribution layer, and manufacturing a first under bump metallization layer on the back side of the first redistribution layer, arranging a first solder ball on the first under bump metallization layer, and connecting the first solder ball to the first under bump metallization layer through a heating reflow process, removing the second carrier, and performing dicing; S6: mounting the optical chip through the first solder balls on the back side of the first redistribution layer; and S7: Mounting the package substrate via the second solder balls on the second redistribution layer.

11. The method for forming an optical engine according to claim 10, characterized in that: An underfill is filled between the optical chip or the electric chip and the adapter board; the surface of the adapter board is also covered with polyimide; and a heat-conducting adhesive is provided between the packaging substrate and the electric chip.

12. The method for forming an optical engine according to claim 10, characterized in that: In step S3, the molding compound is an epoxy molding compound.

13. A method for forming an optical engine as claimed in claim 1, characterized in that: The forming method comprises: S1: forming an adapter plate, wherein the adapter plate comprises a first surface, a second surface opposite to the first surface, and a first through hole penetrating the first surface and the second surface; S2: Mounting the first surface of the adapter board and the front surface of the electric chip on the first carrier board, placing a plastic encapsulation material around the adapter board and the electric chip, and then performing a thinning process to expose the first through hole on the second surface of the adapter board; S3: Bonding the second surface of the adapter board to the second carrier board, and removing the first carrier board to expose the first surface of the adapter board and the front surface of the electrical chip, and manufacturing a first redistribution layer and a first under-bump metal layer on the first surface of the adapter board and the front surface of the electrical chip, and then implanting balls, heating and reflowing to form first solder balls, and then bonding the surface where the first solder balls are located to the third carrier board, and removing the second carrier board to expose the second surface of the adapter board; S4: manufacturing a second redistribution layer and a second under-bump metallization layer on the second surface of the adapter board, and then performing ball planting and heating reflow in sequence to form second solder balls, and then removing the third carrier board and performing dicing; S5: mounting the optical chip through the first solder balls on the back side of the first redistribution layer, and performing dicing; and S6: Mounting the packaging substrate via the second solder balls on the second surface of the adapter board.

14. The method for forming an optical engine according to claim 13, wherein: An underfill is filled between the optical chip or the electric chip and the adapter board; the surface of the adapter board is also covered with polyimide; and a heat-conducting adhesive is provided between the packaging substrate and the electric chip.

15. The method for forming an optical engine according to claim 13, wherein: In step S2, the molding compound is an epoxy molding compound.

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