Method for constructing linear matrix neural network computing chip based on Mach-Zehnder interferometer

Abstract

The invention discloses a linear matrix neural network computing chip construction method based on a Mach-Zehnder interferometer, relates to the technical field of microelectronics, and has the technical key points that the feasibility of a coherent optical neural network architecture is confirmed by performing cascade topological connection on a silicon-based MZI rectangular array; the design of a real number matrix photon calculation architecture is realized, and corresponding test processes and experience are provided for subsequent work.

Description

Technical Field

[0001] The present invention relates to the field of microelectronics technology, and particularly to a method for constructing a linear matrix neural network computing chip based on a Mach-Zehnder interferometer. Background Art

[0002] As the size of integrated circuit devices gradually approaches the physical limit, phenomena such as quantum tunneling, parasitic effects, and dark silicon gradually emerge, and the development speed of Moore's law begins to slow down. To improve computing performance, microelectronic chips have turned to a low-frequency multi-core strategy, that is, by increasing the number of processor cores rather than simply increasing the clock frequency. However, the von Neumann architecture relied on by traditional computers has a "memory bottleneck" problem, where the speed of its arithmetic components does not match that of the storage components. When the computing power reaches a certain level, the data processing speed will exceed the data access speed, resulting in the inability to synchronize the two, and further preventing the computing power from being further improved by increasing computing components. Nowadays, traditional microelectronic computing chips based on CMOS technology can no longer meet the increasing computing power requirements of artificial intelligence. If CMOS technology continues to be used for development, newly developed electrical computing chips will also be difficult to provide high-speed, low-power, high-energy efficiency, and low-cost computing capabilities, further hindering the development of artificial intelligence and big data analysis. Therefore, breaking through the high-performance computing bottleneck and exploring new computing paradigms have become an urgent task. The state clearly states in the Medium- and Long-Term Science and Technology Development Plan that information technology will continue to develop in the directions of high performance, low cost, pervasive computing, and intelligence, and exploring new computing methods and physical implementation methods is the key challenge in the future information technology field.

[0003] With its unique advantages such as high bandwidth, low loss, low latency, low power consumption, and high parallelism, the application fields of optical signals are gradually expanding. Photonics-based optical computing shows great potential in solving the energy consumption and computing efficiency problems faced by current artificial intelligence technologies. It provides an efficient and scalable computing platform for the training and inference of artificial neural network algorithms. With continuous breakthroughs in optical technologies, optical computing is expected to become one of the mainstream ways of the future artificial intelligence computing hardware architecture, opening up new breakthroughs and possibilities for the development of AI technologies. Currently, the main research direction focuses on how to use optical means to achieve matrix multiplication calculations in artificial neural networks. Common implementation methods include on-chip MZI coherent and WDM technology-based incoherent computing systems. Among these methods, the silicon-based matrix multiplication chip based on the MZI network structure is relatively simple to fabricate, has a high technology maturity level, and is widely recognized. However, in existing MZI interference arrays, the tuning unit usually requires two phase shifters in series, thus increasing the number of driving units. In addition, due to the large number of cascades in the interference array, it may lead to the accumulation of phase errors and large on-chip attenuation, thereby affecting the accuracy of the calculation results. In contrast, the matrix calculation array structure based on the WDM system has various forms. Among them, the microring structure is relatively sensitive and difficult to tune; the implementation process of the PCM structure is incompatible with traditional CMOS processes, and the manufacturing cost is high, which is not suitable for large-scale production; the time-wavelength interleaving system structure is complex and difficult to achieve on-chip integration. Moreover, these systems are limited by the number of WDM channels and cannot achieve scale expansion. The incoherent matrix calculation architecture based on the PIN attenuator array requires a large number of photodetectors and TIAs, resulting in a low on-chip integration level, thereby limiting its scalability.

[0004] Therefore, the present invention aims to provide a construction method for a linear matrix neural network computing chip based on a Mach-Zehnder interferometer to solve the above problems. Summary of the Invention

[0005] The object of the present invention is to solve the above problems and provide a construction method for a linear matrix neural network computing chip based on a Mach-Zehnder interferometer. The present invention confirms the feasibility of the coherent optical neural network architecture by performing cascade topological connection on a silicon-based MZI rectangular array, realizes the design of a real-number matrix photonic computing architecture, and provides corresponding test processes and experiences for subsequent work.

[0006] To achieve the above object, the technical solution of the present invention is as follows:

[0007] The present invention provides a construction method for a linear matrix neural network computing chip based on a Mach-Zehnder interferometer, and the computing method includes the following steps:

[0008] S1. Use the second-order MZI cell structure as the basic unit to construct a second-order unitary matrix. The second-order unitary matrix is topologically cascaded by combining recursion to construct an N-order unitary matrix SU(N). At this time, the second-order MZI cell structure is extended to an N-order MZI array. Then

[0009] SU(N) = T N-1,1 T N-1,2 …T N-1,N-1 …T 3,1 T 3,2 T 2,1 T 2,2 T 1,1 ,

[0010] where T(n) is the definition of the nth second-order MZI cell;

[0011] S2. Use the MZI grid to construct the corresponding unitary matrix according to the formula in S1. Any real-valued matrix network can be further decomposed into two different unitary matrix networks built by MZIs and an attenuator array composed of MZI cells;

[0012] S3. Control the voltage value applied to the phase shifter through the thermo-optic effect or the electro-optic effect, change the transmission state of the MZI, and change the matrix elements realized by the MZI array.

[0013] The method for constructing the computing chip includes the following steps:

[0014] S1. Set a 200-nm top silicon layer on the silicon layer, set a 1.5-μm SOI wafer on the top silicon layer, and set a 300-nm SiO 2 hard mask;

[0015] S2. Repeatedly use photolithography technology three times to perform shallow etching on the silicon layer to form a 200-nm strip waveguide; after each photolithography technology is completed, a layer of photoresist is coated;

[0016] S3. Remove the SiO 2 hard mask, deposit a 1.5-μm silicon dioxide layer on the device to complete the first cladding growth;

[0017] S4. Then deposit 110 nm of titanium nitride and etch titanium oxide to form a thermal electrode; then continue to deposit 400 nm of SiO 2 ;

[0018] S5. Etch above the thermal electrode to form an opening;

[0019] S6. Deposit 1.5-μm-thick aluminum as the metal trace electrode and fill the opening to complete the connection between the metal trace electrode and the thermal electrode;

[0020] S7. Open a hole above the metal electrode Pad to obtain a computing chip.

[0021] Compared with the prior art, the beneficial effects of this solution are as follows:

[0022] Through the cascaded topological connection of the silicon-based MZI rectangular array, the present invention verifies the feasibility of the coherent optical neural network architecture, realizes the design of the real-number matrix photonic computing architecture, and provides corresponding test processes and experiences for subsequent work; further enriches the matrix computing functions and applications of the MZI matrix core, and the computing transmission performance is improved by about 2-4 times; the present invention can be directly used for the computing of optical neural network systems, and is oriented to application requirements such as image recognition in the field of artificial intelligence. Description of the Drawings

[0023] Figure 1 It is a schematic diagram of chip manufacturing in an embodiment of the present invention;

[0024] Figure 2 It is a diagram of the optical passing test results of an 8×8 optical computing chip in an embodiment of the present invention, where a is the test result of input-output ports 1-1; b is the test result of input-output ports 8-8;

[0025] Figure 3 It is a diagram of the relationship between power and voltage and the relationship between variable phase quantity and voltage in an embodiment of the present invention, where a is the relationship between power and voltage; b is the relationship between the changing phase and voltage;

[0026] Figure 4 It is a schematic diagram of the MZI unit structure of the unitary matrix in an embodiment of the present invention. Detailed Embodiments

[0027] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solution of the present invention will be further described in detail below in conjunction with the embodiments and drawings of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

[0028] It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below in conjunction with the embodiments.

[0029] Embodiment 1:

[0030] Working principle of MZI:

[0031] The MZI (Mach-Zehnder interferometer) is an important interference device. By utilizing the interference effect of light, it can function as various functional devices, such as optical switches, filters, modulators, wavelength division multiplexers, etc. These devices have important applications in the fields of optical sensing, optical computing, optical communication, and quantum communication. The silicon-based MZI unit consists of two couplers and two phase-shift arms. The coupler at the input acts as a beam splitter, and the coupler at the output acts as a combiner, both of which are 2×2 couplers. First, the light beam from a single light source is split into two beams by the beam splitter. After each beam passes through different phase-shift arms, a certain phase difference is generated. Finally, these two beams of light are recombined into one beam at the combiner to form an interference signal. According to the different phase differences, constructive interference or destructive interference of light can be achieved. The MZI has the advantages of high reliability, simple principle, and mature manufacturing process. Moreover, its manufacturing process is compatible with CMOS technology. Therefore, the MZI is a key basic unit in optoelectronic integrated systems. According to the transmission matrix theory, the transmission matrix of the MZI can be expressed by the following formula:

[0032]

[0033] Tuning principle of silicon waveguides:

[0034] At a wavelength of 1550 nm, the refractive index of silicon material is 3.48, while the refractive index of silicon dioxide is approximately 1.44. There is a significant refractive index difference between the two. Therefore, there is a large refractive index difference between the waveguide core layer and the cladding of the SOI (silicon photonics integration) structure composed of silicon and silicon dioxide. This difference can more effectively confine the optical field, thereby further reducing the cross-sectional size of the waveguide and enabling a smaller bending radius for the bent waveguide. This characteristic plays a crucial role in the compact layout of integrated devices. In addition, due to the strong confinement of the optical field by the waveguide, it is also conducive to inducing nonlinear optical effects in the waveguide, such as thermo-optic effect and free carrier dispersion effect, through means such as heating or carrier doping, so that the waveguide device has a tuning function.

[0035] Formula for the phase change of the phase shifter caused by the change in refractive index: ΔΦ = 2π / λΔ eff L

[0036] Thermo-optic coefficient formula: dn / dT = 1.86×10 -4 / K

[0037] SU(N) = T N-1,1 T N-1,2 …T N-1,N-1 …T 3,1 T 3,2 T 2,1 T 2,2 T 1,1

[0038] Coherent Optical Linear Matrix Calculation Architecture and Its Working Principle:

[0039] (a) Implementation of Second-Order Unitary Matrix

[0040] To achieve the goal of implementing high-order matrices in optical computing algorithms, it is necessary to use a second-order MZI as the basic unit to implement a second-order unitary matrix. The MZI unit used to implement the unitary matrix consists of two couplers, an external phase shifter, and an internal phase shifter. By changing two phases, the phase and intensity of the output optical signal can be adjusted, thereby achieving the control of the second-order input light by the second-order matrix. When two coherent light beams are transmitted through the MZI structure, the optical energy is redistributed, so that the complex amplitude of the output light is equal to the product of the MZI equivalent matrix and the input optical complex amplitude vector. Mathematically, the formula for the second-order equivalent matrix of a two-port input and two-port output MZI can be expressed as:

[0041]

[0042] (b) Decomposition and Physical Implementation of N-Order Unitary Matrix

[0043] The second-order unitary matrix can be cascaded topologically by combining recursion to implement unitary matrices of any scale. Starting from a basic second-order MZI structure unit, it is further extended to an N-order MZI array.

[0044] In this process, the second-order MZI structure units need to be repeatedly stacked along the input and output ends. At the input end, several second-order MZI structure units are connected in parallel and then form a multi-channel array. Among them, the optical paths between any two adjacent channels will pass through a second-order MZI structure unit. Therefore, the phase difference of each second-order MZI structure unit can be adjusted to obtain different light intensity distributions, and then the corresponding array output end can be obtained through mirror symmetry. Through the above recursive method, the second-order MZI structure units can be stacked at the input and output ends to construct an N-order MZI array. Defining an arbitrary N×N unitary matrix as SU(N) and the nth second-order MZI unit as T(n), then this N×N unitary matrix (N-order unitary matrix) can be decomposed into the product of N(N - 1) / 2 rotation submatrices:

[0045] SU(N) = T N-1,1 T N-1,2 …T N-1,N-1 …T 3,1 T 3,2 T 2,1 T 2,2 T 1,1

[0046] According to this formula, the corresponding unitary matrix can be constructed using the MZI grid. Any real-valued matrix network can be further decomposed into two unitary matrix networks built by different MZIs and an array of attenuators composed of MZI units. Any N×N unitary matrix SU(N) can be expressed as:

[0047] SU(N) = DΠT n,n+1

[0048] where D is a diagonal unitary matrix obtained by multiplying any unitary matrix in a certain order with N(N - 1) / 2 Ts n,n+1 or multiplications. Therefore, any N×N unitary matrix can be realized by N(N - 1) / 2 MZIs and N phase shifters. The unitary matrix formed by the rectangular MZI array, like the triangular unitary matrix, can also be used to construct any real matrix through singular value decomposition.

[0049] In summary, any matrix-vector multiplication can be realized through a specific cascaded form of MZI array. The phase shifts φ and θ of the phase shifters determine the element values of the matrix, and the phase shifters can be controlled by methods such as the thermo-optic effect or electro-optic effect of silicon. By controlling the voltage value applied to the phase shifter, the transmission state of the MZI can be changed, achieving the purpose of changing the matrix elements realized by the MZI array.

[0050] Example 2:

[0051] Design a chip using the construction method of a linear matrix neural network computing chip based on a Mach-Zehnder interferometer, and perform simulation calculations through the Python programming language and the Lumerical Interconnect module.

[0052] The device fabrication work was completed by Advanced Micro Foundry in Singapore and was fabricated using a CMOS process line. The specific steps include:

[0053] (a) Select an SOI wafer with a top silicon thickness of 200 nm and a buried oxide layer thickness of 1.5 μm, and grow a 300 nm SiO 2 hard mask on its top layer.

[0054] (b) Using lithography technology, perform a 70 nm shallow etch on the silicon layer to form a grating and a 70 nm ridge waveguide. Then, coat a layer of photoresist to protect the grating and form a 110 nm ridge waveguide through a second etching operation.

[0055] (c) Coat another layer of photoresist to protect the grating and the ridge waveguide, and finally form a 200 nm strip waveguide through a third etching of 80 nm.

[0056] (d) Remove the hard mask to complete the graphic fabrication of the passive waveguide device.

[0057] (e) Deposit a silicon dioxide layer of about 1.5 μm on the device to complete the growth of the first cladding layer.

[0058] (f) Then deposit 110 nm of titanium nitride and etch titanium oxide to form a thermal electrode. Then, continue to deposit about 400 nm of SiO 2 .

[0059] (g) After depositing SiO 2 , etch the area above the thermal electrode to form an opening.

[0060] (h) Subsequently, deposit 1.5 μm thick aluminum as the metal trace electrode and fill the opening to complete the connection between the metal trace electrode and the thermal electrode.

[0061] (i) Finally, open an opening above the metal electrode Pad to complete the fabrication of the thermo - optical switch.

[0062] Use the Interconnect module in the Lumerical commercial software to perform optical path simulation verification on the MZI network: In the Interconnect software interface, add 2×2 MMI and phase shifter components from the component library. In the software, copy the created MZI unit and form an MZI rectangular array through corresponding connection methods, and use an optical network analyzer as the light source and receiver. Among them, the simulation result of the optical network analyzer is the ratio of the MZI array output to the splitter input. Therefore, it is necessary to multiply the simulation result by the corresponding splitting multiple and compare it with the equivalent matrix of the MZI. If the optical intensities of the four - channel input signals are all 1 mW, when the phase value accuracy is five decimal places, the product of the simulation result and the unitary matrix is shown in Table 1. And when the phase value accuracy is three decimal places, the product of the simulation result and the unitary matrix is shown in Table 2. Through comparison, the result shows that the accuracy reaches 99.9999%, so the MZI phase value can be approximated to four decimal places. Next, use simulation to verify the function of the convolutional neural network. Build the schematic diagram of the MZI rectangular array in Interconnect, load the phase shift parameters corresponding to the convolutional layer, and use the picture data of the MNIST handwritten digit test set as the input of the optical path, further simulate the optical path to complete the convolutional calculation, and then the circuit completes the fully - connected layer calculation and obtains the prediction result. At the same time, the simulation also considers the influence of phase shift parameters and input data accuracy on the matrix - vector multiplication calculation and the prediction result of the convolutional neural network.

[0063] Table 1 The product of the unitary matrix and the vector simulation result after approximating the phase value to 5 digits in the simulation

[0064]

[0065]

[0066] Table 2 Simulation results of the unitary matrix and vector after the phase value is approximated to 3 digits in the simulation

[0067]

[0068] Working principle

[0069] The uniqueness of the silicon-based photonic linear matrix calculation chip lies in its ability to perform calculations simultaneously during information transmission. Since light propagates in the waveguide at a speed close to the speed of light, the chip can achieve ultra-low latency information processing at the picosecond level. In addition, the optical transmission loss in the integrated photonic device is extremely low, and almost no Joule heat is generated during propagation. This characteristic not only significantly reduces the energy consumption, but also provides theoretical support for breaking through the bottleneck of thermodynamic information entropy in the traditional digital computing paradigm. Therefore, the silicon-based on-chip linear matrix calculation chip with high accuracy, high scalability and high practicability has great development potential. The present invention uses an MZI array chip to improve the calculation efficiency of optical computing and can complete large-scale linear matrix calculations in a short time.

[0070] The above specific embodiments are only explanations of the present invention, and they are not limitations of the present invention. Those skilled in the art can make modifications without creative contributions to this embodiment according to needs after reading this specification, but as long as they are within the scope of the claims of the present invention, they are protected by the patent law.

Claims

1. A method for constructing a Mach-Zehnder interferometer linear matrix neural network computing chip, characterized by: The calculation method comprises the following steps: S1. The second-order MZI unit structure is used as the basic unit to construct a second-order unitary matrix. The second-order unitary matrix is ​​topologically cascaded by combining recursion to construct an N-order unitary matrix SU(N). At this time, the second-order MZI unit structure is expanded to an N-order MZI array, then SU(N)=T N-1,1 T N-1,2 …T N-1,N-1 …T 3,1 T 3,2 T 2,1 T 2,2 T 1,1 , Where, T(n) is defined for the nth second-order MZI unit; S2. Use the MZI grid to construct the corresponding unitary matrix according to the formula in S1. Any real-valued matrix network can be further decomposed into two unitary matrix networks built by different MZIs and a set of attenuator arrays composed of MZI units. S3. By means of thermo-optical effect or electro-optical effect, the voltage value applied to the phase shifter is controlled to change the state of MZI transmission and the matrix elements realized by the MZI array.

2. The method for constructing a Mach-Zehnder interferometer linear matrix neural network computing chip according to claim 1, characterized in that: The N-order unitary matrix SU(N) can also be expressed as: SU(N)=DΠT n,n+1 Where D is an arbitrary unitary matrix in a certain order and N(N-1) / 2 T n,n+1 or The diagonal unitary matrix obtained by multiplication; any N-order unitary matrix can be realized by N(N-1) / 2 MZIs and N phase shifters.

3. The method for constructing a Mach-Zehnder interferometer linear matrix neural network computing chip according to claim 1, characterized in that: The MZI unit structure, two couplers, an external phase shifter and an internal phase shifter can form a unitary matrix.

4. The method for constructing a Mach-Zehnder interferometer linear matrix neural network computing chip according to claim 1, characterized in that: The computing chip construction method comprises the following steps: S1, setting a 200nm top silicon on the silicon layer, setting a 1.5μm SOI wafer on the top silicon, and setting a 300nm SiO2 hard mask on the SOI wafer; S2, repeating the photolithography technique three times to perform shallow etching on the silicon layer to form a 200nm strip waveguide; after each photolithography technique is completed, a layer of photoresist is applied; S3, remove the SiO2 hard mask, deposit a 1.5 μm silicon dioxide layer on the device, and complete the first cladding growth; S4, then deposit 110nm of titanium nitride and etch titanium oxide to form a hot electrode; then continue to deposit 400nm of SiO2 on the hot electrode; S5, etching the top of the hot electrode to form an opening; S6, depositing aluminum with a thickness of 1.5 μm as a metal wiring electrode, and filling the opening to complete the connection between the metal wiring electrode and the hot electrode; S7. Open a hole above the metal electrode Pad to obtain a computing chip.

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