Single-phase inverter and related equipment

Abstract

The invention provides a single-phase inverter and related equipment, in a driving circuit of the single-phase inverter, the input end of a first modulation wave output circuit and the input end of a second modulation wave output circuit are both used for receiving voltage signals at the two ends of a high-frequency bridge arm; the output end of the first modulated wave output circuit and the output end of the second modulated wave output circuit are connected with the first input end and the second input end of the driving signal output circuit respectively. A third input end of the driving signal output circuit is used for receiving a carrier wave, and a first output end and a second output end of the driving signal output circuit are respectively connected with a first switch and a second switch in an upper bridge arm switch of a high-frequency bridge arm; the first output end of the driving signal output circuit is connected with the second switch in the lower bridge arm switch of the high-frequency bridge arm through the first phase inverter, and the second output end of the driving signal output circuit is connected with the first switch in the lower bridge arm switch of the high-frequency bridge arm through the second phase inverter. Based on the invention, the cost and the size of the driving circuit are greatly reduced.

Description

Technical Field

[0001] This application relates to the technical field of new energy vehicles, and particularly to a single-phase inverter and related devices. Background Art

[0002] Existing silicon (Si) insulated gate bipolar transistors (IGBTs) have advantages such as large current-carrying capacity and low chip cost. Therefore, Si IGBTs are often used in medium- and high-power application fields. However, there is a tail current during the turn-off process of Si IGBTs, which leads to excessive switching losses of Si IGBTs. Silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) have advantages such as lower on-state voltage drop and faster switching speed. Therefore, when Si IGBTs are used in medium- and high-power application fields, a SiC MOSFET is usually connected in parallel at both ends of the Si IGBT to form a Si / SiC hybrid device (hybrid switch), so that the Si / SiC hybrid device simultaneously has the advantages of low on-state voltage drop, high current-carrying capacity, and low switching losses, thereby improving the comprehensive performance of the system.

[0003] Currently, when the Si / SiC hybrid device is applied to an inverter, due to the different working timings of the SiC MOSFET and the Si IGBT, the inverter outputs independent pulse width modulation (PWM) drive signals to the SiC MOSFET and the Si IGBT respectively for different circuit conditions (such as light load, heavy load, open circuit, and short circuit conditions), so that the inverter can supply power to the load normally. Among them, the drive circuit in the inverter needs to rely on an external digital signal processor (DSP) to output independent PWM drive signals, resulting in a larger volume and higher cost of the overall drive circuit. Summary of the Invention

[0004] This application provides a single-phase inverter and related devices, which can greatly reduce the cost and volume of the drive circuit.

[0005] In a first aspect, an embodiment of the present application provides a single-phase inverter. The single-phase inverter includes a high-frequency bridge arm and a driving circuit. The high-frequency bridge arm includes a series-connected upper-bridge-arm switch and a lower-bridge-arm switch. Each bridge-arm switch in the upper-bridge-arm switch and the lower-bridge-arm switch is composed of a first switch and a second switch in parallel, that is, both the upper-bridge-arm switch and the lower-bridge-arm switch are hybrid devices. The switching frequency of the high-frequency bridge arm is higher than the power frequency, that is, the high-frequency bridge arm is the bridge arm in the single-phase inverter with a switching frequency higher than the power frequency. The above driving circuit includes analog circuits such as a first modulation-wave output circuit, a second modulation-wave output circuit, and a driving-signal output circuit. Among them, the input ends of both the first modulation-wave output circuit and the second modulation-wave output circuit are used to receive the voltage signals at both ends of the high-frequency bridge arm. The output end of the first modulation-wave output circuit is connected to the first input end of the driving-signal output circuit, and the output end of the second modulation-wave output circuit is connected to the second input end of the driving-signal output circuit. The third input end of the driving-signal output circuit is used to receive a carrier wave. The first output end of the driving-signal output circuit is connected to the first switch in the upper-bridge-arm switch. The first output end of the driving-signal output circuit is connected to the second switch in the lower-bridge-arm switch through a first inverter. The second output end of the driving-signal output circuit is connected to the second switch in the upper-bridge-arm switch. The second output end of the driving-signal output circuit is connected to the first switch in the lower-bridge-arm switch through a second inverter.

[0006] Implementing the embodiment of the present application, using the driving circuit (i.e., the analog circuit) to control the switching driving signals of hybrid devices such as the upper-bridge-arm switch and the lower-bridge-arm switch can give full play to the advantages of low conduction voltage drop, high current-carrying capacity, and low switching loss of the hybrid devices, and there is no need to rely on an external digital driver to output the switching driving signals, thereby greatly reducing the cost and volume of the driving circuit, while reducing the usage threshold of the hybrid devices and having strong applicability.

[0007] In combination with the first aspect, in a possible implementation, the first modulation wave output circuit is configured to output a first modulation wave with a first voltage amplitude to the drive signal output circuit based on the voltage signal across the high-frequency bridge arm. The second modulation wave output circuit is configured to output a second modulation wave with a second voltage amplitude to the drive signal output circuit based on the voltage signal across the high-frequency bridge arm. Wherein, the first voltage amplitude and the second voltage amplitude are different voltage amplitudes. Further, the drive signal output circuit is configured to compare the first modulation wave with the carrier wave, output a first drive signal to the first switch in the upper bridge arm switch, and output a first inverted drive signal to the second switch in the lower bridge arm switch through a first inverter. The drive signal output circuit is further configured to compare the second modulation wave with the carrier wave, output a second drive signal to the second switch in the upper bridge arm switch, and output a second inverted drive signal to the first switch in the lower bridge arm switch through a second inverter, so that the current output power of the single-phase inverter is less than or equal to the rated output power. It should be understood that when the current output power of the single-phase inverter is equal to the rated output power, the single-phase inverter is in a full-load working condition. When the current output power of the single-phase inverter is less than the rated output power, the single-phase inverter is in a light-load working condition or a no-load working condition. Implementing the embodiments of the present application can output different switch drive signals to hybrid devices such as the upper bridge arm switch and the lower bridge arm switch based on the voltage signal across the high-frequency bridge arm collected in real time, so that the single-phase inverter can adapt to different working conditions such as full-load working conditions, light-load working conditions, and no-load working conditions, thereby improving the control flexibility of the switch drive signal, and the applicable application scenarios of the single-phase inverter are more diverse.

[0008] In combination with the first aspect, in a possible implementation manner, each modulation wave output circuit in the first modulation wave output circuit and the second modulation wave output circuit includes an amplitude adjustment circuit and a modulation wave generation circuit. Among them, the input end of the amplitude adjustment circuit is connected to the input end of each modulation wave output circuit, the output end of the amplitude adjustment circuit is connected to the input end of the modulation wave generation circuit, and the output end of the modulation wave generation circuit is connected to the output end of each modulation wave output circuit. When each modulation wave output circuit is working, the amplitude adjustment circuit is used to adjust the voltage amplitude of the voltage signal across the high-frequency bridge arm and output a target voltage signal to the modulation wave generation circuit. Further, the modulation wave generation circuit is used to generate a modulation wave based on the target voltage signal. Among them, when the voltage amplitude of the target voltage signal is the first voltage amplitude, the modulation wave is the first modulation wave. When the voltage amplitude of the target voltage signal is the second voltage amplitude, the modulation wave is the second modulation wave. Implementing the embodiments of the present application, since the voltage amplitude of the carrier remains unchanged, it can be obtained that the pulse width of the switching drive signal of the high-frequency bridge arm (i.e., the width of the high-level signal) depends on the voltage amplitude of the modulation wave. Therefore, by dynamically adjusting the voltage amplitude of the modulation wave based on the voltage signal across the high-frequency bridge arm collected in real time, the pulse width of the switching drive signal of the high-frequency bridge arm can be further adjusted, thereby improving the control flexibility of the switching drive signal.

[0009] In combination with the first aspect, in a possible implementation manner, the amplitude adjustment circuit includes a voltage amplifier. Among them, the input end of the voltage amplifier is connected to the input end of the amplitude adjustment circuit, and the output end of the voltage amplifier is connected to the output end of the amplitude adjustment circuit. The above voltage amplifier is used to amplify the voltage amplitude of the voltage signal across the high-frequency bridge arm and output a target voltage signal to the modulation wave generation circuit. Among them, the voltage amplitude of the target voltage signal is the amplified voltage amplitude, and the voltage amplitude of the target voltage signal is specifically determined by the component parameters inside the voltage amplifier, which is not limited here. Implementing the embodiments of the present application, the voltage amplitude of the voltage signal across the high-frequency bridge arm can be dynamically adjusted by adjusting the component parameters inside the voltage amplifier, and the adjustment method is more flexible.

[0010] In combination with the first aspect, in a possible implementation manner, the amplitude adjustment circuit further includes an adder, where the adder is disposed between the input end of the voltage amplifier and the input end of the amplitude adjustment circuit. The adder is configured to adjust the voltage amplitude of the voltage signal across the high-frequency bridge arm and output the adjusted voltage signal to the voltage amplifier. Further, the voltage amplifier is configured to amplify the voltage amplitude of the adjusted voltage signal and output a target voltage signal to the modulation wave generation circuit. The voltage amplitude of the target voltage signal is specifically determined by the component parameters inside the adder and the voltage amplifier, which is not limited herein. Implementing the embodiments of the present application, the voltage amplitude of the voltage signal across the high-frequency bridge arm can be dynamically adjusted by adjusting the component parameters inside the adder and the voltage amplifier, and the adjustment range of the voltage amplitude is larger.

[0011] In combination with the first aspect, in a possible implementation manner, the modulation wave generation circuit includes a first signal generator and an absolute value circuit, where the input end of the first signal generator is connected to the input end of the modulation wave generation circuit, the output end of the first signal generator is connected to the input end of the absolute value circuit, and the output end of the absolute value circuit is connected to the output end of the modulation wave generation circuit. The first signal generator is configured to output a first waveform signal to the absolute value circuit based on the target voltage signal. Further, the absolute value circuit is configured to generate a modulation wave based on the first waveform signal. Exemplarily, the sine wave of the negative voltage in the first waveform signal is flipped to the positive voltage range to generate a first modulation wave. The first voltage amplitude of the first modulation wave is the same as the voltage amplitude of the target voltage signal. Implementing the embodiments of the present application, a first modulation wave with a positive voltage can be generated by the first signal generator and the absolute value circuit, which is more convenient for comparison with the carrier wave and the driving method is simpler.

[0012] In combination with the first aspect, in a possible implementation manner, the drive signal output circuit includes a first comparator. The first input terminal of the first comparator is connected to the first input terminal of the drive signal output circuit, the second input terminal of the first comparator is connected to the third input terminal of the drive signal output circuit, and the output terminal of the first comparator is connected to the first output terminal of the drive signal output circuit. The first comparator is configured to output the first drive signal as a first level when the first voltage amplitude of the first modulation wave is greater than the voltage amplitude of the carrier wave, and output the first drive signal as a second level when the first voltage amplitude of the first modulation wave is less than the voltage amplitude of the carrier wave. Wherein, when the first level is a low level, the second level is a high level, or when the first level is a high level, the second level is a low level. Taking the case where the first level is a high level and the second level is a low level as an example, the first switch is configured to conduct when the first drive signal is a high level and turn off when the first drive signal is a low level. Implementing the embodiments of the present application, different pulse widths of the first drive signal are output in real time according to the voltage amplitude of the carrier wave and the dynamically adjusted first voltage amplitude, thereby improving the control flexibility of the first switch and adapting to different working conditions of the single-phase inverter.

[0013] In combination with the first aspect, in a possible implementation manner, the drive signal output circuit further includes a second comparator. The first input terminal of the second comparator is connected to the second input terminal of the drive signal output circuit, the second input terminal of the second comparator is connected to the third input terminal of the drive signal output circuit, and the output terminal of the second comparator is connected to the second output terminal of the drive signal output circuit. The second comparator is configured to output the second drive signal as a first level when the second voltage amplitude of the second modulation wave is greater than the voltage amplitude of the carrier wave, and output the second drive signal as a second level when the second voltage amplitude of the second modulation wave is less than the voltage amplitude of the carrier wave. Taking the case where the first level is a high level and the second level is a low level as an example, the second switch is configured to conduct when the second drive signal is a high level and turn off when the second drive signal is a low level. Implementing the embodiments of the present application, different pulse widths of the second drive signal are output in real time according to the voltage amplitude of the carrier wave and the dynamically adjusted second voltage amplitude, thereby improving the control flexibility of the second switch and adapting to different working conditions of the single-phase inverter.

[0014] In combination with the first aspect, in a possible implementation manner, the drive circuit further includes a carrier output circuit. The output terminal of the carrier output circuit is connected to the third input terminal of the drive signal output circuit. The carrier output circuit is configured to output a carrier wave to the drive signal output circuit. Implementing the embodiments of the present application, a carrier wave can be output by the carrier output circuit (i.e., an analog circuit) to compare with the modulation wave, without relying on an external digital driver, thereby reducing the volume and cost of the drive circuit.

[0015] In combination with the first aspect, in a possible implementation manner, the carrier output circuit includes a second signal generator and a level shift circuit. Among them, the output end of the second signal generator is connected to the input end of the level shift circuit, and the output end of the level shift circuit is connected to the output end of the carrier output circuit. The second signal generator is used to output a second waveform signal to the level shift circuit. Further, the level shift circuit is used to generate a carrier based on the second waveform signal. Exemplarily, the triangular wave with negative voltage in the second waveform signal is shifted to the positive voltage range to output a carrier with positive voltage to the drive signal output circuit. Among them, the voltage amplitude of the carrier remains unchanged. Implementing the embodiments of the present application can generate a carrier with positive voltage through the second signal generator and the level shift circuit, which is more convenient for comparison with the modulation wave and the driving method is simpler.

[0016] In combination with the first aspect, in a possible implementation manner, the drive circuit further includes a current sensor. Among them, the input end of the current sensor is connected to one end of the upper bridge arm switch far from the lower bridge arm switch, and the output end of the current sensor is connected to the input ends of the first modulation wave output circuit and the second modulation wave output circuit. The current sensor is used to collect the current passing through the high-frequency bridge arm and output the voltage signals at both ends of the high-frequency bridge arm to the first modulation wave output circuit and the second modulation wave output circuit respectively based on the current passing through the high-frequency bridge arm. Among them, the magnitude of the current passing through the high-frequency bridge arm is used to judge the actual working condition of the single-phase inverter. Implementing the embodiments of the present application can output voltage signals under different working conditions according to the current passing through the high-frequency bridge arm, so as to control the switching drive signals of the high-frequency bridge arm required under different working conditions.

[0017] In combination with the first aspect, in a possible implementation manner, the single-phase inverter further includes a power frequency bridge arm, and the switching frequency of the power frequency bridge arm is the power frequency. Among them, the power frequency bridge arm and the high-frequency bridge arm are connected in parallel to connect to the DC source, and the midpoints of the power frequency bridge arm and the high-frequency bridge arm are used to connect the two ends of the AC load. When the single-phase inverter supplies power to the AC load, the upper bridge arm switch and the lower bridge arm switch in the power frequency bridge arm are used to conduct alternately according to the switching drive signal of the power frequency bridge arm. Among them, the switching drive signal of the power frequency bridge arm can be output by the drive circuit or the controller inside the single-phase inverter, which is not limited here. The upper bridge arm switch and the lower bridge arm switch in the high-frequency bridge arm are used to conduct complementarily according to the switching drive signal of the high-frequency bridge arm output by the drive circuit. At this time, the current output power of the single-phase inverter is less than or equal to the rated output power, and the direct current output by the DC source is inverted into alternating current to supply power to the AC load. Implementing the embodiments of the present application can meet the different working condition requirements of the AC load while supplying power to the AC load, and has stronger applicability.

[0018] Second aspect, an embodiment of the present application provides a motor control unit (MCU). The MCU includes an input port, an output port, and a single-phase inverter provided in any one of the possible implementation manners of the first aspect and its combinations as described above. Among them, the input port is used to connect to a power battery. The industrial frequency bridge arm and the high-frequency bridge arm in the single-phase inverter are connected in parallel and then connected to the input port. The midpoint of the industrial frequency bridge arm and the midpoint of the high-frequency bridge arm are connected to the output port, and the output port is used to connect to a motor. The single-phase inverter is used to invert the direct current output by the power battery into alternating current and drive the motor. Implementing the embodiment of the present application can improve the integration of the MCU and reduce the cost and volume of the MCU because the single-phase inverter is smaller in volume and lower in cost.

[0019] Third aspect, an embodiment of the present application provides a powertrain. The powertrain includes a motor and the MCU provided in the second aspect. Among them, the MCU is used to invert the direct current output by the power battery into alternating current and drive the motor.

[0020] Fourth aspect, an embodiment of the present application provides an electric vehicle. The electric vehicle includes a power battery and the powertrain provided in the third aspect. Among them, the power battery is used to output direct current to the powertrain.

[0021] It should be understood that the implementations and beneficial effects of the above multiple aspects of the present application can be referred to each other. Description of the Drawings

[0022] Figure 1 It is a schematic structural diagram of the electric vehicle provided by the embodiment of the present application;

[0023] Figure 2 It is a schematic structural diagram of a single-phase inverter provided by the embodiment of the present application;

[0024] Figure 3 It is another schematic structural diagram of a single-phase inverter provided by the embodiment of the present application;

[0025] Figure 4 It is another schematic structural diagram of a single-phase inverter provided by the embodiment of the present application;

[0026] Figure 5A It is a schematic circuit diagram of an amplitude adjustment circuit provided by the embodiment of the present application;

[0027] Figure 5B It is another schematic circuit diagram of an amplitude adjustment circuit provided by the embodiment of the present application;

[0028] Figure 6 It is a circuit diagram of a modulation wave generation circuit provided by the embodiment of the present application;

[0029] Figure 7 It is another schematic structural diagram of a single-phase inverter provided by the embodiment of the present application;

[0030] Figure 8 is a schematic circuit diagram of the carrier output circuit provided by an embodiment of the present application;

[0031] Figure 9 is a schematic circuit diagram of the drive signal output circuit provided by an embodiment of the present application;

[0032] Figure 10 is a schematic waveform diagram of the switching drive signal of the high-frequency bridge arm provided by an embodiment of the present application;

[0033] Figure 11A is a schematic voltage waveform diagram of the first switch and the second switch in the upper-bridge arm switch when the single-phase inverter provided by an embodiment of the present application is in the full-load working condition;

[0034] Figure 11B is a schematic voltage waveform diagram of the first switch and the second switch in the upper-bridge arm switch when the single-phase inverter provided by an embodiment of the present application is in the light-load working condition;

[0035] Figure 12 is a schematic circuit diagram of the single-phase inverter provided by an embodiment of the present application;

[0036] Figure 13 is a schematic structural diagram of the motor controller MCU provided by an embodiment of the present application. Detailed implementation manners

[0037] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, rather than all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0038] Next, the implementation of the technical solutions of the present application will be further described in detail in conjunction with the accompanying drawings.

[0039] Refer to Figure 1 , Figure 1 which is a schematic structural diagram of an electric vehicle provided by an embodiment of the present application. As Figure 1 shown, the electric vehicle 1 includes a power battery 10 and a powertrain 11, and the power battery 10 is used to output direct current to the powertrain 11.

[0040] The powertrain 11 includes a motor 111 and a motor control unit (MCU) 112. The MCU 112 is configured to invert the direct current output by the power battery 10 into alternating current and drive the motor 111. In a specific implementation, the MCU 112 includes a power-frequency bridge arm, a high-frequency bridge arm, and a drive circuit. The power-frequency bridge arm and the high-frequency bridge arm are connected in parallel to the power battery 10, and the midpoints of the power-frequency bridge arm and the high-frequency bridge arm are connected to the motor 111. Among them, the switching frequency of the power-frequency bridge arm is the power frequency, and the switching frequency of the high-frequency bridge arm is higher than the power frequency. The drive circuit is configured to output a switching drive signal to the high-frequency bridge arm based on the voltage signal across the high-frequency bridge arm, so that the MCU 112 can invert the direct current output by the power battery 10 into alternating current and drive the motor 111.

[0041] Implementing the embodiments of the present application can output an independent switching drive signal to the high-frequency bridge arm through the drive circuit, without relying on an external digital signal processor (DSP) to output a switching drive signal, thereby greatly reducing the cost and volume of the drive circuit, and further reducing the cost and volume of the MCU 112 and the powertrain 11, with strong applicability.

[0042] The following will combine Figures 2 to 13 to exemplarily illustrate the single-phase inverter, the motor control unit (MCU), and its working principle provided by the present application.

[0043] Refer to Figure 2 , Figure 2 which is a schematic structural diagram of a single-phase inverter provided by an embodiment of the present application. As Figure 2 shown, the single-phase inverter 2 includes a high-frequency bridge arm 20 and a drive circuit 21.

[0044] The high-frequency bridge arm 20 includes an upper bridge arm switch H1 and a lower bridge arm switch H2 connected in series. Each of the upper bridge arm switch H1 and the lower bridge arm switch H2 is composed of a first switch and a second switch connected in parallel. Among them, when the first switch is an IGBT, the second switch is a MOSFET, or when the first switch is a MOSFET, the second switch is an IGBT. Exemplarily, the upper bridge arm switch H1 is composed of a first switch Q1 and a second switch Q2 connected in parallel, and the lower bridge arm switch H2 is composed of a first switch Q3 and a second switch Q4 connected in parallel. The first switch Q1 and the first switch Q3 are both Si IGBTs, and the second switch Q2 and the second switch Q4 are both SiC MOSFETs, that is, both the upper bridge arm switch H1 and the lower bridge arm switch H2 are Si IGBT&SiC MOS hybrid devices. The switching frequency of the high-frequency bridge arm 20 is higher than the power frequency, that is, the high-frequency bridge arm 20 is the bridge arm in the single-phase inverter 2 with a switching frequency higher than the power frequency. Exemplarily, the power frequency is 50 Hz or 60 Hz.

[0045] The drive circuit 21 includes a first modulation wave output circuit 210, a second modulation wave output circuit 211, and a drive signal output circuit 212. Among them, the input terminal in of the first modulation wave output circuit 210 1 and the input terminal in of the second modulation wave output circuit 211 2 are both used to receive the voltage signal U across the two ends of the high-frequency bridge arm 20 i , the output terminal out of the first modulation wave output circuit 210 1 is connected to the first input terminal in of the drive signal output circuit 212 3 , the output terminal out of the second modulation wave output circuit 211 2 is connected to the second input terminal in of the drive signal output circuit 212 4 , the third input terminal in of the drive signal output circuit 212 5 is used to receive the carrier wave Z, the first output terminal out of the drive signal output circuit 212 31 is connected to the first switch Q1, the first output terminal out of the drive signal output circuit 212 3 is connected to the second switch Q4 through the first inverter 213, the second output terminal out of the drive signal output circuit 212 32 is connected to the second switch Q2, the second output terminal out of the drive signal output circuit 212 4 is connected to the first switch Q3 through the second inverter 214. It should be understood that the first modulation wave output circuit 210 is a circuit for outputting the modulation wave M corresponding to the first switch Q1 1 , the second modulation wave output circuit 211 is a circuit for outputting the modulation wave M corresponding to the second switch Q2 2 . The drive signal output circuit 212 is a circuit for outputting the switch drive signal of the high-frequency bridge arm 20. The first inverter 213 and the second inverter 214 are devices that can reverse the phase of the input signal by 180 degrees.

[0046] Implementing the embodiments of the present application, using the drive circuit 21 (i.e., an analog circuit) to control the switch drive signals of Si IGBT&SiC MOS hybrid devices such as the upper bridge arm switch H1 and the lower bridge arm switch H2 can give full play to the advantages of low conduction voltage drop, high current-carrying capacity, and low switching loss of Si IGBT&SiC MOS hybrid devices, and there is no need to rely on external digital drivers to output switch drive signals, thereby greatly reducing the cost and volume of the drive circuit 21, and at the same time reducing the usage threshold of Si IGBT&SiC MOS hybrid devices, with strong applicability.

[0047] Exemplarily, the digital driver can be one of a DSP, a field-programmable gate array (FPGA), and a complex programmable logic device (CPLD).

[0048] In some feasible embodiments, the driving circuit 21 and the single-phase inverter circuit where the high-frequency bridge arm 20 is located can be integrated on the same circuit board, so as to realize the miniaturization and integration of the single-phase inverter 2.

[0049] In some feasible embodiments, the component parameters inside the first modulation wave output circuit 210, the second modulation wave output circuit 211, and the drive signal output circuit 212 are determined by the preset pulse width of the first switch Q1, the preset pulse width of the second switch Q2, and the preset switch delay time between the first switch Q1 and the second switch Q2. Among them, the preset pulse width and the preset switch delay time of the first switch Q1 and the second switch Q2 can be pre-set values, or can be values determined according to the voltage waveform simulated by the specific working conditions of the single-phase inverter 2. Exemplarily, the specific working conditions of the single-phase inverter 2 include light load conditions, no-load conditions, and full load conditions. Implementing the embodiments of the present application can control the switching drive signal of the high-frequency bridge arm 20 to make the single-phase inverter 2 in different working conditions by adjusting the component parameters inside analog circuits such as the first modulation wave output circuit 210, the second modulation wave output circuit 211, and the drive signal output circuit 212, with stronger adaptability.

[0050] In some feasible embodiments, the first modulation wave output circuit 210 is used to output a first modulation wave M with a first voltage amplitude to the drive signal output circuit 212 based on the voltage signal U at both ends of the high-frequency bridge arm 20 i The second modulation wave output circuit 211 is used to output a second modulation wave M with a second voltage amplitude to the drive signal output circuit 212 based on the voltage signal U at both ends of the high-frequency bridge arm 20 1 wherein, the voltage signal U at both ends of the high-frequency bridge arm 20 i is a voltage signal collected in real time. The first voltage amplitude and the second voltage amplitude are different voltage amplitudes. Further, the drive signal output circuit 212 is used to compare the first modulation wave M 2 with the carrier wave Z, output a first drive signal to the first switch Q1, and output a first inverted drive signal to the second switch Q4 through the first inverter 213. The drive signal output circuit 212 is also used to compare the second modulation wave M i with the carrier wave Z, output a second drive signal to the second switch Q2, and output a second inverted drive signal to the first switch Q3 through the second inverter 214. The drive signal output circuit 212 is further used to compare the first modulation wave M 1 and the carrier wave Z, output a first drive signal to the first switch Q1, and output a first inverted drive signal to the second switch Q4 through the first inverter 213. The drive signal output circuit 212 is also used to compare the second modulation wave M 2Compare with the carrier wave Z, output a second driving signal to the second switch Q2, and output a second inverted driving signal to the first switch Q3 through the second inverter 214. At this time, the first switch Q1 is used to conduct or turn off according to the first driving signal, the second switch Q4 is used to conduct or turn off according to the first inverted driving signal, the second switch Q2 is used to conduct or turn off according to the second driving signal, and the first switch Q3 is used to conduct or turn off according to the second inverted driving signal, so that the current output power of the single-phase inverter 2 is less than or equal to the rated output power. Among them, when the first driving signal or the second driving signal is at a high level, the first inverted driving signal or the second inverted driving signal is at a low level, or when the first driving signal or the second driving signal is at a low level, the first inverted driving signal or the second inverted driving signal is at a high level. And the first driving signal, the first inverted driving signal, the second driving signal and the second inverted driving signal can form the switching driving signals of the high-frequency bridge arm 20.

[0051] It should be understood that when the voltage signal U i corresponding voltage value is greater than the first voltage threshold, the current output power of the single-phase inverter 2 is equal to the rated output power, and the single-phase inverter 2 is in the full-load working condition. When the voltage signal U i corresponding voltage value is less than the first voltage threshold, the current output power of the single-phase inverter 2 is less than the rated output power, and the single-phase inverter 2 is in the light-load working condition. Optionally, when the voltage signal U i corresponding voltage value is greater than the second voltage threshold, the current output power of the single-phase inverter 2 is equal to the rated output power, and the single-phase inverter 2 is in the full-load working condition. When the voltage signal U i corresponding voltage value is greater than the third voltage threshold and less than the second voltage threshold, the current output power of the single-phase inverter 2 is less than the rated output power, and the single-phase inverter 2 is in the light-load working condition. When the voltage signal U i corresponding voltage value is less than the third voltage threshold, the current output power of the single-phase inverter 2 is less than the rated output power, and the single-phase inverter 2 is in the no-load working condition. Among them, the first voltage threshold, the second voltage threshold and the third voltage threshold can be pre-set values, or values determined according to the components used in the single-phase inverter 2, and no specific limitation is made here.

[0052] Implementing the embodiments of the present application, different switching driving signals can be output to the upper-bridge-arm switch H1 and the lower-bridge-arm switch H2 and other Si IGBT&SiC MOS hybrid devices based on the voltage signal U i collected in real time at both ends of the high-frequency bridge arm 20, so that the single-phase inverter 2 can adapt to different working conditions such as full-load working condition, light-load working condition and no-load working condition, thereby improving the control flexibility of the switching driving signals, and the applicable application scenarios of the single-phase inverter 2 are more diverse.

[0053] SeeFigure 3 , Figure 3 is another structural schematic diagram of the single-phase inverter provided by the embodiment of the present application. As shown in Figure 3 shown, the above-mentioned Figure 2 shown driving circuit 21 further includes a current sensor 215, wherein the input end in of the current sensor 215 6 is connected to one end of the upper-bridge-arm switch H1 far from the lower-bridge-arm switch H2, and the output end out of the current sensor 215 6 is connected to the input end in of the first modulation wave output circuit 210 1 and the input end in of the second modulation wave output circuit 211 2 . The above-mentioned current sensor 215 is used to collect the current I passing through the high-frequency bridge arm 20, and output the voltage signal U at both ends of the high-frequency bridge arm 20 to the first modulation wave output circuit 210 and the second modulation wave output circuit 211 respectively based on the current I of the high-frequency bridge arm 20 i .

[0054] Among them, the magnitude of the current I is used to judge the actual working condition of the single-phase inverter 2, and the current I can also be called the loop bridge arm current. In specific implementation, when the current I is greater than the first current threshold, the voltage value corresponding to the voltage signal U i is greater than the first voltage threshold. At this time, the single-phase inverter 2 is in the full-load working condition, where the first voltage threshold is the voltage value corresponding to the first current threshold. When the current I is less than the first current threshold, the voltage value corresponding to the voltage signal U i is less than the first voltage threshold. At this time, the single-phase inverter 2 is in the light-load working condition. Optionally, when the current I is greater than the second current threshold, the voltage value corresponding to the voltage signal U i is greater than the second voltage threshold. At this time, the single-phase inverter 2 is in the full-load working condition, where the second voltage threshold is the voltage value corresponding to the second current threshold. When the current I is greater than the third current threshold and less than the second current threshold, the voltage value corresponding to the voltage signal U i is greater than the third voltage threshold and less than the second voltage threshold. At this time, the single-phase inverter 2 is in the light-load working condition, where the third voltage threshold is the voltage value corresponding to the third current threshold. When the current I is less than the third current threshold, the voltage value corresponding to the voltage signal U i is greater than the third voltage threshold. At this time, the single-phase inverter 2 is in the no-load working condition, where the third voltage threshold is the voltage value corresponding to the third current threshold. Among them, the first current threshold, the second current threshold, and the third current threshold can be pre-set values, or values determined according to the components used in the single-phase inverter 2, which are not specifically limited here

[0055] Implementing the embodiment of the present application, different working condition voltage signals U can be output according to the current I passing through the high-frequency bridge arm 20 i, so as to control the switching drive signals of the high-frequency bridge arm 20 required for different working conditions.

[0056] In some feasible embodiments, when the current sensor 215 is not provided in the drive circuit 21, the voltage signal U across the high-frequency bridge arm 20 i can also be directly collected by the voltage detection circuit inside the drive circuit 21, and no specific limitation is made here.

[0057] In some feasible embodiments, as Figure 3 shown, the first inverter 213 shown above Figure 2 is the NOT gate N1. Among them, the NOT gate N1 is used to invert the first drive signal and output the first inverted drive signal to the second switch Q4. The second inverter 214 shown above Figure 2 is the NOT gate N2. Among them, the NOT gate N2 is used to invert the second drive signal and output the second inverted drive signal to the first switch Q3. It should be noted that the NOT gate N1 and the NOT gate N2 provided in the embodiments of the present application are only for illustrative purposes, and the specific circuit structures of the first inverter 213 and the second inverter 214 are not limited here.

[0058] Refer to Figure 4 , Figure 4 which is another schematic structural diagram of the single-phase inverter provided by the embodiments of the present application. As Figure 4 shown, each modulation wave output circuit in the first modulation wave output circuit 210 and the second modulation wave output circuit 211 shown above Figure 3 includes an amplitude adjustment circuit and a modulation wave generation circuit. Among them, the input end of the amplitude adjustment circuit is connected to the input end of each modulation wave output circuit, the output end of the amplitude adjustment circuit is connected to the input end of the modulation wave generation circuit, and the output end of the modulation wave generation circuit is connected to the output end of each modulation wave output circuit. It should be understood that the amplitude adjustment circuit is a circuit for adjusting the voltage amplitude of the voltage signal U across the high-frequency bridge arm 20 i .

[0059] When each modulation wave output circuit is working, the amplitude adjustment circuit is used to adjust the voltage amplitude of the voltage signal U across the high-frequency bridge arm 20 i and output a target voltage signal to the modulation wave generation circuit. Further, the modulation wave generation circuit is used to generate a modulation wave based on the target voltage signal. Among them, when the voltage amplitude of the target voltage signal is the first voltage amplitude, the modulation wave is the first modulation wave. When the voltage amplitude of the target voltage signal is the second voltage amplitude, the modulation wave is the second modulation wave.

[0060] By implementing the embodiments of the present application, since the voltage amplitude of carrier Z remains unchanged, it can be obtained that the pulse width of the switching drive signal of the high-frequency bridge arm 20 (i.e., the high-level signal width) depends on the voltage amplitude of the modulation wave. Therefore, based on the voltage signal U collected in real time at both ends of the high-frequency bridge arm 20 i to dynamically adjust the voltage amplitude of the modulation wave, the pulse width of the switching drive signal of the high-frequency bridge arm 20 can be further adjusted, thereby improving the control flexibility of the switching drive signal.

[0061] In some feasible embodiments, the first modulation wave output circuit 210 includes an amplitude adjustment circuit 2101 and a modulation wave generation circuit 2102. The input end in of the amplitude adjustment circuit 2101 11 is connected to the input end in of the first modulation wave output circuit 210 1 , and the output end out of the amplitude adjustment circuit 2101 11 is connected to the input end in of the modulation wave generation circuit 2102 12 , and the output end out of the modulation wave generation circuit 2102 12 is connected to the output end out of the first modulation wave output circuit 210 1 . The amplitude adjustment circuit 2101 is used to adjust the voltage amplitude of the voltage signal U at both ends of the high-frequency bridge arm 20 i and output a target voltage signal U to the modulation wave generation circuit 2102 o1 . The modulation wave generation circuit 2102 is used to generate a first modulation wave M based on the target voltage signal U o1 . At this time, the first modulation wave output circuit 210 is in a working state and outputs a first modulation wave M with a first voltage amplitude to the drive signal output circuit 212 1 . 1 .

[0062] In some feasible embodiments, the second modulation wave output circuit 211 includes an amplitude adjustment circuit 2111 and a modulation wave generation circuit 2112. The input end in of the amplitude adjustment circuit 2111 21 is connected to the input end in of the second modulation wave output circuit 211 2 , and the output end out of the amplitude adjustment circuit 2111 21 is connected to the input end in of the modulation wave generation circuit 2112 22 , and the output end out of the modulation wave generation circuit 2112 22 is connected to the output end out of the second modulation wave output circuit 211 2 . The amplitude adjustment circuit 2111 is used to adjust the voltage amplitude of the voltage signal U at both ends of the high-frequency bridge arm 20 i and output a target voltage signal U to the modulation wave generation circuit 2102 o2The modulation wave generation circuit 2112 is used to generate a first modulation wave M based on the target voltage signal U o2 At this time, the second modulation wave output circuit 211 is in an operating state and outputs the first modulation wave M with the first voltage amplitude to the drive signal output circuit 212 2 2

[0063] See Figure 5A Figure 5A FIG. is a circuit schematic diagram of the amplitude adjustment circuit provided by the embodiment of the present application. As shown in Figure 5A As shown, the amplitude adjustment circuit 2101 shown above includes a voltage amplifier 21011. The input end of the voltage amplifier 21011 is connected to the input end in of the amplitude adjustment circuit 2101 Figure 4 11 The output end of the voltage amplifier 21011 is connected to the output end out of the amplitude adjustment circuit 2101 11 i The voltage amplifier 21011 is used to amplify the voltage amplitude of the voltage signal U across the high-frequency bridge arm 20 and output the target voltage signal U to the modulation wave generation circuit o1 wherein, the voltage amplitude of the target voltage signal U o1 is the amplified voltage amplitude, and the voltage amplitude of the target voltage signal U o1 is specifically determined by the component parameters inside the voltage amplifier 21011, which is not limited here. Implementing the embodiment of the present application, the voltage amplitude of the voltage signal U across the high-frequency bridge arm 20 can be dynamically adjusted by adjusting the component parameters inside the voltage amplifier 21011, and the adjustment method is more flexible i

[0064] Exemplarily, the voltage amplifier 21011 is composed of a resistor R a resistor R b resistor R set1 and an operational amplifier CF1. One end of the resistor R a is used as the input end of the voltage amplifier 21011. The other end of the resistor R a is connected to one end of the resistor R set1 and the inverting input end of the operational amplifier CF1. The non-inverting input end of the operational amplifier CF1 is grounded through the resistor R b The other end of the resistor R set1 is connected to the output end of the operational amplifier CF1 and used as the output end of the voltage amplifier 21011. The voltage amplitude of the above target voltage signal U o1 is determined according to the following formula (1).

[0065]

[0066] ​​​​​​Among them, R a and R set1 The specific resistance values are component parameters inside the voltage amplifier 21011, and are values determined according to the preset pulse widths and preset switch delay times of the first switch Q1 and the second switch Q2.

[0067] See Figure 5B , Figure 5B is another circuit schematic diagram of the amplitude adjustment circuit provided by the embodiment of the present application. As Figure 5B shown, the above-mentioned Figure 4 shown amplitude adjustment circuit 2101 includes an adder 21012 and a voltage amplifier 21013. Among them, the adder 21012 is arranged between the input end of the voltage amplifier 21013 and the input end in 11 of the amplitude adjustment circuit 2101. The adder 21012 is used to adjust the voltage amplitude of the voltage signal U i at both ends of the high-frequency bridge arm 20, and outputs the adjusted voltage signal to the voltage amplifier 21013. Further, the voltage amplifier 21013 is used to amplify the voltage amplitude of the adjusted voltage signal, and outputs a target voltage signal U o1 to the modulation wave generation circuit 2102. Among them, the voltage amplitude of the target voltage signal U o1 is specifically determined by the component parameters inside the adder 21012 and the voltage amplifier 21013, which is not limited here. Implementing the embodiment of the present application, the voltage amplitude of the voltage signal U i at both ends of the high-frequency bridge arm 20 can be dynamically adjusted by adjusting the component parameters inside the adder 21012 and the voltage amplifier 21013, and the adjustment range of the voltage amplitude is larger.

[0068] Exemplarily, the adder 21012 consists of a pull-up resistor R c and resistors R d to resistor R f . Among them, one ends of the resistors R d to resistor R f are connected in parallel and then connected to the input end in 11 of the amplitude adjustment circuit 2101. The other ends of the resistors R d to resistor R f are connected to one end of the pull-up resistor R c which is connected to the input end of the voltage amplifier 21013. The other end of the pull-up resistor R c is used to connect to the power supply VCC1. The voltage amplifier 21013 consists of a resistor R g , a resistor R set2 and an operational amplifier CF2. Among them, the resistor R set2One end is connected to the inverting input terminal of the operational amplifier CF2 and serves as the input terminal of the voltage amplifier 21013. The non-inverting input terminal of the operational amplifier CF2 is grounded through the resistor R g and the other end of the resistor R set2 is connected to the output terminal of the operational amplifier CF2 and serves as the output terminal of the voltage amplifier 21013. The voltage amplitude of the above target voltage signal U o1 is determined according to the following formula (2).

[0069]

[0070] Wherein, is used to represent the voltage amplitude of the adjusted voltage signal. R c , R d to R f are the component parameters inside the amplitude adjustment circuit 2101, and R c , R d to R f are specific resistance values determined according to the preset pulse widths and preset switch delay times of the first switch Q1 and the second switch Q2.

[0071] See Figure 6 , Figure 6 is the circuit schematic diagram of the modulation wave generation circuit provided by the embodiment of the present application. As Figure 6 shown, the above Figure 4 shown modulation wave generation circuit 2102 includes a first signal generator 21021 and an absolute value circuit 21022. Among them, the input terminal of the first signal generator 21021 is connected to the input terminal in 12 of the modulation wave generation circuit 2102, the output terminal of the first signal generator 21021 is connected to the input terminal of the absolute value circuit 21022, and the output terminal of the absolute value circuit 21022 is connected to the output terminal out 11 of the modulation wave generation circuit 2102. The above first signal generator 21021 is used to output a first waveform signal U1 to the absolute value circuit 21022 based on the target voltage signal U o1 . The present application does not limit the specific waveform of the first waveform signal U1. Exemplarily, the first waveform signal U1 can be the sine wave signal in Figure 6 . And, the voltage amplitude of the first waveform signal U1 in the positive half cycle is the voltage amplitude of the target voltage signal U o1 (which can be expressed as +U o1 ), and the voltage amplitude of the first waveform signal U1 in the negative half cycle is the opposite number of the voltage amplitude of the target voltage signal U o1 (which can be expressed as -U o1 ). Further, the absolute value circuit 21022 is used to generate a first modulation wave M based on the first waveform signal U11 , exemplarily, the sine wave of the negative voltage in the first waveform signal U1 is flipped to the positive voltage range to generate Figure 6 the first modulation wave M in 1 . Among them, the first modulation wave M 1 has the same first voltage amplitude as the target voltage signal U o1 .

[0072] Implementing the embodiments of the present application, the first modulation wave M of the positive voltage can be generated by the first signal generator 21021 and the absolute value circuit 21022 1 , which is more convenient for comparison with the carrier Z, and the driving method is simpler.

[0073] Exemplarily, when the first signal generator 21021 is a sine wave generator, the first signal generator 21021 includes resistors R1 to R4, capacitors C1 and C2, and an operational amplifier CF3. Among them, one end of resistor R1, one end of resistor R2, and one end of capacitor C1 are grounded. The other end of resistor R1 and one end of resistor R3 are connected to the inverting input terminal of the operational amplifier CF3. The other end of resistor R2, the other end of capacitor C1, and one end of capacitor C2 are connected to the non-inverting input terminal of the operational amplifier CF3. The positive power supply terminal of the operational amplifier CF3 serves as the input terminal of the first signal generator 21021 to access the target voltage signal U o1 , and the positive power supply terminal of the operational amplifier CF3 serves as the input terminal of the first signal generator 21021 to access the voltage signal -U o1。 One end of capacitor C2 is connected to the output terminal of the operational amplifier CF3 through resistor R4. One end of resistor R3 and the output terminal of the operational amplifier CF3 are connected and serve as the output terminal of the first signal generator 21021 to output the sine wave signal U1. Among them, the frequency f of the sine wave signal U1 = 1 / 2ΠRC, where R is the resistance value of resistors R2 and R4, and C is the capacitance value of capacitors C1 and C2. In addition, R and C are the component parameters inside the first signal generator 21021, and the specific values of R and C can be values adjusted according to the preset pulse width and preset switch delay time of the first switch Q1 and the second switch Q2.

[0074] Exemplarily, the absolute value circuit 21022 includes operational amplifiers CF4 and CF5, resistors R5 to R8, and diodes D1 and D2. Among them, the non-inverting input terminal of operational amplifier CF4 serves as the input terminal of the absolute value circuit 21022 to receive the sine wave signal U1. The inverting input terminal of operational amplifier CF4 is connected to one end of resistor R5, one end of resistor R6, and the positive electrode of diode D1. The other end of resistor R6 is connected to one end of resistor R7 and the positive electrode of diode D2. The negative electrodes of diode D1 and diode D2 are connected to the output terminal of operational amplifier CF4. The non-inverting input terminal of operational amplifier CF5 is connected to the non-inverting input terminal of operational amplifier CF4. The inverting input terminal of operational amplifier CF5 is connected to the other end of resistor R7 and one end of resistor R8. After the other end of resistor R8 is connected to the output terminal of operational amplifier CF5, it serves as the output terminal of the absolute value circuit 21022 to output the first modulation wave M to the drive signal output circuit 212 1 .

[0075] It should be understood that for the circuit structures of the amplitude adjustment circuit 2111 and the modulation wave generation circuit 2112 and the working principle of generating the second modulation wave M 2 , reference can be made to Figures 5A to 6 and its corresponding embodiments, which will not be elaborated here. It should be noted that Figures 5A to 6 the circuit structures shown are only for illustrative purposes, and the present application does not limit the circuit structures of the amplitude adjustment circuit 2101 and the modulation wave generation circuit 2102

[0076] Refer to Figure 7 . Figure 7 FIG. is another schematic structural diagram of the single-phase inverter provided by the embodiment of the present application. As Figure 7 shown, the above-mentioned Figure 4 shown drive circuit 21 further includes a carrier output circuit 216. The output terminal out 5 of the carrier output circuit 216 is connected to the third input terminal in 5 of the drive signal output circuit 212. Among them, the carrier output circuit 216 is used to output the carrier Z to the drive signal output circuit 212. Implementing the embodiment of the present application, the carrier output circuit 216 (i.e., an analog circuit) can be used to output the carrier Z for comparison with the modulation wave, without relying on an external digital driver to output the carrier Z, thereby reducing the volume and cost of the drive circuit 21

[0077] In some feasible implementation manners, the circuit structure of the carrier output circuit 216 is as Figure 8As shown, the carrier output circuit 216 includes a second signal generator 2161 and a level shift circuit 2162. Among them, the output end of the second signal generator 2161 is connected to the input end of the level shift circuit 2162, and the output end of the level shift circuit 2162 is connected to the output end out of the carrier output circuit 216 5 . The above-mentioned second signal generator 2161 is used to output a second waveform signal U2 to the level shift circuit 2162. The present application does not limit the specific waveform of the second waveform signal U2. Exemplarily, the second waveform signal U2 is a sawtooth wave signal or a triangular wave signal as Figure 8 shown. Further, the level shift circuit 2162 is used to generate a carrier Z based on the second waveform signal U2. Exemplarily, the triangular wave of the negative voltage in the second waveform signal U2 is shifted to the positive voltage range to output the carrier Z of the positive voltage to the drive signal output circuit 212. Among them, the voltage amplitude of the carrier Z remains unchanged.

[0078] Implementing the embodiments of the present application can generate the carrier Z of the positive voltage through the second signal generator 2161 and the level shift circuit 2162, which is more convenient for comparison with the modulation wave and the driving method is simpler.

[0079] Exemplarily, the second signal generator 2161 includes an operational amplifier CF46, an operational amplifier CF7, resistors R9 to R13, a bidirectional voltage regulator D3, and a capacitor C3. Among them, the inverting input end of the operational amplifier CF46 is grounded, the non-inverting input end of the operational amplifier CF46 is connected to the output end of the operational amplifier CF7 through the resistor R9, the non-inverting input end of the operational amplifier CF46 is connected to one end of the bidirectional voltage regulator D3 through the resistor R10, the other end of the bidirectional voltage regulator D3 is grounded, the output end of the operational amplifier CF46 is connected to one end of the capacitor C3 and the inverting input end of the operational amplifier CF7 through the series-connected resistors R11 and R12, and the series connection point of the resistors R11 and R12 is connected to one end of the bidirectional voltage regulator D3. The non-inverting input end of the operational amplifier CF7 is grounded through the resistor R13, and the output end of the operational amplifier CF7 and the other end of the capacitor C3 are connected and used as the output end of the second signal generator 2161 to output the triangular wave signal U2.

[0080] Exemplarily, the level shifting circuit 2162 includes resistors R14 to R17, a voltage stabilizing diode D4, and an operational amplifier CF8. Among them, the inverting input terminal of the operational amplifier CF8 is grounded through the resistor R14. One end of the resistor R5 serves as the input terminal of the level shifting circuit 2162. The other end of the resistor R5 and one end of the resistor R16 are connected to the non-inverting input terminal of the operational amplifier CF8. The other end of the resistor R16 is grounded through the voltage stabilizing diode D4. One end of the resistor R17 is connected to the inverting input terminal of the operational amplifier CF8. The other end of the resistor R17 is connected to the output terminal of the operational amplifier CF8 and serves as the output terminal of the level shifting circuit 2162 to output the carrier wave Z. It should be understood that in Figure 8 one end of the bidirectional voltage stabilizing diode D3 is connected to +Uz, and the other end of the bidirectional voltage stabilizing diode D3 is connected to -Uz, so that the voltage amplitude of the triangular wave signal U2 output by the second signal generator 2161 is +Uz in the positive half cycle, and the voltage amplitude of the triangular wave signal U2 is -Uz in the positive half cycle. The voltage stabilizing diode D4 is connected to +Uz, so that the voltage amplitude of the carrier wave Z output by the level shifting circuit 2162 is 2Uz. The frequency f of the carrier wave Z c = 1 / 4RC, where R is the resistance value of the resistor R12 and C is the capacitance value of the capacitor C3. Among them, Uz, the resistance value of the resistor R12, and the capacitance value of the capacitor C3 are the component parameters inside the carrier output circuit 216, and the specific value of Uz is a value determined according to the preset pulse width and the preset switch delay time of the first switch Q1 and the second switch Q2.

[0081] It should be noted that Figure 8 the circuit structure shown is only for illustrative purposes, and the present application does not limit the circuit structures of the second signal generator 2161 and the level shifting circuit 2162.

[0082] Referring to Figure 9 , Figure 9 is the circuit schematic diagram of the drive signal output circuit provided by the embodiment of the present application. As Figure 9 shown, the above-mentioned Figure 7 shown drive signal output circuit 212 includes a first comparator 2121. Among them, the first input terminal of the first comparator 2121 is connected to the first input terminal in of the drive signal output circuit 212 3 , the second input terminal of the first comparator 2121 is connected to the third input terminal in of the drive signal output circuit 212 5 , and the output terminal of the first comparator 2121 is connected to the first output terminal out of the drive signal output circuit 212 3 . The above-mentioned first comparator 2121 is used to output the first drive signal as the first level when the first voltage amplitude of the first modulation wave M 1 is greater than the voltage amplitude of the carrier wave Z, and when the first modulation wave M 1When the first voltage amplitude is less than the voltage amplitude of the carrier Z, the first driving signal is output as the second level. Here, when the first level is low, the second level is high, or when the first level is high, the second level is low. Taking the case where the first level is high and the second level is low as an example, the first switch Q1 is used to conduct when the first driving signal is high and turn off when the first driving signal is low. Implementing the embodiments of the present application, different pulse-width first driving signals are output in real time according to the voltage amplitude of the carrier Z and the dynamically adjusted first voltage amplitude, thereby improving the control flexibility of the first switch Q1 and adapting to different working conditions of the single-phase inverter 2.

[0083] Exemplarily, the first comparator 2121 includes a resistor R18 to a resistor R20 and an operational amplifier CF9. One end of the resistor R19 serves as the first input terminal of the first comparator 2121 to receive the first modulation wave M 1 , the other end of the resistor R19 is connected to the non-inverting input terminal of the operational amplifier CF9, one end of the resistor R18 serves as the second input terminal of the first comparator 2121 to receive the carrier Z, and the other end of the resistor R18 is connected to the inverting input terminal of the operational amplifier CF9. The positive power supply terminal of the operational amplifier CF9 and one end of the resistor R20 are connected to the power supply VCC2, and the negative power supply terminal of the operational amplifier CF9 is grounded. The other end of the resistor R20 and the output terminal of the operational amplifier CF9 are connected and used as the output terminal of the first comparator 2121 to output the first driving signal.

[0084] In some feasible implementation manners, the above Figure 7 shown driving signal output circuit 212 further includes a second comparator 2122. Among them, the first input terminal of the second comparator 2122 is connected to the second input terminal in of the driving signal output circuit 212 4 , the second input terminal of the second comparator 2122 is connected to the third input terminal in of the driving signal output circuit 212 5 , and the output terminal of the second comparator 2122 is connected to the second output terminal out of the driving signal output circuit 212 4 . The above second comparator 2122 is used to output the second driving signal as the first level when the second voltage amplitude of the second modulation wave M 2 is greater than the voltage amplitude of the carrier Z, and when the second modulation wave M 2When the second voltage amplitude is less than the voltage amplitude of the carrier Z, the second drive signal is output as the second level. Among them, when the first level is low, the second level is high, or when the first level is high, the second level is low. Taking the case where the first level is high and the second level is low as an example for illustration, the second switch Q2 is used to conduct when the second drive signal is high and turn off when the second drive signal is low. Implementing the embodiments of the present application, different pulse-width second drive signals are output in real time according to the voltage amplitude of the carrier Z and the dynamically adjusted second voltage amplitude, thereby improving the control flexibility of the second switch Q2 and adapting to different working conditions of the single-phase inverter 2.

[0085] Exemplarily, the second comparator 2122 includes resistors R21 to R23 and an operational amplifier CF10. The circuit connection relationship among the resistors R21 to R23 and the operational amplifier CF10 can refer to the description of the internal circuit structure of the first comparator 2121 above, and will not be elaborated here.

[0086] It should be understood that according to the above Figures 2 to 9 embodiments, it can be obtained that the first modulation wave output circuit 210, the second modulation wave output circuit 211, the drive signal output circuit 212, the current sensor 215, and the carrier output circuit 216 are all analog circuits. By adjusting the component parameters inside the analog circuit, switch drive signals with different pulse widths can be output to the SiIGBT&SiCMOS hybrid device to adapt to different working conditions of the single-phase inverter 2, and the customization and convenience of adjusting the switch drive signal are ensured, and the applicability is stronger. In addition, the entire drive circuit 21 is an analog circuit with a smaller volume, thereby realizing the integration and miniaturization of the single-phase inverter 2.

[0087] In some feasible implementation manners, taking the case where the first level is high and the second level is low as an example for illustration, the switch drive signal of the high-frequency bridge arm 20 can be as Figure 10 shown. The voltage amplitude of the carrier Z can be expressed as u Z , the first voltage amplitude of the first modulation wave M 1 can be expressed as u M1 =U o1 *sin(wt), and the second voltage amplitude of the second modulation wave M 2 can be expressed as u M2 =U o2 *sin(wt). And, the amplitude of the first voltage amplitude u M1 at time t1 is less than the amplitude of the second voltage amplitude u M2 at time t1. When the first voltage amplitude u M1 is greater than the voltage amplitude u ZWhen the first driving signal PWM_11 is at a high level to control the first switch Q1 to conduct, and the first inverted driving signal PWM_12 is at a low level to control the second switch Q4 to turn off, where the pulse width δ of the first driving signal PWM_11 IGBT is the preset pulse width of the first switch Q1. When the first voltage amplitude u M1 is less than the voltage amplitude u Z , the first driving signal PWM_11 is at a low level to control the first switch Q1 to turn off, and the first inverted driving signal PWM_12 is at a high level to control the second switch Q4 to conduct. When the second voltage amplitude u M2 is greater than the voltage amplitude u Z , the second driving signal PWM_21 is at a high level to control the second switch Q2 to conduct, and the second inverted driving signal PWM_22 is at a low level to control the first switch Q3 to turn off, where the pulse width δ of the second driving signal PWM_21 MOS is the preset pulse width of the second switch Q2. When the second voltage amplitude u M2 is less than the voltage amplitude u Z , the second driving signal PWM_21 is at a low level to control the second switch Q2 to turn off, and the second inverted driving signal PWM_22 is at a high level to control the first switch Q3 to conduct.

[0088] Implementing the embodiments of the present application, when dynamically adjusting the magnitudes of the first voltage amplitude u M1 and the second voltage amplitude u M2 , switching driving signals with different pulse widths can be obtained, so as to control complementary conduction of Si IGBT&SiC MOS hybrid devices such as the upper-bridge-arm switch H1 and the lower-bridge-arm switch H2 to adapt to different operating conditions of the single-phase inverter 2. Among them, the different operating conditions can be one of a light-load condition, a no-load condition, and a full-load condition.

[0089] In some feasible implementation manners, when the single-phase inverter 2 is in a full-load condition (i.e., driving mode 1), the waveform of the voltage V GE between the gate and the emitter of the first switch Q1 and the waveform of the voltage V GS between the gate and the source of the second switch Q2 are as shown in Figure 11A . The switching delay time t_delay1 between the first switch Q1 and the second switch Q2 is the preset switching delay time. When the single-phase inverter 2 is in a light-load condition (i.e., driving mode 2), the waveform of the voltage V GE between the gate and the emitter of the first switch Q1 and the waveform of the voltage V GS between the gate and the source of the second switch Q2 are as shown in Figure 11BAs shown, the switching delay times t_delay2 and t_delay3 between the first switch Q1 and the second switch Q2 are both preset switching delay times. Implementing the embodiments of the present application can adjust the switching delay time between the first switch Q1 and the second switch Q2 according to the preset switching delay time, so as to output the switching drive signals required for different drive modes to adapt to different working conditions of the single-phase inverter 2.

[0090] In some feasible implementation manners, when the above single-phase inverter 2 is a single-phase full-bridge inverter, the circuit structure of the single-phase inverter 2 can be as Figure 12 shown. The above single-phase inverter 2 further includes a power-frequency bridge arm 22, and the switching frequency of the power-frequency bridge arm 22 is the power frequency. Among them, the power-frequency bridge arm 22 and the high-frequency bridge arm 20 are connected in parallel and used to connect to the DC source U DC , and the midpoints of the power-frequency bridge arm 22 and the high-frequency bridge arm 20 are used to connect the two ends of the AC load 3. The above power-frequency bridge arm 22 includes a series-connected upper-bridge-arm switch H3 and a lower-bridge-arm switch H4. The upper-bridge-arm switch H3 is composed of a parallel connection of a first switch Q5 and a second switch Q6, and the lower-bridge-arm switch H4 is composed of a parallel connection of a first switch Q7 and a second switch Q8.

[0091] When the single-phase inverter 2 supplies power to the AC load 3, the upper-bridge-arm switch H3 and the lower-bridge-arm switch H4 are used to conduct alternately according to the switching drive signal of the power-frequency bridge arm 22. Among them, the switching drive signal of the power-frequency bridge arm 22 can be output by the drive circuit 21 or the controller inside the single-phase inverter 2, which is not limited here. Exemplarily, the drive circuit 21 further includes two modulation wave output circuits corresponding to the power-frequency bridge arm and a drive signal output circuit, and is used to output the switching drive signal of the power-frequency bridge arm 22 to control the upper-bridge-arm switch H3 and the lower-bridge-arm switch H4 to conduct alternately according to the power frequency. It should be understood that the specific process of the drive circuit 21 outputting the switching drive signal of the power-frequency bridge arm 22 can refer to the relevant description of the switching drive signal of the high-frequency bridge arm 20 output by the drive circuit 21. Different from the first modulation wave output circuit 210 and the second modulation wave output circuit 211, the voltage amplitudes of the modulation waves output by the two modulation wave output circuits corresponding to the power-frequency bridge arm are fixed amplitudes, while the voltage amplitudes of the first modulation wave M 1 and the second modulation wave M 2 will be dynamically adjusted according to different working conditions of the single-phase inverter 2. The upper-bridge-arm switch H1 and the lower-bridge-arm switch H2 are used to conduct complementarily according to the switching drive signal of the high-frequency bridge arm 20 output by the drive circuit 21. Among them, the specific process of the drive circuit 21 outputting the switching drive signal of the high-frequency bridge arm 20 can refer to the above Figures 2 to 11B corresponding embodiments, which will not be elaborated here. At this time, the current output power of the single-phase inverter 2 is less than or equal to the rated output power, and the direct current output by the DC source U DC is inverted into alternating current to supply power to the AC load 3.

[0092] Implementing the embodiments of the present application can supply power to the AC load 3 while meeting the different operating condition requirements of the AC load 3, with stronger applicability.

[0093] In some feasible implementation manners, when the single-phase inverter 2 is applied to an electric vehicle scenario, the DC source U DC is a power battery and the AC load 3 is a motor. When the single-phase inverter 2 is applied to a photovoltaic power supply scenario, the DC source U DC is a photovoltaic array and the AC load 3 is an AC power grid or other electrical equipment. When the single-phase inverter 2 is applied to an energy storage power supply scenario, the DC source U DC is an energy storage battery pack and the AC load 3 is an AC power grid or other electrical equipment.

[0094] In some feasible implementation manners, the above single-phase inverter 2 further includes other components. Exemplarily, the other components include a capacitor C4, a capacitor C5, an inductor L1, and an inductor L2. Among them, the capacitor C4 is used to connect to the DC source U DC to filter the direct current output by the DC source U DC One end of the capacitor C5 is connected to the midpoint of the industrial frequency bridge arm 22 through the inductor L1, and the other end of the capacitor C5 is connected to the midpoint of the high-frequency bridge arm 20 through the inductor L2. Both ends of the capacitor C5 are used to connect both ends of the AC load 3. The capacitor C5, the inductor L1, and the inductor L2 form an output filter circuit and supply power to the AC load 3 after filtering the alternating current.

[0095] It should be noted that Figure 12 the shown circuit structure is only for illustrative purposes, and the present application does not limit the circuit structure of the single-phase inverter 2.

[0096] Refer to Figure 13 , Figure 13 which is a schematic structural diagram of the motor controller MCU provided by the embodiments of the present application. As shown in Figure 13As shown, the MCU 4 includes an input port 40, a single-phase inverter 41, and an output port 42. At this time, the single-phase inverter 41 can also be referred to as an in-vehicle MCU inverter. Among them, the input port 40 is used to connect to the power battery 5. The power-frequency bridge arm 411 and the high-frequency bridge arm 412 in the single-phase inverter 41 are connected in parallel and then connected to the input port 40. The midpoint of the power-frequency bridge arm 411 and the midpoint of the high-frequency bridge arm 412 are connected to the output port 42, and the output port 42 is used to connect to the motor 6. The upper-bridge-arm switch and the lower-bridge-arm switch in the power-frequency bridge arm 411 conduct alternately according to the power frequency. The drive circuit 413 in the single-phase inverter 41 is used to output a switch drive signal to the high-frequency bridge arm 412 to control the complementary conduction of the upper-bridge-arm switch and the lower-bridge-arm switch in the high-frequency bridge arm 412, so that the single-phase inverter 41 converts the direct current output by the power battery 5 into alternating current and drives the motor 6. Implementing the embodiments of the present application, since the single-phase inverter 41 is smaller in volume and lower in cost, the integration degree of the MCU 4 can be improved, and the cost and volume of the MCU 4 can be reduced.

[0097] It should be noted that the above terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0098] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A single-phase inverter, characterized in that, the single-phase inverter includes a high-frequency bridge arm and a drive circuit. The high-frequency bridge arm includes a series-connected upper-bridge-arm switch and a lower-bridge-arm switch. Each bridge-arm switch in the upper-bridge-arm switch and the lower-bridge-arm switch is composed of a first switch and a second switch connected in parallel. The switching frequency of the high-frequency bridge arm is higher than the power frequency; the drive circuit includes a first modulation-wave output circuit, a second modulation-wave output circuit, and a drive-signal output circuit; wherein, the input ends of the first modulation-wave output circuit and the second modulation-wave output circuit are both used to receive the voltage signals at both ends of the high-frequency bridge arm. The output end of the first modulation-wave output circuit is connected to the first input end of the drive-signal output circuit. The output end of the second modulation-wave output circuit is connected to the second input end of the drive-signal output circuit. The third input end of the drive-signal output circuit is used to receive a carrier wave. The first output end of the drive-signal output circuit is connected to the first switch in the upper-bridge-arm switch. The first output end of the drive-signal output circuit is connected to the second switch in the lower-bridge-arm switch through a first inverter. The second output end of the drive-signal output circuit is connected to the second switch in the upper-bridge-arm switch. The second output end of the drive-signal output circuit is connected to the first switch in the lower-bridge-arm switch through a second inverter.

2. The single-phase inverter according to claim 1, characterized in that, the first modulation-wave output circuit is used to output a first modulation wave with a first voltage amplitude to the drive-signal output circuit based on the voltage signals at both ends of the high-frequency bridge arm; the second modulation-wave output circuit is used to output a second modulation wave with a second voltage amplitude to the drive-signal output circuit based on the voltage signals at both ends of the high-frequency bridge arm; the drive-signal output circuit is used to compare the first modulation wave and the carrier wave, output a first drive signal to the first switch in the upper-bridge-arm switch, and output a first inverted drive signal to the second switch in the lower-bridge-arm switch through the first inverter; compare the second modulation wave and the carrier wave, output a second drive signal to the second switch in the upper-bridge-arm switch, and output a second inverted drive signal to the first switch in the lower-bridge-arm switch through the second inverter, so that the current output power of the single-phase inverter is less than or equal to the rated output power.

3. The single-phase inverter according to claim 2, characterized in that, each modulation-wave output circuit in the first modulation-wave output circuit and the second modulation-wave output circuit includes an amplitude adjustment circuit and a modulation-wave generation circuit. Wherein, the input end of the amplitude adjustment circuit is connected to the input end of each modulation-wave output circuit. The output end of the amplitude adjustment circuit is connected to the input end of the modulation-wave generation circuit. The output end of the modulation-wave generation circuit is connected to the output end of each modulation-wave output circuit; The amplitude adjustment circuit is used to adjust the voltage amplitude of the voltage signal across the high-frequency bridge arm and output a target voltage signal to the modulation wave generation circuit; the modulation wave generation circuit is used to generate a modulation wave based on the target voltage signal; wherein, when the voltage amplitude of the target voltage signal is the first voltage amplitude, the modulation wave is the first modulation wave; when the voltage amplitude of the target voltage signal is the second voltage amplitude, the modulation wave is the second modulation wave.

4. The single-phase inverter according to claim 3, characterized in that, the amplitude adjustment circuit includes a voltage amplifier, wherein the input end of the voltage amplifier is connected to the input end of the amplitude adjustment circuit, and the output end of the voltage amplifier is connected to the output end of the amplitude adjustment circuit.

5. The single-phase inverter according to claim 4, characterized in that, the amplitude adjustment circuit further includes an adder, and the adder is arranged between the input end of the voltage amplifier and the input end of the amplitude adjustment circuit; the adder is used to adjust the voltage amplitude of the voltage signal across the high-frequency bridge arm and output the adjusted voltage signal to the voltage amplifier; the voltage amplifier is used to amplify the voltage amplitude of the adjusted voltage signal and output the target voltage signal to the modulation wave generation circuit.

6. The single-phase inverter according to any one of claims 3-5, characterized in that, the modulation wave generation circuit includes a first signal generator and an absolute value circuit, wherein the input end of the first signal generator is connected to the input end of the modulation wave generation circuit, the output end of the first signal generator is connected to the input end of the absolute value circuit, and the output end of the absolute value circuit is connected to the output end of the modulation wave generation circuit; the first signal generator is used to output a first waveform signal to the absolute value circuit based on the target voltage signal; the absolute value circuit is used to generate the modulation wave based on the first waveform signal.

7. The single-phase inverter according to any one of claims 2-6, characterized in that, the drive signal output circuit includes a first comparator, wherein the first input end of the first comparator is connected to the first input end of the drive signal output circuit, the second input end of the first comparator is connected to the third input end of the drive signal output circuit, and the output end of the first comparator is connected to the first output end of the drive signal output circuit; the first comparator is used to output the first drive signal as a first level when the first voltage amplitude of the first modulation wave is greater than the voltage amplitude of the carrier wave, and output the first drive signal as a second level when the first voltage amplitude of the first modulation wave is less than the voltage amplitude of the carrier wave; wherein, when the first level is a low level, the second level is a high level, or when the first level is a high level, the second level is a low level.

8. The single-phase inverter according to claim 7, characterized in that, The driving signal output circuit further includes a second comparator. Wherein, a first input terminal of the second comparator is connected to a second input terminal of the driving signal output circuit, a second input terminal of the second comparator is connected to a third input terminal of the driving signal output circuit, and an output terminal of the second comparator is connected to a second output terminal of the driving signal output circuit; The second comparator is configured to output the second driving signal as a first level when the second voltage amplitude of the second modulation wave is greater than the voltage amplitude of the carrier wave, and output the second driving signal as a second level when the second voltage amplitude of the second modulation wave is less than the voltage amplitude of the carrier wave; Wherein, when the first level is a low level, the second level is a high level, or when the first level is a high level, the second level is a low level.

9. The single-phase inverter according to any one of claims 1-8, characterized in that, The driving circuit further includes a carrier output circuit, and an output terminal of the carrier output circuit is connected to a third input terminal of the driving signal output circuit; The carrier output circuit is configured to output the carrier wave to the driving signal output circuit.

10. The single-phase inverter according to claim 8, characterized in that, The carrier output circuit includes a second signal generator and a level shift circuit. Wherein, an output terminal of the second signal generator is connected to an input terminal of the level shift circuit, and an output terminal of the level shift circuit is connected to an output terminal of the carrier output circuit; The second signal generator is configured to output a second waveform signal to the level shift circuit; The level shift circuit is configured to generate the carrier wave based on the second waveform signal.

11. The single-phase inverter according to any one of claims 1-10, characterized in that, The driving circuit further includes a current sensor. Wherein, an input terminal of the current sensor is connected to an end of the upper bridge arm switch away from the lower bridge arm switch, and an output terminal of the current sensor is connected to an input terminal of the first modulation wave output circuit and an input terminal of the second modulation wave output circuit; The current sensor is configured to collect the current passing through the high-frequency bridge arm, and output the voltage signal across the high-frequency bridge arm to the first modulation wave output circuit and the second modulation wave output circuit respectively based on the current passing through the high-frequency bridge arm.

12. The single-phase inverter according to any one of claims 1-11, characterized in that, The single-phase inverter further includes a power-frequency bridge arm, and the switching frequency of the power-frequency bridge arm is the power frequency; wherein, the power-frequency bridge arm and the high-frequency bridge arm are connected in parallel to connect to a DC source, and the midpoint of the power-frequency bridge arm and the midpoint of the high-frequency bridge arm are used to connect to both ends of the AC load.

13. A motor control unit MCU, characterized in that, The MCU includes an input port, an output port, and a single-phase inverter as described in any one of claims 1-12; wherein, the input port is used to connect to a power battery, the industrial-frequency bridge arm and the high-frequency bridge arm in the single-phase inverter are connected in parallel and then connected to the input port, the midpoint of the industrial-frequency bridge arm and the midpoint of the high-frequency bridge arm are connected to the output port, and the output port is used to connect to a motor.

14. A powertrain, characterized in that the powertrain includes a motor and the MCU as described in claim 13, and the MCU is used to invert the direct current output by the power battery into alternating current and drive the motor.

15. An electric vehicle, characterized in that the electric vehicle includes a power battery and the powertrain as described in claim 14, and the power battery is used to output direct current to the powertrain.

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