Semiconductor device
By optimizing the sealing resin structure and arrangement of multiple leads in the semiconductor device, the problem of stress concentration in the conductive bonding is solved, and higher reliability and stability are achieved.
Patent Information
- Application Number
- CN202380077572.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-11-08
- Filing Date
- 2023-10-27
- Publication Date
- 2025-06-13
AI Technical Summary
In the conventional semiconductor device, when the mounting surfaces of multiple leads are bonded to the circuit substrate through conductive bonding members such as solder, excessive stress is easily generated, resulting in cracking or peeling of the conductive bonding material.
A semiconductor device is designed with the structure of the sealing resin and the arrangement of multiple leads to ensure that the mounting surface of the lead reaches the side of the specific resin and is separated from the other side, thereby reducing stress concentration. Specifically, the mounting surface length of the multiple leads on the back of the resin is longer than other parts, and the arrangement spacing and length on the side of the resin are optimized to equalize the stress distribution.
With this structural design, excessive stress generated in the conductive bonding can be effectively suppressed, the risk of cracking or peeling can be reduced, and the reliability and stability of the semiconductor device can be improved.
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Figure CN120153479A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device. Background Art
[0002] An example of a conventional semiconductor device is disclosed in Patent Document 1. The semiconductor device disclosed in this document includes a semiconductor element, a plurality of leads, and a sealing resin. The plurality of leads have mounting surfaces exposed from the back surface of the sealing resin. These mounting surfaces are arranged along the side surface of the sealing resin.
[0003] Prior Art Documents
[0004] Patent Documents
[0005] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2022-87155 Summary of the Invention
[0006] Problems to be Solved by the Invention
[0007] The mounting surfaces of the plurality of leads are joined to a circuit board or the like by a conductive joining member such as solder. If excessive stress is generated in any of these conductive joining members, it causes cracking and peeling of the conductive joining material.
[0008] One problem of the present disclosure is to provide a semiconductor device that has been improved compared to the prior art. In particular, in view of the above situation, one problem of the present disclosure is to provide a semiconductor device capable of suppressing excessive stress from being generated in the conductive joining member for mounting.
[0009] Means for Solving the Problems
[0010] The semiconductor device provided by the first aspect of the present disclosure includes a semiconductor element, a plurality of leads, and a sealing resin that covers at least a part of the semiconductor element and the plurality of leads. The sealing resin has: a resin back surface facing the thickness direction of the semiconductor element; a first resin side surface along a first direction intersecting the thickness direction; and a second resin side surface and a third resin side surface along a second direction intersecting the thickness direction and the first direction. The plurality of leads include a plurality of first leads arranged in the first direction, and the plurality of first leads each have a first mounting surface exposed from the resin back surface. The first mounting surface reaches the first resin side surface and is separated from the second resin side surface and the third resin side surface. Regarding the length in the second direction of the first mounting surface of the plurality of first leads, that is, the first length, the first length of the first leads located at both ends in the first direction among the plurality of first leads is longer than the first length of any of the remaining first leads.
[0011] The semiconductor device provided by the second aspect of the present disclosure includes a semiconductor element, a plurality of leads, and a sealing resin that covers at least a part of the semiconductor element and the plurality of leads. The sealing resin has a resin back surface facing the thickness direction of the semiconductor element, a first resin side surface and a fourth resin side surface along a first direction intersecting the thickness direction, and a second resin side surface and a third resin side surface along a second direction intersecting the thickness direction and the first direction. The plurality of first leads include a plurality of first leads, a plurality of fourth leads, and corner leads. The plurality of first leads are arranged in the first direction along the first resin side surface, and the plurality of fourth leads are arranged in the first direction along the fourth resin side surface. Each of the plurality of first leads has a first mounting surface exposed from the resin back surface. Each of the plurality of fourth leads has a fourth mounting surface exposed from the resin back surface. The corner lead has a corner mounting surface exposed from the resin back surface outside the first direction with respect to the first mounting surface of the plurality of first leads or the fourth mounting surface of the plurality of fourth leads. The corner mounting surface has a first portion that reaches the first resin side surface or the fourth resin side surface and is separated from the second resin side surface and the third resin side surface, and a second portion that reaches the second resin side surface or the third resin side surface and is separated from the first resin side surface and the fourth resin side surface, and the first portion is connected to the second portion.
[0012] Advantages of the Invention
[0013] According to the above structure, in the semiconductor device, it is possible to suppress excessive stress from being generated in the conductive bonding member for mounting.
[0014] Other features and advantages of the present disclosure will become more apparent from the following detailed description with reference to the accompanying drawings. Description of the Drawings
[0015] Figure 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure.
[0016] Figure 2 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure.
[0017] Figure 3 is a partial perspective view showing a semiconductor device according to a first embodiment of the present disclosure.
[0018] Figure 4 is a top view showing a semiconductor device according to a first embodiment of the present disclosure.
[0019] Figure 5 is a bottom view showing a semiconductor device according to a first embodiment of the present disclosure.
[0020] Figure 6 is a front view showing a semiconductor device according to a first embodiment of the present disclosure.
[0021] Figure 7 is a rear view showing a semiconductor device according to a first embodiment of the present disclosure.
[0022] Figure 8 is a right side view showing a semiconductor device according to a first embodiment of the present disclosure.
[0023] Figure 9 is a left side view showing a semiconductor device according to a first embodiment of the present disclosure.
[0024] Figure 10 is along Figure 4 a cross-sectional view taken along the X-X line.
[0025] Figure 11 is along Figure 4 a cross-sectional view taken along the XI-XI line.
[0026] Figure 12 is along Figure 4 a cross-sectional view taken along the XII-XII line.
[0027] Figure 13 is a partially enlarged top view showing a semiconductor device according to a first embodiment of the present disclosure.
[0028] Figure 14 is a partially enlarged top view showing a semiconductor device according to a first embodiment of the present disclosure.
[0029] Figure 15 is a partially enlarged top view showing a semiconductor device according to a first embodiment of the present disclosure.
[0030] Figure 16 is a partially enlarged top view showing a semiconductor device according to a first embodiment of the present disclosure.
[0031] Figure 17 is a bottom view showing a first modification of a semiconductor device according to a first embodiment of the present disclosure.
[0032] Figure 18 is a bottom view showing a semiconductor device according to a second embodiment of the present disclosure.
[0033] Figure 19 is a bottom view showing a semiconductor device according to a third embodiment of the present disclosure.
[0034] Figure 20It is a bottom view showing a semiconductor device according to a fourth embodiment of the present disclosure.
[0035] Figure 21 It is a partially enlarged top view showing a second modification of a semiconductor device according to a first embodiment of the present disclosure.
[0036] Figure 22 It is a partially enlarged top view showing a third modification of a semiconductor device according to a first embodiment of the present disclosure.
[0037] Figure 23 It is a top view showing a semiconductor device according to a fifth embodiment of the present disclosure. Detailed Embodiments
[0038] Hereinafter, preferred embodiments of the present disclosure will be specifically described with reference to the drawings.
[0039] Terms such as "first", "second", and "third" in the present disclosure are used only for identification and are not intended to attach a sequence to these objects.
[0040] In the present disclosure, unless otherwise specified, "something A is formed on something B" and "something A is formed above something B" include "something A is directly formed on something B" and "something A is formed on something B with other objects intervening between something A and something B". Similarly, unless otherwise specified, "something A is disposed on something B" and "something A is disposed above something B" include "something A is directly disposed on something B" and "something A is disposed on something B with other objects intervening between something A and something B". Similarly, "something A is located on something B", unless otherwise specified, includes "something A is in contact with something B and something A is located on something B" and "something A is located on something B with other objects intervening between something A and something B". In addition, unless otherwise specified, "something A overlaps something B in a certain direction" includes "something A completely overlaps something B" and "something A partially overlaps something B". In addition, in the present disclosure, "a certain surface A faces direction B (one side or the other side)" is not limited to the case where the angle of surface A with respect to direction B is 90°, and also includes the case where surface A is inclined with respect to direction B.
[0041] First Embodiment:
[0042] Figures 1 to 16 It shows a semiconductor device according to a first embodiment of the present disclosure. The semiconductor device A1 of the present embodiment includes a semiconductor element 1, a sealing resin 2, and a plurality of first leads 4 to 9. The semiconductor device A1 is a so-called QFN (Quad Flat No leaded package) type semiconductor device, but the basic structure of the semiconductor device of the present disclosure is not limited in any way.
[0043] Figure 1 is a perspective view showing the semiconductor device A1. Figure 2 is a perspective view showing the semiconductor device A1. Figure 3 is a partial perspective view showing the semiconductor device A1. Figure 4 is a top view showing the semiconductor device A1. Figure 5 is a bottom view showing the semiconductor device A1. Figure 6 is a front view showing the semiconductor device A1. Figure 7 is a rear view showing the semiconductor device A1. Figure 8 is a right side view showing the semiconductor device A1. Figure 9 is a left side view showing the semiconductor device A1. Figure 10 is along Figure 4 a cross-sectional view taken along the X-X line of Figure 11 is along Figure 4 a cross-sectional view taken along the XI-XI line of Figure 12 is along Figure 4 a cross-sectional view taken along the XII-XII line of Figure 13 is a partially enlarged top view showing the semiconductor device A1. Figure 14 is a partially enlarged top view showing the semiconductor device A1. Figure 15 is a partially enlarged top view showing the semiconductor device A1. Figure 16 is a partially enlarged top view showing the semiconductor device A1.
[0044] In these figures, an example of the thickness direction of the present disclosure is expressed as the thickness direction z. One direction orthogonal to the thickness direction z is set as the first direction x. The direction orthogonal to both the thickness direction z and the first direction x is set as the second direction y.
[0045] Semiconductor element 1:
[0046] When the semiconductor element 1 forms a part of a circuit by mounting the semiconductor device A1 on a circuit board or the like, it functions as the main electrical component of the semiconductor device A1. The specific structure of the semiconductor element 1 is not limited in any way and can be, for example, an LSI (Large Scale Integration), an IC (Integrated Circuit), etc. The semiconductor element 1 in the present embodiment is rectangular in shape when viewed in the z direction, having two sides along the first direction x and two sides along the second direction y.
[0047] Sealing resin 2:
[0048] The sealing resin 2 covers a part of each of the semiconductor element 1 and the plurality of leads 4 to 9. The specific structure of the sealing resin 2 is not limited in any way, and the constituent material includes, for example, epoxy resin. AsFigure 1 , Figure 2 and Figures 4 to 16 As shown in Figure 1 , Figure 2 , and Figures 4 to 16 , the sealing resin 2 of the present embodiment has a resin main surface 21, a resin back surface 22, a first resin side surface 23, a second resin side surface 24, a third resin side surface 25, and a fourth resin side surface 26.
[0049] The resin main surface 21 is the surface facing the z1 side in the z direction, and in the illustrated example, it is a flat rectangular surface. The resin back surface 22 is the surface facing the z2 side in the z direction, and in the illustrated example, it is a flat rectangular surface. The first resin side surface 23 is the surface along the first direction x and the z direction, facing the y1 side in the second direction y. The second resin side surface 24 is the surface along the second direction y and the z direction, facing the x1 side in the first direction x. The third resin side surface 25 is the surface along the second direction y and the z direction, facing the x2 side in the first direction x. The fourth resin side surface 26 is the surface along the first direction x and the z direction, facing the y2 side in the second direction y.
[0050] In the present embodiment, the length of the first resin side surface 23 and the fourth resin side surface 26 in the first direction x is longer than the length of the second resin side surface 24 and the third resin side surface 25 in the second direction y.
[0051] The multiple leads 4 to 9 function to support the semiconductor element 1, form a conduction path to the semiconductor element 1, etc. The specific structure of the multiple leads 4 to 9 is not limited in any way. The multiple leads 4 to 9 include, for example, Cu (copper), Ni (nickel), Fe (iron), and their alloys as constituent materials. In the following description, the multiple first leads 4 to 9 are distinguished into multiple first leads 4, multiple second leads 5, multiple third leads 6, multiple fourth leads 7, multiple corner leads 8, and a center lead 9 for description.
[0052] First lead 4:
[0053] As Figures 1 to 6 and Figures 12 to 14 shown, the multiple first leads 4 are arranged in the first direction x. The first lead 4 has a first thick wall portion 41, a second thin wall portion 42, a first mounting surface 43, and a first end surface 44.
[0054] The first thick-walled portion 41 is a portion in the first lead 4 that is relatively thick in the thickness direction z (compared with the second thin-walled portion 42). The first thick-walled portion 41 has a first mounting surface 43 and a first end surface 44. The second thin-walled portion 42 is a portion in the first lead 4 that is relatively thin in the thickness direction z (compared with the first thick-walled portion 41) and is separated from the resin back surface 22 toward the z1 side in the thickness direction z. In the present embodiment, the semiconductor element 1 is mounted on the second thin-walled portion 42. The shape of the second thin-walled portion 42 as viewed in the thickness direction z is appropriately set according to, for example, the position where the semiconductor element 1 is mounted and the like.
[0055] The first mounting surface 43 faces the z2 side in the thickness direction z and is exposed from the resin back surface 22 of the sealing resin 2. In the illustrated example, the first mounting surface 43 has a shape extending along the second direction y. In the illustrated example, the first mounting surface 43 is coplanar with the resin back surface 22. The first mounting surface 43 reaches the first resin side surface 23 and is separated from the second resin side surface 24, the third resin side surface 25, and the fourth resin side surface 26.
[0056] The first end surface 44 faces the y1 side in the second direction y and is exposed from the first resin side surface 23 of the sealing resin 2. In the illustrated example, the first mounting surface 43 is connected to the first end surface 44. However, a structure such as a concave surface may be interposed between the first mounting surface 43 and the first end surface 44. Coatings including, for example, Sn (tin) and the like may be appropriately provided on the first mounting surface 43 and the first end surface 44 (illustrations are omitted). In the illustrated example, the first end surface 44 is coplanar with the first resin side surface 23.
[0057] The arrangement pitch P1 of the first mounting surfaces 43 of the plurality of first leads 4 is not particularly limited. In the illustrated example, the arrangement pitch P1 of the plurality of first mounting surfaces 43 is constant. In addition, the size in the first direction x of the first mounting surface 43, that is, the width W1, is not particularly limited. In the illustrated example, the widths W1 of the plurality of first mounting surfaces 43 are constant.
[0058] Regarding the length in the second direction y of the plurality of first leads 4, that is, the first length L1, the first length L1 of the first leads 4 located at both ends in the first direction x among the plurality of first leads 4 is longer than the first length L1 of any of the remaining first leads 4. That is, the first length L1 of the first leads 4 sandwiched by the two first leads 4 located at both ends in the first direction x is shorter than the first length L1 of the first leads 4 at both ends in the first direction x.
[0059] In addition, in the illustrated example, regarding the first length L1 of the plurality of first leads 4, the first length L1 of the first leads 4 located outside the first direction x is longer than the first length L1 of the first leads 4 located on the center side of the first direction x. That is, if the first lengths L1 of the adjacent first leads 4 are compared, the first length L1 located outside the first direction x is longer than the first length L1 of the first leads 4 located inside the first direction x.
[0060] Second lead 5:
[0061] As Figures 2 to 5 , Figure 8 , Figure 10 , Figure 13 and Figure 15 shown, a plurality of second leads 5 are arranged along the first direction x. The second lead 5 has a second thick wall portion 51, a second thin wall portion 52, a second mounting surface 53, and a second end surface 54.
[0062] The second thick wall portion 51 is a portion where the thickness in the thickness direction z of the second lead 5 is relatively thick (compared with the second thin wall portion 52). The second thick wall portion 51 has a second mounting surface 53 and a second end surface 54. The second thin wall portion 52 is a portion where the thickness in the thickness direction z of the second lead 5 is relatively thin (compared with the second thick wall portion 51), and is separated from the resin back surface 22 toward the z1 side in the thickness direction z. In the present embodiment, the semiconductor element 1 is mounted on the second thin wall portion 52. The shape of the second thin wall portion 52 as viewed in the thickness direction z is appropriately set according to, for example, the position where the semiconductor element 1 is mounted.
[0063] The second mounting surface 53 faces the z2 side in the thickness direction z and is exposed from the resin back surface 22 of the sealing resin 2. In the illustrated example, the second mounting surface 53 has a shape extending along the first direction x. In the illustrated example, the second mounting surface 53 is coplanar with the resin back surface 22. The second mounting surface 53 reaches the second resin side surface 24 and is separated from the first resin side surface 23, the fourth resin side surface 26, and the third resin side surface 25.
[0064] The second end surface 54 faces the x1 side in the first direction x and is exposed from the second resin side surface 24 of the sealing resin 2. In the illustrated example, the second mounting surface 53 is connected to the second end surface 54. However, a structure such as a concave surface may be interposed between the second mounting surface 53 and the second end surface 54. A plating including, for example, Sn (tin) may be appropriately provided on the second mounting surface 53 and the second end surface 54 (omitted from the illustration). In the illustrated example, the second end surface 54 is coplanar with the second resin side surface 24.
[0065] The arrangement pitch P2 of the second mounting surfaces 53 of the plurality of second leads 5 is not particularly limited. In the illustrated example, in the second direction y, two second leads 5 are arranged on each side of the center lead 9. The arrangement pitch P2 of the two second mounting surfaces 53 on the y1 side in the second direction y is the same as the arrangement pitch P2 of the two second mounting surfaces 53 on the y2 side in the second direction y. In addition, the size in the second direction y of the second mounting surface 53, that is, the width W2, is not particularly limited. In the illustrated example, the widths W2 of the plurality of second mounting surfaces 53 are constant.
[0066] The length of the plurality of second leads 5 in the second direction y, that is, the second length L2, is not limited in any way. In the present embodiment, for example, it is constant. In addition, in the illustrated example, the second length L2 of the plurality of second leads 5 is shorter than the first length L1 of any of the first leads 4.
[0067] Third lead 6:
[0068] As Figures 2 to 5 , Figure 8 , Figure 10 , Figure 13 and Figure 15 shown, the plurality of third leads 6 are arranged along the first direction x. The third lead 6 has a third thick wall portion 61, a third thin wall portion 62, a third mounting surface 63, and a third end surface 64.
[0069] The third thick wall portion 61 is a portion where the thickness in the thickness direction z of the third lead 6 is relatively thick (compared with the third thin wall portion 62). The third thick wall portion 61 has a third mounting surface 63 and a third end surface 64. The third thin wall portion 62 is a portion where the thickness in the thickness direction z of the third lead 6 is relatively thin (compared with the third thick wall portion 61), and is separated from the resin back surface 22 toward the z1 side in the thickness direction z. In the present embodiment, the semiconductor element 1 is mounted on the third thin wall portion 62. The shape of the third thin wall portion 62 as viewed in the thickness direction z is appropriately set according to the position of the mounted semiconductor element 1 and the like.
[0070] The third mounting surface 63 faces the z2 side in the thickness direction z and is exposed from the resin back surface 22 of the sealing resin 2. In the illustrated example, the third mounting surface 63 has a shape extending along the first direction x. In the illustrated example, the third mounting surface 63 is coplanar with the resin back surface 22. The third mounting surface 63 reaches the third resin side surface 25 and is separated from the first resin side surface 23, the fourth resin side surface 26, and the second resin side surface 24.
[0071] The third end face 64 faces the x2 side in the first direction x and is exposed from the third resin side face 25 of the sealing resin 2. In the illustrated example, the third mounting face 63 is connected to the third end face 64. However, it may also be a structure such as a concave face interposed between the third mounting face 63 and the third end face 64. A plating layer including, for example, Sn (tin) etc. may be appropriately provided on the third mounting face 63 and the third end face 64 (the illustration is omitted). In the illustrated example, the third end face 64 is coplanar with the third resin side face 25.
[0072] The arrangement pitch P3 of the third mounting faces 63 of the plurality of third leads 6 is not particularly limited. In the illustrated example, in the second direction y, two third leads 6 are arranged on each side of the center lead 9. The arrangement pitch P3 of the two third mounting faces 63 on the y1 side in the second direction y is the same as the arrangement pitch P3 of the two third mounting faces 63 on the y2 side in the second direction y. In addition, the size in the second direction y of the third mounting face 63, that is, the width W3, is not particularly limited. In the illustrated example, the widths W3 of the plurality of third mounting faces 63 are constant.
[0073] The length of the plurality of third leads 6 in the second direction y, that is, the third length L3, is not limited in any way. In the present embodiment, for example, it is constant. In addition, in the illustrated example, the third length L3 of the plurality of third leads 6 is shorter than the first length L1 of any first lead 4.
[0074] Fourth lead 7:
[0075] As Figures 2 to 5 , Figure 7 , Figure 12 , Figure 15 and Figure 16 shown, the plurality of fourth leads 7 are arranged along the first direction x. The fourth lead 7 has a fourth thick wall portion 71, a fourth thin wall portion 72, a fourth mounting face 73, and a fourth end face 74.
[0076] The fourth thick wall portion 71 is a portion where the thickness in the thickness direction z of the fourth lead 7 is relatively thick (compared with the fourth thin wall portion 72). The fourth thick wall portion 71 has a fourth mounting face 73 and a fourth end face 74. The fourth thin wall portion 72 is a portion where the thickness in the thickness direction z of the fourth lead 7 is relatively thin (compared with the fourth thick wall portion 71) and is separated from the resin back face 22 toward the z1 side in the thickness direction z. In the present embodiment, the semiconductor element 1 is mounted on the fourth thin wall portion 72. The shape of the fourth thin wall portion 72 as observed in the thickness direction z is appropriately set according to, for example, the position where the semiconductor element 1 is mounted.
[0077] The fourth mounting surface 73 faces the z2 side in the thickness direction z and is exposed from the resin back surface 22 of the sealing resin 2. In the illustrated example, the fourth mounting surface 73 is shaped to extend along the second direction y. In the illustrated example, the fourth mounting surface 73 is coplanar with the resin back surface 22. The fourth mounting surface 73 reaches the fourth resin side surface 26 and is separated from the second resin side surface 24, the third resin side surface 25, and the first resin side surface 23.
[0078] The fourth end surface 74 faces the y2 side in the second direction y and is exposed from the fourth resin side surface 26 of the sealing resin 2. In the illustrated example, the fourth mounting surface 73 is connected to the fourth end surface 74. However, a structure such as a concave surface may be provided between the fourth mounting surface 73 and the fourth end surface 74. A plating including, for example, Sn (tin) etc. may be appropriately provided on the fourth mounting surface 73 and the fourth end surface 74 (illustration omitted). In the illustrated example, the fourth end surface 74 is coplanar with the fourth resin side surface 26.
[0079] The arrangement pitch P4 of the fourth mounting surfaces 73 of the plurality of fourth leads 7 is not particularly limited. In the illustrated example, the arrangement pitch P4 of the plurality of fourth mounting surfaces 73 is constant. In addition, the size in the first direction x of the fourth mounting surface 73, that is, the width W4, is not particularly limited. In the illustrated example, the widths W4 of the plurality of fourth mounting surfaces 73 are constant.
[0080] Regarding the length in the second direction y of the plurality of fourth leads 7, that is, the fourth length L4, the fourth length L4 of the fourth leads 7 located at both ends in the first direction x among the plurality of fourth leads 7 is longer than the fourth length L4 of any of the remaining fourth leads 7. That is, the fourth length L4 of the fourth leads 7 sandwiched by the two fourth leads 7 located at both ends in the first direction x is shorter than the fourth length L4 of the fourth leads 7 at both ends in the first direction x.
[0081] In addition, in the illustrated example, regarding the fourth length L4 of the plurality of fourth leads 7, the fourth length L4 of the fourth leads 7 located outside in the first direction x is longer than the fourth length L4 of the fourth leads 7 located on the center side in the first direction x. That is, if the fourth lengths L4 of the adjacent fourth leads 7 are compared, the fourth length L4 located outside in the first direction x is longer than the fourth length L4 of the fourth leads 7 located inside in the first direction x.
[0082] In addition, in the illustrated example, the first length L1 and the fourth length L4 of the first leads 4 and the fourth leads 7 whose positions in the first direction x among the plurality of first leads 4 and the plurality of fourth leads 7 are equal are equal to each other.
[0083] Corner lead 8:
[0084] As Figures 1 to 9 and Figures 13 to 16As shown, a plurality of corner leads 8 are arranged at positions close to the four corners as observed in the thickness direction z of the sealing resin 2. Two corner leads 8 are arranged on both sides of the first direction x of the plurality of first leads 4. The other two corner leads 8 are arranged on both sides of the first direction x of the plurality of fourth leads 7.
[0085] The corner lead 8 has a corner thick wall portion 81, a corner thin wall portion 82, a corner mounting surface 83, a first corner end face 841, and a second corner end face 842.
[0086] The corner thick wall portion 81 is a portion where the thickness in the thickness direction z of the corner lead 8 is relatively thick (compared with the corner thin wall portion 82). The corner thick wall portion 81 has a corner mounting surface 83, a first corner end face 841, and a second corner end face 842. The corner thin wall portion 82 is a portion where the thickness in the thickness direction z of the corner lead 8 is relatively thin (compared with the corner thick wall portion 81), and is separated from the resin back surface 22 in the z1 side in the thickness direction z. In the present embodiment, the semiconductor element 1 is mounted on the corner thin wall portion 82. The shape of the corner thin wall portion 82 as observed in the thickness direction z is appropriately set according to the position of the mounted semiconductor element 1 and the like.
[0087] The corner mounting surface 83 faces the z2 side in the thickness direction z and is exposed from the resin back surface 22 of the sealing resin 2. In the present embodiment, the corner mounting surface 83 has a first portion 831 and a second portion 832. The first portion 831 reaches the first resin side surface 23 or the fourth resin side surface 26 and is separated from the second resin side surface 24 and the third resin side surface 25. The second portion 832 reaches the second resin side surface 24 or the third resin side surface 25 and is separated from the first resin side surface 23 and the fourth resin side surface 26. The ends of the first portion 831 and the second portion 832 are connected to each other. In the illustrated example, the corner mounting surface 83 is L-shaped as observed in the thickness direction z. In addition, in the illustrated example, the length Lc1 in the second direction y of the corner mounting surface 83 is longer than the length Lc2 in the first direction x. However, the shape and size of the corner mounting surface 83 are not limited in any way.
[0088] The first corner end face 841 faces the second direction y and is exposed from the first resin side surface 23 or the fourth resin side surface 26. In the illustrated example, the first corner end face 841 is coplanar with the first resin side surface 23 or the fourth resin side surface 26. The second corner end face 842 faces the first direction x and is exposed from the second resin side surface 24 or the third resin side surface 25. In the illustrated example, the second corner end face 842 is coplanar with the second resin side surface 24 or the third resin side surface 25.
[0089] In Figure 13 In the shown corner lead 8, the length Lc1 in the second direction y of the corner mounting surface 83 is larger than the first length L1 of the plurality of first leads 4. In addition, the length Lc2 in the first direction x of the corner mounting surface 83 is equal to the second length L2 of the plurality of second leads 5.
[0090] In Figure 13 In the corner lead 8 shown, the arrangement pitch Pc1 between the first mounting surface 43 of the first lead 4 closest to the x1 side in the first direction x and the first part 831 is equal to the arrangement pitch P1 of the first mounting surfaces 43 of the plurality of first leads 4. Further, the arrangement pitch Pc2 between the second mounting surface 53 of the second lead 5 closest to the y1 side in the second direction y and the second part 832 is equal to the arrangement pitch P2 of the second mounting surfaces 53 of the plurality of second leads 5.
[0091] In Figure 14 In the corner lead 8 shown, the length Lc1 in the second direction y of the corner mounting surface 83 is greater than the first length L1 of the plurality of first leads 4. Further, the length Lc2 in the first direction x of the corner mounting surface 83 is equal to the third length L3 of the plurality of third leads 6.
[0092] In Figure 14 In the corner lead 8 shown, the arrangement pitch Pc1 between the first mounting surface 43 of the first lead 4 closest to the x2 side in the first direction x and the first part 831 is equal to the arrangement pitch P1 of the first mounting surfaces 43 of the plurality of first leads 4. Further, the arrangement pitch Pc3 between the third mounting surface 63 of the third lead 6 closest to the y1 side in the second direction y and the second part 832 is equal to the arrangement pitch P2 of the third mounting surfaces 63 of the plurality of third leads 6.
[0093] In Figure 15 In the corner lead 8 shown, the length Lc1 in the second direction y of the corner mounting surface 83 is greater than the fourth length L4 of the plurality of fourth leads 7. Further, the length Lc2 in the first direction x of the corner mounting surface 83 is equal to the second length L2 of the plurality of second leads 5.
[0094] In Figure 15 In the corner lead 8 shown, the arrangement pitch Pc4 between the fourth mounting surface 73 of the fourth lead 7 closest to the x1 side in the first direction x and the first part 831 is equal to the arrangement pitch P4 of the fourth mounting surfaces 73 of the plurality of fourth leads 7. Further, the arrangement pitch Pc3 between the third mounting surface 63 of the third lead 6 closest to the y2 side in the second direction y and the second part 832 is equal to the arrangement pitch P3 of the third mounting surfaces 63 of the plurality of third leads 6.
[0095] In Figure 16 In the corner lead 8 shown, the length Lc1 in the second direction y of the corner mounting surface 83 is greater than the fourth length L4 of the plurality of fourth leads 7. Further, the length Lc2 in the first direction x of the corner mounting surface 83 is equal to the third length L3 of the plurality of third leads 6.
[0096] In Figure 16Among the corner leads 8 shown, the arrangement pitch Pc4 between the fourth mounting surface 73 of the fourth lead 7 located on the x2 side in the first direction x and the first portion 831 is equal to the arrangement pitch P4 of the fourth mounting surfaces 73 of the multiple fourth leads 7. Further, the arrangement pitch Pc2 between the second mounting surface 53 of the second lead 5 located on the y2 side in the second direction y and the second portion 832 is equal to the arrangement pitch P2 of the second mounting surfaces 53 of the multiple second leads 5.
[0097] Center lead 9:
[0098] The center lead 9 is as Figures 1 to 5 , Figure 8 , Figure 9 , Figure 11 and Figure 12 shown, and is arranged between the multiple second leads 5 or between the multiple third leads 6 in the second direction y. In the illustrated example, the center lead 9 overlaps with the center of the semiconductor device A1 (sealing resin 2) in the second direction y. In the illustrated example, the center lead 9 has a center thick wall portion 911, a center thick wall portion 912, a center thick wall portion 913, a center thin wall portion 921, a center thin wall portion 922, a center mounting surface 931, a center mounting surface 932, a center mounting surface 933, a center end surface 941, and a center end surface 942.
[0099] The center mounting surfaces 931, 932, and 933 are portions in the center lead 9 that are relatively thick in the thickness direction z (compared with the center thin wall portions 921 and 922). The center thick wall portion 911 has the center mounting surface 931 and the center end surface 941, the center thick wall portion 912 has the center mounting surface 932 and the center end surface 942, and the center thick wall portion 913 has the center mounting surface 933. The center thick wall portion 911 is arranged on the x1 side in the first direction x, the center thick wall portion 912 is arranged on the x2 side in the first direction x, and the center thick wall portion 913 is arranged in the center in the first direction x.
[0100] The center thin wall portions 921 and 922 are portions in the center lead 9 that are relatively thin in the thickness direction z (compared with the center thick wall portions 911, 912, and 913), and are separated from the resin back surface 22 toward the z1 side in the thickness direction z. In the present embodiment, semiconductor elements 1 are mounted on the center thin wall portions 921 and 922.
[0101] In the illustrated example, the length of the central mounting surface 931 in the first direction x is equal to the second length L2 of the second mounting surface 53 of the second lead 5. Further, the length of the central mounting surface 932 in the first direction x is equal to the third length L3 of the third mounting surface 63 of the third lead 6. The arrangement pitch between the central mounting surface 931 and the second mounting surface 53 adjacent in the second direction y is equal to the arrangement pitch P2 of the plurality of second mounting surfaces 53. Further, the arrangement pitch between the central mounting surface 932 and the third mounting surface 63 adjacent in the second direction y is equal to the arrangement pitch P3 of the plurality of third mounting surfaces 63.
[0102] Next, the operation of the semiconductor device A1 will be described.
[0103] When the semiconductor device A1 is mounted on a circuit board or the like, the first mounting surfaces 43 of the plurality of leads 4 are conductively joined to the circuit board or the like through a conductive joining member such as solder. Similarly, the respective mounting surfaces of the plurality of leads 5 to 9 are also conductively joined to the circuit board or the like through a conductive joining member. When the semiconductor device A1 is in use, thermal stress or the like may be generated in these conductive joining members. Through experiments by the inventors, the following insights were obtained: Among the conductive joining members joined to the first mounting surfaces 43 of the plurality of first leads 4, there is a tendency for the conductive joining members joined to the first mounting surfaces 43 located on both sides in the first direction x to be prone to generating the maximum thermal stress. Further, the following insight was obtained: The conductive joining members near the corners located at the four corners when observed in the thickness direction z of the sealing resin 2 tend to be prone to generating large thermal stress.
[0104] According to the present embodiment, as Figure 5 shown, regarding the length in the second direction y of the plurality of first leads 4, that is, the first length L1, the first length L1 of the first leads 4 located at both ends in the first direction x among the plurality of first leads 4 is longer than the first length L1 of any of the remaining first leads 4. That is, the first length L1 of the first leads 4 sandwiched by the two first leads 4 located at both ends in the first direction x is shorter than the first length L1 of the first leads 4 at both ends in the first direction x. With such a structure, it is possible to suppress excessive stress from being generated in the conductive joining members joined to the first mounting surfaces 43 located on both sides in the first direction x.
[0105] In addition, in the illustrated example, regarding the first length L1 of the plurality of first leads 4, the first length L1 of the first leads 4 located outside in the first direction x is longer than the first length L1 of the first leads 4 located on the center side in the first direction x. That is, if the first lengths L1 of the adjacent first leads 4 are compared, the first length L1 located outside in the first direction x is longer than the first length L1 of the first leads 4 located inside in the first direction x. With such a structure, it is possible to evenly reduce the stress generated in the conductive joining members joined to the plurality of first mounting surfaces 43.
[0106] In addition, according to the present embodiment, as Figure 5 shown, regarding the length in the second direction y of the plurality of fourth leads 7, that is, the fourth length L4, the fourth length L4 of the fourth leads 7 located at both ends in the first direction x among the plurality of fourth leads 7 is longer than the fourth length L4 of any other fourth lead 7. That is, the fourth length L4 of the fourth leads 7 sandwiched by the two fourth leads 7 located at both ends in the first direction x is shorter than the fourth length L4 of the fourth leads 7 at both ends in the first direction x. With such a structure, it is possible to suppress excessive stress from being generated in the conductive bonding members that are joined to the fourth mounting surfaces 73 located on both sides in the first direction x.
[0107] Further, in the illustrated example, regarding the fourth length L4 of the plurality of fourth leads 7, the fourth length L4 of the fourth leads 7 located outside the first direction x is longer than the fourth length L4 of the fourth leads 7 located on the center side in the first direction x. That is, if the fourth lengths L4 of adjacent fourth leads 7 are compared, the fourth length L4 located outside the first direction x is longer than the fourth length L4 of the fourth leads 7 located inside the first direction x. With such a structure, it is possible to evenly reduce the stress generated in the conductive bonding members that are joined to the plurality of fourth mounting surfaces 73.
[0108] In addition, the corner mounting surface 83 has a first portion 831 and a second portion 832. The first portion 831 reaches the first resin side surface 23 or the fourth resin side surface 26 and is separated from the second resin side surface 24 and the third resin side surface 25. The second portion 832 reaches the second resin side surface 24 or the third resin side surface 25 and is separated from the first resin side surface 23 and the fourth resin side surface 26. The ends of the first portion 831 and the second portion 832 are connected to each other. Therefore, the corner mounting surface 83 is configured to be separated from the corner portion where the first resin side surface 23, the second resin side surface 24, the third resin side surface 25, and the fourth resin side surface 26 are interconnected. Thereby, it is possible to suppress excessive stress from being generated in the conductive bonding members that are joined to the corner mounting surface 83.
[0109] As Figure 13 shown, in the corner lead 8, the arrangement pitch Pc1 between the first mounting surface 43 of the first lead 4 located closest to the x1 side in the first direction x and the first portion 831 is equal to the arrangement pitch P1 of the plurality of first mounting surfaces 43. Thereby, it is possible to suppress excessive stress from being generated in any of the plurality of first mounting surfaces 43 and the conductive bonding members that are joined to the first portion 831. This effect is also achieved by Figure 14 the relationship between the arrangement pitch Pc1 and the arrangement pitch P1, Figure 15 the relationship between the arrangement pitch Pc4 and the arrangement pitch P4, Figure 16 the relationship between the arrangement pitch Pc4 and the arrangement pitch P4.
[0110] As shown Figure 13 in FIG., in the corner lead 8, the arrangement pitch Pc1 between the first mounting surface 43 of the first lead 4 located on the x1 side in the first direction x and the first portion 831 is equal to the arrangement pitch P1 of the plurality of first mounting surfaces 43. Thus, it is possible to suppress excessive stress from being generated in any of the plurality of first mounting surfaces 43 and the conductive bonding member bonded to the first portion 831. This effect is also achieved by Figure 14 the relationship between the arrangement pitch Pc1 and the arrangement pitch P1, Figure 15 the relationship between the arrangement pitch Pc4 and the arrangement pitch P4, Figure 16 the relationship between the arrangement pitch Pc4 and the arrangement pitch P4.
[0111] In addition, as shown Figure 13 in FIG., in the second direction y, the arrangement pitch Pc2 between the second mounting surface 53 of the second lead 5 located on the y1 side and the second portion 832 is equal to the arrangement pitch P2 of the second mounting surfaces 53 of the plurality of second leads 5. Thus, it is possible to suppress excessive stress from being generated in any of the plurality of second mounting surfaces 53 and the conductive bonding member bonded to the second portion 832. This effect is also achieved by Figure 14 the relationship between the arrangement pitch Pc3 and the arrangement pitch P3, Figure 15 the relationship between the arrangement pitch Pc2 and the arrangement pitch P2, Figure 16 the relationship between the arrangement pitch Pc3 and the arrangement pitch P3.
[0112] As shown Figures 13 to 16 in FIG., the width Wc1 of the first portion 831 is equal to the width W1 of the first mounting surface 43 or the width W4 of the fourth mounting surface 73. In addition, the width Wc2 of the second portion 832 is equal to the width W2 of the second mounting surface 53 or the width W3 of the third mounting surface 63. Thus, it is possible to make the stress generated in the conductive bonding member bonded to these mounting surfaces more uniform.
[0113] Figures 17 to 20 illustrates a modified example and other embodiments of the present disclosure. In addition, in these figures, elements that are the same as or similar to those in the above-described embodiments are denoted by the same reference numerals as those in the above-described embodiments. Further, the structures of the respective portions in each modified example and each embodiment can be appropriately combined with each other within a range not causing a technical contradiction.
[0114] First Modified Example of the First Embodiment:
[0115] Figure 17 illustrates a first modified example of the semiconductor device A1. The structures of the plurality of first leads 4 and the plurality of fourth leads 7 of the semiconductor device A11 in this modified example are different from those in the above example.
[0116] In this modified example, the first lengths L1 of the first leads 4 other than the first leads 4 located on both sides of the first direction x among the multiple first leads 4 are equal. The first lengths L1 of the first leads 4 located on both sides of the first direction x among the multiple first leads 4 are longer than the first lengths L1 of the remaining first leads 4.
[0117] In addition, in this modified example, the fourth lengths L4 of the fourth leads 7 other than the fourth leads 7 located on both sides of the first direction x among the multiple fourth leads 7 are equal. The fourth lengths L4 of the fourth leads 7 located on both sides of the first direction x among the multiple fourth leads 7 are longer than the fourth lengths L4 of the remaining fourth leads 7.
[0118] According to this modified example, it is also possible to suppress excessive stress from being generated in the conductive bonding members for mounting. In addition, it can be seen from this modified example that the structure in which the first lengths L1 of the first leads 4 located on both sides of the first direction x among the multiple first leads 4 are longer than the first lengths L1 of the remaining first leads 4 can be variously deformed. In addition, the structure in which the fourth lengths L4 of the fourth leads 7 located on both sides of the first direction x among the multiple fourth leads 7 are longer than the fourth lengths L4 of the remaining fourth leads 7 can be variously deformed.
[0119] Second Embodiment:
[0120] Figure 18 This shows a semiconductor device according to the second embodiment of the present disclosure. The structures of the multiple second leads 5 and the multiple third leads 6 of the semiconductor device A2 in this embodiment are different from those of the above embodiment.
[0121] In this embodiment, the second lengths L2 of the second leads 5 located on both sides when viewed in the y direction among the multiple second leads 5 are longer than the second lengths L2 of the remaining second leads 5. That is, the second lengths L2 of the second leads 5 sandwiched by the two second leads 5 at both ends in the second direction y are shorter than the second lengths L2 of the second leads 5 at both ends in the second direction y.
[0122] In addition, in the illustrated example, regarding the second lengths L2 of the multiple second leads 5, the second lengths L2 of the second leads 5 located outside the second direction y are longer than the second lengths L2 of the second leads 5 located on the center side of the second direction y. That is, if the second lengths L2 of the adjacent second leads 5 are compared, the second length L2 located outside the second direction y is longer than the second length L2 of the second lead 5 located inside the first direction x.
[0123] According to the present embodiment, it is also possible to suppress excessive stress from being generated in the conductive bonding member for mounting. In addition, in the present embodiment, by configuring the second lengths L2 of the plurality of second leads 5 and the third lengths L3 of the plurality of third leads 6 as described above, it is possible to more effectively suppress excessive stress from being generated in the conductive bonding member.
[0124] Third Embodiment:
[0125] Figure 19 A semiconductor device showing a third embodiment of the present disclosure. In the semiconductor device A3 of the present embodiment, the lengths in the first direction x of the first resin side surface 23 and the fourth resin side surface 26 are shorter than the lengths in the second direction y of the second resin side surface 24 and the third resin side surface 25. In addition, the center lead 9 is disposed between the plurality of first leads 4 and the plurality of fourth leads 7 in the first direction x.
[0126] The first lengths L1 of the first leads 4 located on both sides in the first direction x are longer than the first lengths L1 of the remaining first leads 4, and the fourth lengths L4 of the fourth leads 7 located on both sides in the first direction x are longer than the fourth lengths L4 of the remaining fourth leads 7, which is the same as in the above-described embodiment. That is, the semiconductor device A3 can be said to be a structure in which the name, symbol, etc. are redefined in a state where a structure similar to the semiconductor device A1 is rotated 90 degrees when viewed in the thickness direction z.
[0127] According to the present embodiment, it is also possible to suppress excessive stress from being generated in the conductive bonding member for mounting. In addition, according to the present embodiment, when the sealing resin 2 is rectangular when viewed in the thickness direction z, a structure in which the lengths of the leads at both ends are increased can be appropriately adopted for either one or both of the short side and the long side.
[0128] Fourth Embodiment:
[0129] Figure 20 A semiconductor device showing a fourth embodiment of the present disclosure. The structure of the corner leads 8 of the semiconductor device A4 of the present embodiment is different from that of the above-described embodiment.
[0130] In the present embodiment, the corner mounting surface 83 of the corner lead 8 has a pentagonal shape in which one corner of a rectangular shape is chamfered. The size of the corner mounting surface 83 in the second direction y is smaller than the first length L1 and the fourth length L4, and the size of the corner mounting surface 83 in the first direction x is smaller than the second length L2 and the third length L3.
[0131] In addition, in the present embodiment, the second mounting surface 53 and the third mounting surface 63 that are closest to the y1 side in the second direction y overlap with the first mounting surfaces 43 located on both sides in the first direction x when viewed in the first direction x. In addition, the second mounting surface 53 and the third mounting surface 63 that are closest to the y2 side in the second direction y overlap with the fourth mounting surfaces 73 located on both sides in the first direction x when viewed in the first direction x.
[0132] According to the present embodiment, it is also possible to suppress excessive stress from being generated in the conductive bonding member for mounting. In addition, according to the present embodiment, the structure of the corner lead 8 is not limited in any way and can be set appropriately. Furthermore, the semiconductor device of the present disclosure may also have a structure that does not include the corner lead 8.
[0133] The semiconductor device of the present disclosure is not limited to the above-described Embodiments 1 to 4 and the above-described modification examples. Figures 21 to 23 Other modification examples and embodiments of the present disclosure are shown. In addition, in these figures, elements that are the same as or similar to those in the above-described modification examples and embodiments are denoted by the same reference numerals as in the above-described modification examples and embodiments. Further, the structures of the respective parts in each modification example and each embodiment can be appropriately combined with each other within a range where no technical contradiction occurs.
[0134] First Embodiment, Second Modification Example:
[0135] Figure 21 A second modification example of the semiconductor device A1 is shown. In the semiconductor device A12 of this modification example, the structure of the corner lead 8 is different from the above example (refer to Figure 14 ).
[0136] In this modification example, the lengths Lc1 and Lc2 of the corner mounting surface 83 are equal to each other. In this case, the sealing resin 2 may also be, for example, square-shaped when viewed in the thickness direction z.
[0137] According to this modification example, it is also possible to suppress excessive stress from being generated in the conductive bonding member for mounting. In addition, according to this modification example, the specific shape of the corner mounting surface 83 and the like are not limited in any way.
[0138] First Embodiment, Third Modification Example:
[0139] Figure 22 A third modification example of the semiconductor device A1 is shown. The structure of the corner lead 8 of the semiconductor device A13 of this modification example is different from the above examples.
[0140] In this modification example, the corner mounting surface 83 has a first portion 831, a second portion 832, and a third portion 833. The third portion 833 is located between the second portion 832 and the first resin side surface 23 or the fourth resin side surface 26 in the second direction y, and reaches the first portion 831 and the second resin side surface 24 or the third resin side surface 25. By having the first portion 831, the second portion 832, and the third portion 833, the corner mounting surface 83 is in an F shape when viewed in the thickness direction z.
[0141] In the illustrated example, the third portion 833 is located between the second portion 832 and the first resin side surface 23 in the second direction y, and reaches the first portion 831 and the third resin side surface 25. In addition, the arrangement pitch between the second portions 832 can also be the same as the arrangement pitch P2 or the arrangement pitch P3 in the above example. In addition, the width of the second portion 832 and the third portion 833 in the second direction y can also be the same as the width W2 or the width W3 in the above example.
[0142] According to this modification example, it is also possible to suppress excessive stress from being generated in the conductive joining member for mounting. In addition, according to this modification example, it can be seen that the specific shape of the corner mounting surface 83 and the like can be any shape as long as it is separated from the corner portions at the four corners of the sealing resin 2, and there are no restrictions.
[0143] Fifth Embodiment:
[0144] Figure 23 This shows a semiconductor device according to the fifth embodiment of the present disclosure. The structures of the plurality of first leads 4 and the plurality of fourth leads 7 of the semiconductor device A5 in this embodiment are different from those in the above embodiments.
[0145] In this embodiment, the first lengths L1 of the plurality of first leads 4 are all equal. In addition, the length Lc1 of the corner lead 8 is longer than the first length L1 of the plurality of first leads 4. Similarly, the fourth lengths L4 of the plurality of fourth leads 7 are all equal. In addition, the length Lc1 of the corner lead 8 is longer than the fourth length L4 of the plurality of fourth leads 7.
[0146] According to this embodiment, it is also possible to suppress excessive stress from being generated in the conductive joining member for mounting. In addition, according to this embodiment, it can be seen that the first length L1 of the plurality of first leads 4, the fourth length L4 of the plurality of fourth leads 7, the second length L2 of the plurality of second leads 5, and the third length L3 of the plurality of third leads 6 can be in any length relationship.
[0147] The semiconductor device according to the present disclosure is not limited to the above embodiments and modification examples. The specific structures of the respective parts of the semiconductor device according to the present disclosure can be freely subjected to various design changes. The present disclosure includes the embodiments described in the following appended notes.
[0148] Supplementary Note 1A. A semiconductor device includes:
[0149] A semiconductor element;
[0150] A plurality of leads; and
[0151] A sealing resin that covers at least a part of the semiconductor element and the plurality of leads,
[0152] The sealing resin has: a resin back surface facing the thickness direction of the semiconductor element; a first resin side surface along a first direction intersecting the thickness direction; and a second resin side surface and a third resin side surface along a second direction intersecting the thickness direction and the first direction,
[0153] The plurality of leads include a plurality of first leads arranged in the first direction,
[0154] Each of the plurality of first leads has a first mounting surface exposed from the resin back surface,
[0155] The first mounting surface reaches the first resin side surface and is separated from the second resin side surface and the third resin side surface,
[0156] Regarding the length in the second direction of the first mounting surface of the plurality of first leads, i.e., the first length, the first length of the first leads located at both ends in the first direction among the plurality of first leads is longer than the first length of any of the remaining first leads.
[0157] Supplementary Note 2A. The semiconductor device according to Supplementary Note 1A, wherein
[0158] Regarding the first length of the plurality of first leads, the first length of the first leads located outside in the first direction is longer than the first length of the first leads located on the center side in the first direction.
[0159] Supplementary Note 3A. The semiconductor device according to Supplementary Note 1A or 2A, wherein
[0160] The sealing resin is rectangular when viewed in the thickness direction.
[0161] Supplementary Note 4A. The semiconductor device according to any one of Supplementary Notes 1A to 3A, wherein
[0162] The plurality of first leads have first end surfaces exposed from the first resin side surface.
[0163] Supplementary Note 5A. The semiconductor device according to any one of Supplementary Notes 1A to 4A, wherein
[0164] The first mounting surface is in a shape extending along the second direction.
[0165] Supplementary Note 6A. The semiconductor device according to any one of Supplementary Notes 1A to 5A, wherein
[0166] The length of the first resin side surface in the first direction is longer than the lengths of the second resin side surface and the third resin side surface in the second direction.
[0167] Supplementary Note 7A. The semiconductor device according to any one of Supplementary Notes 1A to 5A, wherein
[0168] The length of the first resin side surface in the first direction is shorter than the lengths of the second resin side surface and the third resin side surface in the second direction.
[0169] Supplementary Note 8A. The semiconductor device according to any one of Supplementary Notes 1A to 5A, wherein
[0170] The length of the first resin side surface in the first direction is equal to the lengths of the second resin side surface and the third resin side surface in the second direction.
[0171] Supplementary Note 9A. The semiconductor device according to any one of Supplementary Notes 1A to 8A, wherein
[0172] The first lead includes: a first thick-walled portion having the first mounting surface; and a first thin-walled portion separated from the resin back surface in the thickness direction.
[0173] Supplementary Note 10A. The semiconductor device according to any one of Supplementary Notes 1A to 9A, wherein
[0174] The sealing resin further has: a fourth resin side surface facing the side opposite to the first resin side surface in the second direction,
[0175] The plurality of leads further includes: a plurality of second leads arranged in the second direction along the second resin side surface; a plurality of third leads arranged in the second direction along the third resin side surface; and a plurality of fourth leads arranged in the first direction along the fourth resin side surface.
[0176] Supplementary Note 11A. The semiconductor device according to Supplementary Note 10A, wherein
[0177] Each of the plurality of second leads has a second mounting surface exposed from the resin back surface,
[0178] The second mounting surface reaches the second resin side surface and is separated from the first resin side surface and the fourth resin side surface,
[0179] The plurality of third leads each have a third mounting surface exposed from the back surface of the resin.
[0180] The third mounting surface reaches the third resin side surface and is separated from the first resin side surface and the fourth resin side surface.
[0181] The plurality of fourth leads each have a fourth mounting surface exposed from the back surface of the resin.
[0182] The fourth mounting surface reaches the fourth resin side surface and is separated from the second resin side surface and the third resin side surface.
[0183] Supplementary Note 12A. The semiconductor device according to Supplementary Note 11A, wherein
[0184] Regarding the length in the second direction of the fourth mounting surface of the plurality of fourth leads, i.e., the fourth length, the fourth length of the fourth leads located at both ends in the first direction among the plurality of fourth leads is longer than the fourth length of any of the remaining fourth leads.
[0185] Supplementary Note 13A. The semiconductor device according to Supplementary Note 12A, wherein
[0186] Regarding the fourth length of the plurality of fourth leads, the fourth length of the fourth leads located outside in the first direction is longer than the fourth length of the fourth leads located at the center in the first direction.
[0187] Supplementary Note 14A. The semiconductor device according to any one of Supplementary Notes 11A to 13A, wherein
[0188] The length in the first direction of the second mounting surface of the plurality of second leads, i.e., the second length, and the length in the first direction of the second mounting surface of the plurality of third leads, i.e., the third length, are shorter than the first length of the first leads located at both ends in the first direction among the plurality of first leads.
[0189] Supplementary Note 15A. The semiconductor device according to any one of Supplementary Notes 11A to 13A, wherein
[0190] Regarding the length in the first direction of the second mounting surface of the plurality of second leads, i.e., the second length, the second length of the second leads located at both ends in the second direction among the plurality of second leads is longer than the second length of any of the remaining second leads.
[0191] The length of the first direction of the third mounting surface of the plurality of third leads, i.e., the third length, is such that the third length of the third leads at both ends in the second direction among the plurality of third leads is longer than the third length of the remaining third leads.
[0192] Supplementary Note 16A. The semiconductor device according to any one of Supplementary Notes 11A to 15A, wherein,
[0193] The plurality of leads further includes corner leads, and the corner leads have a corner mounting surface that protrudes from the resin back surface outside the first direction with respect to the first mounting surface of the plurality of first leads.
[0194] The corner mounting surface has: a first portion that reaches the first resin side surface and is separated from the second resin side surface and the third resin side surface; and a second portion that reaches the second resin side surface or the third resin side surface and is separated from the first resin side surface and the fourth resin side surface.
[0195] The first portion is connected to the second portion.
[0196] Supplementary Note 17A. The semiconductor device according to Supplementary Note 16A, wherein,
[0197] The length of the second direction of the corner mounting surface is longer than the first length of the first leads at both ends in the first direction among the plurality of first leads.
[0198] Moreover, the present disclosure includes the embodiments described in the following supplementary notes.
[0199] Supplementary Note 1B. A semiconductor device includes:
[0200] A semiconductor element;
[0201] A plurality of leads; and
[0202] A sealing resin that covers at least a part of the semiconductor element and the plurality of leads,
[0203] The sealing resin has: a resin back surface that faces the thickness direction of the semiconductor element; a first resin side surface and a fourth resin side surface that extend along a first direction intersecting the thickness direction; and a second resin side surface and a third resin side surface that extend along a second direction intersecting the thickness direction and the first direction.
[0204] The plurality of first leads includes a plurality of first leads, a plurality of fourth leads, and corner leads,
[0205] The plurality of first leads are arranged in the first direction along the first resin side surface,
[0206] The plurality of fourth leads are arranged in the first direction along the fourth resin side surface.
[0207] Each of the plurality of first leads has a first mounting surface exposed from the back surface of the resin.
[0208] Each of the plurality of fourth leads has a fourth mounting surface exposed from the back surface of the resin.
[0209] The corner lead has a corner mounting surface exposed from the back surface of the resin outside the first direction with respect to the first mounting surface of the plurality of first leads or the fourth mounting surface of the plurality of fourth leads.
[0210] The corner mounting surface has: a first portion that reaches the first resin side surface or the fourth resin side surface and is separated from the second resin side surface and the third resin side surface; and a second portion that reaches the second resin side surface or the third resin side surface and is separated from the first resin side surface and the fourth resin side surface.
[0211] The first portion is connected to the second portion.
[0212] Supplementary Note 2B. The semiconductor device according to Supplementary Note 1B, wherein
[0213] The sealing resin is rectangular when viewed in the thickness direction.
[0214] Supplementary Note 3B. The semiconductor device according to Supplementary Note 1B or 2B, wherein
[0215] The arrangement pitch of the first mounting surfaces of the plurality of first leads is equal to the arrangement pitch between the first mounting surface of the outermost first lead in the first direction among the plurality of first leads and the first portion.
[0216] Supplementary Note 4B. The semiconductor device according to any one of Supplementary Notes 1B to 3B, wherein
[0217] The width of the first mounting surfaces of the plurality of first leads in the first direction is equal to the width of the first portion in the first direction.
[0218] Supplementary Note 5B. The semiconductor device according to any one of Supplementary Notes 1B to 4B, wherein
[0219] The length of the corner mounting surface in the second direction is longer than the length of the first mounting surfaces of the plurality of first leads in the second direction.
[0220] Supplementary Note 6B. The semiconductor device according to any one of Supplementary Notes 1B to 5B, wherein
[0221] The length of the second direction of the first part is longer than the length of the first direction of the second part.
[0222] Supplementary Note 7B. The semiconductor device according to any one of Supplementary Notes 1B to 5B, wherein,
[0223] The length of the second direction of the first part is shorter than the length of the first direction of the second part.
[0224] Supplementary Note 8B. The semiconductor device according to any one of Supplementary Notes 1B to 5B, wherein,
[0225] The length of the second direction of the first part is equal to the length of the first direction of the second part.
[0226] Supplementary Note 9B. The semiconductor device according to any one of Supplementary Notes 1B to 8B, wherein,
[0227] The corner lead has a first corner end face exposed from the first resin side face and a second corner end face exposed from the second resin side face or the third resin side face.
[0228] Supplementary Note 10B. The semiconductor device according to any one of Supplementary Notes 1B to 9B, wherein,
[0229] The length of the first direction of the first resin side face is longer than the lengths of the second directions of the second resin side face and the third resin side face.
[0230] Supplementary Note 11B. The semiconductor device according to any one of Supplementary Notes 1B to 9B, wherein,
[0231] The length of the first direction of the first resin side face is shorter than the lengths of the second directions of the second resin side face and the third resin side face.
[0232] Supplementary Note 12B. The semiconductor device according to any one of Supplementary Notes 1B to 9B, wherein,
[0233] The length of the first direction of the first resin side face is equal to the lengths of the second directions of the second resin side face and the third resin side face.
[0234] Supplementary Note 13B. The semiconductor device according to any one of Supplementary Notes 1B to 12B, wherein,
[0235] The corner lead includes: a corner thick wall portion having the corner mounting surface; and a corner thin wall portion separated from the resin back surface in the thickness direction.
[0236] Supplementary Note 14B. The semiconductor device according to any one of Supplementary Notes 1B to 13B, wherein,
[0237] The plurality of leads further includes: a plurality of second leads arranged in the second direction along the second resin side surface; a plurality of third leads arranged in the second direction along the third resin side surface; and a plurality of fourth leads arranged in the first direction along the fourth resin side surface.
[0238] Supplementary Note 15B. The semiconductor device according to Supplementary Note 14B, wherein,
[0239] Each of the plurality of second leads has a second mounting surface exposed from the resin back surface,
[0240] The second mounting surface reaches the second resin side surface and is separated from the first resin side surface and the fourth resin side surface,
[0241] Each of the plurality of third leads has a third mounting surface exposed from the resin back surface,
[0242] The third mounting surface reaches the third resin side surface and is separated from the first resin side surface and the fourth resin side surface,
[0243] The fourth mounting surface reaches the fourth resin side surface and is separated from the second resin side surface and the third resin side surface.
[0244] Supplementary Note 16B. The semiconductor device according to Supplementary Note 15B, wherein,
[0245] The arrangement pitch of the second mounting surfaces of the plurality of second leads is equal to the arrangement pitch between the second mounting surface of the outermost second lead in the second direction among the plurality of second leads and the second portion.
[0246] Supplementary Note 17B. The semiconductor device according to Supplementary Note 15B or 16B, wherein,
[0247] The width of the second mounting surfaces of the plurality of second leads in the second direction is equal to the width of the second portion in the second direction.
[0248] Symbol Explanation
[0249] A1, A11, A12, A13, A2, A3, A4, A5 - semiconductor devices, 1 - semiconductor element, 2 - sealing resin, 4 - first lead, 5 - second lead, 6 - third lead, 7 - fourth lead, 8 - corner lead, 9 - center lead, 21 - resin main surface, 22 - resin back surface, 23 - first resin side surface, 24 - second resin side surface, 25 - third resin side surface, 26 - fourth resin side surface, 41 - first thick wall portion, 42 - second thin wall portion, 43 - first mounting surface, 44 - first end surface, 51 - second thick wall portion, 52 - second thin wall portion, 53 - second mounting surface, 54 - second end surface, 61 - third thick wall portion, 62 - third thin wall portion, 63 - third mounting surface, 64 - third end surface, 71 - fourth thick wall portion, 72 - fourth thin wall portion, 73 - fourth mounting surface, 74 - fourth end surface, 81 - corner thick wall portion, 82 - corner thin wall portion, 83 - corner mounting surface, 831 - first part, 832 - second part, 833 - third part, 841 - first corner end surface, 842 - second corner end surface, 911, 912, 913 - center thick wall portions, 921, 922 - center thin wall portions, 931, 932, 933 - center mounting surfaces, 941, 942 - center end surfaces, P1, P2, P3, P4, Pc1, Pc2, Pc3, Pc4 - arrangement pitches, x - first direction, y - second direction, z - thickness direction.
Claims
1. A semiconductor device, characterized in that, it includes: a semiconductor element; a plurality of leads; and a sealing resin that covers at least a part of each of the semiconductor element and the plurality of leads, the sealing resin has: a resin back surface facing the thickness direction of the semiconductor element; a first resin side surface along a first direction intersecting the thickness direction; and a second resin side surface and a third resin side surface along a second direction intersecting the thickness direction and the first direction, the plurality of leads include a plurality of first leads arranged in the first direction, each of the plurality of first leads has a first mounting surface exposed from the resin back surface, the first mounting surface reaches the first resin side surface and is separated from the second resin side surface and the third resin side surface, with respect to the length in the second direction of the first mounting surface of the plurality of first leads, that is, the first length, the first length of the first leads located at both ends in the first direction among the plurality of first leads is longer than the first length of any of the remaining first leads.
2. The semiconductor device according to claim 1, characterized in that, with respect to the first length of the plurality of first leads, the first length of the first leads located on the outer side in the first direction is longer than the first length of the first leads located on the center side in the first direction.
3. The semiconductor device according to claim 1 or 2, characterized in that, the sealing resin is rectangular when viewed in the thickness direction.
4. The semiconductor device according to any one of claims 1 to 3, characterized in that, the plurality of first leads have first end surfaces exposed from the first resin side surface.
5. The semiconductor device according to any one of claims 1 to 4, characterized in that, the first mounting surface is in a shape extending along the second direction.
6. The semiconductor device according to any one of claims 1 to 5, characterized in that, the length of the first resin side surface in the first direction is longer than the length of the second resin side surface and the third resin side surface in the second direction.
7. The semiconductor device according to any one of claims 1 to 5, characterized in that, the length of the first resin side surface in the first direction is shorter than the length of the second resin side surface and the third resin side surface in the second direction.
8. The semiconductor device according to any one of claims 1 to 5, characterized in that, the length of the first resin side surface in the first direction is equal to the length of the second resin side surface and the third resin side surface in the second direction.
9. The semiconductor device according to any one of claims 1 to 8, characterized in that, the first lead includes: a first thick wall portion having the first mounting surface; and a first thin wall portion separated from the resin back surface in the thickness direction.
10. The semiconductor device according to any one of claims 1 to 9, characterized in that, the sealing resin further has a fourth resin side surface that faces the side opposite to the first resin side surface in the second direction, The multiple leads further include: multiple second leads arranged in the second direction along the second resin side surface; multiple third leads arranged in the second direction along the third resin side surface; and multiple fourth leads arranged in the first direction along the fourth resin side surface.
11. The semiconductor device according to claim 10, wherein, each of the multiple second leads has a second mounting surface exposed from the resin back surface, the second mounting surface reaches the second resin side surface and is separated from the first resin side surface and the fourth resin side surface, each of the multiple third leads has a third mounting surface exposed from the resin back surface, the third mounting surface reaches the third resin side surface and is separated from the first resin side surface and the fourth resin side surface, each of the multiple fourth leads has a fourth mounting surface exposed from the resin back surface, the fourth mounting surface reaches the fourth resin side surface and is separated from the second resin side surface and the third resin side surface.
12. The semiconductor device according to claim 11, wherein, regarding the length in the second direction of the fourth mounting surface of the multiple fourth leads, i.e., the fourth length, the fourth length of the fourth leads located at both ends in the first direction among the multiple fourth leads is longer than the fourth length of any of the remaining fourth leads.
13. The semiconductor device according to claim 12, wherein, regarding the fourth length of the multiple fourth leads, the fourth length of the fourth leads located outside in the first direction is longer than the fourth length of the fourth leads located at the center in the first direction.
14. The semiconductor device according to any one of claims 11 to 13, wherein, the length in the first direction of the second mounting surface of the multiple second leads, i.e., the second length, and the length in the first direction of the third mounting surface of the multiple third leads, i.e., the third length, are shorter than the first length of the first leads located at both ends in the first direction among the multiple first leads.
15. The semiconductor device according to any one of claims 11 to 13, wherein, regarding the length in the first direction of the second mounting surface of the multiple second leads, i.e., the second length, the second length of the second leads located at both ends in the second direction among the multiple second leads is longer than the second length of any of the remaining second leads, regarding the length in the first direction of the third mounting surface of the multiple third leads, i.e., the third length, the third length of the third leads located at both ends in the second direction among the multiple third leads is longer than the third length of any of the remaining third leads.
16. The semiconductor device according to any one of claims 11 to 15, wherein, the multiple leads further include corner leads, and the corner leads have a corner mounting surface exposed from the resin back surface outside in the first direction relative to the first mounting surface of the multiple first leads. The corner mounting surface has: a first portion that reaches the first resin side surface and is separated from the second resin side surface and the third resin side surface; and a second portion that reaches the second resin side surface or the third resin side surface and is separated from the first resin side surface and the fourth resin side surface, The first portion is connected to the second portion.
17. The semiconductor device according to claim 16, characterized in that, the length of the second direction of the corner mounting surface is longer than the first length of the first leads located at both ends in the first direction among the plurality of first leads.
18. A semiconductor device, characterized in that, comprises: a semiconductor element; a plurality of leads; and a sealing resin that covers at least a part of the semiconductor element and the plurality of leads, the sealing resin has: a resin back surface that faces the thickness direction of the semiconductor element; a first resin side surface and a fourth resin side surface that extend along a first direction intersecting the thickness direction; and a second resin side surface and a third resin side surface that extend along a second direction intersecting the thickness direction and the first direction, the plurality of leads include a plurality of first leads, a plurality of fourth leads, and corner leads, the plurality of first leads are arranged in the first direction along the first resin side surface, the plurality of fourth leads are arranged in the first direction along the fourth resin side surface, the plurality of first leads respectively have a first mounting surface exposed from the resin back surface, the plurality of fourth leads respectively have a fourth mounting surface exposed from the resin back surface, the corner leads have a corner mounting surface exposed from the resin back surface outside the first direction with respect to the first mounting surface of the plurality of first leads or the fourth mounting surface of the plurality of fourth leads, the corner mounting surface has: a first portion that reaches the first resin side surface or the fourth resin side surface and is separated from the second resin side surface and the third resin side surface; and a second portion that reaches the second resin side surface or the third resin side surface and is separated from the first resin side surface and the fourth resin side surface, The first portion is connected to the second portion.
19. The semiconductor device according to claim 18, characterized in that, the sealing resin is rectangular when viewed in the thickness direction.
20. The semiconductor device according to claim 18 or 19, characterized in that, the arrangement pitch of the first mounting surfaces of the plurality of first leads is equal to the arrangement pitch between the first mounting surface of the outermost first lead in the first direction among the plurality of first leads and the first portion.
21. The semiconductor device according to any one of claims 18 to 20, characterized in that, the width of the first mounting surfaces of the plurality of first leads in the first direction is equal to the width of the first portion in the first direction.
22. The semiconductor device according to any one of claims 18 to 21, characterized in that, The length of the corner mounting surface in the second direction is longer than the length of the first mounting surface of the plurality of first leads in the second direction.
23. The semiconductor device according to any one of claims 18 to 22, wherein, The length of the first part in the second direction is longer than the length of the second part in the first direction.
24. The semiconductor device according to any one of claims 18 to 22, wherein, The length of the first part in the second direction is shorter than the length of the second part in the first direction.
25. The semiconductor device according to any one of claims 18 to 22, wherein, The length of the first part in the second direction is equal to the length of the second part in the first direction.
26. The semiconductor device according to any one of claims 18 to 25, wherein, The corner lead has a first corner end face exposed from the first resin side face and a second corner end face exposed from the second resin side face or the third resin side face.
27. The semiconductor device according to any one of claims 18 to 26, wherein, The length of the first resin side face in the first direction is longer than the lengths of the second resin side face and the third resin side face in the second direction.
28. The semiconductor device according to any one of claims 18 to 26, wherein, The length of the first resin side face in the first direction is shorter than the lengths of the second resin side face and the third resin side face in the second direction.
29. The semiconductor device according to any one of claims 18 to 26, wherein, The length of the first resin side face in the first direction is equal to the lengths of the second resin side face and the third resin side face in the second direction.
30. The semiconductor device according to any one of claims 18 to 29, wherein, The corner lead includes: a corner thick wall portion having the corner mounting surface; and a corner thin wall portion separated from the resin back surface in the thickness direction.
31. The semiconductor device according to any one of claims 18 to 30, wherein, The plurality of leads further includes: a plurality of second leads arranged in the second direction along the second resin side face; a plurality of third leads arranged in the second direction along the third resin side face; and a plurality of fourth leads arranged in the first direction along the fourth resin side face.
32. The semiconductor device according to claim 31, wherein, The plurality of second leads each have a second mounting surface exposed from the resin back surface, The second mounting surface reaches the second resin side face and is separated from the first resin side face and the fourth resin side face, The plurality of third leads each have a third mounting surface exposed from the resin back surface, The third mounting surface reaches the third resin side face and is separated from the first resin side face and the fourth resin side face, The fourth mounting surface reaches the fourth resin side surface and is separated from the second resin side surface and the third resin side surface.
33. The semiconductor device according to claim 32, wherein, the arrangement pitch of the second mounting surfaces of the plurality of second leads is equal to the arrangement pitch between the second mounting surface of the outermost second lead in the second direction among the plurality of second leads and the second portion.
34. The semiconductor device according to claim 32 or 33, wherein, the width in the second direction of the second mounting surfaces of the plurality of second leads is equal to the width in the second direction of the second portion.
Citation Information
Patent Citations
Semiconductor Devices
JP2022087155A