Process for manufacturing micro-electro-mechanical device having chamber and micro-electro-mechanical device
By forming appropriate layers on the semiconductor wafer and utilizing the fluid coupling technology of the substrate, the operation of different microelectromechanical devices under optimized pressure conditions is achieved, and the problem of difficulty in optimizing pressure conditions in the prior art is solved, which significantly improves performance and reduces waste products.
Patent Information
- Application Number
- CN202411825357.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-12-04
- Filing Date
- 2024-12-12
- Publication Date
- 2025-06-17
AI Technical Summary
The prior art is difficult to achieve optimized operating pressure conditions for different microelectromechanical devices in the same package, resulting in poor performance or unachievable pressure targets.
By forming a dielectric layer, a structural layer and a stop layer on the semiconductor wafer and forming a microelectromechanical device in the structural layer, the first chamber is fluidly coupled to the external environment with a substrate and sealing the first chamber under different pressures, thereby achieving operation of different microelectromechanical devices under optimized pressure conditions.
It is achieved that two different microelectromechanical devices are sealed in a corresponding accurately controlled pressure chamber without the use of getter, saving space, avoiding the problems of inaccurate pressure prediction and getter saturation, significantly improving performance and reducing waste products.
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Figure CN120157083A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a process for manufacturing microelectromechanical devices having chambers sealed at different pressures and to microelectromechanical devices manufactured thereby. Background Art
[0002] It is well known that different microelectromechanical devices incorporated and sealed in the same package are used in many applications. For example, it is common to integrate single-axis or multi-axis gyroscopes and accelerometers into the same chip and thus into the same package.
[0003] A common problem is related to the fact that, as in the case of gyroscopes and accelerometers, the devices may have very different optimal operating conditions from each other. In fact, in order to reduce the consumption caused by air friction damping, it is preferable to operate the gyroscope in an environment with a low pressure, which is usually between 0.1 mbar and 1 mbar. The gyroscope remains in continuous oscillation in resonance and the low-pressure conditions allow the oscillation to be maintained, thus reducing damping and the dissipated energy. On the other hand, accelerometers typically operate under higher pressure conditions, such as between 1 mbar and several atmospheres. Similar problems also occur with other types of devices operating under different conditions, such as resonators, wake-up systems, geophones or bolometers combined with gyroscopes or accelerometers.
[0004] One possible solution consists of including different devices in the same cavity or chamber of the package, where there is a pressure level corresponding to the trade-off between the preferred operating pressures. This type of solution is relatively easy to implement, but may be unsatisfactory and affect performance.
[0005] According to a different solution, the microelectromechanical devices are included in corresponding sealed and non-connected chambers. In practice, the devices (e.g., gyroscopes and accelerometers) are manufactured in a first wafer, while in a second wafer, a cover is provided and cavities are formed at positions corresponding to the respective sensors. In the cavities intended for the devices operating at a lower pressure, a layer of absorbent material or getter is deposited. When the second wafer is bonded to the first wafer, for example, by glass frit bonding or other wafer bonding techniques, or when it is bonded later using a dedicated step, the getter is thermally activated and absorbs the non-inert gases present in the chamber, thus reducing the pressure. In this way, chambers sealed at different pressures are obtained and all devices can operate under the preferred pressure conditions.
[0006] However, even this solution is not without limitations. First, especially when a particularly high pressure is required in one of the chambers, the amount of gaseous nitrogen available may saturate the getter, and in this case, the pressure target in the chamber may not be achievable. On the other hand, in order to include an amount of getter sufficient to prevent saturation, the size of the chamber (base area and / or height) may be larger than the size sufficient for a single microelectromechanical device.
[0007] In addition, during manufacturing, the getter may be prematurely activated during the wafer bonding step before the chamber is fully sealed. In this case, the getter may also absorb gas from the higher pressure chamber (crosstalk), creating a twofold drawback. On the one hand, in fact, the pressure in the chamber without the getter decreases, and in any case, the final pressure value cannot be accurately predicted. On the other hand, the getter may become saturated more easily, and thus even in the low pressure chamber, the atmosphere may not reach the desired level. Summary of the Invention
[0008] The present disclosure is directed to providing one or more embodiments of a microelectromechanical accelerometer that allow overcoming or at least mitigating the described limitations.
[0009] The present disclosure is directed to one or more embodiments of a process for manufacturing a microelectromechanical device and one or more embodiments of a microelectromechanical device.
[0010] For example, at least one embodiment of a process for manufacturing a microelectromechanical device is outlined to include: forming a dielectric layer, a structural layer, and a stop layer on a first semiconductor wafer of a substrate including a semiconductor material, the stop layer being between the dielectric layer and the structural layer, the substrate being selectively etchable relative to the stop layer; forming a first microelectromechanical device and a second microelectromechanical device in the structural layer; sealing the first microelectromechanical device and the second microelectromechanical device in a first chamber and a second chamber respectively at a first pressure; fluidly coupling the first chamber to the external environment by means of the substrate; and sealing the first chamber at a second pressure different from the first pressure; wherein the fluid coupling includes: forming a cavity in the dielectric layer between the substrate and a portion of the stop layer that is fluidly coupled to the first chamber; forming a channel through the substrate at a position corresponding to the cavity and the portion of the stop layer; and ending the etching of the substrate against the stop layer.
[0011] For example, at least one embodiment of a microelectromechanical device is summarized as including: a substrate, which is a substrate of semiconductor material and includes a first surface and a second surface opposite to the first surface; an anchoring structure including: a plurality of anchoring pins coupled to the first surface of the substrate and extending outward from the first surface of the substrate; and an anchoring pad coupled to the plurality of anchoring pins and spaced apart from the first surface of the substrate by the plurality of anchoring pins; a fixing portion coupled to the anchoring pad; a first cavity covered by the anchoring pad, between the anchoring pad and the first surface of the substrate, and spaced inwardly from the plurality of pins; a channel extending into the second surface of the substrate and reaching the cavity; a sealing layer at least partially filling the cavity and the channel; and a second cavity spaced outwardly from the plurality of anchoring pins. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] To better understand the present disclosure, reference is made to the accompanying drawings, and preferred embodiments are provided by way of non-limiting examples, in which:
[0013] Figure 1 is a cross-section through a semiconductor wafer in an initial processing step of a process for manufacturing a microelectromechanical device according to an embodiment of the present disclosure;
[0014] Figure 2 shows Figure 1 an enlarged detail of the cross-section of
[0015] Figure 3 is Figure 2 a top view of a further enlarged detail of the wafer of
[0016] Figure 4 is a top view of details of a semiconductor wafer in an intermediate processing step of a microelectromechanical process according to a variant of the present disclosure;
[0017] Figure 5 and Figure 6 shows Figure 2 details of
[0018] Figures 7 to 9 shows Figure 1 a cross-section of
[0019] Figure 10 shows Figure 3 a view of
[0020] Figures 11 to 14 shows Figure 1 a cross-section of
[0021] Figure 15 showsFigure 3 Views in subsequent processing steps;
[0022] Figure 16 is a cross-section of a microelectromechanical device obtained by the process shown through embodiments of the present disclosure using Figures 1 to 15 ;
[0023] Figure 17 and Figure 18 shows cross-sections through a semiconductor wafer in initial processing steps of a process for manufacturing a microelectromechanical device according to different embodiments of the present disclosure;
[0024] Figure 19 shows Figure 17 magnified details of the cross-section in subsequent processing steps of the current process;
[0025] Figure 20 is Figure 2 a top view of further magnified details of the wafer;
[0026] Figure 21 shows Figure 19 details in subsequent processing steps;
[0027] Figure 22 shows Figure 20 views in subsequent processing steps;
[0028] Figures 23 to 24 shows Figure 19 details in subsequent processing steps;
[0029] Figure 25 shows Figure 20 views in subsequent processing steps;
[0030] Figures 26 to 28 shows Figure 17 cross-sections in subsequent processing steps;
[0031] Figure 29 shows Figure 20 views in subsequent processing steps;
[0032] Figure 30 is a cross-section of a microelectromechanical device obtained by the process shown through different embodiments of the present disclosure using Figures 17 to 29 ; DETAILED DESCRIPTION
[0033] Refer to Figure 1, the semiconductor wafer 1 includes a substrate 2 of, for example, single-crystalline silicon. The wafer 1 is intended to accommodate the microstructures of microelectromechanical devices, and hereinafter it is referred to as the microstructure wafer 1. More specifically, the first region of the microstructure wafer 1 indicated by 1a is intended to accommodate a first microelectromechanical sensor operating under a first pressure, such as a gyroscope, and the second region of the microstructure wafer 1 indicated by 1b is intended to accommodate a second microelectromechanical sensor operating under a second pressure, such as an accelerometer, the second pressure being higher than the first pressure. However, it should be understood that other microelectromechanical devices requiring different operating pressures, such as resonators and wake-up systems, can be integrated into the substrate 2.
[0034] Initially, a dielectric layer 3 of silicon oxide is deposited on the substrate 2 and selectively etched in the first region 1a to form a first trench 5 and a second trench 6, which are then used to form anchors. The first trench 5 extends continuously along a corresponding closed path, and the corresponding closed paths are nested in such a way that one is inside the other. In the embodiment described herein, specifically, two circular and concentric first trenches 5 are opened.
[0035] The second trench 6 is surrounded by the first trench 5 and, in one embodiment, is organized in an array that extends along closed paths L1, …, LN (three in the illustrated example) nested in such a way that one is inside the other. Specifically, in one embodiment, the closed paths are concentric circumferences and each second trench 6 extends over a portion of the corresponding closed path L1, …, LN. The second trenches 6 extending along the same closed path are separated from each other by portions of the dielectric layer 3. In this way, the first region 3a and the second region 3b of the dielectric layer 3, which are respectively inside the second trench 6 and included between the first trench 5 and the second trench 6, are connected to each other by the portions of the dielectric layer 3 that separate the successive second trenches 6. However, it can be understood that the second trenches may not be organized in closed paths but may be arranged to form anchors according to design preferences. For example, in Figure 4 the embodiment of, the second trenches indicated herein by 6' are aligned in rows.
[0036] The microstructure wafer 1 is then covered using a stop layer 7 ( Figure 5 ), the stop layer 7 being thin enough to coat the interiors of the first trench 5 and the second trench 6 without filling them. The stop layer 7 is a material selectively etchable with respect to silicon (or the material that generally forms the substrate 2), such as aluminum oxide.
[0037] After the stop layer 7, in the case where the insides of the first trench 5 and the second trench 6 are partially coated on the stop layer 7, for example, a connection and anchoring layer 8 of polysilicon is deposited on the microstructured wafer 1 and fills the first trench 5 and the second trench 6, respectively forming an anchoring ring or portion 10 and an anchoring pin 11. The anchoring pins 11 are specifically organized into a concentric array, and the concentric array corresponds to the respective closed paths L1, …, LN. In each array, adjacent anchoring pins 11 are separated by portions of the dielectric layer 3. The dimensions of the second trench 6 of at least the innermost array and the distance between successive second trenches 6 are chosen such that the space between successive anchoring pins 11 can be sealed by the plasma deposition process described below. For example, the spacing between successive anchoring pins 11 can be between 1 μm and 5 μm.
[0038] Then ( Figure 6 ), the stop layer 7 and the connection and anchoring layer 8 are defined to open one or more windows 12 between a first region 3a of the dielectric layer 3 and the innermost part of the anchoring ring 10 (which corresponds to the innermost part of the first trench 5), thereby exposing portions of the dielectric layer 3. Specifically, in Figure 6 the embodiment of, a single window 12 having an annular shape is opened on a second region 3b of the dielectric layer 3. Thus, the crown of the dielectric layer 3 is exposed, and the shape of the crown corresponds to the window 12. Alternatively, a plurality of windows can be opened, for example circular and circumferentially distributed.
[0039] In the radially inner region inside the window 12, or more precisely, in the region above the first part 3a of the dielectric layer 3 and above the anchoring pins 11 up to the inner edge of the window 12, the remaining part of the connection and anchoring layer 8 forms an anchoring pad 13 that bonds to the anchoring pins 11. Further, the anchoring pad 13 forms an anchoring structure 15 with the anchoring pins 11. In practice, the anchoring pad 13 extends on the face 3c of the dielectric layer 3 opposite to the substrate 2; the anchoring pins 11 extend perpendicularly from the anchoring pad 13 to the substrate 2 and along the respective arcs of a circumference parallel to the face 3c.
[0040] In this step, the connection and anchoring layer 8 is also shaped to form an anchoring pad 16 and a conductive line 17 according to the design preferences for forming microelectromechanical devices in the microstructured wafer 1.
[0041] A sacrificial layer 18 of silicon oxide is then deposited on the microstructured wafer 1 ( Figure 7 ), contacting the dielectric layer 3 through the window 12. The sacrificial layer 18 is selectively removed to form an anchoring opening 20 above the respective anchoring pad 16. In addition, one of the anchoring openings in the anchoring opening 20 exposes the anchoring pad 13 of the anchoring structure 15.
[0042] Starting from a seed layer (not shown), a structural layer 21 of polysilicon is formed on the microstructure wafer 1 by growth in an epitaxial reactor ( Figure 8 ). The structural layer 21 contacts the anchor pads 13, 16 via the anchor openings 20. The structural layer 21 is then defined by anisotropic trench etching to form the fixed and movable parts of the gyroscope 22 in the first region 1a of the microstructure wafer 1 and the accelerometer 23 in the second region 1b. Specifically, the fixed or stator part 22a of the gyroscope 22 is anchored to the anchor pad 13 of the anchor structure 15 and is separated from the rest of the gyroscope 22 by a gap 22b. However, it will be understood that the stator part 22a of the gyroscope 22 may extend beyond the anchor structure 15 and be partially anchored to the dielectric layer 3. In addition, the gap 22b reaches a part of the sacrificial layer 18 that is connected to the second region 3a of the dielectric layer 3 through the through window 12.
[0043] As Figure 9 shown, the sacrificial layer 18 is then removed, for example by etching in a hydrofluoric acid bath, at an accessible location to release the microstructures of the gyroscope 22 and the accelerometer 23. In addition, the part of the dielectric layer 3 inside the annular anchor 10 (which can be accessed through the through window 12) is also removed simultaneously. The annular anchor 11 stops the removal of the dielectric layer 3 in this step. When the removal of the sacrificial layer 18 and the dielectric layer 3 is completed, the cavity 25 is radially defined inside the annular anchor 10 between the substrate and the stop layer 7. Specifically, a first part 25a of the cavity 25 that is radially inside the anchor pin 11 is in fluid communication with a second part 25b of the cavity 25, and the second part 25b is radially included between the annular anchor 10 and the anchor pin 11. As better illustrated in Figure 10 , the fluid connection is obtained by means of the passage 26 between adjacent anchor pins 11 and the channel 27 between the concentric arrays of the anchor pins 11. Further, after the sacrificial layer 18 is removed, the second part 25b of the cavity 25 is fluidly coupled to the environment surrounding the gyroscope 22 through the through window 12 and the gap 22b surrounding the stator part 22a.
[0044] An adhesion layer 28 ( Figure 11 ) is then deposited on a part of the structural layer 21 along a closed path surrounding the gyroscope 22 and the accelerometer 23. The adhesion layer 28 can be any suitable sealing material and is used for wafer bonding in semiconductor manufacturing processes, such as but not limited to glass frit, Al-Ge eutectic alloy, Au-Sn, Au-In, Au-Si, Si-Si, Si-SiO2 alloy.
[0045] Then ( Figure 12) The cover wafer 30, which is pre-processed on the inner surface according to design preferences, is bonded to the microstructure wafer 1 at a first pressure P1 in a controlled atmosphere to form a composite wafer 31. By adhering to the adhesive layer 28, the cover wafer 30 seals the gyroscope 22 and the accelerometer 23 inside the first chamber 32 and the second chamber 33, respectively, both of which are at the first pressure P1. In one embodiment, the first pressure P1 is the designed operating pressure of the accelerometer 23, for example, between 1 mbar and 5 bar.
[0046] As Figure 13 shown, the substrate 2 of the microstructure wafer 1 is then anisotropically etched through the back side 2a to form a channel 35 aligned with the first part 25a of the cavity 25. In this step, the etching of the semiconductor material ends on the stop layer 7, which protects the structural layer 21, especially the fixed or stator part 22a of the gyroscope 22. Thus, in practice, a fluid path is defined that connects the first chamber 32 in which the gyroscope 22 is arranged to the outside through the window 12, the second part 25b of the cavity 25, the passage 26 between the anchor pins 11, the channel 27, the first part 25a of the cavity 25, and the channel 35.
[0047] The composite wafer 31 is then placed in an environment at a second pressure P2 and sealed ( Figure 14 and 15 ), where the second pressure P2 is different from and lower than the first pressure P1 in the embodiment. More precisely, a sealing layer 37 is formed, for example, by PVD (Physical Vapor Deposition) or PECVD (Plasma-Enhanced Chemical Vapor Deposition) deposition on the back side 2a of the substrate 2 and penetrates into the channel 35 and the first region 25a of the cavity 25. Due to the initial spacing between the second trenches 6 (and thus between adjacent anchor pins 11 of the same array), the passage 26 between the anchor pins 11 is closed for the deposition of the sealing layer 37, and the first part 25a is fluidly insulated from the rest of the cavity 25 and the first chamber 32. The first chamber 32 is thus sealed at the second pressure P2, which can be precisely set and maintained.
[0048] After final processing steps that may include thinning, grinding, defining contacts, and cleaning, the composite wafer 31 is finally diced and divided into die, each die including Figure 16 a microelectromechanical device 50 of the type shown, where the microelectromechanical device 50 is shown incorporated in a package 51. For example, in at least one embodiment, the package 51 is a molding compound, resin, or epoxy resin that partially or fully fills the channel 35.
[0049] Reference will be made below to Figures 17 to 30The different embodiments of the present disclosure are described. A microstructure wafer 101 of a substrate 102 including a semiconductor material (e.g., single-crystalline silicon) is intended to accommodate the microstructures of microelectromechanical devices. Specifically, a first region indicated by 101a in the microstructure wafer 101 is intended to accommodate a first microelectromechanical sensor operating under a first pressure, such as a gyroscope, and a second region indicated by 101b in the microstructure wafer 101 is intended to accommodate a second microelectromechanical sensor operating under a second pressure, such as an accelerometer, the second pressure being higher than the first pressure.
[0050] Initially, a dielectric layer 103, such as silicon oxide, is formed on the substrate 102 and is selectively etched to open windows 104, such as circular ones, which expose the portion of the substrate 102 in the first region 101a of the microstructure wafer.
[0051] Then ( Figure 18 ), the dielectric layer 103 is increased, such as by 0.5 μm or less, by thermal oxidation or deposition of additional silicon oxide and covers the substrate 102.
[0052] The dielectric layer 103 is selectively etched inside the window 105 to form a first trench 105 and a second trench 106 ( Figure 19 and Figure 20 ), and the first trench 105 and the second trench 106 will then be used to form anchorages. The first trench 105 extends continuously along a corresponding closed path, and the corresponding closed paths are nested in such a way that one is inside the other. In the embodiments described herein, specifically, two circular and concentric first trenches 105 are opened.
[0053] The second trench 106 is surrounded by the first trench 105 and, in one embodiment, is organized as an array that extends on closed paths L1', …, LN' (three in the illustrated example) that are nested in such a way that one is inside the other. Specifically, in one embodiment, the closed paths are concentric circumferences, and each second trench 106 extends on a portion of the corresponding closed path L1', …, LN'. The second trenches 106 extending along the same closed path are separated from each other by portions of the dielectric layer 103. In this way, a first region 103a and a second region 103b of the dielectric layer 103 that are respectively inside the second trench 106 and are included between the first trench 105 and the second trench 106 are connected to each other by the portions of the dielectric layer 103 that separate the continuous second trenches 106.
[0054] The process then proceeds substantially as described above and is briefly reviewed.
[0055] A stop layer 107, such as alumina, and a connection and anchoring layer 108 are deposited on the microstructure wafer 101 ( Figure 21 andFigure 22 )。The stop layer 107 coats the walls of the first trench 105 and the walls of the second trench 106, leaving a space filled with the connection and anchoring layer 108 therein. The annular anchors 110 in the first trench 105 and the anchoring pins 111 in the second trench 106 are thus formed. The anchoring pins 111 extend perpendicularly to the surface 3c from the anchoring pads 113 to the substrate 102 and extend along the corresponding arcs of the circumference parallel to the surface 3c.
[0056] The stop layer 107 and the connection layer are etched to open windows 112 on the second region 103b of the dielectric layer 103. In this case, a plurality of windows 112 are distributed along the circumference between the innermost first trench 105 and the outermost array of the second trench 106 ( Figure 22 ).
[0057] The radially inner part of the connection and anchoring layer 8 inside the windows 112 forms the anchoring pads 113 that bond to the anchoring pins 111. Furthermore, the anchoring pads 113 and the anchoring pins 111 form an anchoring structure 115. In practice, the anchoring pads 113 are depressed relative to the surface of the dielectric layer 103 opposite to the substrate 102.
[0058] According to the design preferences for forming microelectromechanical devices in the microstructure wafer 101, the connection and anchoring layer 108 is also patterned to form the anchoring pads 116 and the conductive wires 117.
[0059] The sacrificial layer 118 of silicon oxide is then deposited on the microstructure wafer 101 ( Figure 23 ), the sacrificial layer 118 contacts the dielectric layer 103 through the windows 112 and is selectively removed to form the anchoring openings 120 above the corresponding anchoring pads 116. In addition, one of the anchoring openings in the anchoring openings 120 exposes the anchoring pad 113 of the anchoring structure 115. The structural layer 121 of polysilicon is formed on the microstructure wafer 101 by growing in an epitaxial reactor and contacts the anchoring pads 113 and 116 through the anchoring openings 120. The structural layer 121 is then patterned to form the fixed and movable parts of the gyroscope 122 in the first region 101a of the microstructure wafer 101 and the fixed and movable parts of an accelerometer (not shown) in the second region 101b. Specifically, the fixed or stator part 122a of the gyroscope 122 is anchored to the anchoring pad 113 of the anchoring structure 115 and is separated from the rest of the gyroscope 122 by a gap 122b that reaches the part of the sacrificial layer 118 that connects to the second region 103a of the dielectric layer 103 through the windows 112.
[0060] As Figure 24As shown, the sacrificial layer 118 is then removed where accessible to release the microstructures of the gyroscope 122 and the accelerometer. At the same time, the portion of the dielectric layer 103 inside the annular anchor 110 is also removed through the window 112. The cavity 125 is thus radially defined inside the annular anchor 110. As better illustrated in Figure 25 a first radially inner portion 125a of the cavity 125 inside the anchoring pins 111 is in fluid communication with a second portion 125b of the cavity 125 via a passage 126 between adjacent anchoring pins 111 and a channel 127 between concentric arrays of the anchoring pins 111, and the second portion 125b is radially included between the annular anchor 110 and the anchoring pins 111. Further, the second portion 125b of the cavity 125 is in fluid coupling with the environment surrounding the gyroscope 122 through the window 112 and a gap around the fixed portion 122a.
[0061] Referring to Figure 26 , a cover wafer 130 is bonded to the microstructure wafer 101 using an adhesive layer 128 to seal the gyroscope 122 and the accelerometer (indicated herein by 123) inside a first chamber 32 and a second chamber 33 both under a first pressure P1', respectively.
[0062] The substrate 102 of the microstructure wafer 1 is then etched anisotropically from the back side to form a channel 135 ( Figure 27 ) aligned with the first portion 125a of the cavity 125, thus forming a fluid path that communicates the first chamber 132 in which the gyroscope 122 is disposed with the outside through the window 112, the second portion 125b of the cavity 125, the passage 126 between the anchoring pins 111, the channel 127, the first portion 125a of the cavity 125, and the channel 135. In this step, the etching of the semiconductor material ends on a stop layer 107 that protects the structural layer 121, specifically the fixed portion 122a of the gyroscope 122.
[0063] The composite wafer 131 is then placed in an environment under a second pressure P2' lower than the first pressure P1 and sealed ( Figure 28 and 29 ). More precisely, a sealing layer 137 is formed by PVD or PECVD deposition on the back side of the substrate 102 and penetrates into the channel 135 and the first region 125a of the cavity 125. The passage 126 between the anchoring pins 111 is closed for the deposition of the sealing layer 137, and the first portion 125a is fluidly insulated from the rest of the cavity 125 and the first chamber 132. The first chamber 132 is thus sealed under the second pressure P2', and the second pressure P2' can be accurately set and maintained.
[0064] After the final processing step, the composite wafer 131 is finally cut and diced into die, each die including an integrated microelectromechanical device 150 of the type as Figure 30 shown, where the microelectromechanical device 150 is shown incorporated in a package 151. For example, in at least one embodiment, the package 151 is a molding compound, resin, or epoxy resin that partially or fully fills the trench 35.
[0065] The described process advantageously allows two different microelectromechanical devices to be sealed in respective chambers at respective accurately controlled pressures without the use of getters. Specifically, for several reasons, the absence of getters is advantageous. First, the space in one of the chambers is significantly saved. This is highly desirable given the growing trend towards device miniaturization. Second, the risk of premature getter activation that could unpredictably change the pressure in one or both chambers is completely eliminated. In fact, it can be seen that premature activation during the step of bonding the cover wafer to the microstructured wafer can result in both the absorption of gas from the high-pressure chamber through crosstalk and getter saturation, and thus a pressure in the low-pressure chamber higher than expected. Furthermore, pressure variations in the chambers can affect the performance of the microelectromechanical devices in an uncontrolled manner, and in any case, the actual operating conditions will be different from the preferred design conditions.
[0066] The present disclosure further allows for very accurate control of the pressure in the two chambers. In fact, the first chamber is completely sealed at a first pressure and no longer has a fluid connection to the outside. Specifically, when the second chamber is balanced at a second pressure and then sealed, the first chamber has already been clearly sealed.
[0067] It is further advantageous to seal the second chamber at a lower pressure by using PVD or PECVD deposition, as it allows the use of the low pressures typically used for this type of process. This condition is particularly applicable to devices operating at very low pressures (on the order of microbars), such as geophones or bolometers.
[0068] In any case envisioned for manufacturing integrated microelectromechanical devices, the process can be mainly implemented using processing steps only by appropriately designing the etch masks used. The dedicated steps are only used in practice to open trenches from the back side of the composite wafer and thus do not interfere with the processing steps on the front side. The process according to the present disclosure thus does not significantly increase complexity and cost in terms of a significant improvement in performance and a reduction in scrap.
[0069] In addition, no dedicated etching is required to remove the residual portions of the stop layer.
[0070] Finally, it is clear that the described microelectromechanical accelerometer can be modified and varied without departing from the scope of the present disclosure.
[0071] For example, a cover wafer can be bonded to a microstructure wafer under low pressure conditions and sealed under high pressure conditions after one of the chambers in the chamber (e.g., the chamber containing the accelerometer) is in fluid communication with the outside through a channel in the substrate and the anchoring structure.
[0072] In addition, a plurality of fluid paths between the outside and one of the two sealed chambers can be opened using the described techniques in terms of the number and location selected according to design preferences.
[0073] According to a further variant, the stop layer can be selectively removed before depositing the connection layer and only retained in positions corresponding to the first part of the cavity and the channel.
[0074] At least one embodiment of a process for manufacturing a microelectromechanical device of the present disclosure is outlined to include: forming a dielectric layer (3; 103), a structural layer (21; 121), and a stop layer (7; 107) on a first semiconductor wafer (1; 101) including a substrate (2; 102) of semiconductor material, the stop layer (7; 107) being between the dielectric layer (3; 103) and the structural layer (21; 121), the substrate (2; 102) being selectively etchable relative to the stop layer (7; 107); forming a first microelectromechanical device (22; 122) and a second microelectromechanical device (23; 123) in the structural layer (21; 121); sealing the first microelectromechanical device (22; 122) and the second microelectromechanical device (23; 123) in a first chamber (32; 132) and a second chamber (33; 133) at a first pressure (P1; P1'), respectively; fluidly coupling the first chamber (32; 132) to the external environment through the substrate (2; 102); and sealing the first chamber (32; 132) at a second pressure (P2; P2'), the second pressure (P2; P2') being different from the first pressure (P1; P1'); wherein the fluid coupling includes: forming a cavity (25; 125) fluidly coupled to the first chamber (32; 132) in the dielectric layer (3; 103) between the substrate (2; 102) and a portion of the stop layer (7; 107); forming a channel (35; 135) through the substrate (2; 102) at a position corresponding to the cavity (25; 125) and a portion of the stop layer (7; 107); and ending the etching of the substrate (2; 102) against the stop layer (7; 107).
[0075] In at least one embodiment, the process includes forming an anchoring structure (15; 115) that extends through the cavity and is configured to anchor a fixed portion (22a; 122a) of the first microelectromechanical device (22; 122) to the substrate.
[0076] In at least one embodiment, the anchoring structure (15; 115) defines an internal first part (25a; 125a) and an external second part (25b; 125b) within the cavity (25; 125), and forms fluid passages (26, 27; 126, 127) between the first part (25a; 125a) and the second part (25b; 125b) of the cavity.
[0077] In at least one embodiment, forming the anchoring structure (15; 115) includes: opening a first trench (5; 105) in the dielectric layer (3; 103) to the substrate (2; 102), the first trench (5; 105) continuously extending along a corresponding first closed path, the corresponding first closed paths being nested one within the other; opening a second trench (6; 106) in the dielectric layer (3; 103) to the substrate (2; 102), the second trench (6; 106) being enclosed within the first trench (5; 105) and extending over a portion of a corresponding second closed path, the corresponding second closed paths being nested one within the other; wherein a first region (3a; 103a) of the dielectric layer (3; 103) is connected to a second region (3b; 103b) of the dielectric layer (3; 103) by a portion of the dielectric layer (3; 103) separating the second continuous trench (6; 106), the first region (3a; 103a) of the dielectric layer (3; 103) being within the second trench (6; 106) and having a shape corresponding to the first part (25a; 125a) of the cavity (25; 15), and the second region (3b; 103b) of the dielectric layer (3; 103) being included between the first trench (5; 105) and the second trench (6; 106) and having a shape corresponding to the second part (25b; 125b) of the cavity (25; 15).
[0078] In at least one embodiment, forming the anchoring structure (15; 115) includes forming a semiconductor connection and anchoring layer (8; 108) on a stop layer (7; 107) to fill the first trench (5; 105) and the second trench (6; 106) and respectively form an annular first anchoring element (10; 110) and a second anchoring element (11; 111); patterning the connection and anchoring layer (8; 108) to define an anchoring pad (13; 113), the anchoring pad (13; 113) being bonded to the second anchoring element (11; 111) above the first region (3a; 103a) of the dielectric layer (3; 103a).
[0079] In at least one embodiment, the process includes: selectively removing the connection and anchoring layers (8; 108) and the stop layer (7; 107) to open at least one window (12; 112) in a second region (3b; 103b) of the dielectric layer (3; 103) around the anchoring structure (15; 115), and exposing a portion of the dielectric layer (3; 103) having a shape corresponding to the window (12; 112).
[0080] In at least one embodiment, the process includes: forming a dielectric sacrificial layer (18; 118) in contact with the second region (3b; 103b) of the dielectric layer (3; 103) through at least one window (12; 112).
[0081] In at least one embodiment, the sacrificial layer (18; 118) is formed on the stop layer (7; 107).
[0082] In at least one embodiment, the process includes: selectively removing the sacrificial layer (18; 118) above the anchoring pad (13; 113); and forming a semiconductor structure layer (21; 121) on the sacrificial layer and in contact with the anchoring pad (13; 113); wherein forming the first microelectromechanical device (22; 122) and the second microelectromechanical device (23; 123) includes anisotropically etching the structure layer (21; 121) to the sacrificial layer (18; 118).
[0083] In at least one embodiment, forming the cavity (25; 125) includes: removing the sacrificial layer (18; 118) and removing the first region (3a; 103a) and the second region (3b; 103b) of the dielectric layer (3; 103) through at least one window (12; 112).
[0084] In at least one embodiment, the channel (35; 135) is aligned with a first portion (25a; 125a) of the cavity (25; 125).
[0085] In at least one embodiment, sealing the first chamber (32; 132) at a second pressure (P2; P2') includes depositing a sealing layer (37; 137) on the back side (2a; 102a) of the substrate (2; 102) and through the channel (35; 135).
[0086] In at least one embodiment, sealing the first chamber (32; 132) at a second pressure (P2; P2') includes fluidly insulating the first portion (25a; 125a) from the remainder of the cavity (25; 125) and the first chamber (32; 132).
[0087] In at least one embodiment, sealing the first chamber (32; 132) at a second pressure (P2; P2') includes closing a fluid passage (26, 27; 126, 127) between a first portion (25a; 125a) and a second portion (25b; 125b) of a closed cavity (25; 125).
[0088] In at least one embodiment, sealing the first microelectromechanical device (22; 122) and the second microelectromechanical device (23; 123) includes bonding a second semiconductor wafer (30; 130) to a first semiconductor wafer (1; 101).
[0089] At least one embodiment of the microelectromechanical device of the present disclosure is generally configured to include: a substrate (2; 102) of semiconductor material; a dielectric layer (3; 103) on the substrate (2; 102); a structural layer (21; 121) of semiconductor material on the dielectric layer (3; 103); a stop layer (7; 107) interposed between the dielectric layer (3; 103) and the structural layer (21; 121), the substrate (2; 102) being selectively etchable relative to the stop layer (7; 107); in the structural layer (21; 121), a first microelectromechanical device (22; 122) and a second microelectromechanical device (23; 123) are respectively sealed in a first chamber (32; 132) at a first pressure (P1; P1') and a second chamber (33; 133) at a second pressure (P2; P2'), the second pressure (P2; P2') being different from the first pressure (P1; P1'); a channel (35; 135) extending through the substrate (2; 102); in the dielectric layer (3; 103) between the substrate (2; 102) and a portion of the stop layer (7; 107), a first cavity (25a; 125a) fluidly coupled to the channel (35), a second cavity (25b; 125b) fluidly coupled to the first chamber (32; 132), and a fluid passage (26, 27; 126, 127) between the first cavity (25a; 125a) and the second cavity (25b; 125b); and a sealing layer (37; 137) closing the fluid passage (26, 27; 126, 127) and fluidly insulating the first cavity (25a; 125a) from the second cavity (25b; 125b).
[0090] The various embodiments described above can be combined to provide other embodiments. Aspects of the embodiments can be modified as needed to incorporate concepts from various patents, applications, and publications to provide other embodiments.
[0091] These and other changes may be made to the embodiments in light of the foregoing detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments and the full scope of equivalents to such claims. Accordingly, the claims are not limited by this disclosure.
Claims
1. A method comprising: On a first semiconductor wafer, a dielectric layer, a structural layer and a stop layer are formed, wherein the first semiconductor wafer comprises a substrate, the substrate is made of a semiconductor material, the stop layer is between the dielectric layer and the structural layer, and the substrate can be selectively etched relative to the stop layer; forming a first micro-electromechanical device and a second micro-electromechanical device in the structural layer; sealing the first micro-electromechanical device and the second micro-electromechanical device in a first chamber and a second chamber, respectively, wherein the second chamber is at a first pressure; fluidly coupling the first chamber to an external environment via the substrate; as well as sealing the first chamber at a second pressure, the second pressure being different from the first pressure; The fluid coupling includes: forming a cavity in the dielectric layer between the substrate and a portion of the stop layer, the cavity being fluidly coupled to the first chamber; forming a channel through the substrate in a location corresponding to the cavity and the portion of the stop layer; and Etching of the substrate is terminated against the stop layer.
2. The method according to claim 1, comprising: An anchor structure is formed that extends through the cavity and is configured to anchor a fixed portion of the first microelectromechanical device to the substrate.
3. The method of claim 2, wherein the anchoring structure defines an interior first portion and an exterior second portion in the cavity and forms a fluid passageway between the first portion and the second portion of the cavity.
4. The method of claim 3, wherein forming the anchoring structure comprises: A first trench is opened in the dielectric layer to the substrate, the first trench continuously extending along a corresponding first closed path, and the corresponding first closed paths are nested one inside the other; A second trench is opened in the dielectric layer to the substrate, the second trench is enclosed inside the first trench and extends over a portion of a corresponding second closed path, the corresponding second closed paths are nested one inside the other; A first region of the dielectric layer and a second region of the dielectric layer are connected to each other by means of a portion of the dielectric layer separating the second continuous groove, the first region of the dielectric layer is inside the second groove and has a shape corresponding to the first portion of the cavity, and the second region of the dielectric layer is included between the first groove and the second groove and has a shape corresponding to the second portion of the cavity.
5. The method of claim 4, wherein forming the anchoring structure comprises: forming a semiconductor connection and anchoring layer on the stop layer to fill the first trench and the second trench and form a first annular anchoring element and a second annular anchoring element, respectively; The connection and anchoring layer is patterned to define an anchoring pad bonded to the second anchoring element over the first region of the dielectric layer.
6. The method according to claim 5, comprising: The connection and anchoring layer and the stop layer are selectively removed to open at least one window on the second region of the dielectric layer around the anchoring structure and expose a portion of the dielectric layer having a shape corresponding to the window.
7. The method according to claim 6, comprising: A dielectric sacrificial layer is formed through the at least one window in contact with the second region of the dielectric layer. The method according to claim 7 , wherein the sacrificial layer is formed on the stop layer.
9. The method according to claim 7, comprising: selectively removing the sacrificial layer over the anchor pad; as well as forming a semiconductor structure layer on the sacrificial layer and in contact with the anchor pad; The forming of the first micro-electromechanical device and the second micro-electromechanical device comprises: etching the structural layer to the sacrificial layer in an anisotropic manner.
10. The method of claim 9, wherein forming the cavity comprises: The sacrificial layer is removed and the first region and the second region of the dielectric layer are removed through the at least one window. The method of claim 3 , wherein the channel is aligned with the first portion of the cavity.
12. The method of claim 11, wherein sealing the first chamber at the second pressure comprises: A sealing layer is deposited on the back side of the substrate and across the trench.
13. The method of claim 3, wherein sealing the first chamber at the second pressure comprises: The first portion is fluidly insulated from the remainder of the cavity and the first chamber.
14. The method of claim 3, wherein sealing the first chamber at the second pressure comprises: The fluid passage between the first portion and the second portion of the cavity is closed.
15. The method of claim 1, wherein sealing the first micro-electromechanical device and the second micro-electromechanical device comprises: A second semiconductor wafer is bonded to the first semiconductor wafer.
16. A device comprising: A substrate, the substrate being a semiconductor material; a dielectric layer on the substrate; a structural layer, the structural layer being made of a semiconductor material and being on the dielectric layer; a stop layer, the stop layer being between the dielectric layer and the structural layer, the substrate being capable of being selectively etched relative to the stop layer; In the structural layer, a first micro-electromechanical device and a second micro-electromechanical device, the first micro-electromechanical device and the second micro-electromechanical device are sealed in a first chamber and a second chamber respectively, the first chamber is at a first pressure, the second chamber is at a second pressure, and the second pressure is different from the first pressure; a channel, the channel traversing the substrate; a first cavity, a second cavity, and a fluid passage in the dielectric layer between the substrate and a portion of the stop layer, the first cavity being fluidly coupled to the channel, the second cavity being fluidly coupled to the first chamber, the fluid passage being between the first cavity and the second cavity; as well as A sealing layer closes the fluid passage and fluidly isolates the first cavity from the second cavity.
17. The micro-electromechanical device according to claim 16, further comprising: an anchor pad, the anchor pad covering the channel and the first cavity; as well as A plurality of anchor pins extend from the anchor pad to the substrate, the anchor pins being spaced radially outward from the channel.
18. A device comprising: A substrate, the substrate is made of a semiconductor material, the substrate comprising a first surface and a second surface, the second surface being opposite to the first surface; An anchoring structure, the anchoring structure comprising: a plurality of anchor pins coupled to the first surface of the substrate, the plurality of anchor pins extending outwardly from the first surface of the substrate; and an anchor pad coupled to the plurality of anchor pins and spaced apart from the first surface of the substrate by the plurality of anchor pins; a fixing portion coupled to the anchor pad; a first cavity covered by the anchor pad, between the anchor pad and the first surface of the substrate, and spaced inwardly from the plurality of pins; a channel extending into the second surface of the substrate to the cavity; a sealing layer at least partially filling the cavity and the channel; and A second cavity is spaced outwardly from the plurality of anchor pins.
19. The device of claim 18, further comprising a plurality of fluid pathways defined between the plurality of anchor pins, the plurality of fluid pathways fluidly coupling the first cavity to the second cavity.
20. The device of claim 18, further comprising an anchor portion spaced outwardly from the plurality of anchor pins and spaced outwardly from the second cavity.