Array substrate, preparation method thereof and flexible electronic paper display panel

Abstract

The invention discloses an array substrate and a preparation method thereof, and a flexible electronic paper display panel, and mainly relates to the technical field of display, the array substrate is used in the flexible electronic paper display panel, the array substrate comprises a plurality of pixel unit areas, each pixel unit area is divided into a thickened area and a conventional area, and the thickened area and the conventional area are arranged on the substrate. The array substrate further comprises a substrate, a first metal electrode, a first insulation protection layer and a second electrode, the first metal electrode, the first insulation protection layer and the second electrode are sequentially arranged on the substrate, and projections of the first metal electrode and the second electrode in a pixel unit area on the substrate are overlapped. The thickened area covers the boundary of the first metal electrode; the thickness of the first insulation protection layer in the thickened area is larger than the thickness of the first insulation protection layer in the conventional area, and by means of the design, the problem that gray scale declines in part of the area of the flexible electronic paper display panel is avoided.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to an array substrate, a preparation method thereof, and a flexible electronic paper display panel. Background Art

[0002] With the development of digital technologies, more and more display devices have entered people's lives, such as electronic paper (EP) display panels. Since flexible electronic paper display panels can maintain display for a long time when powered off, and have the advantages of being light, thin, low power consumption, and simple process, they are increasingly favored by people.

[0003] At present, flexible electronic paper display panels can already be rolled up and stored and folded arbitrarily by using a flexible substrate made of polyimide film. However, when in use, after repeated bending, the display gray level of some areas will decrease. Summary of the Invention

[0004] The purpose of the present application is to provide an array substrate, a preparation method thereof, and a flexible electronic paper display panel, which avoid the problem of gray level decrease in some areas of the flexible electronic paper display panel.

[0005] The present application discloses an array substrate, which is used in a flexible electronic paper display panel. The array substrate includes a plurality of pixel unit areas, and each pixel unit area is divided into a thickened area and a normal area. The array substrate further includes a substrate, a first metal electrode, a first insulating protection layer, and a second electrode. The first metal electrode, the first insulating protection layer, and the second electrode are sequentially disposed on the substrate, and the projections of the first metal electrode and the second electrode on the substrate in a pixel unit area overlap; The thickened area covers the boundary of the first metal electrode; the thickness of the first insulating protection layer in the thickened area is greater than the thickness of the first insulating protection layer in the normal area.

[0006] Optionally, the first insulating protection layer includes a first elastic layer and a first insulating layer. The first elastic layer is located between the first metal electrode and the first insulating layer, and the first elastic layer is only located in the thickened area, so that the thickness of the first insulating protection layer in the thickened area is greater than the thickness of the first insulating protection layer in the normal area.

[0007] Optionally, the first metal electrode is a common electrode, the second electrode is a pixel electrode, and the array substrate further includes a PV insulating layer. The common electrode, the first insulating protection layer, the PV insulating layer, and the pixel electrode are sequentially disposed on the substrate.

[0008] Optionally, the first metal electrode is a common electrode, the second electrode is a pixel electrode, and the array substrate further includes a GI insulating layer. The GI insulating layer, the common electrode, the first insulating protection layer, and the pixel electrode are sequentially disposed on the substrate.

[0009] Optionally, the first metal electrode is a sub-pixel electrode, the second electrode is a common electrode, and the array substrate further includes a second insulating protection layer and a pixel electrode. The sub-pixel electrode, the first insulating protection layer, the common electrode, the second insulating layer protection layer, and the pixel electrode are sequentially disposed on the substrate; The second insulating protection layer includes a second elastic layer and a second insulating layer. The second elastic layer is located between the second electrode and the second insulating layer, and the second elastic layer is only located in the thickened area.

[0010] Optionally, the thickness of the first elastic layer is 8000um - 10000um, and the thickness of the first insulating layer is 3500um - 4000um.

[0011] Optionally, the array substrate further includes an active switch. The active switch includes a gate, a semiconductor layer, a source electrode, and a drain electrode. The gate is disposed on the same layer as the first metal electrode, the source electrode and the drain electrode are disposed on the same layer as the second electrode, and the semiconductor layer is located between the first insulating protection layer and the source electrode and the drain electrode; Define the area where the active switch is located within each pixel unit area as the switch area. The switch area includes an overlapping area and a non-overlapping area. Define the area where the switch area partially overlaps with the thickened area as the overlapping area; in the overlapping area, the distance between the semiconductor layer and the gate is greater than the distance between the semiconductor layer and the gate in the non-overlapping area; The on-state current of the active switch in the overlapping area is the same as the on-state current of the active switch in the non-overlapping area.

[0012] The present application also discloses a method for manufacturing an array substrate. The array substrate includes a plurality of pixel unit areas, and each pixel unit area is divided into a thickened area and a regular area; the method for manufacturing the array substrate is used to manufacture the array substrate described above, and the steps include: Form a first metal electrode on the substrate; Form a first insulating protection layer on the first metal electrode, and the thickened area covers the boundary of the first metal electrode; the thickness of the first insulating protection layer in the thickened area is greater than the thickness of the first insulating protection layer in the regular area; Form a second electrode on the first insulating protection layer.

[0013] Optionally, forming a first insulating protection layer on the first metal electrode, and the thickened area covering the boundary of the first metal electrode; the step that the thickness of the first insulating protection layer in the thickened area is greater than the thickness of the first insulating protection layer in the normal area includes: Forming a first elastic layer on the first metal electrode; Forming a first insulating layer on the first elastic layer; Wherein, the first elastic layer is only located in the thickened area.

[0014] The present application also discloses a flexible electronic paper display panel, which includes an electrophoretic reflection layer and an array substrate, and the array substrate is used to drive the electrophoretic reflection layer to reflect light for displaying an image.

[0015] Compared with the existing array substrate solution, the present application provides a first insulating protection layer, and the thickness of the first insulating protection layer in the thickened area is greater than the thickness of the first insulating protection layer in the normal area. Simply put, it is thickened at the boundary position where the first insulating protection layer covers the first metal electrode, thereby avoiding the edge of the first metal electrode from bending and scratching the first insulating protection layer when the flexible electronic paper display panel is repeatedly bent, and avoiding the situation that the storage capacitor in the pixel unit area becomes smaller, so as to avoid the problem of gray scale reduction in some areas of the flexible electronic paper display panel. Description of the Drawings

[0016] The included drawings are used to provide a further understanding of the embodiments of the present application, which form a part of the specification, are used to illustrate the embodiments of the present application, and are used to explain the principles of the present application together with the text description. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts. In the drawings: Figure 1 is a schematic diagram of a flexible electronic paper display panel according to an embodiment of the present application; Figure 2 is a plan view of a pixel unit area according to the first embodiment of the present application; Figure 3 is a schematic diagram of a first array substrate according to the first embodiment of the present application; Figure 4 is a schematic diagram of a second array substrate according to the first embodiment of the present application; Figure 5 is a plan view of an active switch according to the first embodiment of the present application; Figure 6 is a cross-sectional view of a semiconductor layer according to the first embodiment of the present application; Figure 7 It is a schematic diagram of a double-gate active switch according to the first embodiment of the present application; Figure 8 It is a schematic diagram of an array substrate according to the second embodiment of the present application; Figure 9 It is a schematic diagram of an array substrate according to the third embodiment of the present application; Figure 10 It is a schematic diagram of an array substrate according to the fourth embodiment of the present application; Figure 11 It is a schematic flow chart of a method for manufacturing a first type of array substrate according to an embodiment of the present application; Figure 12 It is a process schematic of a method for manufacturing a first type of array substrate according to an embodiment of the present application.

[0017] Wherein, 10, flexible electronic paper display panel; 20, electrophoretic reflection layer; 21, microcapsules; 22, common electrode layer; 30, array substrate; 40, pixel unit area; 41, thickened area; 42, conventional area; 43, switch area; 44, overlapping area; 45, non-overlapping area; 100, substrate; 110, first metal layer; 120, GI insulating layer; 130, second metal layer; 140, PV insulating layer; 150, pixel electrode layer; 210, first metal electrode; 220, second electrode; 310, first insulating protective layer; 311, first elastic layer; 312, first insulating layer; 320, second insulating protective layer; 321, second elastic layer; 322, second insulating layer; 410, common electrode; 420, pixel electrode; 430, auxiliary pixel electrode; 510, active switch; 520, gate; 521, first sub-gate; 522, second sub-gate; 530, semiconductor layer; 531, first sub-semiconductor layer; 532, second sub-semiconductor layer; 540, source electrode; 550, connection electrode; 560, drain electrode; 610, data line; 620, scanning line. Detailed implementation manners

[0018] It should be understood that the terms, specific structures and functional details disclosed herein are only for the purpose of describing specific embodiments, which are representative, but the present application can be specifically implemented in many alternative forms and should not be construed as being limited only to the embodiments set forth herein.

[0019] In the description of the present application, the terms "first" and "second" are used only for descriptive purposes and cannot be construed as indicating relative importance or implicitly indicating the quantity of the indicated technical features. Thus, unless otherwise stated, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features; the meaning of "a plurality" is two or more. The term "comprising" and any variations thereof mean inclusive inclusion, and there may be or be added one or more other features, integers, steps, operations, units, components, and / or combinations thereof.

[0020] In addition, terms indicating orientation or positional relationships such as "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are described based on the orientation or relative positional relationship shown in the drawings, and are only for the convenience of describing the present application in a simplified manner, rather than indicating that the indicated device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus cannot be construed as a limitation on the present application.

[0021] Furthermore, unless otherwise clearly specified and defined, the terms "mounted", "connected", and "coupled" shall be construed broadly. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, or the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0022] The present application will be described in detail below with reference to the drawings and optional embodiments.

[0023] Figure 1 is a schematic diagram of a flexible electronic paper display panel according to an embodiment of the present application. As Figure 1 shown, the present application discloses a flexible electronic paper display panel 10, and the flexible electronic paper display panel 10 includes an electrophoretic reflection layer 20 and an array substrate 30, and the array substrate 30 is used to drive the electrophoretic reflection layer 20 to reflect light for displaying an image.

[0024] Among them, for different types of flexible electronic paper display panels 10, the electrophoretic reflection layer 20 may be different. Exemplarily, it may be a microcapsule 21 type electrophoretic reflection layer 20 or a microcup type electrophoretic reflection layer 20, and the electrophoretic reflection layer 20 can use electrophoretic particles and electrophoretic ink to reflect and absorb external light.

[0025] Exemplarily, the present application takes the electrophoretic reflection layer 20 as the microcapsule 21 type as an example for explanation, and the microcapsule 21 may include black particles, white particles, red particles, green particles, blue particles, etc. according to requirements.

[0026] The flexible electronic paper display panel 10 further includes a common electrode layer 22. An electric field is formed between the common electrode layer 22 and the pixel electrode layer 150 to drive the electrophoretic reflection layer 20 to absorb or reflect external light, thereby realizing the display of the picture.

[0027] This application also discloses an array substrate 30, which can be used in the flexible electronic paper display panel 10 described above. For the array substrate 30, the following design is provided in this application and is specifically introduced through several embodiments: The first embodiment: Figure 2 is a plan view of a pixel unit area of the first embodiment of this application. Figure 3 is a schematic diagram of the first array substrate of the first embodiment of this application. As Figure 2 - Figure 3 shown, this application also discloses an array substrate 30, which is used in the flexible electronic paper display panel 10. The array substrate 30 includes a plurality of pixel unit areas 40. Each pixel unit area 40 is divided into a thickened area 41 and a normal area 42. The array substrate 30 further includes a substrate 100, a first metal electrode 210, a first insulating protection layer 310, and a second electrode 220. The first metal electrode 210, the first insulating protection layer 310, and the second electrode 220 are sequentially disposed on the substrate 100, and the projections of the first metal electrode 210 and the second electrode 220 on the substrate 100 overlap within one pixel unit area 40.

[0028] The thickened area 41 covers the boundary of the first metal electrode 210; the thickness of the first insulating protection layer 310 in the thickened area 41 is greater than the thickness of the first insulating protection layer 310 in the normal area 42. In other words, the position of the first insulating protection layer 310 in the thickened area 41 is thickened.

[0029] Among them, the material of the first metal electrode 210 is a metal material, exemplarily copper material, and the second electrode 220 can be a metal material or a metal oxide material.

[0030] A storage capacitor is formed between the first metal electrode 210 and the second electrode 220. Exemplarily, since the charging speed of the pixel electrode 420 of the array substrate 30 is much faster than the moving speed of the particles in the microcapsule 21, the first metal electrode 210 needs to be set relatively large in each pixel unit area 40, so that the storage capacitor formed between the first metal electrode 210 and the second electrode 220 is also relatively large. The existing first metal electrode is in a strip shape, while the first metal electrode 210 in the present application is in a block shape.

[0031] It can be understood that there is an insulating layer between the first metal electrode 210 and the second electrode 220 of the existing array substrate 30. When the flexible electronic paper display panel 10 is bent repeatedly, each film layer will shift left and right relative to the substrate 100 around the center line. Since the area of the first metal electrode 210 is large and the first metal electrode 210 is usually disposed on the first metal layer 110 or the second metal layer 130, the offset amount of the first metal electrode 210 during bending is large, and even edge warping may occur, resulting in the problem that the insulating layer originally disposed between the first metal electrode 210 and the second electrode 220 is scratched, causing the storage capacitor between the first metal electrode 210 and the second electrode 220 to leak. Even more seriously, it may cause the problem that the first metal electrode 210 and the second electrode 220 are broken down, resulting in the inability to store a capacitor between the first metal electrode 210 and the second electrode 220, and causing the problem that the display gray level of the scratched area decreases when the flexible electronic paper display panel 10 is displayed.

[0032] Compared with the solution of the existing array substrate 30, the present application provides a first insulating protection layer 310. The thickness of the first insulating protection layer 310 in the thickened area 41 is greater than the thickness of the first insulating protection layer 310 in the normal area 42. Simply put, the boundary position where the first insulating protection layer 310 covers the first metal electrode 210 is thickened, thereby avoiding the edge of the first metal electrode 210 being bent and scratched on the first insulating protection layer 310 when the flexible electronic paper display panel 10 is bent repeatedly, and avoiding the situation that the storage capacitor in the pixel unit area 40 becomes smaller, so as to avoid the problem that the gray level of some areas of the flexible electronic paper display panel 10 decreases.

[0033] Moreover, it can also prevent water vapor from invading and avoid the problem of corrosion of the first metal electrode 210 and abnormal display.

[0034] Exemplarily, the first metal electrode 210 is a common electrode 410, the second electrode 220 is a pixel electrode 420, the array substrate 30 further includes a PV insulating layer 140, and the common electrode 410, the first insulating protection layer 310, the PV insulating layer 140, and the pixel electrode 420 are sequentially disposed on the substrate 100.

[0035] The array substrate 30 further includes a data line 610, a scan line 620, and an active switch 510. In this embodiment, the data line 610, the scan line 620, and the active switch 510 are all disposed on the substrate 100. The scan line 620 is connected to the gate 520 of the active switch 510, the data line 610 is connected to the source 540 of the active switch 510, and the pixel electrode 420 is connected to the drain 560 of the active switch 510.

[0036] It should be understood that a first metal layer 110, a first insulating protection layer 310, a second metal layer 130, a PV insulating layer 140, and a pixel electrode layer 150 are sequentially defined on the substrate 100. In this embodiment, the first metal electrode 210 is in the first metal layer 110, and the second electrode 220 is in the pixel electrode layer 150.

[0037] Among them, the active switch 510 includes a top-gate type active switch 510 and a bottom-gate type active switch 510. Exemplarily, when the active switch 510 is a top-gate type active switch 510, the gate 520 of the active switch 510 and the first metal electrode 210, i.e., the common electrode 410, are located in the first metal layer 110. The source 540 and the drain 560 of the active switch 510 are located in the second metal layer 130, and the semiconductor layer 530 of the active switch 510 is located between the first insulating protection layer 310 and the second metal layer 130.

[0038] The thickened area 41 covers the boundary of the first metal electrode 210. Exemplarily, the thickened area 41 covers the boundary of the first metal electrode 210 and extends 8 um - 10 um inward and 8 um - 10 um outward, so as to ensure that the first metal electrode 210 completely falls within the orthographic projection of the thickened area 41.

[0039] Exemplarily, the thickened area 41 can completely cover the boundary position of the entire first metal electrode 210. Of course, it can also avoid the position of the active switch 510 and only cover a part of the boundary of the first metal electrode 210.

[0040] Define the thickness of the first insulating protection layer 310 in the regular area 42 as d1, and define the thickness of the first insulating protection layer 310 in the thickened area 41 as d2. d2 is greater than d1. Moreover, in order to avoid the problem that the surface of the second metal layer 130, which is the upper surface of the first insulating protection layer 310, becomes uneven after the first insulating protection layer 310 is thickened in the thickened area 41, in this application, d2 = d1 + d3, where d3 is the thickness of the second metal layer 130. That is, in this embodiment, the thickness of the source 540 of the active switch 510 and the thickness of the drain 560 of the active switch 510 are d3.

[0041] See Figure 3 , in this application, the thickness of the first insulating protection layer 310 in the thickened area 41 can be made greater than the thickness of the first insulating protection layer 310 in the regular area 42 through a process. Specifically, when preparing the first insulating protection layer 310, the thickened area 41 and the regular area 42 can be irradiated respectively through a halftone process. The tone level of the thickened area 41 is 30% - 50%, and the tone level of the regular area 42 is 0% - 10%. In this way, the thickness of the first insulating protection layer 310 formed in the thickened area 41 will be greater than that of the first insulating protection layer 310 in the regular area 42.

[0042] Figure 4 is a schematic diagram of the second array substrate of the first embodiment of this application. As Figure 4 shown, exemplarily, in this application, the thickness of the first insulating protection layer 310 in the thickened area 41 can also be made greater than that of the first insulating protection layer 310 in the regular area 42 by adding a first elastic layer 311. The specific method is as follows: The first insulating protection layer 310 includes a first elastic layer 311 and a first insulating layer 312. The first elastic layer 311 is located between the first metal electrode 210 and the first insulating layer 312, and the first elastic layer 311 is only located in the thickened area 41, so that the thickness of the first insulating protection layer 310 in the thickened area 41 is greater than the thickness of the first insulating protection layer 310 in the regular area 42.

[0043] In other words, the first elastic layer 311 covers the boundary of the first metal electrode 210 layer. In this embodiment, the first elastic layer 311 covers the boundary of the common electrode 410. It should be understood that the film thickness of the first insulating protection layer 310 is uniform. The thickness of the first elastic layer 311 is 8000um - 10000um, and the thickness of the first insulating layer 312 is 3500um - 4000um.

[0044] The first elastic layer 311 includes a PS spacer material (Polystyrene, abbreviated as PS). Since the PS spacer material has elasticity, when the flexible electronic paper display panel 10 bends, the first metal electrode 210 shifts, squeezing the PS spacer material at the edge. The PS spacer material deforms under pressure, and then when the flexible electronic paper display panel 10 returns to flatness, the PS spacer material returns to its original shape and acts back on the first metal electrode 210. On the one hand, this can prevent the first metal electrode 210 from shifting and being unable to return to its original position under repeated bending of the flexible electronic paper display panel 10, resulting in a smaller overlapping area between the first metal electrode 210 and the second electrode 220, and a smaller storage capacitor in the pixel unit area 40. On the other hand, since the PS spacer material has elasticity, it can absorb the shift of the first metal electrode 210, thus preventing the upper first insulating protective layer 310 from being scratched.

[0045] When the active switch 510 is a bottom-gate active switch 510, and the gate 520 of the active switch 510 is on the first metal layer 110, and the source 540 and drain 560 of the active switch 510 are on the second metal layer 130. Particularly in the flexible electronic paper display panel 10, the area of the first metal electrode 210 is relatively large. Therefore, the edge position of the first insulating protective layer 310 corresponding to the first metal electrode 210 is thickened, which will cause part of the semiconductor layer 530, source 540, and drain 560 of the active switch 510 to be lifted, resulting in a greater distance between the gate 520 and the semiconductor layer 530 at the position lifted by the first insulating protective layer 310 than the distance between the gate 520 and the semiconductor layer 530 at the position not lifted by the first insulating protective layer 310, thereby reducing the charging ability of the active switch 510.

[0046] Therefore, the present application also improves the active switch 510 as follows: Figure 5 It is a schematic plan view of an active switch according to the first embodiment of the present application. Figure 6 It is a schematic cross-sectional view of a semiconductor layer according to the first embodiment of the present application. As Figure 5 - Figure 6 shown, the array substrate 30 further includes an active switch 510. The active switch 510 includes a gate 520, a semiconductor layer 530, a source 540, and a drain 560. The gate 520 is arranged on the same layer as the first metal electrode 210, the source 540 and the drain 560 are arranged on the same layer as the second electrode 220, and the semiconductor layer 530 is located between the first insulating protective layer 310 and the source 540 and the drain 560.

[0047] Define the area where the active switch 510 is located within each of the pixel unit areas 40 as the switch area 43. The switch area 43 includes an overlapping area 44 and a non-overlapping area 45. Define the area where the switch area 43 partially overlaps with the thickened area 41 as the overlapping area 44. In the overlapping area 44, the distance between the semiconductor layer 530 and the gate 520 is greater than the distance between the semiconductor layer 530 and the gate 520 in the non-overlapping area 45.

[0048] The on-state current of the active switch 510 in the overlapping area 44 is the same as the on-state current of the active switch 510 in the non-overlapping area 45.

[0049] The on-state current refers to the conduction current between the source 540 and the drain 560 when the gate 520 is given the same gate voltage. Simply put, the thickened area 41 of the first insulating protective layer 310 extends to the overlapping area 44 of the active switch 510, causing the semiconductor layer 530 in the overlapping area 44 of the active switch 510 to be elevated. That is, the distance between the semiconductor layer 530 and the gate 520 in the overlapping area 44 is greater than the distance between the semiconductor layer 530 and the gate 520 in the non-overlapping area 45.

[0050] As the distance between the gate 520 and the semiconductor layer 530 of the active switch 510 is much greater, the gate voltage required to turn on the active switch 510 is larger. Therefore, in this application, the on-state current of the active switch 510 in the overlapping area 44 is made the same as the on-state current of the active switch 510 in the non-overlapping area 45. In this way, it is not necessary to reduce the area of the first metal electrode 210, so the storage capacitance within a single pixel unit area 40 will not be reduced. Moreover, it is not necessary to increase the voltage of the scan line 620, and the load of the flexible electronic paper display panel 10 will not increase.

[0051] Exemplarily, the channel length of the semiconductor layer 530 of the active switch 510 in the overlapping area 44 is less than the channel length of the semiconductor layer 530 of the active switch 510 in the non-overlapping area 45. For example, the channel length of the semiconductor layer 530 of the active switch 510 in the overlapping area 44 is 4.5 μm, and the channel length of the semiconductor layer 530 of the active switch 510 in the non-overlapping area 45 is 6 μm. This compensates for the problem that the charging ability of the active switch 510 is reduced due to the overlapping area 44 elevated by the thickened area 41 of the first insulating protective layer 310, making the on-state current of the active switch 510 in the overlapping area 44 the same as the on-state current of the active switch 510 in the non-overlapping area 45, and no additional manufacturing process is required.

[0052] Exemplarily, the molar ratio of Ca2+ doping in the semiconductor layer 530 of the active switch 510 in the overlapping region 44 is greater than the molar ratio of Ca2+ doping in the semiconductor layer 530 of the active switch 510 in the non-overlapping region 45. By doping Ca2+ in the semiconductor layer 530 of the active switch 510 in the overlapping region 44, the driving ability of the TFT active switch 510 in this region is improved. Exemplarily, 3% molar ratio of Ca2+ is doped in the semiconductor layer 530 of the active switch 510 in the overlapping region 44, and 0.5% molar ratio of Ca2+ is doped in the semiconductor layer 530 of the active switch 510 in the non-overlapping region 45, so that the driving abilities of the overlapping region 44 and the non-overlapping region 45 of the active switch 510 are comparable, and the on-state current of the active switch 510 in the overlapping region 44 is the same as the on-state current of the active switch 510 in the non-overlapping region 45.

[0053] Exemplarily, the semiconductor layer 530 includes a channel layer and an ohmic doping layer, and the film thickness of the channel layer of the active switch 510 in the overlapping region 44 is greater than the film thickness of the channel layer of the active switch 510 in the non-overlapping region 45. For example, the original film thickness is defined as 1800 Å - 2100 Å, and the driving ability of the active switch 510 is the strongest when it is 35% - 40% of the original film thickness. The film thickness of the channel layer of the active switch 510 in the overlapping region 44 is 630 Å - 840 Å, and the film thickness of the channel layer of the active switch 510 in the non-overlapping region 45 is 540 Å - 630 Å. Thus, the on-state current of the active switch 510 in the overlapping region 44 can be made the same as the on-state current of the active switch 510 in the non-overlapping region 45.

[0054] Figure 7 It is a schematic diagram of a double-gate active switch according to the first embodiment of the present application, as Figure 7 shown, the array substrate 30 further includes an active switch 510, the active switch 510 includes a gate 520, a semiconductor layer 530, a source 540, a connection electrode 550 and a drain 560. The gate 520 includes a first sub-gate 521 and a second sub-gate 522. The semiconductor layer 530 includes a first sub-semiconductor layer 531 and a second sub-semiconductor layer 532. The first sub-gate 521 and the second sub-gate 522 are arranged on the same layer as the first metal electrode 210. The source 540, the connection electrode 550 and the drain 560 are arranged on the same layer as the second electrode 220. And the first sub-semiconductor layer 531 is located between the first insulating protective layer 310 and the source 540 and the connection electrode 550. The second sub-semiconductor layer 532 is located between the first insulating protective layer 310 and the connection electrode 550 and the drain 560.

[0055] Define the area where the active switch 510 is located within each pixel unit area 40 as the switch area 43. The switch area 43 includes an overlapping area 44 and a non-overlapping area 45. Define the area where the switch area 43 partially overlaps with the thickened area 41 as the overlapping area 44; in the overlapping area 44, the distance between the semiconductor layer 530 and the gate 520 is greater than the distance between the semiconductor layer 530 and the gate 520 in the non-overlapping area 45.

[0056] The on-state current of the active switch 510 in the overlapping area 44 is the same as the on-state current of the active switch 510 in the non-overlapping area 45.

[0057] Simply put, for the solution of the flexible electronic paper display panel 10 with a double-gate 520 structure, the occupied area of the active switch 510 is larger. Therefore, without reducing the area of the first metal electrode 210, the overlapping area 44 of the flexible electronic paper display panel 10 with a double-gate 520 structure will also be larger, and correspondingly, the impact on the charging ability of the active switch 510 will be greater.

[0058] Therefore, by making the electron mobility of the semiconductor layer 530 of the active switch 510 in the overlapping area 44 greater than the electron mobility of the semiconductor layer 530 of the active switch 510 in the non-overlapping area 45, not only does it not require reducing the area of the first metal electrode 210, thus not causing the storage capacitance within a single pixel unit area 40 to become smaller; but also it does not require increasing the voltage of the scan line 620, and does not cause an increase in the load of the flexible electronic paper display panel 10.

[0059] Embodiment 2: Figure 8 It is a schematic diagram of an array substrate according to the second embodiment of the present application. As Figure 8 shown, different from the first embodiment, this embodiment includes an auxiliary pixel electrode 430. Specifically, the array substrate 30 further includes an auxiliary pixel electrode 430. The auxiliary pixel electrode 430 is disposed between the first insulating protective layer 310 and the PV insulating layer 140, that is, the auxiliary pixel electrode 430 is located within the second metal layer 130, and the auxiliary pixel electrode 430 is connected to the second electrode 420.

[0060] It is possible that the auxiliary pixel electrode 430 is directly connected to the second electrode 420 through a via. Of course, it is also possible that the auxiliary pixel electrode 430 is connected to the drain 560 of the active switch 510. Since the second electrode 420 is also connected to the drain 560 of the active switch 510, that is, the auxiliary pixel electrode 430 is connected to the second electrode 420 through the drain 560 of the active switch 510.

[0061] Compared with the solution of the first embodiment, in this embodiment, by adding an auxiliary pixel electrode 430 in the second metal layer 130, the storage capacitance between the sub-pixel electrode 420 and the first metal electrode 210 is larger, and the size of the storage capacitance in the pixel unit area 40 is increased.

[0062] Embodiment 3: Figure 9 It is a schematic diagram of an array substrate according to the third embodiment of the present application. As Figure 9 shown, different from the first embodiment, the first metal electrode 210 is located in the second metal layer 130. Specifically, the first metal electrode 210 is a common electrode 410, the second electrode 220 is a pixel electrode 420, and the array substrate 30 further includes a GI insulating layer 120. The GI insulating layer 120, the common electrode 410, the first insulating protection layer 310, and the pixel electrode 420 are sequentially disposed on the substrate 100.

[0063] Compared with the solution of the first embodiment, in this embodiment, by disposing the first metal electrode 210 in the second metal layer 130, the distance between the first metal electrode 210 and the second electrode 220 is reduced, thereby increasing the size of the storage capacitance in the pixel unit area 40.

[0064] Moreover, at this time, the first insulating protection layer 310 is located above the first metal electrode 210, and correspondingly, also above the semiconductor layer 530, the source electrode 540, and the drain electrode 560 of the active switch 510. Thus, it will not raise the semiconductor layer 530, the source electrode 540, and the drain electrode 560 of the active switch 510, nor is it necessary to reduce the area of the first metal electrode 210, which will not cause the storage capacitance to become smaller, and it is not necessary to improve the active switch 510, saving the manufacturing process and reducing the manufacturing difficulty.

[0065] Embodiment 4: Figure 10 It is a schematic diagram of an array substrate according to the fourth embodiment of the present application. As Figure 10 shown, different from the first embodiment, the first metal electrode 210 is an auxiliary pixel electrode 430, the second electrode 220 is a common electrode 410, and the array substrate 30 further includes a second insulating protection layer 320 and a pixel electrode 420. The auxiliary pixel electrode 430, the first insulating protection layer 310, the common electrode 410, the second insulating layer 322 protection layer, and the pixel electrode 420 are sequentially disposed on the substrate 100.

[0066] The second insulating protection layer 320 includes a second elastic layer 321 and a second insulating layer 322. The second elastic layer 321 is located between the second electrode 220 and the second insulating layer 322, and the second elastic layer 321 is only located in the thickened area 41, that is, the boundary of the second elastic layer 321 covers the second electrode 220. In this embodiment, the boundary of the second elastic layer 321 covers the common electrode 410.

[0067] Compared with the solution of the third embodiment, a storage capacitor is formed between the first metal electrode 210 and the second electrode 220 in this embodiment, and a capacitor is formed between the second electrode 220 and the pixel electrode 420, thereby increasing the size of the storage capacitor in a pixel unit area 40.

[0068] The boundary of the first metal electrode 210 layer is covered by the second elastic layer 321. In this embodiment, the boundary of the second elastic layer 321 covers the boundary of the auxiliary pixel electrode 430. It should be understood that the film thickness of the second insulating protection layer 320 is uniform. The thickness of the second elastic layer 321 is 8000um - 10000um, and the thickness of the second insulating layer 322 is 3500um - 4000um.

[0069] The second elastic layer 321 includes PS spacer material (Polystyrene, abbreviated as PS). Since the PS spacer material has elasticity, when the flexible electronic paper display panel 10 is bent, the second electrode 220 is displaced, squeezing the PS spacer material at the edge. The PS spacer material is deformed under pressure, and then when the flexible electronic paper display panel 10 returns to flat, the PS spacer material returns to its original shape and acts back on the second electrode 220. On the one hand, it can prevent the second electrode 220 from being displaced and unable to reset under repeated bending of the flexible electronic paper display panel 10, resulting in a smaller overlapping area between the first metal electrode 210 and the second electrode 220, and a smaller storage capacitor in the pixel unit area 40. On the other hand, since the PS spacer material has elasticity, it can absorb the displacement of the second electrode 220, thereby preventing the upper second insulating protection layer 320 from being scratched.

[0070] Figure 11 It is a schematic flowchart of the preparation method of the first array substrate according to an embodiment of the present application. Figure 12 It is a process schematic of the preparation method of the first array substrate according to an embodiment of the present application. As Figure 11 - Figure 12 shown, the present application discloses a preparation method of an array substrate 30. The array substrate 30 includes a plurality of pixel unit areas 40, and each pixel unit area 40 is divided into a thickened area 41 and a normal area 42. The preparation method of the array substrate 30 is used to prepare the array substrate 30 described above, and the steps include: S1: Form a first metal electrode on a substrate; S2: Form a first insulating protective layer on the first metal electrode, and the thickened area covers the boundary of the first metal electrode; the thickness of the first insulating protective layer in the thickened area is greater than the thickness of the first insulating protective layer in the normal area; S3: Form a second electrode on the first insulating protective layer.

[0071] Compared with the existing solution of the array substrate 30, in this application, a first insulating protective layer 310 is provided, and the thickness of the first insulating protective layer 310 in the thickened area 41 is greater than the thickness of the first insulating protective layer 310 in the normal area 42. Simply put, it is thickened at the boundary position where the first insulating protective layer 310 covers the first metal electrode 210, thereby avoiding the edge of the first metal electrode 210 being bent and scratched on the first insulating protective layer 310 when the flexible electronic paper display panel 10 is repeatedly bent, and avoiding the situation that the storage capacitance in the pixel unit area 40 becomes smaller, so as to avoid the problem of gray level reduction in some areas of the flexible electronic paper display panel 10.

[0072] Moreover, it can also avoid the intrusion of water vapor and prevent the first metal electrode 210 from being corroded, resulting in abnormal display problems.

[0073] S2: The step of forming a first insulating protective layer on the first metal electrode, and the thickened area covers the boundary of the first metal electrode; the thickness of the first insulating protective layer in the thickened area is greater than the thickness of the first insulating protective layer in the normal area includes: S211: Form a first insulating protective layer with a first thickness on the first metal layer; S212: Irradiate the thickened area and the normal area respectively through a halftone process, the tone level of the thickened area is 0%-10%, and the tone level of the normal area is 40%-60%; S213: Etch to form a first insulating protective layer with a thickness in the thickened area greater than that in the normal area.

[0074] By means of the halftone process, the thickened area 41 of the first insulating protective layer 310 is thickened, and there is no need to set two layers to increase additional processes.

[0075] Of course, the thickness of the first insulating protective layer 310 in the thickened area 41 can also be thickened by adding a first elastic layer 311. Specifically as follows: S2: The step of forming a first insulating protective layer on the first metal electrode, and the thickened area covers the boundary of the first metal electrode; the thickness of the first insulating protective layer in the thickened area is greater than the thickness of the first insulating protective layer in the normal area includes: S221: Form a first elastic layer on the first metal electrode; S222: Form a first insulating layer on the first elastic layer; Wherein, the first elastic layer 311 is only located in the thickened area 41.

[0076] The first elastic layer 311 includes PS spacer material (Polystyrene). Since the PS spacer material has elasticity, when the flexible electronic paper display panel 10 is bent, the first metal electrode 210 is displaced, squeezing the PS spacer material at the edge. The PS spacer material is deformed under pressure. Then when the flexible electronic paper display panel 10 returns to flat, the PS spacer material recovers from deformation and acts back on the first metal electrode 210. On the one hand, it can prevent the first metal electrode 210 from being displaced and unable to reset under repeated bending of the flexible electronic paper display panel 10, resulting in a smaller overlapping area between the first metal electrode 210 and the second electrode 220, and a smaller storage capacitor in the pixel unit area 40. On the other hand, since the PS spacer material has elasticity, it can absorb the displacement of the first metal electrode 210, thus preventing the upper first insulating protective layer 310 from being scratched.

[0077] It should be noted that the limitations of each step involved in this solution, without affecting the implementation of the specific solution, are not considered as limiting the order of the steps. The steps written in the front can be executed first, or later, or even simultaneously. As long as this solution can be implemented, it should be regarded as falling within the protection scope of this application.

[0078] It should be noted that the inventive concept of this application can form a very large number of embodiments. However, due to the limited space of the application documents, it is impossible to list them all. Therefore, on the premise of non - conflict, the above - described embodiments or technical features can be arbitrarily combined to form new embodiments. After the combination of each embodiment or technical feature, the original technical effect will be enhanced.

[0079] The above content is a further detailed description of this application in combination with specific optional implementation manners. It cannot be determined that the specific implementation of this application is only limited to these descriptions. For those of ordinary skill in the technical field to which this application belongs, without departing from the concept of this application, several simple deductions or substitutions can still be made, and all should be regarded as falling within the protection scope of this application.

Claims

1. An array substrate, characterized in that: The array substrate is used in a flexible electronic paper display panel, the array substrate comprises a plurality of pixel unit regions, each of the pixel unit regions is divided into a thickened region and a regular region, the array substrate further comprises a substrate, a first metal electrode, a first insulating protective layer, and a second electrode, the first metal electrode, the first insulating protective layer, and the second electrode are sequentially arranged on the substrate, and the projections of the first metal electrode and the second electrode in one of the pixel unit regions on the substrate overlap; The thickened area covers the boundary of the first metal electrode; the thickness of the first insulating protective layer in the thickened area is greater than the thickness of the first insulating protective layer in the conventional area.

2. The array substrate according to claim 1, characterized in that: The first insulating protective layer includes a first elastic layer and a first insulating layer, the first elastic layer is located between the first metal electrode and the first insulating layer, and the first elastic layer is only located in the thickened area, so that the thickness of the first insulating protective layer in the thickened area is greater than the thickness of the first insulating protective layer in the conventional area.

3. The array substrate according to any one of claims 1 and 2, characterized in that: The first metal electrode is a common electrode, the second electrode is a pixel electrode, the array substrate further comprises a PV insulating layer, and the common electrode, the first insulating protection layer, the PV insulating layer and the pixel electrode are sequentially arranged on the substrate.

4. The array substrate according to any one of claims 1 and 2, characterized in that: The first metal electrode is a common electrode, the second electrode is a pixel electrode, the array substrate further comprises a GI insulating layer, and the GI insulating layer, the common electrode, the first insulating protection layer and the pixel electrode are sequentially arranged on the substrate.

5. The array substrate according to any one of claims 1 and 2, characterized in that: The first metal electrode is a sub-pixel electrode, the second electrode is a common electrode, the array substrate further comprises a second insulating protective layer and a pixel electrode, and the sub-pixel electrode, the first insulating protective layer, the common electrode, the second insulating protective layer and the pixel electrode are sequentially arranged on the substrate; The second insulating protection layer includes a second elastic layer and a second insulating layer, the second elastic layer is located between the second electrode and the second insulating layer, and the second elastic layer is only located in the thickened area.

6. The array substrate according to claim 2, characterized in that: The thickness of the first elastic layer is 8000um-10000um, and the thickness of the first insulating layer is 3500um-4000um.

7. The array substrate according to claim 2, characterized in that: The array substrate further includes an active switch, the active switch including a gate, a semiconductor layer, a source electrode and a drain electrode, the gate electrode and the first metal electrode are arranged in the same layer, the source electrode and the drain electrode are arranged in the same layer as the second electrode, and the semiconductor layer is located between the first insulating protection layer and the source electrode and the drain electrode; The area where the active switch is located in each pixel unit area is defined as a switch area, the switch area includes an overlapping area and a non-overlapping area, and the area where the switch area partially overlaps with the thickened area is defined as the overlapping area; in the overlapping area, the distance between the semiconductor layer and the gate is greater than the distance between the semiconductor layer and the gate in the non-overlapping area; The on-state current of the active switch in the overlapping region is the same as the on-state current of the active switch in the non-overlapping region.

8. A method for preparing an array substrate, characterized in that: The array substrate comprises a plurality of pixel unit regions, each of which is divided into a thickened region and a regular region; the method for preparing the array substrate is used to prepare the array substrate, and the steps include: forming a first metal electrode on a substrate; forming a first insulating protective layer on the first metal electrode, wherein the thickened region covers the boundary of the first metal electrode; the thickness of the first insulating protective layer in the thickened region is greater than the thickness of the first insulating protective layer in the regular region; A second electrode is formed on the first insulating protective layer.

9. The method for preparing an array substrate according to claim 8, characterized in that: The step of forming a first insulating protective layer on the first metal electrode, wherein the thickened region covers the boundary of the first metal electrode; and the thickness of the first insulating protective layer in the thickened region is greater than the thickness of the first insulating protective layer in the conventional region comprises: forming a first elastic layer on the first metal electrode; forming a first insulating layer on the first elastic layer; Wherein, the first elastic layer is only located in the thickened area.

10. A flexible electronic paper display panel, characterized in that: The flexible electronic paper display panel comprises an electrophoretic reflective layer and an array substrate as claimed in any one of claims 1 to 7, wherein the array substrate is used to drive the electrophoretic reflective layer to reflect light to display a picture.

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