Method for evaluating anti-magnetic interference capability of VNPN transistor
By establishing a method for evaluating the anti-magnetic interference capability of VNPN transistors, the problem of the inability to evaluate the performance changes of BJTs in strong magnetic field environments in existing technologies is solved, thereby achieving accurate evaluation of BJT performance and improving the reliability of circuit design.
Patent Information
- Application Number
- CN202510195009.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-21
- Publication Date
- 2025-12-12
- Estimated Expiration
- 2045-02-21
AI Technical Summary
Existing technologies cannot accurately assess the performance changes of bipolar junction transistors (BJTs) in strong magnetic field environments, leading to circuit stability and reliability issues. In particular, under high-intensity magnetic field conditions, traditional models cannot predict the specific impact of the magnetic field on BJTs.
A method for evaluating the anti-magnetic interference capability of VNPN transistors was established. By obtaining vertical NPN transistor models with different amplification factors, applying static magnetic fields with preset intensity range and step size, fitting the functional relationship between collector current and magnetic field, calculating the influence of transconductance and amplification factor, and evaluating the anti-magnetic interference capability.
It provides accurate evaluation of BJT performance in strong magnetic field environments, improves the reliability and stability of circuit design, provides a reliable analysis tool for analog circuit design, and enhances the circuit's resistance to magnetic interference in complex environments.
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Figure CN120163110B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of evaluating the anti-magnetic interference capability of a VNPN transistor, and particularly relates to a method, device, medium and equipment for evaluating the anti-magnetic interference capability of a VNPN transistor. BACKGROUND
[0002] With the rapid development of integrated circuit technology, the feature size of chips is continuously reduced, the integration level is significantly improved, and the performance and adaptability requirements of devices are increasing. In addition to pursuing higher computing power, electronic devices also need to adapt to various complex and harsh working environments, such as space radiation, electromagnetic interference, high temperature and humidity, and other special conditions. In these harsh environments, strong magnetic field interference, especially pulsed strong magnetic field, has become a key challenge, which seriously affects the reliability and stability of the device.
[0003] In modern electronic devices, the influence of strong magnetic field environment on semiconductor devices has increasingly become an important research topic. With the increase of magnetic field strength, especially the high-strength magnets used in biomedical and clinical research, the magnetic induction strength gradually increases from 7T and 14.1T to 21.1T. In the military field, the control system of electromagnetic gun, as a modern important weapon, will also be affected by strong magnetic field.
[0004] In these strong magnetic field environments, the performance of the control system of traditional semiconductor devices may be significantly affected. The influence of magnetic field on semiconductor devices is mainly manifested through two effects: Hall effect and magnetoresistance effect. When a magnetic field acts on a conductor, the charge carriers are subjected to the Lorentz force of the magnetic field and are deviated. This deviation phenomenon itself will cause the motion component in the conduction direction to decrease, thereby indirectly causing the decrease of electrical conductivity, i.e. magnetoresistance effect. The accumulated deviated carriers will also produce Hall voltage. Especially for devices with PN junction structure, the influence of magnetic field on device performance is more significant. The magnetic field changes the motion direction of the carriers, and the voltage generated by the accumulated carriers will change the electric field distribution of the PN junction, thereby affecting the shape of the space charge region, causing the device with PN junction structure to be more affected. As a BJT device with PN junction as the main structure, the degree of influence of the magnetic field interference is particularly significant, and the traditional BJT device may have problems such as current failure and gain attenuation, thereby affecting the electrical characteristics and stability of the device. SUMMARY
[0005] The main purpose of the present application is to provide a method, device, medium and equipment for evaluating the anti-magnetic interference capability of a VNPN transistor, which aims to solve the technical problem of evaluating the anti-magnetic interference capability of a VNPN transistor.
[0006] To achieve the above object, the application provides a method for evaluating the anti-magnetic interference capability of a vertical NPN transistor, comprising: obtaining vertical NPN transistor models with different amplification factors, wherein the substrate, collector, buried layer and deep well of each vertical NPN transistor model are doped by materials with different concentrations; applying a static magnetic field with a preset intensity range and step length to each vertical NPN transistor model to obtain a collector current reduction degree expression of each vertical NPN transistor model under different magnetic field environments; obtaining an output characteristic curve of the collector current of each vertical NPN transistor model under different magnetic field environments based on the collector current reduction degree expression; fitting a function relationship between the collector current and the static magnetic field based on the output characteristic curve, calculating corresponding fitting parameters; calculating the influence of the change of the collector current with the magnetic field on the transconductance and the amplification factor by using the fitted function expression, and evaluating the anti-magnetic interference capability of each vertical NPN transistor model based on the transconductance and the amplification factor.
[0007] Optionally, the substrate, collector, buried layer and deep well of each vertical NPN transistor model are doped by materials with different concentrations, comprising:
[0008] Each vertical NPN transistor model performs the following operations:
[0009] Each vertical NPN transistor model performs the following operations:
[0010] The substrate is doped with boron with a concentration of 1e16;
[0011] The emitter is Gaussian doped with arsenic with a peak concentration of 1e20;
[0012] The base is Gaussian doped with boron with a concentration of 3e18;
[0013] The collector is arsenic with a concentration of 5e16, and the buried layer and deep well are arsenic doped with a concentration of 5e19.
[0014] Optionally, the static magnetic field with a preset intensity range and step length is applied to each vertical NPN transistor model to obtain a collector current reduction degree expression of each vertical NPN transistor model under different magnetic field environments, comprising:
[0015] The static magnetic field with opposite directions and step settings is applied to each vertical NPN transistor model, and the value of the base current is set to a preset value, and the output characteristic curve of the collector current with the change of the static magnetic field is obtained correspondingly;
[0016] The reduction degree expression is:
[0017] MI(%)=(Ic(0) / Ic(B)-1)×100%
[0018] wherein Ic(0) is the value of Ic when there is no magnetic field, Ic(B) is the value of Ic when Ic(B) is 10uA, and Ic(B) is the value of Ic when Ic(B) is equal to 10uA when a magnetic field is added.
[0019] Optionally, the fitting of the magnetic field influence factor of the static magnetic field on the collector current of each of the vertical NPN transistor models based on the output characteristic curve comprises:
[0020] The output characteristic curve is processed by using a fitting algorithm to obtain the function expression and the corresponding fitting parameters, and the expression of the fitting function is:
[0021] I c =aB 2 +bB+c
[0022] wherein the coefficients a, b, and c are fitting parameters, B is the magnetic field strength, and I c is the collector current.
[0023] In addition, to achieve the above object, the application further provides a VNPN transistor anti-magnetic interference capability evaluation device, comprising: an acquisition module configured to acquire vertical NPN transistor models with different amplification factors, wherein the substrate, collector, buried layer, and deep well of each of the vertical NPN transistor models are obtained by doping materials with different concentrations; a modeling module configured to apply a static magnetic field with a preset intensity range and a step length to each of the vertical NPN transistor models to obtain a collector current reduction degree expression of each of the vertical NPN transistor models under different magnetic field environments; a first data acquisition module configured to acquire an output characteristic curve of the collector current reduction degree value of each of the vertical NPN transistor models under different magnetic field environments and the static magnetic field based on the collector current reduction degree expression; a second data acquisition module configured to fit the magnetic field influence factor of the static magnetic field on the collector current of each of the vertical NPN transistor models based on the output characteristic curve; and an evaluation module configured to calculate the transconductance and amplification factor of each of the vertical NPN transistor models under the static magnetic field based on the magnetic field influence factor, and evaluate the anti-magnetic interference capability of each of the vertical NPN transistor models based on the transconductance and the amplification factor.
[0024] To achieve the above object, the application further provides a computer readable storage medium comprising instructions which, when executed on a computer, cause the computer to perform the VNPN transistor anti-magnetic interference capability evaluation method provided by the above embodiments.
[0025] To achieve the above object, the application further provides an electronic device, comprising at least one processor, a memory and an input-output unit; wherein the memory is used to store a computer program, and the processor is used to call the computer program stored in the memory to execute the anti-magnetic interference capability evaluation method of the VNPN transistor provided by any of the preceding embodiments.
[0026] The anti-magnetic interference capability evaluation method, device, medium and equipment of the VNPN transistor provided by the embodiments of the application are as follows: different amplification multiples of vertical NPN transistor models are obtained, wherein the substrate, collector, buried layer and deep well of each vertical NPN transistor model are obtained by doping materials with different concentrations; a static magnetic field with a preset intensity range and a step length is applied to each vertical NPN transistor model to obtain a collector current reduction degree expression of each vertical NPN transistor model under different magnetic field environments; the output characteristic curve of the collector current of each vertical NPN transistor model with the change of the magnetic field under different magnetic field environments is obtained based on the collector current reduction degree expression; the function relationship between the collector current and the static magnetic field is fitted based on the output characteristic curve, and the corresponding fitting parameters are calculated; the influence of the change of the collector current with the magnetic field on the transconductance and the amplification multiple is calculated by using the fitted function expression, the anti-magnetic interference capability of each vertical NPN transistor model is evaluated based on the transconductance and the amplification multiple, the influence of the external static magnetic field on the performance of the VNPN transistor is accurately evaluated, and reliable technical support is provided for the anti-magnetic interference design. BRIEF DESCRIPTION OF DRAWINGS
[0027] Figure 1 The flowchart of the anti-magnetic interference capability evaluation method of the VNPN transistor provided by an embodiment of the application is as follows:
[0028] Figure 2 The doping distribution diagram of the VNPN transistor provided by an embodiment of the application is as follows:
[0029] Figure 3 The simulation result comparison of the VNPN transistor with different base widths provided by an embodiment of the application is as follows:
[0030] Figure 4 The current-voltage characteristic curve of the VNPN transistor under different magnetic field intensities provided by an embodiment of the application is as follows:
[0031] Figure 5 The influence of the magnetic field in different directions on the base current provided by an embodiment of the application is as follows:
[0032] Figure 6 The simulation test result comparison of the VNPN transistor with different base widths provided by an embodiment of the application is as follows:
[0033] Figure 7 -Figure 16 A fitting effect diagram of a quadratic function when BWidth is 0.08um, 0.09um, 0.10um, 0.11um, 0.12um, 0.13um, 0.14um, 0.15um, 0.16um and 0.17um respectively provided by an embodiment of the present application;
[0034] Figure 17 A simulation diagram of parameter a changing with base width provided by an embodiment of the present application;
[0035] Figure 18 A simulation diagram of parameter b changing with base width provided by an embodiment of the present application;
[0036] Figure 19 A simulation diagram of parameter c changing with base width provided by an embodiment of the present application.
[0037] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION
[0038] It should be understood that the specific embodiments described herein are merely intended to explain the present application and are not intended to limit the present application.
[0039] Although the prior art has established mathematical models of various parameters of bipolar transistors, these models mainly describe the characteristics of BJTs under normal working conditions, and have not been systematically modeled for strong magnetic field environments. The existing models do not fully consider the specific effects of strong magnetic fields on the performance of BJTs, especially under strong magnetic field conditions, the transconductance, amplification and other electrical characteristics of BJTs will change significantly, which will seriously affect the stability and reliability of the circuit. For analog circuit design with BJTs as the main component, the change of the transconductance and amplification of the BJT, especially in a strong magnetic field environment, often leads to a sharp decline in circuit performance, and even the entire circuit may lose its intended function.
[0040] Since the applicable range of the existing models is mainly limited to normal working conditions, their prediction ability in a strong magnetic field environment is very limited, and they cannot accurately assess the behavior of BJTs under high magnetic fields. Therefore, the prior art cannot provide designers with accurate assessments of BJTs in a strong magnetic environment, especially cannot accurately predict the specific effects of magnetic fields on the performance of BJTs.
[0041] In view of these defects, the application provides a semi-empirical mathematical model for performance changes of a VNPN transistor in a strong magnetic field environment.
[0042] The anti-magnetic interference capability evaluation method for the VNPN transistor provided by the first embodiment can include the following steps:
[0043] S10, a vertical NPN transistor model with different amplification factors is obtained, wherein the substrate, collector, buried layer and deep well of each vertical NPN transistor model are doped by materials with different concentrations;
[0044] The application takes a standard bipolar transistor (BJT) as a research object, and establishes a two-dimensional model of 10 BJTs with different sizes with a base width of 0.08 μm to 0.17 μm. Figure 1 As shown in the figure, the main structural parameters of the device are as follows:
[0045] Each vertical NPN transistor model is operated as follows:
[0046] The substrate is doped with boron at a concentration of 1e16;
[0047] The emitter is Gaussian doped with arsenic at a peak concentration of 1e20;
[0048] The base is Gaussian doped with boron at a concentration of 3e18;
[0049] The collector is doped with arsenic at a concentration of 5e16, and the buried layer and deep well are doped with arsenic at a concentration of 5e19.
[0050] S20, a static magnetic field with a preset intensity range and step length is applied to each vertical NPN transistor model, and a collector current reduction degree expression of each vertical NPN transistor model in different magnetic field environments is obtained;
[0051] In the embodiments of the application, the collector current reduction degree expression of each vertical NPN transistor model in different magnetic field environments obtained by applying a static magnetic field with a preset intensity range and step length to each vertical NPN transistor model includes:
[0052] A static magnetic field with opposite direction and step setting is applied to each vertical NPN transistor model, and the value of the base current is set to a preset value, and the output characteristic curve of the collector current changing with the static magnetic field is obtained correspondingly;
[0053] The corresponding collector current reduction degree expression is determined based on the output characteristic curve, and the collector current reduction degree expression is:
[0054] MI(%)=(Ic(0) / Ic(B)-1)×100%
[0055] Wherein, Ic(0) is the value of Ic when there is no magnetic field, I(B) is the value of Ic when I(B) is 10uA, and Ic(B) is the value of Ic when the magnetic field is added, and I(B) is equal to 10uA.
[0056] Exemplarily, the BJTs of different sizes are simulated by applying a static magnetic field with a strength range of-7T to 7T and a step of 0.5T in the vertical plane direction. Among them, the positive magnetic field represents the magnetic field direction perpendicular to the plane outward, and the negative magnetic field represents the vertical plane inward.
[0057] S30, based on the collector current reduction degree expression, the collector current reduction degree value of each vertical NPN transistor model under different magnetic field environment and the output characteristic curve of the static magnetic field are obtained;
[0058] In the case of fixing the base current I b As 10uA, the output characteristic curves of BJTs of different sizes are as shown in Figure 2 Table 1. As can be seen from Table 1, with the increase of the base width, the amplification β gradually decreases.
[0059] Table 1. As can be seen from Table 1, with the increase of the base width, the amplification β gradually decreases.
[0060]
[0061]
[0062] Reference Figure 2 When the base width is 0.12um, the output characteristic curves of BJT under different magnetic field strengths are as shown in Figure 3 The simulation results show that: with the increase of the magnetic field strength, I c Output gradually decreases; the influence degree of positive and negative direction magnetic field on I c There are differences: the positive magnetic field partially offsets the current reduction due to the accumulation of electrons, while the negative magnetic field has more significant inhibition effect on the current.
[0063] Magnetic field influence mechanism analysis: the magnetic field changes the motion trajectory of the base current, prolongs the time to reach the collector, and thus causes I c Output decreases. Specifically: under the positive magnetic field, electrons are pushed to the boundary of the BJT structure, forming electron accumulation and generating Hall voltage, which partially offsets the current reduction; under the negative magnetic field, the electron flow direction is far away from the boundary, and the inhibition effect on I c More significant.
[0064] S40. Magnetic field influence factor of collector current and static magnetic field of each vertical NPN transistor model based on output characteristic curve fitting.
[0065] Specifically, to visually compare the performance changes of BJTs of different sizes under static magnetic fields, a normalization method was used to calculate the magnetic field influence factor (MI), as shown in the following formula:
[0066] MI(%)=(Ic(0) / Ic(B)-1)×100%
[0067] Among them, I c (0) represents the absence of a magnetic field, I c (B) When I equals 10uA c Size; I c (B) When a magnetic field is added, I c (B) When I equals 10uA c Size.
[0068] The MI-magnetic flux density (B) curves of BJTs with different base widths are shown below. Figure 4 As shown, after normalizing the BJTs with different structures, their data are plotted in the same coordinate system for comparison. Figure 4 The collector current I under this magnetic field condition is shown in different models. c The results show that the collector current in the output characteristic curves of VNPN devices of different sizes decreases to varying degrees under the influence of a static magnetic field. This phenomenon is mainly attributed to the Lorentz force induced by the static magnetic field, which deflects electrons during transmission, resulting in a longer conductive path and a decrease in the velocity component of electrons along the conductive direction. Therefore, the velocity of electrons reaching the collector decreases, which, from an equivalent perspective, manifests as a decrease in current. The results indicate that the static magnetic field affects I... c The influence of the magnetic field is closely related to the magnetic field strength, direction, and base width. The greater the magnetic field strength, the greater the influence of the positive and negative magnetic fields on I. c The more significant the difference in influence, such as Figure 5 As shown, a) indicates the direction of electron flow in the base region when the magnetic field is 0; b) indicates the direction of electron flow in the base region when the magnetic field is positive; c) indicates the direction of electron flow in the base region when the magnetic field is negative.
[0069] In the embodiments of this application, the magnetic field influence factors of collector current and static magnetic field for fitting each vertical NPN transistor model based on the output characteristic curve include:
[0070] The output characteristic curves are processed using a fitting algorithm to obtain the function expression and the corresponding fitting parameters. The expression of the fitting function is as follows:
[0071] I c =aB 2+bB+c
[0072] where a, b, c are fitting parameters, B is the magnetic field strength, I c is the collector current.
[0073] The fitting parameters of BJTs with different base width are shown in Table 2. The fitting degree of simulation data and fitting function is shown in Figures 7 to 16 The results of simulation data and fitting curve show that they are consistent in trend.
[0074] Table 2. Parameters of different BJTs
[0075]
[0076] The variation of parameters with base width is shown in Figures 17-19
[0077] S50, based on the magnetic field influence factor, the static magnetic field on the transconductance and the amplification of each vertical NPN transistor model, based on the transconductance and the amplification factor to evaluate the ability of each vertical NPN transistor model to resist magnetic interference.
[0078] Through the evaluation, it is found that the influence of base width on the anti-magnetic ability: as the base width decreases, the anti-magnetic ability of BJT is enhanced; the difference between the positive and negative direction magnetic field: the positive magnetic field partially offsets the current drop due to the accumulation of electrons, while the negative magnetic field has a more significant inhibitory effect on the current; the effectiveness of the mathematical model: through the quadratic function fitting, the variation law of the magnetic field influence factor (MI) under different base widths is obtained, providing a convenient evaluation tool for designers.
[0079] The main technical advantages of the present application include:
[0080] A BJT mathematical model suitable for strong magnetic field environment is established, which can accurately predict the variation law of amplification with magnetic field strength under different base widths;
[0081] The concept of "magnetic field influence factor" is proposed, and the influence of static magnetic field on the performance of BJT is quantitatively described through fitting parameters;
[0082] The influence law of base width on the anti-magnetic ability is revealed, providing a theoretical basis for device size optimization;
[0083] A normalization processing method (MI) is provided to uniformly compare the performance changes of BJTs with different sizes under the action of magnetic field.
[0084] Through the above specific embodiments, the present application not only fills the gap of the lack of BJT performance evaluation model in strong magnetic field environment in the prior art, but also provides an efficient design tool for circuit designers, thereby improving the design efficiency and enhancing the reliability of the circuit in complex environment.
[0085] On the basis of the above-mentioned embodiments, the application further provides a device for evaluating the anti-magnetic interference capability of a VNPN transistor, comprising:
[0086] An acquisition module is configured to acquire vertical NPN transistor models with different amplification factors, wherein the substrate, collector, buried layer and deep well of each vertical NPN transistor model are doped by materials with different concentrations.
[0087] A modeling module is configured to apply a static magnetic field with a preset intensity range and step length to each vertical NPN transistor model, so as to obtain a collector current reduction degree expression of each vertical NPN transistor model under different magnetic field environments.
[0088] A first data obtaining module is configured to acquire an output characteristic curve of the collector current reduction degree value and the static magnetic field of each vertical NPN transistor model under different magnetic field environments based on the collector current reduction degree expression.
[0089] A second data obtaining module is configured to fit a magnetic field influence factor of the collector current and the static magnetic field of each vertical NPN transistor model based on the output characteristic curve.
[0090] An evaluation module is configured to calculate the transconductance and amplification factor of each vertical NPN transistor model under the static magnetic field based on the magnetic field influence factor, and evaluate the anti-magnetic interference capability of each vertical NPN transistor model based on the transconductance and amplification factor.
[0091] On the basis of the above-mentioned embodiments, the application further provides a computer readable storage medium comprising instructions, which, when executed on a computer, cause the computer to perform the VNPN transistor anti-magnetic interference capability evaluation method of any one of the preceding method embodiments.
[0092] On the basis of the above-mentioned embodiments, the application further provides an electronic device, which comprises at least one processor, a memory and an input-output unit; wherein the memory is configured to store a computer program, and the processor is configured to call the computer program stored in the memory to perform the VNPN transistor anti-magnetic interference capability evaluation method of any one of the preceding method embodiments.
[0093] The above is only the preferred embodiments of the application, and does not limit the patent scope of the application, and any equivalent structure or equivalent flow transformation made by using the content of the specification and drawings, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the application.
Claims
1. A method for evaluating the immunity to magnetic interference of a VNPN transistor, characterized in that, The method comprises the following steps: obtaining vertical NPN transistor models with different amplification factors, wherein the substrate, collector, buried layer and deep well of each vertical NPN transistor model are doped by materials with different concentrations; applying a static magnetic field with a preset intensity range and step length to each vertical NPN transistor model to obtain a collector current reduction degree expression of each vertical NPN transistor model under different magnetic field environments; obtaining an output characteristic curve of the collector current reduction degree value of each vertical NPN transistor model under different magnetic field environments and the static magnetic field based on the collector current reduction degree expression; fitting the collector current of each vertical NPN transistor model and the magnetic field influence factor of the static magnetic field based on the output characteristic curve; calculating the transconductance and amplification factor of each vertical NPN transistor model under the static magnetic field based on the magnetic field influence factor, and evaluating the magnetic interference resistance of each vertical NPN transistor model based on the transconductance and the amplification factor; applying a static magnetic field with opposite direction and step setting to each vertical NPN transistor model, and setting the value of the base current as a preset value, to obtain an output characteristic curve of the collector current changing with the static magnetic field; determining a corresponding collector current reduction degree expression based on the output characteristic curve, wherein the collector current reduction degree expression is: wherein, (0) is the size when no magnetic field is applied, (B) is the size when a magnetic field of 10 uA is applied (B) is the size when a magnetic field is applied, (B) (B) is the size when a magnetic field of 10 uA is applied . 2. The method of claim 1, wherein the magnetic interference immunity of the VNPN transistor is evaluated by: the substrate, collector, buried layer and deep well of each vertical NPN transistor model are doped by materials with different concentrations, comprising: each vertical NPN transistor model performs the following operations: the substrate is doped with boron with a concentration of 1e16; the emitter is Gaussian doped with arsenic with a peak concentration of 1e20; the base is Gaussian doped with boron with a concentration of 3e18; the collector is doped with arsenic with a concentration of 5e16, and the buried layer and deep well are doped with arsenic with a concentration of 5e19.
3. The method of claim 1, wherein the magnetic immunity of the VNPN transistor is evaluated by: the fitting of the collector current of each vertical NPN transistor model and the magnetic field influence factor of the static magnetic field based on the output characteristic curve comprises: processing each output characteristic curve by using a fitting algorithm to obtain the collector function expression and the corresponding fitting parameters, wherein the function expression is: where the coefficients are fitting parameters, B is the magnetic field strength, I c is the collector current.
4. A device for evaluating the immunity to magnetic interference of a VNPN transistor, characterized in that it comprises: the method for evaluating the magnetic interference resistance of the VNPN transistor according to any one of claims 1-3, comprising: an obtaining module configured to obtain vertical NPN transistor models with different amplification factors, wherein the substrate, collector, buried layer and deep well of each vertical NPN transistor model are doped by materials with different concentrations; a modeling module configured to apply a static magnetic field with a preset intensity range and step length to each vertical NPN transistor model to obtain a collector current reduction degree expression of each vertical NPN transistor model under different magnetic field environments; a first data obtaining module configured to obtain an output characteristic curve of the collector current reduction degree value of each vertical NPN transistor model under different magnetic field environments and the static magnetic field based on the collector current reduction degree expression; a second data obtaining module configured to fit a collector current of each of the vertical NPN transistor models with a magnetic field influence factor of the static magnetic field based on the output characteristic curve; an evaluation module configured to calculate a transconductance and a gain of each of the vertical NPN transistor models under the static magnetic field based on the magnetic field influence factor, and evaluate a magnetic interference resistance of each of the vertical NPN transistor models based on the transconductance and the gain.
5. A computer readable storage medium, characterized in that, The computer program product comprises instructions which, when executed on a computer, cause the computer to perform the method for evaluating the magnetic interference resistance of the vertical NPN transistor according to any one of claims 1-3.
6. An electronic device, comprising: The electronic device comprises: at least one processor, a memory, and an input-output unit; The memory is configured to store a computer program, and the processor is configured to invoke the computer program stored in the memory to execute the method for evaluating the magnetic interference resistance of the vertical NPN transistor according to any one of claims 1-3.
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