AlScN-based ferroelectric photoelectric memristor and preparation method thereof
By using the ferroelectric photomemristor prepared by AlScN film, the problem of instability of traditional memristors is solved, and high performance, low power consumption and visible light detection capabilities are achieved, which are suitable for applications in harsh environments.
Patent Information
- Application Number
- CN202510342208.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-21
- Publication Date
- 2025-06-17
AI Technical Summary
Traditional memristors are unstable and difficult to meet the needs of high performance and reliability, especially in harsh environments.
The device was prepared by using an AlScN film as a functional layer by forming a ferroelectric photomemristor with Pt/AlScN/Pt structure on a P-Si substrate, combining radio frequency magnetron sputtering and DC magnetron sputtering technology.
It realizes the device's high switching speed, low operating voltage and low power consumption, and has the ability to detect visible light, simulates the plasticity performance of biological synapses, improving the stability and application prospects of the device.
Smart Images
Figure CN120166916A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of ferroelectric optoelectronic memristors, and more specifically to an AlScN-based ferroelectric optoelectronic memristor and a preparation method thereof. Background Art
[0002] Resistors, capacitors, and inductors are basic components in circuit theory, which establish the relationship between two circuit parameters. The resistor establishes the relationship between voltage v(t) and current i(t) through Ohm's law, the capacitor establishes the relationship between voltage v(t) and charge q(t) (the time integral of current) through Gauss's law, and the inductor establishes the relationship between current i(t) and magnetic flux φ(t) (the time integral of voltage) through Lenz's law. Based on the concept of completeness, Chua proposed the memristor as the fourth basic circuit component in 1971. It is a two-terminal circuit component that establishes the relationship between charge q(t) and magnetic flux φ(t). The resistance value M of the memristor depends on the amount of charge q passing through the device. When the charge passes through the device in one direction, the resistance value decreases, and when it passes through in the opposite direction, the resistance value increases. Therefore, the memristor is a non-linear resistor with charge memory ability. When the resistance value of the memristor remains constant, the determined relationship between charge and magnetic flux is the same as that determined by the resistor, equivalent to a linear time-independent resistor. Limited by technical reasons, it wasn't until 2008 that Strukov et al. reported the memristive behavior of the Pt / TiO2 / Pt device, which completed the realization of the memristor theory prediction and triggered a research boom on memristors. The basic structure of the memristor consists of a top electrode, a bottom electrode, and a middle functional layer in a "sandwich" structure. By changing the voltage or current applied to the electrodes, the functional layer can be switched between a high-resistance state and a low-resistance state. The device performance and resistive switching mechanism are closely related to the functional layer material.
[0003] With the advent of the era of artificial intelligence, systems based on traditional computing architectures can no longer meet the explosive demands of data storage and computing. To solve the von Neumann bottleneck, researchers pin their hopes on brain-inspired computing systems based on artificial synapses. To achieve artificial synaptic behavior, devices such as memristors, field-effect transistors, and atomic switches have been proposed. Memristors are small in size, simple in structure, and low in power consumption, making them the most promising candidates for building the next-generation computer architecture and realizing neuromorphic computing. The research on ferroelectric memristors has been greatly promoted due to the CMOS compatibility of new ferroelectric materials (such as AlScN) and the low power consumption and stable ferroelectricity when the thickness is reduced to ~10nm. Different from traditional memristors, ferroelectric memristors use an external electric field to change the polarization state of the ferroelectric thin film, causing its resistance value to change accordingly, improving the device yield and stability. In 2022, Zhen Luo et al. fabricated a memristor with an Ag / PZT / NSTO structure, and the device operation speed can reach up to sub-ns level at the fastest, and the number of cycles exceeds 10 9, showing 256 resistance states under a 10ns width pulse voltage. The fast operation speed and continuous resistance change characteristics of ferroelectric memristors enable them to simulate biological synaptic functions, and are currently the most popular device solution in the field of storage and computing integration.
[0004] The research on aluminum scandium nitride (AlScN) began in 2009, when Akiyama et al. found that the piezoelectric coefficient of scandium-doped aluminum nitride material was higher than that of pure AlN. 33 In 2019, Fichtner et al. found that AlScN also has ferroelectricity, and AlScN shows a large coercive field (E) of 1.6-5MV / cm. c ) and 80-120μC / cm 2 The high remnant polarization (P r ), Curie temperature exceeding 1100℃ and the ability to operate stably at high temperatures (≈670K). Dai X et al. prepared AlN / AlScN / AlN structured memristors, which exhibited high switching speed (<5ns), low operating voltage (<0.5V) and ultra-low power consumption as low as 0.2pJ. It has a controllable linear multi-level conductance, which can simulate biological synaptic functions and use convolutional neural networks to complete handwriting recognition tasks. Hang C et al. prepared Cu / Al 0.73 Sc 0.27 N / Pt structure crossbar array device, with high on / off ratio (10 5 %), high switching speed (<150ns). By adjusting the compliance current, the device exhibits gradual switching and multiple conductance states and successfully simulates synaptic behavior. Wang et al. reported the first epitaxial ferroelectric AlScN / GaN heterojunction memristor with a switching ratio in the range of 60-210 and a retention time exceeding 3×10 6 s, bipolar cycle more than 10 4 The device also maintained an on-off ratio greater than 10 at 400°C, indicating that AlScN-based memristors have the potential to work stably in harsh environments. These results suggest that AlScN can be a strong candidate material for next-generation memristors and brain-like computing systems. Mondal et al. reported a high-performance ferroelectric self-powered deep ultraviolet photodetector based on epitaxially grown AlScN films, with a maximum responsivity of 15 mA / W under 193 nm illumination and a detectivity of 1.2×10 at an illumination intensity of 0.12 mW / cm2. 11 Jones. In addition, the photodetector exhibits wake-up-free and reconfigurable photoresponse, as well as fast and stable switching response time (<0.06 s).
[0005] Magnetron sputtering is the most commonly used technique for preparing AlScN thin films. It has advantages over other high-temperature thin film deposition techniques: simplicity, low cost, compatibility with CMOS processes, and magnetron sputtering technology allows us to easily control the Sc doping concentration of the material to regulate its ferroelectric properties to obtain AlScN thin films with desired properties. Summary of the Invention
[0006] The object of the present invention is to provide an AlScN-based ferroelectric optoelectronic memristor and a preparation method thereof to address the problem of instability of traditional memristors and provide an optoelectronic duplex memristor.
[0007] The present invention is implemented as follows: An AlScN-based ferroelectric optoelectronic memristor is provided, in which a Pt bottom electrode layer, an AlScN functional layer, and a Pt top electrode layer are sequentially formed on a P-Si substrate.
[0008] Furthermore, the thickness of the Pt bottom electrode layer is 36 nm, the thickness of the AlScN functional layer is 147 nm, and the thickness of the Pt top electrode layer is 20 nm.
[0009] The present invention also provides a preparation method for an AlScN-based ferroelectric optoelectronic memristor, including the following steps:
[0010] (a) Pretreat the Si-Pt substrate;
[0011] (b) Deposit the AlScN functional layer on the Pt bottom electrode by radio frequency magnetron sputtering;
[0012] (c) Form a Pt top electrode on the AlScN functional layer by direct current magnetron sputtering.
[0013] Furthermore, step (a) is specifically: ultrasonically clean the Si-Pt substrate in acetone, alcohol, and deionized water for 5 minutes in sequence, and dry the substrate with a nitrogen gun.
[0014] Furthermore, the thickness of the Pt bottom electrode in step (a) is 36 nm.
[0015] Furthermore, step (b) is specifically: fix the Al target at the radio frequency source target position, fix the Sc target at the direct current source target position, fix the substrate on the sample stage, pump the pressure in the cavity to below 1.5×10 -4 Pa, introduce nitrogen and argon into the cavity, and keep the pressure at 0.4 Pa to perform reactive co-sputtering to form the AlScN functional layer.
[0016] Furthermore, in step (b), the power of the radio frequency source is 300 W, the power of the direct current source is 150 W; the time of reactive co-sputtering is 10 minutes; the thickness of the AlScN functional layer is 147 nm.
[0017] Further, step (c) specifically is: attaching a mask plate on the well-grown AlScN functional layer, fixing the Pt target on the DC source target position, evacuating the cavity to below 2×10 -4 Pa, introducing argon gas into the cavity to maintain the pressure at 0.8 Pa, adjusting the power of the DC power supply, and performing reactive sputtering to form a Pt top electrode layer on the AlScN functional layer.
[0018] Further, the DC power supply power in step (c) is 40 W, the reactive sputtering time is 1 min 20 s; the thickness of the Pt top electrode is 20 nm.
[0019] The present invention has the following beneficial effects:
[0020] (1) The ferroelectric optoelectronic memristor based on AlScN thin film provided by the present invention is an AlScN ferroelectric memristor that exhibits excellent device performance of the wide-bandgap semiconductor AlScN and has both memristive characteristics and visible light photodetection ability for the first time. For the memristor prepared by the present invention, a series of
[0021] (2) Electrical and optical property tests show that applying a scanning voltage flips the polarization of the functional layer and changes the resistance of the device. The test of pulse regulation with different parameters demonstrates the ability to regulate the polarization state of the device, realizes the regulation of the photocurrent level, shows the ability to simulate the characteristics of biological neural synapses in terms of photocurrent, and has good performance, making the application prospect of the memristor simulating the plasticity performance of biological neural synapses broader.
[0022] (3) The ferroelectric optoelectronic memristor based on AlScN thin film prepared by the present invention has both ferroelectricity and visible light detector performance, can solve the unstable characteristics of traditional memristors, can also provide a solution for optoelectronic duplex memristors, and can simulate the related behaviors of neural synapses, having great research value and application prospects. Description of the Drawings
[0023] Figure 1 is a schematic structural diagram of the AlScN-based ferroelectric optoelectronic memristor provided by the present invention.
[0024] Figure 2 is a schematic structural diagram of the magnetron sputtering equipment used in the preparation of the ferroelectric optoelectronic memristor by the present invention.
[0025] Figure 3 is a cross-sectional TEM image of the ferroelectric optoelectronic memristor prepared in Example 2.
[0026] Figure 4 is a high-resolution cross-sectional TEM image of the interface between the AlScN functional layer and the Pt bottom electrode of the ferroelectric optoelectronic memristor prepared in Example 2.
[0027] Figure 5 It is a high-resolution TEM image of the AlScN functional layer of the ferroelectric optoelectronic memristor prepared in Example 2.
[0028] Figure 6 (a) is the AFM image of the AlScN functional layer in the ferroelectric optoelectronic memristor prepared in Example 2 of the present invention; Figure (b) is the PFM image; Figure (c) is the phase-voltage and amplitude-voltage curve graphs.
[0029] Figure 7 (a) is the I–V curve graph of the ferroelectric optoelectronic memristor prepared in Example 2 of the present invention in the dark; Figure 7 (b) is the I–V curve graph under illumination with a wavelength of 405 nm; Figure 7 (c) is the I–V curve graph under illumination with a wavelength of 450 nm; Figure 7 (d) is the I–V curve graph under illumination with a wavelength of 520 nm.
[0030] Figure 8 (a) is the photocurrent response image related to the polarization state of the ferroelectric optoelectronic memristor prepared in Example 2 of the present invention under illumination with a wavelength of 405 nm; Figure 8 (b) is the photocurrent response image related to the polarization state under illumination with a wavelength of 450 nm; Figure 8 (c) is the photocurrent response image related to the polarization state under illumination with a wavelength of 520 nm.
[0031] Figure 9 (a) is the voltage pulse-regulated photocurrent curve of the ferroelectric optoelectronic memristor prepared in Example 2 of the present invention; Figure 9 (b) is three consecutive regulation cycles. Detailed implementation manners
[0032] The present invention will be further described below in conjunction with comparative examples and examples. The following implementation manners are only for illustration and do not limit the protection scope of the present invention in any form.
[0033] Example 1
[0034] As Figure 1 shown, the AlScN-based ferroelectric optoelectronic memristor provided by the present invention has a structure including a Si substrate 1, a Pt bottom electrode layer 2, an AlScN functional layer 3, and a Pt top electrode layer 4 arranged in sequence from bottom to top. Among them, the thickness of the Pt bottom electrode layer 2 is 36 nm (Si-Pt is a commercially purchased substrate), the thickness of the AlScN functional layer 3 is 147 nm, and the thickness of the Pt top electrode layer 4 is 20 nm. The preparation process of the Pt top electrode layer 4 is as follows: A mask plate is placed on the AlScN functional layer, and DC magnetron sputtering of a Pt target is performed to form a circular electrode with a diameter of 100 μm uniformly distributed on the AlScN functional layer.
[0035] Example 2
[0036] Prepare an AlScN-based ferroelectric optoelectronic memristor according to the following steps:
[0037] (1) Immerse the Si-Pt substrate in an acetone solution and place it in an ultrasonic cleaner for ultrasonic cleaning for 5 min to remove surface organic matter. After taking out the substrate, place it in absolute ethanol for ultrasonic cleaning for 5 min to remove residual acetone. After taking out the substrate, place it in deionized water for ultrasonic cleaning for 5 min to remove the ethanol residue. Finally, take it out and dry the substrate with a high-purity nitrogen gun.
[0038] (2) Preparation of the AlScN functional layer: Use the magnetron sputtering equipment as shown in Figure 2 . Open the vacuum chamber door of the magnetron sputtering equipment, the target sleeves of the DC target position 7, the RF target position 8, and the sample stage 11. Polish the impurities on the target sleeve 7, target sleeve 8, and sample stage 11 with sandpaper, wipe them clean with acetone and alcohol cotton balls in turn, apply conductive silver paste on the sample stage 11, and place the cleaned Si-Pt substrate flat on the place where the silver paste is applied and fix it stably. Press the substrate flat to ensure uniform growth of the thin film during sputtering. Place the sample stage 11 on the rotary heating stage 12 and fix it. Place the Sc target 9 with a purity of 99.99% on the DC target position 7 and install the target sleeve to fix it stably. Place the Al target 10 with a purity of 99.99% on the RF target position 8 and install the target sleeve to fix it stably. Close the cavity, pump the cavity vacuum to below 1.5×10 -4 Pa through the throttle valve 13. Introduce argon and nitrogen into the cavity as sputtering and reaction gases through the intake valve 14, adjust the intake valve 14 to maintain the pressure in the cavity at 0.4 Pa, raise the temperature of the sample stage 11 to 400 °C, turn on the DC power supply 5 and the RF power supply 6 to control the glow of the Sc target 9 and the Al target 10 respectively, adjust the DC power supply power to 150 W, and the RF source power to 300 W, and perform pre-sputtering for 5 min. Pre-sputtering is to clean the surface of the target material, so the sputtering baffle is closed during pre-sputtering (there is a baffle on the sample stage 11 that Figure 2 is not marked in the figure) to avoid contaminating the substrate. Then open the sputtering baffle and start formal sputtering for 10 min to form an AlScN functional layer on the Si-Pt substrate with a thickness of 147 nm.
[0039] (3) Preparation of the top electrode Pt layer: Open the cover of the vacuum chamber, repeat the cleaning operation of the sample stage 11 and the target sleeve at the DC target position 7, take out the grown sample, soak the mask plate in acetone solution and place it in an ultrasonic cleaner for ultrasonic cleaning for 5 min to remove surface organic matter. After taking out the substrate, place it in absolute ethanol for ultrasonic cleaning for 5 min to remove residual acetone. After taking out the substrate, place it in deionized water for ultrasonic cleaning for 5 min to remove ethanol residue. Finally, take it out and dry the substrate with a nitrogen gun. Stick a mask plate with uniformly distributed round holes with a diameter of 100 μm on the grown AlScN functional layer, place the Pt target on the DC target position 7 and install the target sleeve to fix it stably. Pump the cavity to a vacuum below 2×10 -4 Pa, introduce argon gas into the cavity through the intake valve 14, adjust the intake valve 14 to maintain the pressure in the cavity at 0.8 Pa, turn on the DC power supply, adjust the DC power supply power to 40 W to make the Pt target glow, pre-sputter for 3 min and then start formal sputtering for 1 min 20 s to form a Pt top electrode layer with a diameter of 100 μm and a thickness of 20 nm on the AlScN functional layer.
[0040] Perform performance tests on the AlScN-based ferroelectric optoelectronic memristor prepared in Example 2:
[0041] Perform transmission electron microscope (TEM) tests on the device. The low-magnification STEM image of the cross-section of the device is as shown in Figure 3 Figure.
[0042] The bottom electrode thickness of the AlScN-based ferroelectric optoelectronic memristor prepared in Example 2 is 36 nm, and the functional layer thickness is 147 nm.
[0043] Perform high-resolution TEM tests on the interface between the functional layer and the bottom electrode of the device. The STEM high-angle dark-field scattering image at the interface is as shown in Figure 4 Figure. It shows that the interface between the functional layer and the bottom electrode of the prepared AlScN-based ferroelectric optoelectronic memristor is clearly demarcated.
[0044] Perform high-resolution TEM tests on the AlScN functional layer of the device. The results are as shown in Figure 5 Figure, clearly showing the regular lattice arrangement of AlScN.
[0045] Perform morphological characterization tests on the AlScN functional layer of the device with an atomic force microscope (AFM). The morphology of the sample in the 20 μm×20 μm area is as shown in Figure 6 (a). It can be observed that the surface of the AlScN thin film is relatively flat. The PFM phase diagram is as shown in Figure 6(As shown in (b), it can be seen from the PFM image that the image phase difference is about 180°, and the out-of-plane phase shows clear ferroelectric domain walls and uniform polarization region contrast. The non-biased region has the same phase as the +10V biased region, proving that the AlScN thin film has intrinsic ferroelectric properties.) Figure 6 (c) shows a butterfly amplitude-voltage curve and a box-shaped phase-voltage curve separated by about 180°, indicating that the polarity of the thin film can be switched by an external electric field.)
[0046] The I-V characteristics of the device were tested, and the results are shown in Figure 7 . The top electrode of the device was connected to the negative terminal of the Keithley 2400, and the bottom electrode was connected to the positive terminal of the Keithley 2400. A scanning voltage of 0V → +6V → 0V → -6V → 0V was applied, and the current was represented in logarithmic form. The positive voltage scan converted the device from the high resistance state (HRS) to the low resistance state (LRS), which is called the SET operation; the reverse process of the resistance switching from the LRS to the HRS under the negative voltage scan is called the RESET operation. As Figure 7 (As shown in (a), when the device was measured in the dark, it exhibited typical memristive behavior caused by ferroelectric polarization reversal and showed low working current and self-rectifying ability. As Figure 7 (a), (b), and (c) show that the memristive behavior observed under 405nm, 450nm, and 520nm light illumination is similar to that in the dark, but the current increases significantly. The smaller the light wavelength, the higher the current of the device during the SET and RESET processes.)
[0047] The light response of the device was tested, and the results are shown in Figure 8 . To evaluate whether the ferroelectric polarization state affects the photocurrent, the photocurrent was measured in the presence and absence of pre-polarization, and the effect of changing the polarization direction on the photocurrent was studied. Polarization pulses with an amplitude of ±6V and a width of 0.1s were applied to change the polarization state of the AlScN layer. The "Pole-down" state corresponds to a +6V pulse being applied to the top electrode, while the "Pole-up" state corresponds to a -6V pulse being applied to the top electrode. The device state without any electrical measurement after device fabrication is "Fresh".) Figure 8 (a), (b), and (c) show the photocurrent measurement results of the photodetectors in the Pole-down, Fresh, and Pole-up states under 405nm, 450nm, and 520nm wavelength light illumination with a 0.5V driving voltage and a 5s switching period. It was found that the magnitude of the photocurrent depends on the light on / off and the polarization state. If the polarization direction is the same as the applied bias direction, the photocurrent is higher, while if the directions are opposite, the photocurrent is lower.)
[0048] The device was tested for the LTP-LTD behavior of the photocurrent-simulated synapse, and the results are shown in Figure 9 . AsFigure 9 As shown in (a), first, 40 positive square waves are applied to the device, with a pulse amplitude of 1.85 V and a pulse width of 5 μs. After each application, there is an interval of 1 s before applying the next pulse. Then, 40 negative square waves are applied to the device, with a pulse amplitude of -1.95 V and a pulse width of 5 μs. After each application, there is an interval of 1 s before applying the next pulse. By measuring the change in photocurrent during the process, it is found that the photocurrent can simulate the synaptic LTP-LTD behavior. As Figure 9 As shown in (b), the LTP-LTD of 3 consecutive complete cycles is measured, and the average switching ratio is calculated to be approximately 7.03. In addition, the LTD and LTP processes of the 3 cycles are almost the same, showing a small cycle variation (≈5%), demonstrating the good reliability of the photocurrent regulation induced by electrical pulses, indicating that the memristor prepared based on this method has stable biological synaptic simulation characteristics.
Claims
1. An AlScN-based ferroelectric photoelectric memristor, characterized in that: A Pt bottom electrode layer, an AlScN functional layer and a Pt top electrode layer are sequentially formed on a P-Si substrate.
2. The AlScN-based ferroelectric photoelectric memristor according to claim 1, characterized in that: The thickness of the Pt bottom electrode layer is 36 nm, the thickness of the AlScN functional layer is 147 nm, and the thickness of the Pt top electrode layer is 20 nm.
3. A method for preparing an AlScN-based ferroelectric photoelectric memristor, characterized in that: The following steps are involved: (a) Pretreatment of Si-Pt substrate; (b) Deposition of AlScN functional layer on Pt bottom electrode by RF magnetron sputtering; (c) A Pt top electrode is formed on the AlScN functional layer by DC magnetron sputtering.
4. The method for preparing an AlScN-based ferroelectric photoelectric memristor according to claim 3, characterized in that: Step (a) specifically includes: cleaning the Si-Pt substrate in acetone, alcohol and deionized water in sequence by ultrasonic cleaning for 5 minutes, and drying the substrate by using a nitrogen gun.
5. The method for preparing an AlScN-based ferroelectric photoelectric memristor according to claim 3, characterized in that: The thickness of the Pt bottom electrode in step (a) is 36 nm.
6. The method for preparing an AlScN-based ferroelectric photoelectric memristor according to claim 3, characterized in that: Step (b) specifically includes: fixing the Al target at the RF source target position, fixing the Sc target at the DC source target position, fixing the substrate on the sample stage, and pumping the pressure in the chamber to 1.5×10 -4 Pa, nitrogen and argon are introduced into the chamber to keep the pressure at 0.4 Pa, and reactive co-sputtering is performed to form an AlScN functional layer.
7. The method for preparing an AlScN-based ferroelectric photoelectric memristor according to claim 6, characterized in that: In step (b), the power of the RF source is 300 W, and the power of the DC source is 150 W; the time of the reactive co-sputtering is 10 min; and the thickness of the AlScN functional layer is 147 nm.
8. The method for preparing an AlScN-based ferroelectric photoelectric memristor according to claim 3, characterized in that: Step (c) is as follows: affix a mask to the grown AlScN functional layer, fix the Pt target on the DC source target position, and evacuate the chamber to 2×10 -4 Pa, argon gas was introduced into the chamber to maintain the pressure at 0.8 Pa, the DC power supply power was adjusted, reactive sputtering was performed, and a Pt top electrode layer was generated on the AlScN functional layer.
9. The method for preparing an AlScN-based ferroelectric photoelectric memristor according to claim 8, characterized in that: In step (c), the DC power supply power is 40W, the reactive sputtering time is 1min 20s; and the thickness of the Pt top electrode is 20nm.