Scanning control device and semiconductor detection equipment
By designing a scanning control device for scanning electron microscopes, scanning waveform parameters are generated using the first chip, and parameters are stored and outputted by the control chip and memory chip, the problems of slow generation of scanning parameters and insufficient storage space are solved, and the effect of improving semiconductor detection efficiency and expanding storage space is achieved.
Patent Information
- Application Number
- CN202510276306.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-10
- Publication Date
- 2025-06-20
AI Technical Summary
Existing scanning electron microscopes are slow to generate scanning parameters, which affects semiconductor detection efficiency and can become insufficient storage space for gate array chips, making it impossible to effectively store scanning waveform parameters.
A scanning control device is designed, including a control chip, a first chip and a memory chip, and generates scanning waveform parameters through the first chip, and stores and outputs parameters through the control chip and the memory chip, thereby improving the efficiency of generating scanning waveform parameters and expanding the storage space.
By improving the efficiency of generating scanning waveform parameters, reducing the time of scanning one frame of image, improving semiconductor detection efficiency, and solving the problem of insufficient storage space, the storage capability of the scanning control device is expanded.
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Figure CN120177535A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the technical field of semiconductor detection, and particularly relates to a scanning control device and a semiconductor detection device. Background Art
[0002] Charged particle beam detection imaging devices such as scanning electron microscopes (SEM) are widely used in the field of semiconductor detection. A scanning electron microscope is a high-resolution electron optical instrument and is widely used in the field of semiconductor detection. The scanning electron microscope generates scanning parameters through a field programmable gate array (FPGA) chip, and the charged particle beam emission module emits charged particle beams based on the above scanning parameters. However, the above method has the problem that the speed of generating scanning parameters is slow, which affects the detection efficiency of semiconductors. Summary of the Invention
[0003] Embodiments of this application provide a scanning control device, method, equipment, medium, product, and semiconductor detection device, which can improve the efficiency of generating scanning waveform parameters, thereby reducing the duration of scanning one frame of an image by a scanning electron microscope and improving the semiconductor detection efficiency.
[0004] In a first aspect, embodiments of this application provide a scanning control device, which includes:
[0005] A first chip, a control chip, and a storage chip, where the control chip is connected to both the first chip and the storage chip;
[0006] The first chip is configured to generate scanning waveform parameters based on scanning parameters;
[0007] The storage chip is configured to receive the scanning waveform parameters sent by the first chip through the control chip and store the scanning waveform parameters;
[0008] The control chip is configured to receive a first signal sent by the storage chip after the storage of the scanning waveform parameters is completed, obtain the scanning waveform parameters from the storage chip according to the first signal, and output the scanning waveform parameters, where the scanning waveform parameters are used to indicate the generation of a scanning waveform.
[0009] In a second aspect, embodiments of this application provide a semiconductor detection device, which includes:
[0010] A charged particle beam emission module and the scanning control device according to any item in the foregoing first aspect;
[0011] The scanning control device is configured to send scanning waveform parameters to the charged particle beam emission module;
[0012] The charged particle beam emission module is configured to generate a scanning waveform of charged particle beams in response to the scanning waveform parameters in the control signal.
[0013] In a third aspect, an embodiment of the present application provides a scanning control method, which is applied to a scanning control device. The device includes a control chip, a first chip, and a storage chip. The control chip is connected to both the first chip and the storage chip. The method includes:
[0014] Generating scanning waveform parameters based on scanning parameters through the first chip;
[0015] Receiving, by the storage chip, the scanning waveform parameters sent by the control chip and storing the scanning waveform parameters, where the scanning waveform parameters are the parameters sent by the first chip to the control chip;
[0016] Receiving, by the control chip, a first signal sent by the storage chip after storing the scanning waveform parameters, obtaining the scanning waveform parameters from the storage chip according to the first signal, and outputting the scanning waveform parameters, where the scanning waveform parameters are used to indicate the generation of a scanning waveform.
[0017] In a fourth aspect, an embodiment of the present application provides an electronic device, which includes:
[0018] A processor and a memory storing computer program instructions;
[0019] When the processor executes the computer program instructions, it is used to execute the method for generating a waveform in the second aspect above.
[0020] In a fifth aspect, an embodiment of the present application provides a computer storage medium, on which computer program instructions are stored. When the computer program instructions are executed by a processor, the method for generating a waveform in the second aspect above is implemented.
[0021] In a sixth aspect, an embodiment of the present application provides a computer program product, including a computer program, which implements the method for generating a waveform in the second aspect above when being processed by a processor.
[0022] The scanning control device, method, device, medium, product, and semiconductor detection device provided by the embodiments of the present application generate waveform scanning parameters based on scanning parameters through the first chip, and the control chip receives the waveform scanning parameters sent by the first chip and generates scanning waveform parameters based on the first chip. The above steps transfer the step of generating scanning waveform parameters to the first chip with higher computing power, which can improve the generation efficiency of generating scanning waveform parameters, and thus is conducive to improving the detection efficiency of semiconductors. And storing the scanning waveform parameters through the storage chip can solve the problem of insufficient storage space of the control chip and expand the storage space of the scanning control device. Description of the Drawings
[0023] To more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the accompanying drawings required for the embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0024] Figure 1 Schematic diagram of a scanning control device provided for some embodiments of the present application.
[0025] Figure 2 Schematic diagram of another scanning control device provided for some embodiments of the present application.
[0026] Figure 3 Schematic diagram of yet another scanning control device provided for some embodiments of the present application.
[0027] Figure 4 Schematic flow chart of a scanning control method provided for some embodiments of the present application.
[0028] Figure 5 Schematic diagram of the mechanism of a semiconductor detection device provided for some embodiments of the present application.
[0029] Figure 6 Schematic diagram of the hardware structure of an electronic device provided for the embodiments of the present application. Detailed implementation manners
[0030] The following will describe in detail the features and exemplary embodiments of various aspects of the present application. To make the purpose, technical solutions and advantages of the present application more clear and understandable, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by showing examples of the present application.
[0031] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.
[0032] Before elaborating on the technical solutions provided by the embodiments of the present application, for the convenience of understanding the embodiments of the present application, the present application first specifically describes the problems existing in the related art:
[0033] Currently, in the field of semiconductor detection, semiconductor scanning imaging is widely performed by a charged particle beam detection device such as a scanning electron microscope, and semiconductor defects are detected through the scanned image. The existing scanning electron microscope mainly generates scanning waveform parameters through a soft core in a field-programmable gate array chip. Multiple target voltage values in the scanning waveform parameters can control the voltage value of the coil in the charged particle beam emission module to enable the charged particle beam emission module to emit a charged particle beam. However, the soft core has the problem of low computing power, resulting in a slow rate of generating scanning waveform parameters. For example, it may take 450 ms for the soft core to generate scanning waveform parameters for an image size of 512×512, which cannot meet the existing production requirements and affects the subsequent semiconductor detection efficiency.
[0034] At the same time, in the prior art, the above scanning waveform parameters are often stored in a field-programmable gate array chip. However, due to the large amount of data of the scanning waveform parameters, the field-programmable gate array chip has a problem of insufficient storage space.
[0035] Based on this, the embodiments of the present application provide a scanning control device, method, equipment, medium, product and semiconductor detection device, which can solve the above problems. Next, the scanning control device provided by the embodiments of the present application will be described in detail.
[0036] In some embodiments, such as Figure 1, the scanning control device 100 provided by the embodiments of the present application includes a control chip 101, a first chip 102, and a storage chip 103. Here, the control chip 101 can be connected to both the first chip 102 and the storage chip 103. The control chip 101 can be a gate array chip, the first chip 102 can be a Digital Signal Process (DSP) chip, and the storage chip 103 can be a Double-Data-Rate (DDR) chip.
[0037] Here, the control chip 101 can be connected to a host computer through a preset interface. The host computer can transmit image parameters to the register of the control chip 101 through a Peripheral Component Interconnect Express (PCLE) based on a first interface through a peripheral component slot bus. The control chip 101 can calculate based on the image size included in the image parameters to obtain scanning parameters. The scanning parameters can include a scanning direction, the number of scanning points, and a scanning size. The scanning size can be the size of the generated scanning image, and the number of scanning points can be the number of pixel points in the scanning image.
[0038] The first chip 102 can generate scanning waveform parameters based on the above scanning parameters through a rotation matrix algorithm. After generating the scanning waveform parameters, the first chip 102 can send the scanning waveform parameters to the control chip 101.
[0039] The control chip 101 can send the above scanning waveform parameters to the storage chip 103, and the storage chip 103 can store the above scanning waveform parameters.
[0040] After the storage chip 103 finishes storing the scanning waveform parameters, it can send a first signal to the control chip 101.
[0041] After receiving the first signal sent by the storage chip 103, the control chip 101 can output a control signal. The control signal can be used to indicate the generation of a scanning waveform. For example, the control chip 101 can send the control signal to a charged particle beam emission device, and the charged particle beam emission device can generate a scanning waveform of the charged particle beam in response to the scanning waveform parameters in the control signal. Here, the control signal can carry the scanning waveform parameters. The scanning waveform parameters can include a target voltage value, and the coil in the charged particle beam emission module can control the scanning waveform based on the target voltage value.
[0042] In the implementation of this application, the first chip generates waveform scanning parameters based on scanning parameters. The control chip receives the waveform scanning parameters sent by the first chip and generates scanning waveform parameters based on the first chip. By adding a first chip with higher computing power to mainly generate scanning waveform parameters, the generation efficiency of generating scanning waveform parameters can be improved, which is conducive to improving the detection efficiency of semiconductors. And storing the scanning waveform parameters in the storage chip can solve the problem of insufficient storage space of the control chip and expand the storage space of the scanning control device.
[0043] In some embodiments, the control chip outputs scanning waveform parameters, which may include:
[0044] The control chip generates a waveform scanning timing sequence and outputs scanning waveform parameters based on the waveform scanning timing sequence.
[0045] Here, the control chip can generate a waveform scanning timing sequence and output scanning waveform parameters based on the waveform scanning timing sequence. It can be imagined that the above control chip can generate a waveform scanning timing sequence based on the above scanning parameters, and the above waveform scanning timing sequence can be used to indicate the timing of data transmission. For example, it can be used to indicate the timing of the control chip 101 sending the above scanning waveform parameters to the charged particle beam emission module. Here, at a rising edge or a falling edge of a pulse in the above waveform scanning timing sequence, the control chip 101 can send a data in the scanning waveform parameters to the above charged particle beam emission module.
[0046] In some embodiments, the control chip 101 may include a timing control module 201 (State ctrl), and may generate the above waveform scanning timing sequence based on the timing control module 201.
[0047] In some embodiments, the above timing control module 201 may also generate a signal acquisition timing sequence and a signal deflection timing sequence (such as a blanker switch timing sequence). The above signal acquisition timing sequence can indicate the timing for the acquisition module to acquire the charged particle beam reflected by the semiconductor, and the above signal deflection timing sequence can indicate the timing for the acquisition module not to acquire the charged particle beam reflected by the semiconductor.
[0048] In the embodiment of this application, the control chip generates a waveform scanning timing sequence and outputs scanning waveform parameters based on the waveform scanning timing sequence. By using the waveform scanning timing sequence as the transmission timing of the data in the scanning waveform parameters sent by the control chip, the accuracy of the scanning waveform parameters is improved.
[0049] In some embodiments, such as Figure 2As shown in the figure, the control chip 101 may include a soft core (Microsoft balze) 202. Before the first chip 102 is used to generate scan waveform parameters based on scan parameters, the soft core 202 may obtain image parameters and generate scan parameters based on the image parameters. The image parameters may include the image size. After that, the first chip 102 may generate scan waveform parameters based on the scan parameters.
[0050] In the embodiment of the present application, the soft core in the control chip obtains image parameters and generates scan parameters based on the image parameters, which can realize the "preprocessing" of the image parameters based on the soft core, so that the first chip can generate scan waveform parameters based on the image parameters later, improving the generation efficiency of the scan waveform parameters.
[0051] In some embodiments, as Figure 2 shown, the control chip 101 may include a direct memory access module (DDR_Buffer) 203. The direct memory access module 203 is connected to the storage chip 103. The direct memory access module 203 is used to send scan waveform parameters to the storage chip 103 and obtain scan waveform parameters from the storage chip 103 when receiving the first signal sent by the storage chip 103.
[0052] In some examples, the direct memory access module 203 may include a second interface, and the direct memory access module 203 may be connected to the storage chip 103 through the second interface. In some examples, the direct memory access module 203 may be replaced by a read-write module, and the read-write function of the read-write module is used to store the scan waveform parameters into the storage chip 103 and obtain the scan waveform parameters from the storage chip 103, which will not be elaborated here.
[0053] In the embodiment of the present application, by connecting the direct memory access module 203 in the control chip 101 to the storage chip 103, and the direct memory access module 203 executes the steps of storing the scan waveform parameters into the storage chip 103 and obtaining the scan waveform parameters from the storage chip 103, the integrity and accuracy of data writing and obtaining can be realized, and the data transmission between the control chip 101 and the storage chip 103 is realized.
[0054] In some embodiments, as Figure 2 , the direct memory access module 203 may include a first sub-module 2011 and a second sub-module 2012. The first sub-module and the second sub-module are both connected to the storage chip; the first sub-module 2011 is used to send scan waveform parameters to the storage chip 103; the second sub-module 2012 is used to obtain scan waveform parameters from the storage chip 103.
[0055] As Figure 2As shown, the direct memory access module 203 may include a first sub-module 2011 and a second sub-module 2012. The first sub-module 2011 may send scan waveform parameters to the memory chip 103, and the second sub-module 2012 may obtain scan waveform parameters from the memory chip 103 when receiving the first signal sent by the memory chip.
[0056] In the embodiment of the present application, by setting the first sub-module 2011 and the second sub-module 2012, data storage and data acquisition between the control chip 101 and the memory chip 103 can be respectively realized, improving data transmission efficiency.
[0057] In some embodiments, as Figure 2 shown, the control chip 101 may further include a direct processing and transmission module (SrioTop) 204. The processing and transmission module 204 is connected to the first chip. The processing and transmission module 204 is used to obtain scan parameters and send the scan parameters to the first chip 102; and receive the scan waveform parameters sent by the first chip 102 and send the scan waveform parameters to the direct memory access module 203. It can be imagined that the above processing and transmission module 204 may include a first interface such as an Srio interface, and send the scan parameters to the first chip 102 based on the above first interface.
[0058] In the embodiment of the present application, the above direct processing and transmission module can receive the scan waveform parameters sent by the first chip, and then send the above scan waveform parameters to the direct memory access module 203. By setting the direct processing and transmission module, high-speed data transmission between the control chip 101 and the first chip 102 can be realized.
[0059] In some embodiments, the scan waveform parameters include digital scan waveform parameters, and the scan control device further includes a digital-to-analog conversion chip 205. The digital-to-analog conversion chip 205 is connected to the control chip 101; the digital-to-analog conversion 205 chip is used to convert the digital scan waveform parameters into analog scan waveform parameters.
[0060] Here, the digital-to-analog conversion (Digital-to-Analog Converter, DAC) chip 205 can convert the digital scan waveform parameters sent by the control chip 101 into analog scan waveform parameters. Among them, the analog scan waveform parameters may include multiple target voltage values. The above analog waveform parameters can be used to indicate the generation of a scan waveform. Here, the above DAC chip can send the above analog scan waveform parameters to the charged particle beam emission module, and the coil in the charged particle beam emission module can control the scan waveform based on the above multiple target voltage values. In some examples, the above control chip 101 may include a third interface, and the above control chip 101 may be connected to the above digital-to-analog conversion chip 205 through the third interface.
[0061] In the embodiment of the present application, by setting the digital-to-analog conversion chip 205, the digital scan waveform parameters can be converted into analog scan waveform parameters recognizable by the charged particle beam emission module, enabling the normal operation of the charged particle beam emission module, and thus enabling the normal detection of semiconductors.
[0062] In some embodiments, as Figure 2 shown, the above control chip 101 may include a digital-to-analog conversion module (DAC SUBTOP) 206. The first end of the digital-to-analog conversion module may be connected to the above second sub-module 2012. The digital-to-analog conversion module may be connected to the above DAC chip. The digital-to-analog conversion module may generate a read enable signal and send the digital scan waveform parameters to the DAC chip based on the read enable signal. Through the above digital-to-analog conversion module, data transmission between the digital-to-analog conversion chip and the control chip can be achieved.
[0063] Here, the above digital-to-analog conversion module 206 may include the above third interface, and the digital-to-analog conversion module 206 may be connected to the above digital-to-analog conversion chip 205 through the third interface.
[0064] In some embodiments, as Figure 2 shown, the control chip 101 may further include a data transmission module (PCIE) 207. The above data transmission module 207 may be connected to the host computer, and data interaction between the control chip 101 and the host computer can be achieved through the above data transmission module.
[0065] In some embodiments, the control chip 101 is further configured to obtain a digital image of a semiconductor device, calculate the average value of the gray values of multiple pixel points in the target area of the digital image, and replace the gray values of the multiple pixel points in the target area with the average value to obtain a processed image, where the digital image is generated by converting an analog image generated by a charged particle beam reflected by a semiconductor device by an acquisition module.
[0066] The above control chip 101 may obtain a digital image of a semiconductor from the acquisition module. The above digital image is generated by converting an analog image generated by a charged particle beam reflected by a semiconductor device by an acquisition module. The above digital image may include gray values corresponding to multiple pixel points. The control chip 101 may calculate the average value of the gray values of multiple pixel points in the target area of the above digital image, and replace the gray values of the multiple pixel points in the target area with the average value to obtain a processed image. The above target area may include multiple ones. For example, the average value of the gray values of every consecutive 4 pixel points may be calculated, and then the gray values of the above 4 pixel points may be replaced with the average value to obtain a processed image.
[0067] In some embodiments, as Figure 3 shown, Figure 3Schematic diagram of another scanning control device provided by an embodiment of the present application, as Figure 3 shown, the control chip 101 may further include an image processing module (Fram average) 301. The above-mentioned image processing module 301 may be used to obtain a digital image of a semiconductor device, calculate the average value of the gray values of multiple pixel points in the digital image, and replace the gray values of multiple pixel points in the target area based on the average value to obtain a processed image. In some examples, continuing with the example where the digital image includes 512×512 gray values, the average value of the gray values of the pixel points in each column may be calculated to obtain multiple average values, and the gray values of the corresponding column of pixel points may be replaced based on each average value to obtain a processed image.
[0068] In the embodiment of the present application, the control chip 101 obtains a digital image of a semiconductor, calculates the average value of multiple pixel points in the digital image of the semiconductor, and calculates the average value of the gray values of multiple pixel points in the target area of the digital image. The gray values of multiple pixel points in the target area are replaced based on the average value to obtain a processed image, which can reduce the influence of noise on the gray values of the digital image and is beneficial to detecting defects of the semiconductor based on the above-mentioned processed image later.
[0069] In some embodiments, as Figure 3 shown, the scanning control device may further include a first storage chip 302. The first storage chip 302 may be connected to the image processing module 301 in the control chip 101. The first storage chip 302 is used to receive the processed image sent by the control chip 101 and store the processed image.
[0070] As Figure 3 above, the control chip 101 may store the processed image in the first storage chip 302 for later detecting defects of the semiconductor based on the processed image stored in the first storage chip 302.
[0071] In some embodiments, as Figure 2 shown, the control chip 101 may further include a Memory Interface Generator (MIG) module 303. The above-mentioned MIG module 303 may be disposed between the image processing module 301 and the first storage chip 302. The above-mentioned MIG module 303 may obtain the processed image from the image processing module 301 and store the processed image in the first storage chip 302. It can be imagined that the display device may later obtain the above-mentioned processed image from the first storage chip 302 and display the above-mentioned processed image for the user to detect semiconductor defects based on the processed image.
[0072] In some examples, as Figure 2As shown, the above-mentioned MIG module 303 can be connected to the data transmission module 207. The data transmission module 207 can send an acquisition signal to the MIG module 303 in response to an instruction sent by the host computer. The MIG module 303 can obtain a processed image from the first chip and send the processed image to the data transmission module 207. Then, the data transmission module 207 can send the processed image to the host computer.
[0073] In the embodiment of the present application, by setting the first storage chip and storing the processed image in the first storage chip through the control chip, the storage space for storing the processed image by the scan control device can be expanded, solving the problem of insufficient storage space of the scan control device. Moreover, by storing the image in the first storage chip, classified storage of different data in the scan control device can be achieved.
[0074] In some embodiments, the scan control device further includes an analog-to-digital conversion chip 304. The analog-to-digital conversion chip 304 is connected to the control chip 101 and is used to obtain an analog image of the semiconductor and perform analog-to-digital conversion on the analog image to obtain a digital image.
[0075] Such as Figure 3 , the scan control device may further include an analog-to-digital conversion chip 304. The analog-to-digital conversion chip 304 can be connected to the control chip 101. The analog-to-digital conversion chip 304 can acquire an analog image, convert the analog image into a digital image, and send the digital image to the control chip 101. By setting the analog-to-digital conversion chip 304, the analog image of the semiconductor can be converted into a digital image, so that the control chip 101 can calculate the average value of multiple pixel points in the digital image to improve the image clarity. Here, the above-mentioned analog image is an image generated by the acquisition module in the semiconductor device by acquiring the charged particle beam reflected by the semiconductor.
[0076] In the embodiment of the present application, by setting the analog-to-digital conversion chip to obtain the analog image of the semiconductor and convert the analog image into a digital image, it is convenient for the control chip to process the above digital image later, facilitating the user to detect semiconductor defects based on the processed image.
[0077] In some embodiments, such as Figure 3As shown, the above control chip 101 may include an analog-to-digital conversion module (AD SUBTOP) 305. The first end of the analog-to-digital conversion module 305 may be connected to the above analog-to-digital conversion chip, and the second end of the analog-to-digital conversion module may be connected to the above image processing module 301. The analog-to-digital conversion module 305 may send the above digital image to the image processing module 301, enabling the image processing module to process the above digital image. The above analog-to-digital conversion module 305 may realize data interaction between the control chip 101 and the analog-to-digital conversion chip 304, enabling the image processing module in the control chip to process digital images, facilitating the user to detect semiconductor defects based on the processed images.
[0078] Here, the above analog-to-digital conversion module 305 may include the above fourth interface, and the analog-to-digital conversion module 305 may be connected to the above analog-to-digital conversion chip 304 through the fourth interface.
[0079] In some embodiments, as Figure 3 shown, the above control chip 101 may further include a Direct Memory Access (DMA) module 306. The first end of the above memory access module is connected to the above image processing module 301, and the second end of the DMA module 306 may be connected to the MIG module 303.
[0080] The above DMA module 306 may obtain the processed image from the image processing module 301 and send the processed image to the MIG module 303, so that the above MIG module 303 may store the above processed image in the first storage chip 302.
[0081] In the embodiments of the present application, by setting the DMA module to realize the transmission of the processed image from the image processing module to the MIG module, it is possible to achieve efficient and large-scale data movement without the intervention of the central processing unit (CPU).
[0082] In some embodiments, as Figure 4 shown, the embodiments of the present application provide a scanning control method. The above method is applied to a scanning control device. The device includes a control chip, a first chip, and a storage chip. The control chip is connected to both the first chip and the storage chip. The method may include the following steps S410 - S430:
[0083] S410: Generate scanning waveform parameters based on scanning parameters through the first chip.
[0084] S420: Receive the scanning waveform parameters sent by the control chip through the storage chip and store the scanning waveform parameters. The scanning waveform parameters are the parameters sent by the first chip to the control chip;
[0085] S430: The control chip receives a first signal sent by the storage chip after the storage chip finishes storing the scanning waveform parameters, obtains the scanning waveform parameters from the storage chip according to the first signal, and outputs the scanning waveform parameters, where the scanning waveform parameters are used to indicate the generation of a scanning waveform.
[0086] In the implementation of this application, the first chip generates waveform scanning parameters based on scanning parameters, the control chip receives the waveform scanning parameters sent by the first chip, the storage chip stores the scanning waveform parameters, and when the control chip receives the first signal sent by the storage chip, it obtains the scanning waveform parameters from the storage chip and outputs the scanning waveform parameters. This can improve the generation efficiency of the generated scanning waveform parameters, and thus is conducive to improving the detection efficiency of semiconductors. And storing the scanning waveform parameters in the storage chip can solve the problem of insufficient storage space in the control chip and expand the storage space of the scanning control device.
[0087] In some embodiments, the control chip outputs scanning waveform parameters, including:
[0088] The control chip generates a waveform scanning timing sequence and outputs the scanning waveform parameters based on the waveform scanning timing sequence, where the waveform scanning timing sequence is used to control the transmission frequency.
[0089] In some embodiments, when the first chip generates scanning waveform parameters based on scanning parameters, the method further includes: the soft core in the control chip obtains image parameters and generates scanning parameters based on the image parameters.
[0090] In some embodiments, the control chip sends the scanning waveform parameters to the storage chip, including:
[0091] The control chip sends the scanning waveform parameters to the storage chip through the direct memory access module in the control chip;
[0092] When the control chip obtains the scanning waveform parameters from the storage chip in response to the first signal, it includes:
[0093] The direct memory access module in the control chip obtains the scanning waveform parameters from the storage chip in response to the first signal.
[0094] In some embodiments, the control chip sends the scanning waveform parameters to the storage chip through the direct memory access module in the control chip, including:
[0095] The direct memory access module sends the scanning waveform parameters to the storage chip through the first sub-module in the direct memory access module;
[0096] When the control chip obtains the scanning waveform parameters from the storage chip in response to the first signal through the direct memory access module in the control chip, it includes:
[0097] The second sub-module in the direct storage access module obtains the scanning waveform parameters from the storage chip in response to the first signal.
[0098] In some embodiments, the control chip receives the scanning waveform parameters sent by the first chip and sends the scanning waveform parameters to the storage chip, including:
[0099] The direct memory access module in the control chip obtains the scanning parameters, sends the scanning parameters to the first chip; and receives the scanning waveform parameters sent by the first chip, and sends the scanning waveform parameters to the direct storage access module.
[0100] In some embodiments, the scanning waveform parameters include digital scanning waveform parameters. After the control chip generates a control signal for generating a scanning waveform based on the scanning waveform parameters, the method may further include:
[0101] The digital-to-analog conversion chip is used to convert the digital scanning waveform parameters into analog scanning waveform parameters.
[0102] In some embodiments, after the control chip generates a control signal for generating a scanning waveform based on the scanning waveform parameters, the method may further include:
[0103] The control chip obtains the digital image of the semiconductor, calculates the average value of the gray values of multiple pixel points in the digital image, and replaces the gray values of multiple pixel points in the target area based on the average value to obtain a processed image.
[0104] In some embodiments, before the control chip obtains the digital image of the semiconductor, the method may further include:
[0105] The analog-to-digital conversion chip obtains the analog image of the semiconductor, and performs analog-to-digital conversion on the analog image to obtain a digital image.
[0106] The method of the above embodiments is applied to implement the corresponding scanning control device in any of the foregoing embodiments, and has the beneficial effects of the corresponding device embodiments, which will not be elaborated here.
[0107] The method of the above embodiments is a method for controlling the components in the above device based on the above device, and has the same beneficial effects as the device embodiments, which will not be elaborated here.
[0108] Based on the same inventive concept, the embodiments of the present application further provide a semiconductor detection device.
[0109] In some embodiments, as Figure 5 shown, the embodiments of the present application provide a semiconductor detection device, and the above semiconductor detection device may include:
[0110] The charged particle beam emission module 501 and the aforementioned scanning control device 100;
[0111] The scanning control device 100 is configured to send a control signal of a scanning waveform to the charged particle beam emission module, wherein the control signal carries scanning waveform parameters.
[0112] The charged particle beam emission module 501 is configured to generate a scanning waveform of the charged particle beam in response to the scanning waveform parameters.
[0113] By providing a semiconductor detection device including the above-mentioned charged particle beam emission module and the scanning control device in the embodiments of the present application, the generation efficiency of the scanning waveform parameters can be improved.
[0114] In some examples, the above semiconductor detection device may be a SEM device.
[0115] Here, as Figure 4 shown, the semiconductor detection device can generate scanning waveform parameters through the above scanning control device 100. By including the charged particle beam emission module 501, in response to the control signal sent by the scanning control device, a charged particle beam is emitted to the semiconductor 503. The charged particle beam reflected by the semiconductor 503 in the cavity 504 is collected by the collection module 502 to generate an analog image. Then, based on the above scanning control device, the analog image can be processed and stored to obtain a processed image, which is convenient for the user to detect semiconductor defects based on the processed image later.
[0116] Figure 6 Schematic diagram of the hardware structure of an electronic device provided by an embodiment of the application.
[0117] The electronic device 600 may include a processor 601 and a memory 602 storing computer program instructions.
[0118] Specifically, the above processor 601 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application.
[0119] The memory 602 may include a mass memory for data or instructions. By way of example and not limitation, the memory 602 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive, or a combination of two or more of these. In a suitable case, the memory 602 may include removable or non-removable (or fixed) media. In a suitable case, the memory 602 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 602 is a non-volatile solid-state memory.
[0120] In a specific embodiment, the memory 602 includes a read-only memory (ROM). In a suitable case, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or a flash memory, or a combination of two or more of these.
[0121] The memory may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage media device, an optical storage media device, a flash memory device, an electrical, optical, or other physical / tangible memory storage device. Thus, generally, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to the first aspect of the present application.
[0122] The processor 601 realizes any one of the methods of generating waveforms in the above embodiments by reading and executing the computer program instructions stored in the memory 602.
[0123] In one example, the electronic device may further include a communication interface 603 and a bus 604. Among them, as Figure 6 , the processor 601, the memory 602, and the communication interface 603 are connected through the bus 604 to complete communication with each other.
[0124] The communication interface 603 is mainly used to implement communication between various modules, devices, units, and / or devices in the embodiments of the present application.
[0125] The bus 604 includes hardware, software, or both, and couples the components of the online data flow metering device to each other. By way of example and not limitation, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand interconnect, a Low Pin Count (LPC) bus, a memory bus, a MicroChannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or a combination of two or more of these. Where appropriate, the bus 604 may include one or more buses. Although the embodiments of the present application describe and illustrate specific buses, the present application contemplates any suitable bus or interconnect.
[0126] The electronic device of the above embodiment is used to implement the corresponding waveform generation method in any of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be elaborated herein.
[0127] In addition, in combination with the waveform generation method in the above embodiments, the embodiments of the present application can be implemented by providing a computer storage medium. Computer program instructions are stored on the computer storage medium; when the computer program instructions are executed by a processor, any one of the waveform generation methods in the above embodiments is implemented.
[0128] In addition, in combination with the waveform generation method in the above embodiments, the embodiments of the present application can be implemented by providing a computer program product. When the instructions of the computer program product are executed by the processor of the electronic device, any one of the waveform generation methods in the above embodiments is implemented.
[0129] Those of ordinary skill in the art should understand that: the discussion of any of the above embodiments is only exemplary and is not intended to imply that the scope of the present application (including the claims) is limited to these examples; under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of brevity.
[0130] The functional blocks shown in the above-described structural block diagrams can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application-specific integrated circuit (ASIC), appropriate firmware, a plug-in, a functional card, and so on. When implemented in software, the elements of the present application are programs or code segments for performing the required tasks. The program or code segment can be stored in a machine-readable medium or transmitted via a data signal carried in a carrier wave over a transmission medium or a communication link. A "machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROMs, flash memories, erasable ROMs (EROMs), floppy disks, CD-ROMs, optical discs, hard disks, fiber optic media, radio frequency (RF) links, and so on. The code segment can be downloaded via a computer network such as the Internet, an intranet, and so on.
[0131] It should also be noted that in the exemplary embodiments mentioned in the present application, some methods or devices are described based on a series of steps or devices. However, the present application is not limited to the order of the above steps, that is, the steps can be executed in the order mentioned in the embodiments, can be different from the order in the embodiments, or several steps can be executed simultaneously.
[0132] Aspects of the present application have been described above with reference to the flowcharts and / or block diagrams of methods, apparatuses (devices), and computer program products according to embodiments of the present application. It should be understood that each block in the flowcharts and / or block diagrams, and the combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing devices to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing devices enable the implementation of the functions / actions specified in one or more blocks of the flowcharts and / or block diagrams. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field-programmable logic circuit. It can also be understood that each block in the block diagrams and / or flowcharts, and the combinations of blocks in the block diagrams and / or flowcharts, can also be implemented by dedicated hardware for performing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.
[0133] As described above, this is only the specific implementation manner of the present application. Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the devices, modules, and units described above can refer to the corresponding processes in the foregoing method embodiments, and will not be elaborated herein. It should be understood that the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present application.
Claims
1. A scanning control device, characterized in that: include: A first chip, a control chip and a storage chip, wherein the control chip is connected to the first chip and the storage chip; The first chip is used to generate scanning waveform parameters based on scanning parameters; The storage chip is used to receive the scanning waveform parameters sent by the first chip through the control chip, and store the scanning waveform parameters; The control chip is used to receive a first signal sent by the storage chip after the scanning waveform parameters are stored, obtain the scanning waveform parameters from the storage chip according to the first signal, and output the scanning waveform parameters, wherein the scanning waveform parameters are used to indicate the generation of a scanning waveform.
2. The scanning control device according to claim 1, characterized in that: The control chip outputs scanning waveform parameters, including: The control chip generates a waveform scanning timing, and outputs scanning waveform parameters based on the waveform scanning timing.
3. The scanning control device according to claim 1, characterized in that: The control chip includes a soft core, and the soft core is used to obtain image parameters before the first chip is used to generate scanning waveform parameters based on scanning parameters, and to generate the scanning parameters based on the image parameters.
4. The scanning control device according to claim 1, characterized in that: The control chip comprises a direct storage access module, which is connected to the storage chip and is used to send the scanning waveform parameters to the storage chip and obtain the scanning waveform parameters from the storage chip.
5. The scanning control device according to claim 4, characterized in that: The direct storage access module includes a first submodule and a second submodule, and the first submodule and the second submodule are both connected to the storage chip; The first submodule is used to send the scanning waveform parameters to the storage chip; The second submodule is used to obtain the scanning waveform parameters from the storage chip.
6. The scanning control device according to claim 4, characterized in that: The control chip also includes a direct memory access module, which is used to obtain scanning parameters and send the scanning parameters to the first chip; and receive the scanning waveform parameters sent by the first chip, and send the scanning waveform parameters to the direct memory access module.
7. The scanning control device according to claim 1, characterized in that: The scanning waveform parameters include digital scanning waveform parameters, and the device further includes a digital-to-analog conversion chip, and the digital-to-analog conversion chip is connected to the control chip; The digital-to-analog conversion chip is used to convert the digital scanning waveform parameters into analog scanning waveform parameters.
8. The scanning control device according to claim 1, characterized in that: The control chip is also used to acquire a digital image of the semiconductor, and to average the grayscale values of multiple pixels in a target area in the digital image, and to replace the grayscale values of the multiple pixels in the target area based on the average value to obtain a processed image.
9. The scanning control device according to claim 8, characterized in that: The scanning control device also includes an analog-to-digital conversion chip, which is connected to the control chip. The analog-to-digital conversion chip is used to obtain an analog image of the semiconductor and perform analog-to-digital conversion on the analog image to obtain the digital image.
10. A semiconductor testing device, characterized in that: include: A charged particle beam emission module and a scanning control device as claimed in any one of claims 1 to 9; The scanning control device is used to send scanning waveform parameters to the charged particle beam emission module; The charged particle beam emission module is used to generate a scanning waveform of the charged particle beam in response to the scanning waveform parameters.