Method for correcting photoetching simulation dead pixel

Abstract

The invention provides a method for correcting photoetching simulation dead pixels. The correction method comprises the following steps: providing a first mask layout, and obtaining simulation dead pixels in the first mask layout and positions of dead pixel areas where the simulation dead pixels are located; obtaining a design layout corresponding to the dead pixel area as a target graph, and correcting the boundary of the target graph to obtain a virtual graph; performing optical proximity correction on the virtual graph to obtain a corrected graph; and performing photoetching analogue simulation on the corrected pattern, and judging whether a simulation dead pixel exists or not based on an evaluation function, wherein parameters of the evaluation function comprise an edge placement error and key size change. In this way, the convergence speed of the simulation dead pixels can be increased, the restoration accuracy of the simulation dead pixels can be guaranteed, and the overall efficiency of optical proximity correction is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a method for correcting defective points in lithography simulation. Background Art

[0002] In the field of semiconductor technology, the Optical Proximity Effect (OPE) refers to the phenomenon that the patterns on the mask are distorted due to the diffraction and interference of light. This distortion will cause problems such as line width deviation and pattern distortion. In the process of integrated circuit manufacturing, due to the increasingly small design size of the chip, the influence of the optical proximity effect on the pattern transfer accuracy of the integrated circuit is becoming increasingly significant.

[0003] In order to overcome the optical proximity effect, the Optical Proximity Correction (OPC) technology has emerged. Traditional optical proximity correction methods are mainly based on rules or models, and the patterns on the mask are corrected through preset rules or models to compensate for the pattern distortion caused by the optical proximity effect. Moreover, in order to prevent the patterns designed on the chip from being disconnected or short-circuited, the correction is usually carried out according to the Mask Rule Constraints (MRC). However, in the actual production and manufacturing process, the optical proximity correction cannot achieve perfect correction, resulting in some defective points still existing in the layout after optical proximity correction, thereby affecting the correction accuracy of the entire optical proximity correction. Summary of the Invention

[0004] The present invention provides a method for correcting defective points in lithography simulation, which can improve the convergence speed of the simulated defective points, contribute to ensuring the repair accuracy of the simulated defective points, and improve the overall efficiency of optical proximity correction.

[0005] To achieve the above object, the method for correcting defective points in lithography simulation provided by the present invention includes: Step 1, providing a first mask layout, obtaining the simulated defective points in the first mask layout and the positions of the defective regions where the simulated defective points are located; Step 2, obtaining the corresponding design layout of the defective region as a target pattern, and correcting the boundary of the target pattern to obtain a virtual pattern; Step 3, performing optical proximity correction on the virtual pattern to obtain a corrected pattern of the virtual pattern; and Step 4, performing lithography simulation on the corrected pattern and judging whether there are simulated defective points based on an evaluation function, wherein the parameters of the evaluation function include edge placement error and critical dimension change.

[0006] Optionally, in Step 1, the simulated defective points in the first mask layout are obtained through optical proximity correction simulation.

[0007] Optionally, the method for correcting the boundary of the target pattern to obtain a virtual pattern includes: moving the short side of the target pattern away from the target pattern by a first set distance, and moving the long side of the target pattern towards the target pattern by a second set distance, where the length of the short side is less than the length of the long side.

[0008] Optionally, the short side and the long side of the target pattern are defined based on the minimum dimension of the entire design layout corresponding to the first mask layout.

[0009] Optionally, the minimum dimension of the entire design layout is T0, the short side is less than or equal to a set value T1, the long side is greater than the set value T1, T1 = λT0, and λ is greater than or equal to 1.35 and less than or equal to 1.5.

[0010] Optionally, both the first set distance and the second set distance are greater than or equal to 0.5 nm and less than or equal to 60 nm.

[0011] Optionally, step three includes: performing optical proximity correction on the virtual pattern to obtain a corrected pattern of the virtual pattern, and using the corrected pattern to correct the first mask layout to obtain a second mask layout including the corrected pattern;

[0012] Step four includes: performing lithography simulation on the second mask layout, and determining whether there are simulation bad points based on the evaluation function.

[0013] Optionally, the method for determining whether there are simulation bad points based on the evaluation function includes: if the evaluation value given by the evaluation function is greater than the set threshold, it is determined that there are simulation bad points; if the evaluation value given by the evaluation function is less than or equal to the set threshold, it is determined that there are no simulation bad points.

[0014] Optionally, after determining whether there are simulation bad points based on the evaluation function, if it is determined that there are no simulation bad points, the final mask layout is output; if it is still determined that there are simulation bad points, steps two to four are repeated until it is determined that there are no simulation bad points. Among them, when repeating step two, the boundary of the target pattern is moved with a set distance different from the previous time to obtain a virtual pattern different from the previous time.

[0015] Optionally, the evaluation function , where the critical dimension variation CDV = CD sim -CD target , CD sim is the simulated critical dimension of the virtual pattern, CD target is the critical dimension of the target pattern corresponding to the virtual pattern; the edge placement error EPE = ∫ edge |Contoursim (x)-Contour ideal (x)|dx, Contour sim is the simulated contour value of the virtual pattern, Contour ideal is the contour value of the target pattern corresponding to the virtual pattern; is the weight of CDV in the evaluation function, is the weight of EPE in the evaluation function.

[0016] The method for correcting lithography simulation bad points provided by the present invention includes: Step 1, providing a first mask layout, obtaining the simulation bad points in the first mask layout and the positions of the bad point regions where the simulation bad points are located; Step 2, obtaining the design layout corresponding to the bad point region as the target pattern, and correcting the boundary of the target pattern to obtain a virtual pattern; Step 3, performing optical proximity correction on the virtual pattern to obtain a corrected pattern of the virtual pattern, performing lithography simulation on the corrected pattern, and judging whether there are simulation bad points based on an evaluation function, where the parameters of the evaluation function include edge placement error and critical dimension variation. By correcting the boundary of the target pattern to obtain a virtual pattern and then performing optical proximity correction and lithography simulation, the convergence speed of the simulation bad points can be improved, and using both the edge placement error and the critical dimension variation as the parameters of the evaluation function is beneficial to ensuring the repair accuracy of the simulation bad points, especially maintaining a high correction accuracy even in low nodes and improving the overall efficiency of optical proximity correction; in addition, feeding back the result of optical proximity correction to the layout design stage helps to prevent the existence of simulation bad points in the design stage. Description of the Drawings

[0017] Figure 1 is a flowchart of the method for correcting lithography simulation bad points provided by an embodiment of the present invention.

[0018] Figure 2 is a schematic diagram of the target pattern in the method for correcting lithography simulation bad points provided by an embodiment of the present invention.

[0019] Figure 3 is a schematic diagram of the target pattern and its corresponding virtual pattern in the method for correcting lithography simulation bad points provided by an embodiment of the present invention.

[0020] Description of the Reference Numerals: 10 - target pattern; 11 - virtual pattern. Detailed Embodiments

[0021] In traditional optical proximity correction methods, the edges of the target pattern are usually cut into small segments. By moving the segment positions and performing model simulations, the edge placement error (EPE) between the current simulated pattern and the designed pattern is obtained to calculate the segment movement positions for the next iteration. Eventually, after multiple iterations, the simulated pattern and the designed pattern are made as close as possible. The new pattern obtained after moving each segment is the OPC correction result, which is used for subsequent mask making. However, as the pattern pitch continues to shrink, using traditional optical proximity correction methods may result in the situation where the OPC results cannot converge effectively. For example, in areas where lines are concentrated, the simulation results are prone to non-convergence, that is, simulation bad points are likely to appear at the line concentration points (i.e., areas where parameters such as the pitch and shape of the lines do not meet the engineering execution requirements or the designed layout).

[0022] To solve the above problems, the present invention provides a method for correcting simulation bad points in lithography.

[0023] The following further details the method for correcting simulation bad points in lithography proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the drawings are all in very simplified forms and use non-precise scales, only for the purpose of facilitating and clearly assisting in explaining the objectives of the embodiments of the present invention.

[0024] In the description of the present application, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, "a plurality of" means two or more, and "at least one" may mean one, two, or more, unless otherwise specifically defined.

[0025] Figure 1 It is a flowchart of the method for correcting simulation bad points in lithography provided by an embodiment of the present invention. Refer to Figure 1 As shown, the method for correcting simulation bad points in lithography provided by an embodiment of the present application includes:

[0026] Step 1: Provide a first mask layout, and obtain the simulation bad points in the first mask layout and the positions of the bad point regions where the simulation bad points are located;

[0027] Step 2: Obtain the designed layout corresponding to the bad point region as the target pattern, and correct the boundary of the target pattern to obtain a virtual pattern;

[0028] Step 3: Perform optical proximity correction on the virtual pattern to obtain a corrected pattern of the virtual pattern; and

[0029] Step 4: Perform photolithography simulation on the corrected pattern and determine whether there are simulation bad points based on the evaluation function, where the parameters of the evaluation function include edge placement error and critical dimension variation.

[0030] It should be understood that although Figure 1 the steps in the flowchart are shown sequentially according to the arrows, these steps are not necessarily executed sequentially in the order indicated by the arrows. Unless otherwise clearly stated in this article, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 at least a part of the steps in

[0031] Specifically, in Step 1, simulation bad points in the obtained first mask layout can be detected through photolithography simulation such as optical proximity correction (OPC) simulation. For example, the positions where the simulation results in OPC simulation do not converge are defined as simulation bad points. For the sake of description, the area in the first mask layout where the simulation bad points are located is called the bad point area.

[0032] It should be noted that the first mask layout can be a layout after optical proximity correction or a layout without optical proximity correction. In Step 1, multiple simulation bad points of the first mask layout can be obtained, and each simulation bad point has a corresponding bad point area; taking the correction process of the next simulation bad point as an example for illustration, other simulation bad points can be corrected simultaneously in a similar manner during the correction process of this simulation bad point.

[0033] Execute Step 2: Obtain the design layout corresponding to the bad point area as the target pattern, and correct the boundary of the target pattern to obtain a virtual pattern.

[0034] Specifically, the overall design layout corresponding to the first mask layout can be obtained, and then the target pattern corresponding to the bad point area can be obtained from the overall design layout according to the position of the bad point area. The target pattern is a part of the overall design layout.

[0035] In this embodiment, the method of correcting the boundary of the target pattern to obtain a virtual pattern may include: moving the short side of the target pattern away from the target pattern (i.e., outward) by a first set distance, and moving the long side of the target pattern towards the target pattern (i.e., inward) by a second set distance, where the length of the short side is less than the length of the long side.

[0036] In this embodiment, the short side and long side of the target pattern can be defined based on the minimum size of the entire design layout corresponding to the first mask layout. Exemplarily, the minimum size of the entire design layout is T0, the short side is less than or equal to the set value T1, the long side is greater than the set value T1, T1 = λT0, λ is greater than or equal to 1.35 and less than or equal to 1.5, that is, λ can be taken between 1.35 and 1.5 according to actual conditions.

[0037] Figure 2 A schematic diagram of a target pattern in a method for correcting bad spots in lithography simulation provided by an embodiment of the present invention. Figure 3 A schematic diagram of a target pattern and its corresponding virtual pattern in a method for correcting bad spots in lithography simulation provided by an embodiment of the present invention.

[0038] For example, Figure 2 and Figure 3 As shown, the side of the target graphic 10 extending along the X direction is the short side, and the side extending along the Y direction is the long side. The short side of the target graphic 10 can be moved outward by a first set distance ΔL1 in a direction perpendicular to the short side (Y direction), and the long side of the target graphic 10 can be moved inward by a second set distance ΔL2 in a direction perpendicular to the long side (i.e., the X direction), thereby obtaining a virtual graphic 11 corresponding to the target graphic 10.

[0039] Exemplarily, the first set distance ΔL1 and the second set distance ΔL2 may be greater than or equal to 0.5 nm and less than or equal to 60 nm, but are not limited thereto. The specific values ​​of the first set distance ΔL1 and the second set distance ΔL2 may be determined according to the actual graphics. For example, the simulated bad pixels may be classified based on their graphic features and the surrounding area, and different pre-movement distances may be selected for different types of simulated bad pixels when correcting the target graphics, i.e., different types of simulated bad pixels correspond to different values ​​of ΔL1 and different values ​​of ΔL2.

[0040] It should be noted that MRC (Mask Rule Check) refers to a technology for checking the rules of mask patterns during semiconductor manufacturing; the main purpose of MRC is to ensure that the mask pattern complies with the manufacturing rules, thereby ensuring the accuracy and reliability of chip manufacturing. However, as the spacing between patterns continues to decrease, two adjacent target patterns are too close, and the spacing between the two target patterns is already smaller than the MRC setting value, which will prevent the fragment that was originally intended to move outward from moving normally due to the MRC restriction, resulting in a large difference between the simulated pattern after OPC correction and the target pattern, that is, the mask layout that has been corrected by optical proximity still has simulated bad pixels.

[0041] In this application, the boundary of the target pattern is corrected to obtain a virtual pattern. Since the virtual pattern obtained by correction may meet the MRC limit, subsequent optical proximity correction and lithography simulation are performed on the virtual pattern, which helps to avoid the problem that the accuracy of the optical proximity correction result is affected due to the target pattern not meeting the MRC limit, and thus can improve the convergence speed of some simulation bad points caused by MRC.

[0042] Execute Step 3 to perform optical proximity correction on the virtual pattern to obtain a corrected pattern of the virtual pattern.

[0043] Specifically, when performing optical proximity correction on the virtual pattern, the virtual pattern can be segmented, divided into multiple segments, and then optical proximity correction is performed on the patterns of the multiple segments to obtain the corrected pattern.

[0044] Execute Step 4 to perform lithography simulation on the corrected pattern and determine whether there are simulation bad points based on the evaluation function, where the parameters of the evaluation function include edge placement error and critical dimension variation.

[0045] In an embodiment of this application, lithography simulation can be directly performed on the corrected pattern corresponding to the virtual pattern. In this way, the data volume of the lithography simulation is small, which helps to shorten the correction time of the simulation bad points.

[0046] In another embodiment of this application, optical proximity correction is performed on the virtual pattern to obtain a corrected pattern of the virtual pattern, then the first mask layout is corrected using the corrected pattern to obtain a second mask layout including the corrected pattern, and then lithography simulation is performed on the second mask layout, and it is determined whether there are simulation bad points based on the evaluation function. In this way, lithography simulation and inspection are performed on the entire layout of the second mask layout, which helps to ensure the correction quality and accuracy of the simulation bad points of the entire layout.

[0047] In this application, the parameters of the evaluation function include edge placement error and critical dimension variation, which helps to ensure the repair accuracy of the simulation bad points. Especially in low nodes, a high correction accuracy can still be maintained, improving the overall efficiency of optical proximity correction.

[0048] Exemplarily, the evaluation function , where the critical dimension variation CDV = CD sim -CD target , CD sim is the simulated critical dimension of the virtual pattern, and CD target is the critical dimension of the target pattern corresponding to the virtual pattern; the edge placement error EPE = ∫ edge |Contour sim (x)-Contour ideal (x)|dx, Contour simis the simulated contour value of the virtual pattern, Contour ideal is the contour value of the target pattern corresponding to the virtual pattern; is the weight of CDV in the evaluation function, is the weight of EPE in the evaluation function. Among them, the evaluation function can be constructed by a weighted multi-objective function.

[0049] In this embodiment, the method for judging whether there are simulation bad points based on the evaluation function may include: if the evaluation value given by the evaluation function is greater than the set threshold, it is judged that there are simulation bad points; if the evaluation value given by the evaluation function is less than or equal to the set threshold, it is judged that there are no simulation bad points. Among them, the set threshold can be set according to the actual situation.

[0050] In this embodiment, after judging whether there are simulation bad points based on the evaluation function, if it is judged that there are no simulation bad points, the final mask layout is output; if it is still judged that there are simulation bad points, steps two and four are repeated until it is judged that there are no simulation bad points.

[0051] Specifically, if it is still judged that there are simulation bad points, when repeating step two, the boundary of the target pattern is moved at a set distance different from the previous one (that is, the value of at least one of ΔL1 and ΔL2 is different from the previous one) to correct the target pattern, and then a virtual pattern different from the previous one is obtained. Exemplarily, the value of the set distance for the next time can be adjusted based on the value of the set distance for the previous time.

[0052] If it is judged that there are no simulation bad points, the final mask layout is output based on the final corrected pattern corresponding to the final virtual pattern.

[0053] The method for correcting simulation bad points in lithography simulation provided by the present invention includes: Step one, providing a first mask layout, obtaining the simulation bad points in the first mask layout and the positions of the bad point regions where the simulation bad points are located; Step two, obtaining the design layout corresponding to the bad point region as the target pattern, and correcting the boundary of the target pattern to obtain a virtual pattern; Step three, performing optical proximity correction on the virtual pattern to obtain a corrected pattern of the virtual pattern, performing lithography simulation on the corrected pattern, and judging whether there are simulation bad points based on an evaluation function, where the parameters of the evaluation function include edge placement error and critical dimension change. In this way, after correcting the boundary of the target pattern to obtain a virtual pattern and then performing optical proximity correction and lithography simulation, the convergence speed of simulation bad points can be improved, and using both edge placement error and critical dimension change as the parameters of the evaluation function is beneficial to ensuring the repair accuracy of simulation bad points, especially maintaining a high correction accuracy even in low nodes and improving the overall efficiency of optical proximity correction; in addition, feeding back the result of optical proximity correction to the layout design stage helps to prevent the existence of simulation bad points in the design stage.

[0054] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the rights of the present invention in any way. Any person skilled in the art can make possible changes and modifications to the technical solution of the present invention by using the methods and technical content disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A method for correcting bad spots in lithography simulation, characterized in that: include: Step 1, providing a first mask layout, obtaining a simulated bad point in the first mask layout and a position of a bad point area where the simulated bad point is located; Step 2, obtaining a design layout corresponding to the bad pixel area as a target pattern, and correcting the boundary of the target pattern to obtain a virtual pattern; Step 3, performing optical proximity correction on the virtual pattern to obtain a corrected pattern of the virtual pattern; as well as Step 4: Perform photolithography simulation on the corrected pattern and determine whether there are simulated bad spots based on an evaluation function, wherein the parameters of the evaluation function include edge placement error and key dimension variation.

2. The method for correcting bad spots in lithography simulation according to claim 1, characterized in that: In the step 1, the simulated bad pixels in the first mask layout are obtained through optical proximity correction simulation.

3. The method for correcting bad spots in lithography simulation according to claim 1, characterized in that: The method for correcting the boundary of the target figure to obtain a virtual figure includes: moving the short side of the target figure away from the target figure by a first set distance, and moving the long side of the target figure toward the target figure by a second set distance, wherein the length of the short side is less than the length of the long side.

4. The method for correcting bad spots in lithography simulation as claimed in claim 3, characterized in that: The short side and the long side of the target pattern are defined based on the minimum size of the entire design layout corresponding to the first mask layout.

5. The method for correcting bad spots in lithography simulation as claimed in claim 4, characterized in that: The minimum size of the entire design layout is T0, the short side is less than or equal to the set value T1, the long side is greater than the set value T1, T1=λT0, λ is greater than or equal to 1.35 and less than or equal to 1.

5.

6. The method for correcting bad spots in lithography simulation as claimed in claim 3, characterized in that: The first set distance and the second set distance are both greater than or equal to 0.5 nm and less than or equal to 60 nm.

7. The method for correcting bad spots in lithography simulation according to claim 1, characterized in that: The step three includes: performing optical proximity correction on the virtual pattern to obtain a corrected pattern of the virtual pattern, and using the corrected pattern to correct the first mask pattern to obtain a second mask pattern including the corrected pattern; The step four includes: performing photolithography simulation on the second mask layout, and judging whether there are simulated bad spots based on the evaluation function.

8. The method for correcting bad spots in lithography simulation as claimed in claim 1, characterized in that: The method for judging whether there are simulated bad pixels based on the evaluation function includes: if the evaluation value given by the evaluation function is greater than a set threshold, judging that there are simulated bad pixels; if the evaluation value given by the evaluation function is less than or equal to the set threshold, judging that there are no simulated bad pixels.

9. The method for correcting bad spots in lithography simulation according to claim 1, characterized in that: After determining whether there are simulated bad pixels based on the evaluation function, if it is determined that there are no simulated bad pixels, the final mask layout is output; if it is determined that there are still simulated bad pixels, steps 2 to 4 are repeated until it is determined that there are no simulated bad pixels, wherein when step 2 is repeated, the boundary of the target graphic is moved by a set distance different from the last time to obtain a virtual graphic different from the last time.

10. The method for correcting bad spots in lithography simulation according to any one of claims 1 to 9, characterized in that: The evaluation function Cost = ω1 × CDV + ω2 × EPE, where the critical dimension variation CDV = CD sim -CD target , CD sim is the simulated critical size of the virtual graphic, CD target is the critical size of the target graphic corresponding to the virtual graphic; edge placement error EPE = ∫ edge |Contour sim (x)-Contour ideal (x)|dx,Contour sim is the simulated contour value of the virtual graph, Contour ideal is the contour value of the target graphic corresponding to the virtual graphic; ω1 is the weight of CDV in the evaluation function, and ω2 is the weight of EPE in the evaluation function.

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