PRP storage method in SSD controller based on NVMe protocol
By using PRP tag FIFO and PRP tag RAM to manage PRP entry information in the SSD controller, the problems of PRP entry storage space and DDR access latency are solved, and an efficient SSD controller design that supports out-of-order return is realized.
Patent Information
- Application Number
- CN202510243795.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-03
- Publication Date
- 2025-06-20
AI Technical Summary
In SSD controllers based on NVMe protocol, the prior art is difficult to effectively solve the large space required for PRP entry storage and the larger latency problems caused by DDR access, and it also needs to support out-of-order return of read commands.
By using PRP tag FIFO and PRP tag RAM linked list in the SSD controller, the dynamic application and release of PRP entry is realized, the out-of-order return is supported, and the PRP entry is stored in the SRAM to reduce DDR access latency.
This method can effectively avoid the large space required by the SSD controller to store all PRP entry, reduce the latency problem caused by DDR access, and support out-of-order return of read commands, improving the efficiency and scalability of the SSD controller.
Smart Images
Figure CN120179166A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer technologies, and more particularly to a PRP storage method in an SSD controller based on the NVMe protocol. Background Art
[0002] In an SSD controller based on the NVMe protocol, an NVMe IO command can be split into several data blocks of a fixed size. The master address corresponding to the data block is expressed by a PRP entry. Only after obtaining the PRP entry can the DMA corresponding to the data block operate. When all the PRP entries of an IO command are obtained and consumed, the IO command can be successfully executed.
[0003] The size of each IO command is not fixed, and the maximum size is determined by the SSD controller (MDTS). A command with a larger size requires more PRP entries to express (the size of one PRP entry is determined by the host page size, generally 4KB).
[0004] The ways of storing PRP entries are generally divided into two types. One is to retrieve all the PRP entries and store them in SRAM or DDR. When the number of commands supported by the system is large, the space required for PRP entries is very large, and SRAM is difficult to bear. If stored in DDR, the access latency is large. The other is to read only part of the PRP entries for each command and store them in SRAM, reading and consuming them simultaneously. However, this solution will greatly affect the read command efficiency because it does not support out-of-order return. Summary of the Invention
[0005] The purpose of the present invention is to provide a PRP storage method in an SSD controller based on the NVMe protocol, which can not only avoid the large space required for storing all PRP entries in the SSD controller, but also avoid the large latency problem introduced by storing PRP in DDR, and at the same time support out-of-order return of read commands.
[0006] A PRP storage method in an SSD controller based on the NVMe protocol includes the following steps:
[0007] 1) Step of reading a command from the host;
[0008] 2) Step of reading a PRP entry from the host. After the controller reads the command from the host, the command is split, and an operation of applying for a PRP tag is performed;
[0009] 3) Operation step of the PRP tag FIFO, that is, managing the PRP tag resources.
[0010] 4) Operation steps of the PRP tag RAM, storing and reading PRP entry information or SGL information;
[0011] 5) Steps of the command DMA, i.e., steps of using the PRP entry information.
[0012] As a further improvement and supplement to the above solution, the present invention further includes the following additional technical features:
[0013] In the above step 3), the PRP tag arranges the PRP information in the form of a PRP linked list as an index, and the PRP tag is used as an overall resource shared by all commands.
[0014] In the step of reading the command, the command is split into several frames, each frame will carry the applied first PRP tag, one frame corresponds to one or more PRP tags, and when the frame is executed, all PRP entry information corresponding to the frame is queried through the first PRP tag.
[0015] In the step of the PRP tag FIFO, the operation of the PRP tag resource is divided into PRP tag application and PRP tag release, and the application and release of the PRP tag are a dynamic process.
[0016] In the above step 4), the PRP tag RAM stores the PRP entry or SGL entry and affiliated information in the form of a linked list.
[0017] The PRP tag FIFO manages the PRP tag resource, including the initialization, application and release processes.
[0018] In the above step 4), the content of the PRP tag RAM includes the PRP address, PRP length, valid, lastflag and next PRP tag, and the PRP tag RAM uses the PRP tag as an index.
[0019] Using the present invention can achieve the following beneficial effects:
[0020] 1. Compared with the sequential storage of PRP entries, the PRP entries recorded in the form of a linked list naturally support out-of-order execution. It abandons the huge space waste caused by flat storage. And it can be extended to SGL without increasing space. It enables the sharing of SGL entry and PRP entry resources.
[0021] 2. Compared with the flat storage of PRP entry, due to the space compression of PRP tag resources, it can be easily implemented using SRAM, and the large latency problem caused by DDR access can be avoided.
[0022] 3. The command is split into several frames, and one frame corresponds to one or more PRP tags. All required PRP entries can be indexed according to the FirstPRPtag. The implementation is very simple.
[0023] 4. The management of the entire PRP tag resource does not require FW scheduling.
[0024] 5. It can be directly extended to SGL without any modification. Brief Description of the Drawings
[0025] Figure 1 is a schematic structural diagram of the present invention.
[0026] Figure 2 is a schematic structural diagram of the arrangement of PRP information in a linked list manner in the present invention.
[0027] Figure 3 is a comparison diagram of two methods for the allocation of PRP entry and PRP resource pool in the present invention.
[0028] Figure 4 is a schematic structural diagram of the operation of PRP tag resources in the present invention.
[0029] Figure 5 is a schematic structural diagram of the command split into 32 frames of 4K in the present invention. Detailed Embodiment
[0030] The following describes the detailed embodiment of the present invention with reference to the accompanying drawings.
[0031] First, the terms related to the embodiments of the present application are explained.
[0032] SSD is a large-capacity data storage device composed of NAND Flash chips and SSD controller chips.
[0033] The SSD controller, also known as the main control chip or main controller, is one of the key components of the SSD, a dedicated chip with built-in firmware, used to manage NAND Flash.
[0034] DDR (Double Data Rate) is a volatile data storage device, used to store data or code in the SSD system.
[0035] Such as Figures 1-5As shown in the figure, the present invention is a PRP storage method in an SSD controller based on the NVMe protocol.
[0036] The PRP storage method in the SSD controller based on the NVMe protocol described in this embodiment includes the following steps:
[0037] 1) The step of reading a command from the host;
[0038] 2) The step of reading a PRP entry from the host. After the controller reads a command from the host, the command is split, and an operation of applying for a PRP tag is performed;
[0039] 3) The operation steps of the PRP tag FIFO, that is, managing the PRP tag resources;
[0040] 4) The operation steps of the PRP tag RAM, storing and reading PRP entry information or SGL information;
[0041] 5) The step of command DMA, that is, the step of using the PRP entry information.
[0042] As Figure 1 shown, after obtaining a command from the host, the command is split into several frames (the frame size is configurable, generally 4KB, and each frame is assigned a frame ID). Each frame reads a PRP entry from the host in sequence, applies for a PRP tag, and updates the PRP entry information to the PRP tag RAM according to whether the PRP is aligned. At the same time, the valid first PRP tag of each frame needs to be updated to a table based on the frame ID. When it is queried that the first PRP tag corresponding to the frame ID is valid, read the first PRP tag corresponding to the frame and carry this information to the DMA module. Finally, the DMA module reads all the PRP entry information corresponding to the frame in sequence according to the first PRP tag, and completes the DMA operation according to the PRP entry information. After the DMA operation is completed, the corresponding PRP tag is released.
[0043] Furthermore, in the step 3) as Figure 2 shown, the PRP information is arranged in the form of a PRP linked list with the PRP tag as an index, and the PRP tag is used as an overall resource and shared by all commands.
[0044] The PRP tag is shared as an overall resource for all commands, avoiding the allocation of fixed PRP entry storage space for each command. Taking a system that supports 512 commands as an example, compared with allocating fixed PRP entry storage space for one command, the PRP tag resources are arranged as Figure 3 shown.
[0045] Compared with the way of fixed allocation of PRP entry, using the PRP tag resource pool method to manage PRP will greatly save space (from 1MB to 24KB). In this structure, the PRP entry does not need to be stored in the DDR and can be directly stored in the memory SRAM. The actual supported size of the command can be expanded arbitrarily without limitation. In addition, this design can also be seamlessly extended to SGL without the need to separately allocate SGL entry storage space.
[0046] Further, in the step of reading the command, the command is split into several frames, and each frame will carry the applied first PRP tag. One frame corresponds to one or more PRP tags. When the frame is executed, all PRP entry information corresponding to the frame is queried through the first PRP tag.
[0047] This embodiment describes the specific implementation details of this design with a 128K NVMe read command. This read command is split into 32 4K frames, and one frame is expressed by one or two PRP entries (it is necessary to consider whether the PRP entry is 4K aligned, and several may be required for SGL). The specific splitting of this command is as Figure 5 shown.
[0048] Assume the number of PRP tags is 2048. The design implementation is divided into PRP tag FIFO and PRP tag RAM, and their specifications are as follows.
[0049]
[0050] The depth of the PRP tag FIFO is the same as the number of PRP tags. Its operations are as follows.
[0051]
[0052] The PRP tag FIFO will never be full-written.
[0053] Further, in the step of the PRP tag FIFO, as Figure 4As shown, the operations of the PRPtag resource are divided into PRPtag application and PRP tag release, and the application and release of the PRP tag are a dynamic process.
[0054] The controller reads commands from the host and splits the commands into several frames. At the same time, the controller reads PRP entries from the host to perform the application operation of the PRP tag. Each frame will carry the first PRPtag applied. When the frame is executed, all PRP entry information corresponding to the frame is queried through the firstPRPtag. After the frame is executed, the corresponding PRP tag can be released. The entire application and release of the PRP are a dynamic process and do not require FW participation.
[0055] Furthermore, in step 4), the PRPtag RAM stores PRP entries or SGL entries and affiliated information in a linked list manner.
[0056] Furthermore, the PRP tag FIFO manages the PRP tag resources, including the initialization, application, and release processes.
[0057] The implementation of the PRP tag resource requires a PRP tag FIFO and a PRP tag RAM. The PRP tag FIFO manages the PRP tag resources, including the initialization, application, and release processes. The PRP tag RAM stores PRP entries (or SGL entries) in a linked list manner.
[0058] Even further, in step 4), the content of the PRP tag RAM includes the PRP address, PRP length, valid, last flag, and next PRP tag, and the PRP tag RAM uses the PRP tag index.
[0059]
[0060] The above is the preferred embodiment of the present invention, which does not limit the protection scope of the present invention. Any modifications and improvements made by those skilled in the art based on the design concept of the present invention should be regarded as within the protection scope of the present invention.
Claims
1. A PRP storage method in an SSD controller based on the NVMe protocol, characterized in that: The following steps are included: 1) Steps to read commands from the host; 2) The step of reading PRP entry from the host. After the controller reads the command from the host, it splits the command and applies for PRPtag; 3) Operation steps of PRP tag FIFO, i.e. management of PRP tag resources; 4) Operation steps of PRP tag RAM, storing and reading PRP entry information or SGL information; 5) The step of commanding DMA, i.e. the step of using PRP entry information.
2. The PRP storage method in the SSD controller based on the NVMe protocol according to claim 1, characterized in that: In the step 3), the PRP tag is used as an index to arrange the PRP information into a PRP linked list, and the PRP tag is used as an overall resource for all commands to share.
3. The PRP storage method in the SSD controller based on the NVMe protocol as claimed in claim 1, characterized in that: In the command reading step, the command is split into several frames, each frame will carry the applied first PRP tag, one frame corresponds to one or more PRP tags, and when the frame is executed, all PRP entry information corresponding to the frame is queried through the first PRP tag.
4. The PRP storage method in the SSD controller based on the NVMe protocol according to claim 1, characterized in that: In the steps of the PRP tag FIFO, the operation of the PRP tag resource is divided into PRP tag application and PRP tag release, and the application and release of the PRP tag is a dynamic process.
5. The PRP storage method in the SSD controller based on the NVMe protocol according to claim 2, characterized in that: In the step 4), the PRP tag RAM stores the PRP entry or SGL entry and the associated information in a linked list manner.
6. The PRP storage method in the SSD controller based on the NVMe protocol according to claim 1, characterized in that: The PRP tag FIFO manages PRP tag resources, including initialization, application and release processes.
7. The PRP storage method in the SSD controller based on the NVMe protocol according to claim 1, characterized in that: In the step 4), the PRP tag RAM content includes PRP address, PRP length, valid, last flag and next PRPtag, and the PRP tag RAM uses the PRP tag index.