Program flow tracking method and system for processor prototype verification

Abstract

The invention provides a program flow tracking method and system for processor prototype verification, and belongs to the technical field of computers.The method comprises the steps that a current program counter and a current program counter are obtained from a to-be-tested processor core according to a previous program counter, a previous instruction type signal value, a current program counter and a counter; judging whether the current program counter is continuous with the last program counter or not; the counter is used for recording the instruction length of the continuous instruction stream; if yes, enabling the counter to accumulate different values according to different beat instruction type signal values; if not, generating tuple data according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream and the value of the counter, and updating the counter to restart counting; the tuple data is used to restore the program instruction stream. According to the method, tracking of the program flow and identification of the abnormal discontinuous instruction flow can be completed only by analyzing the value of the program counter.

Description

Technical Field

[0001] The present invention belongs to the field of computer technology, and particularly relates to a program flow tracking method and system for processor prototype verification. Background Art

[0002] Processor verification is a very important part in the research and development of processors. Conducting detailed tests and verifications on the processor design before chip tape-out can ensure that the design's correctness and performance meet expectations. Prototype-based verification is a technology that uses programmable logic devices such as FPGAs (Field Programmable Gate Arrays) to simulate chip behavior. By carrying out co-development of software and hardware and performance verification in advance, it helps to reduce costs, shorten the chip's time to market, and discover and fix errors in the design before tape-out, thereby improving the accuracy and reliability of the chip design. However, due to limited internal resources in FPGAs, such as logic resources, memory resources, and the number of I / O pins, it restricts the number and depth of signals that can be observed simultaneously during the debugging process. For example, in a 10MHz verification platform, just observing a 64-bit program counter (PC) generates 80MB of data per second, which poses a huge challenge to the debugging output ports of the prototype verification platform.

[0003] Program flow tracking can help developers understand the behavior of a program, discover potential problems and performance bottlenecks by recording key information during program execution, such as function calls, instruction executions, etc. Program flow tracking is usually accomplished by recording changes in the program counter. To reduce the pressure and hardware overhead during the recording process, existing tracking tools usually monitor branch instructions, record whether the branch instructions jump, and then reverse-deduce the instruction stream based on the program information running on the system under test. Although this method can reduce the data generated during program flow tracking to a certain extent, this method is usually used in debugging software development. During processor design, there may be potential errors that cause incorrect instruction outflows, such as incorrect fetched instructions, incorrect read data, unreasonable exception triggers, or even incorrect program counter calculation logic design, etc. These situations will result in abnormal non-continuous program flows without branch instructions, and these errors often cannot be monitored by the above-mentioned tracking methods. Summary of the Invention

[0004] In view of this, in response to the debugging requirements in the processor prototype verification process, the present invention proposes a program flow tracking method and system for processor prototype verification, which solves the technical problem that existing tracking methods cannot monitor the instruction outflow errors caused by processor designs such as incorrect fetched instructions, incorrect read data, unreasonable exception triggering, and incorrect program counter calculation logic design. The present invention can complete the tracking of the program flow and the identification of abnormal discontinuous instruction flows only through the analysis of the program counter values.

[0005] In a first aspect, the present invention provides a program flow tracking method for processor prototype verification, the method comprising: Judging whether the current program counter is continuous with the previous program counter according to the previous-cycle program counter, previous-cycle instruction type signal value, current program counter, and counter obtained from the processor core under test; the counter is used to record the instruction length of the continuous instruction flow; When it is continuous, the counter accumulates different values according to different previous-cycle instruction type signal values; When it is not continuous, a tuple data item is generated according to the program counter value of the current continuous instruction flow, the program counter value of the previous continuous instruction flow, and the value of the counter, and at the same time, the counter is updated to restart counting; the tuple data is used to restore the program instruction flow.

[0006] Further, in the above program flow tracking method for processor prototype verification, the method for restoring the program instruction flow according to the tuple data includes: Reading the tuple type field of this tuple to judge whether this tuple is an offset tuple or a raw tuple; If it is a raw tuple, the program data field read of this tuple is the program counter of this tuple; If it is an offset tuple, the program data field read of this tuple is the offset data of this tuple, and the program counter data obtained or calculated from the previous tuple is added to the offset data of this tuple to obtain the program counter of this tuple.

[0007] Further, in the above program flow tracking method for processor prototype verification, the method for restoring the program instruction flow according to the tuple data further includes: Calculating the start address and end address of each continuous program flow according to the program counter of this tuple and the data of the instruction continuous length field of this tuple; Combining the disassembly file of the running program, intercepting all program addresses between the start address and end address of the continuous program flow, and splicing them in tuple order to determine the complete program flow.

[0008] In a second aspect, the present invention further provides a program flow tracking system for processor prototype verification. The system is a system-on-chip for prototype verification platform including a processor core under test, and a program flow tracking module including a counter, a continuous judgment module, and a tuple generation module is connected to the system-on-chip of the prototype verification platform; The continuous judgment module judges whether the current program counter is continuous with the previous program counter according to the previous program counter, the previous instruction type signal value, the current program counter, and the counter obtained from the processor core under test; the counter is used to record the instruction length of the continuous instruction stream; When it is continuous, the continuous judgment module accumulates different values to the counter according to different previous instruction type signal values; When it is not continuous, the tuple generation module generates a tuple data item according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, and at the same time updates the counter to make it start counting again; the tuple data is used to restore the program instruction stream.

[0009] Further, in the above program flow tracking system for processor prototype verification, when the current program counter is continuous with the previous program counter, the continuous judgment module keeps the program counter value of the current continuous instruction stream unchanged; When the current program counter is not continuous with the previous program counter, the continuous judgment module assigns the current program counter to the program counter of the current continuous instruction stream.

[0010] Further, in the above program flow tracking system for processor prototype verification, the continuous judgment module judges whether the current program counter is continuous with the previous program counter according to the previous program counter, the previous instruction type signal value, the current program counter, and the counter, including: When the value of the counter reaches the maximum count value of the counter, it is determined that the current program counter is not continuous with the previous program counter; When the value of the counter does not reach the maximum count value of the counter, it is judged whether the current program counter is continuous with the previous program counter according to whether the instruction represented by the previous instruction type signal value is a compressed instruction, and the difference between the current program counter and the previous program counter.

[0011] Further, in the above program flow tracking system for processor prototype verification, the tuple generation module generates a tuple data item according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, including: Determine the absolute value of the difference between the program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream; Generate an offset tuple or a raw tuple according to the relationship between the absolute value of the difference and the capacity of the offset field in the offset tuple; the program data field stored in the raw tuple is the program counter value of the current consecutive instruction stream, the program data field stored in the offset tuple is the absolute value of the difference, and the instruction consecutive length fields of the raw tuple and the offset tuple are both the values of the counter sent into the tuple generation module; both the raw tuple and the offset tuple include a tuple type field.

[0012] Further, in the above program flow tracking system for processor prototype verification, generating an offset tuple or a raw tuple according to the relationship between the absolute value of the difference and the bit width of the offset field in the offset tuple includes: If the absolute value of the difference is less than half of the capacity of the offset field in the offset tuple, generate an offset tuple; If the absolute value of the difference is greater than or equal to half of the capacity of the offset field in the offset tuple, generate a raw tuple.

[0013] Further, in the above program flow tracking system for processor prototype verification, the program flow tracking module further includes: A first-in first-out queue for caching the tuple data generated by the tuple generation module; A compression module for encoding and compressing the tuple data cached in the first-in first-out queue and then outputting it.

[0014] Further, in the above program flow tracking system for processor prototype verification, the system further includes a communication control module for controlling the program flow generated by the program flow tracking module to be output from the communication interface.

[0015] The program flow tracking method and system for processor prototype verification provided by the present invention can complete the tracking of the program flow and the identification of abnormal discontinuous instruction streams only through the analysis of the program counter value, without additional information such as instruction type, jump target, etc. The change process of the entire program flow can be monitored only through the program counter value. In addition, the program flow record encoding format provided by the embodiments of the present invention replaces the instruction address sequence with the encoded format, greatly reducing the amount of data that needs to be saved and output, and effectively reducing the pressure of input and output operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings described herein are used to provide a further understanding of the embodiments of the present invention, form a part of the present invention, and the illustrative embodiments and descriptions thereof are used to explain the present invention and do not constitute an improper limitation to the present invention. In the drawings: Figure 1 It is a flowchart of a program flow tracking method for processor prototype verification provided by an embodiment of the present invention; Figure 2 A method flowchart for restoring a program instruction stream according to the Figure 1 generated tuple data provided by an embodiment of the present invention; Figure 3 A schematic diagram of a tuple format provided by an embodiment of the present invention; Figure 4 A schematic diagram of a program flow tracking system for processor prototype verification provided by an embodiment of the present invention; Figure 5 For Figure 4 a schematic diagram of the structure of the program flow tracking module in Detailed implementation manners

[0017] The following takes embodiments in conjunction with the accompanying drawings to further illustrate the technical solutions provided by the present invention. It should be understood that the system structure and business scenarios provided in the embodiments of the present invention are mainly for illustrating possible implementation manners of the technical solutions of the present invention and should not be construed as the only limitation to the technical solutions of the present invention. Those of ordinary skill in the art can know that with the evolution of the system structure and the emergence of new business scenarios, the technical solutions provided by the present invention are also applicable to similar technical problems.

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which the present invention belongs. In case of inconsistency, the meaning described in this specification or the meaning obtained according to the content recorded in this specification shall prevail. In addition, the terms used herein are only for the purpose of describing the embodiments of the present invention and are not intended to limit the present invention.

[0019] Figure 1 A method flowchart of a program flow tracking method for processor prototype verification provided by an embodiment of the present invention. Figure 1 The method shown is used for a prototype verification platform system on chip (SoC) including a processor core to be tested.

[0020] To achieve the object of the present invention, the following registers are internally maintained in the prototype verification platform system-on-chip including the processor core to be tested: Last Program Counter (Last PC), Current Program Counter (Current PC), Program Trace Pointer (Ptr), Last Program Trace Pointer (LastPtr), counter, Current Instruction Type Signal Value (Current Compress), and Last Instruction Type Signal Value (LastCompress). The Last Program Counter is used to save the valid program counter input in the previous cycle; the Current Program Counter is used to save the current program counter; the Program Trace Pointer is used to save the program counter values of consecutive instruction streams, and this register takes the Current Program Counter as the input; the Last Program Trace Pointer is used to save the program counter values of the previous consecutive instruction stream, and this register takes the Program Trace Pointer as the input; the counter is used to record the instruction length of consecutive instruction streams; the Last Instruction Type Signal Value is used to save the valid instruction type signal value input in the previous cycle, and the Current Instruction Type Signal Value is used to save the instruction type signal value in the current cycle. For different Instruction Set Architectures (ISAs), the lengths of instructions are different. For example, in the RISC-V architecture, instructions are divided into compressed instructions and non-compressed instructions. The length of compressed instructions is 2 bytes, and the length of non-compressed instructions is 4 bytes. Therefore, a signal needs to be added to distinguish whether it is a compressed instruction.

[0021] Optionally, the embodiment of the present invention also maintains a Trigger Program Counter (Trigger PC) for controlling the start of the program flow tracing module, which can be set by software or a debugger. When the Current Program Counter matches the Trigger Program Counter, the program flow tracing module starts and begins to trace the program flow. After setting the Trigger Program Counter through software or a debugger, the program flow tracing module starts and begins to monitor the change of the Trigger Program Counter. When the Program Counter Valid signal is valid and the Current Program Counter matches the Trigger Program Counter, the tracing of the program flow is started.

[0022] As Figure 1 shown, the program flow tracing method for processor prototype verification provided by the embodiment of the present invention includes: Step 100: Determine whether the Current Program Counter is consecutive with the Last Program Counter according to the Last Program Counter, the Last Instruction Type Signal Value, the Current Program Counter, and the counter obtained from the processor core to be tested.

[0023] When starting to monitor and track the program flow, the following registers need to be initialized: assign the current program counter to the previous program counter, assign the current instruction type signal value to the previous instruction type signal value, assign the current program counter to the program trace pointer, initialize the previous program trace pointer to 0, and initialize the counter to 0.

[0024] Monitor the program counter during the execution of the processor core. When the program counter valid signal is valid, that is, when the current program counter input is valid, read the previous program counter, the previous instruction type signal value, and the current program counter from the processor core. The continuous module determines whether the current program counter is continuous with the previous program counter by combining the previous program counter, the previous instruction type signal value, the current program counter, and the counter, that is, determines whether the current program flow is continuous.

[0025] The method for the continuous module to determine whether the current program counter is continuous with the previous program counter can be as follows: when the value of the counter reaches the maximum count value of the counter, it is determined that the current program counter is not continuous with the previous program counter. When the value of the counter does not reach the maximum count value of the counter, it is determined whether the current program counter is continuous with the previous program counter according to whether the instruction represented by the previous instruction type signal value is a compressed instruction and the difference between the current program counter and the previous program counter.

[0026] Step 101: When it is continuous, the counter accumulates different values according to the different values of the previous instruction type signal value.

[0027] Specifically, the counter changes according to the previous instruction type signal value. If the previous instruction type signal value is 1, that is, the previous instruction is a compressed instruction, the counter increments by 1; if the previous instruction type signal value is 0, that is, the previous instruction is a non-compressed instruction, the counter increments by 2. The program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream remain unchanged. The current program counter is assigned to the previous program counter, and the current instruction type signal value is assigned to the previous instruction type signal value.

[0028] Step 102: When it is not continuous, generate a tuple data according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, and at the same time update the counter to make it start counting again; the tuple data is used to restore the program instruction stream.

[0029] Specifically, the determination module sends the values of the program trace pointer, the previous program trace pointer, and the counter to the tuple generation module for tuple data generation. At the same time, it assigns the program trace pointer to the previous program trace pointer, the current program counter to the program trace pointer, clears the counter, assigns the current program counter to the previous program counter, and assigns the current instruction type signal value to the previous instruction type signal value.

[0030] Furthermore, the tuple generation module generates a tuple data item based on the program counter value of the current consecutive instruction stream, the program counter value of the previous consecutive instruction stream, and the value of the counter, including: Determine the absolute value of the difference between the program counter value of the current consecutive instruction stream and the program counter value of the previous consecutive instruction stream; Based on the relationship between the absolute value of the difference and the capacity of the offset field in the offset tuple, generate an offset tuple or a raw tuple. If the absolute value of the difference is less than half of the capacity of the offset field in the offset tuple, generate an offset tuple; if the absolute value of the difference is greater than or equal to half of the capacity of the offset field in the offset tuple, generate a raw tuple.

[0031] Among them, the program data field saved in the raw tuple is the program counter value of the current consecutive instruction stream, the program data field saved in the offset tuple is the absolute value of the program counter difference, and the instruction consecutive length fields of the raw tuple and the offset tuple are both the value of the counter sent to the tuple generation module; both the raw tuple and the offset tuple include a tuple type field. As Figure 3 shown in the tuple format generated by the tuple generation module, the tuples are divided into two categories, namely offset tuples and raw tuples.

[0032] The program flow tracking method for processor prototype verification provided by the embodiments of the present invention determines whether the current program counter is consecutive with the previous program counter, and uses the judgment result to control the update of the program trace pointer and the counter. In the case of determining discontinuity, tuple data of the corresponding tuple format is generated by using the values of the program trace pointer and the counter, combined with the value of the previous program trace pointer. The method provided by the embodiments of the present invention completes the tracking of the program flow and the identification of abnormal discontinuous instruction streams through the analysis of the program counter value, without requiring additional information such as instruction type, jump target, etc., and can monitor the change process of the entire program flow only through the program counter value.

[0033] As Figure 2 shown, the method for restoring the program instruction stream according to the Figure 1 generated tuple data includes: Step 200: Read the tuple type field of this tuple and determine whether this tuple is an offset tuple or a raw tuple.

[0034] Step 201: If it is an original tuple, the program data field of the read tuple is the program counter of the tuple.

[0035] Step 202: If it is an offset tuple, the program data field of the read tuple is the offset data of the tuple. Add the program counter data obtained or calculated from the previous tuple to the offset data of this tuple to obtain the program counter of this tuple.

[0036] For example, as Figure 3 shown, first read the first byte of the tuple, and determine whether it is an original tuple or an offset tuple according to the first bit of the first byte. If it is an original tuple, read the subsequent 8 bytes as the program counter data of the tuple; if it is an offset tuple, read the subsequent 2 bytes as the offset data of the tuple, and add the program counter data obtained or calculated from the previous tuple to the offset to obtain the program counter data of this tuple.

[0037] Step 203: Calculate the start address and end address of each continuous program flow according to the program counter of this tuple and the data of the instruction continuous length field of this tuple.

[0038] Step 204: Combine the disassembly file of the running program, intercept all program addresses between the start address and the end address of the continuous program flow, and splice them in tuple order to obtain the complete program flow.

[0039] The program flow record encoding format provided by the embodiment of the present invention can effectively reduce the amount of data that needs to be saved and output, and reduce the pressure of input and output operations.

[0040] As Figure 4 and Figure 5 shown, a program flow tracking system for processor prototype verification provided by the embodiment of the present invention is a prototype verification platform system on chip (System on Chip, SoC) including a processor core to be tested. A program flow tracking module including a counter, a continuous judgment module, and a tuple generation module is connected to the prototype verification platform system on chip. The program flow tracking module monitors the (Program Counter, PC) from the processor core and generates program flow information. The program counter represents the address corresponding to the instruction.

[0041] To achieve the object of the present invention, the following registers are maintained inside the program flow tracing module: Last Program Counter (Last PC), Current Program Counter (Current PC), Program Trace Pointer (Ptr), Last Program Trace Pointer (Last Ptr), counter, Current Instruction Type Signal Value (Current Compress), and Last Instruction Type Signal Value (Last Compress). The Last Program Counter is used to save the valid program counter input in the previous cycle; the Current Program Counter is used to save the current program counter; the Program Trace Pointer is used to save the starting program counter value of a continuous instruction stream, and this register takes the Current Program Counter as input; the Last Program Trace Pointer is used to save the starting program counter value of the previous continuous instruction stream, and this register takes the Program Trace Pointer as input; the counter is used to record the instruction length of the continuous instruction stream; the Last Instruction Type Signal Value is used to save the valid instruction type signal value input in the previous cycle, and the Current Instruction Type Signal Value is used to save the instruction type signal value in the current cycle. For different Instruction Set Architectures (ISAs), the lengths of instructions are different. For example, in the RISC-V architecture, instructions are divided into compressed instructions and non-compressed instructions. The length of a compressed instruction is 2 bytes, and the length of a non-compressed instruction is 4 bytes. Therefore, a signal needs to be added to distinguish whether it is a compressed instruction.

[0042] Optionally, a Trigger Program Counter (Trigger PC) is also maintained inside the program flow tracing module, which is used to control the start of the program flow tracing module and can be set by software or a debugger. When the Current Program Counter matches the Trigger Program Counter, the program flow tracing module starts and begins to trace the program flow. After setting the Trigger Program Counter through software or a debugger, the program flow tracing module starts and begins to monitor the change of the program counter. When the Program Counter Valid signal is valid and the Current Program Counter matches the Trigger Program Counter, the tracing of the program flow is started.

[0043] When starting to monitor and trace the program flow, the following registers need to be initialized: assign the Current Program Counter to the Last Program Counter, assign the Current Instruction Type Signal Value to the Last Instruction Type Signal Value, assign the Current Program Counter to the Program Trace Pointer, initialize the Last Program Trace Pointer to 0, and initialize the counter to 0.

[0044] Monitor the program counter during the execution of the processor core. When the program counter valid signal is valid, that is, when the current program counter input is valid, the continuous module judges to read the previous program counter, the previous instruction type signal value, and the current program counter from the processor core. The continuous module combines the previous program counter, the previous instruction type signal value, the current program counter, and the counter to judge whether the current program counter is continuous with the previous program counter, that is, to judge whether the current program flow is continuous.

[0045] When it is judged that the current program counter is continuous with the previous program counter, the continuous module makes the counter increment by different values according to the different previous instruction type signal values. Specifically, the counter changes according to the previous instruction type signal value. If the previous instruction type signal value is 1, that is, the previous instruction is a compressed instruction, the counter increments by 1; if the previous instruction type signal value is 0, that is, the previous instruction is a non-compressed instruction, the counter increments by 2. The program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream remain unchanged, that is, the program trace pointer and the previous program trace pointer remain unchanged. The current program counter is assigned to the previous program counter, and the current instruction type signal value is assigned to the previous instruction type signal value.

[0046] When it is judged that the current program counter is not continuous with the previous program counter, the tuple generation module generates a tuple data item according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, and at the same time updates the counter to make it start counting again. Among them, the program flow tracing module outputs several tuple data items to generate a trace file, which can be used to restore the program instruction stream. By analyzing the tuples in the trace file, the entire program flow can be restored.

[0047] Specifically, the continuous module sends the program trace pointer, the previous program trace pointer, and the value of the counter to the tuple generation module for generating tuple data. At the same time, the program trace pointer is assigned to the previous program trace pointer, the current program counter is assigned to the program trace pointer, the counter is cleared, the current program counter is assigned to the previous program counter, and the current instruction type signal value is assigned to the previous instruction type signal value.

[0048] Optionally, as Figure 5 shown, the tuple generation module pushes the generated tuple data into a First-In-First-Out Queue (FIFO) for temporary storage. In order to further compress the data and reduce the amount of output data, the present invention can use a compression module to further compress the data in the first-in-first-out queue. The compression module can select a specific compression algorithm for implementation according to needs.

[0049] Optionally, as Figure 4As shown in the figure, the program flow tracing system for processor prototype verification includes not only the prototype verification platform system-on-chip of the processor core to be tested, but also a communication control module for controlling the output of the program flow generated by the program flow tracing module from the communication interface. Among them, the communication interface can adopt a medium or low-speed communication interface.

[0050] The program flow tracing system for processor prototype verification provided by the embodiments of the present invention includes a continuity judgment module and a tuple generation module. The continuity judgment module is used to judge whether the current program counter value is continuous with the previous program counter value, and use the judgment result to control the update of the program trace pointer and the counter. The tuple generation module is used to generate tuple data in a corresponding tuple format by using the values of the program trace pointer and the counter and combining with the value of the previous program trace pointer in the case of discontinuity. This system can complete the tracing of the program flow and the identification of abnormal discontinuous instruction flows only by analyzing the program counter value, without additional information such as instruction type, jump target, etc., and can identify abnormal discontinuous instruction flows, such as the case where the program counter value changes discontinuously without branch instructions. The change process of the entire program flow can be monitored only through the program counter value.

[0051] Further, the specific judgment method for the continuity judgment module to judge whether the current program counter value is continuous with the previous program counter value includes: When the value of the counter reaches the maximum count value of the counter, it is determined that the current program counter value is not continuous with the previous program counter value. Specifically, when the number of bits of the continuous length field in the tuple is N, the continuous length field can represent a maximum of 2 N numerical values. When the size of the counter is greater than or equal to 2 N -2, it may not be possible to record a larger continuous length. Therefore, in the present invention, it is considered discontinuous. For example, the continuous length field in the tuple is 7 bits, and the continuous length field can represent a maximum of 128. So when the size of the counter is greater than or equal to 126 (i.e., 2 7 -2), it may not be possible to record a larger continuous length, and it is judged as discontinuous.

[0052] When the value of the counter does not reach the maximum count value of the counter, it is judged whether the current program counter value is continuous with the previous program counter value according to whether the instruction represented by the previous instruction type signal value is a compressed instruction and the difference between the current program counter and the previous program counter.

[0053] Specifically, when the size of the counter is less than 2 NAt -2, further judgment is made according to the value of the up - beat instruction type signal. When the value of the up - beat instruction type signal is 1, that is, the instruction corresponding to the up - beat program counter is a compression instruction. At this time, if the current program counter is equal to the up - beat program counter plus 2, it is judged that the current program counter value and the up - beat program counter value are continuous, otherwise they are discontinuous; when the value of the up - beat instruction type signal is 0, that is, the instruction corresponding to the up - beat program counter is not a compression instruction. At this time, if the current program counter is equal to the up - beat program counter plus 4, it is judged that the current program counter value and the up - beat program counter value are continuous, otherwise they are discontinuous.

[0054] Furthermore, the tuple generation module generates a tuple data item according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, including: Determine the absolute value of the difference between the program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream; Generate an offset tuple or a raw tuple according to the relationship between the absolute value of the difference and the capacity of the offset field in the offset tuple. If the absolute value of the difference is less than half of the capacity of the offset field in the offset tuple, generate an offset tuple; if the absolute value of the difference is greater than or equal to half of the capacity of the offset field in the offset tuple, generate a raw tuple.

[0055] If the bit - width of the offset field in the offset tuple is N bits, then the capacity of the offset field is 2 N . Subtract the value of the program trace pointer and the value of the up - beat program trace pointer to get the program counter difference. If the absolute value of the difference is less than half of the capacity of the offset field in the offset tuple, that is, 2 N-1 , then generate an offset tuple. For example, if the bit - width of the offset field in the offset tuple is 16 bits, then the capacity of the offset field is 2 16 , if the absolute value of the difference is less than 2 15 that is, 32768, then generate an offset tuple. As Figure 3 shown, when generating an offset tuple, the continuous length field in the offset tuple uses the value of the counter sent into the tuple generation module. The continuous length field in the offset tuple is represented by a 7 - bit unsigned number, and the offset field uses the program counter difference, represented by a 16 - bit signed number, that is: 2 N To represent positive and negative respectively. For example, 2 16 is 65536, 16 bits represent - 32768~32767. Here, the maximum absolute value used is 32767, that is, less than 32768 (that is, 2 15 ).

[0056] If the absolute value of the difference is greater than or equal to half of the capacity of the offset field in the offset tuple, that is, 2 N-1 , then generate a raw tuple. As Figure 3As shown, when generating the original tuple, the consecutive length field in the original tuple uses the value of the counter sent into the tuple generation module, which is represented by a 7-bit unsigned number, and the program counter field uses the value of the program trace pointer sent into the tuple generation module, which is represented by 64 bits.

[0057] Among them, the program data field saved in the original tuple is the program counter value of the current consecutive instruction stream, and the program data field saved in the offset tuple is the absolute value of the program counter difference. The instruction consecutive length fields of both the original tuple and the offset tuple are the values of the counter sent into the tuple generation module; both the original tuple and the offset tuple include a tuple type field. As Figure 3 shown, the tuple formats generated by the tuple generation module are divided into two categories, namely offset tuples and original tuples. An offset tuple is a tuple format that requires calculating the program counter value, and its size is 24 bits, that is, 3 bytes. The original tuple directly stores the program counter value in the tuple without the need to calculate the program counter, and its size is 72 bits, that is, 9 bytes. The first bit of the first byte of the tuple represents the type of the tuple, where "1" indicates that the tuple is an offset tuple, and the next 23 bits all belong to this tuple. Among these 23 bits, the first 7 bits are the consecutive length, and the last 16 bits are the offset; "0" indicates that the tuple is an original tuple, and the next 71 bits all belong to this tuple. Among these 71 bits, the first 7 bits are the consecutive length, and the last 64 bits are the program counter. The consecutive length indicates that several two-byte instructions are consecutive. Assuming the consecutive length is length, the program flow from the recorded or calculated program address addr1 to the program address addr1 + 2×length is continuous.

[0058] After the program flow tracking ends, all program flow information can be obtained, usually a tracking file. This tracking file consists of several tuple data. If a compression module is used in the program flow tracking module, the corresponding decompression algorithm needs to be used to decompress the tracking file first. By analyzing the tuples in the tracking file, the entire program flow can be restored.

[0059] It should be noted that the embodiments described in the present invention are only a part of the embodiments of the present invention, rather than all embodiments. The components of the embodiments of the present invention usually described and illustrated in the drawings can be arranged and designed in various different configurations. Therefore, the above detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed present invention, but only represents the selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present invention.

[0060] The terms "first", "second", "third", etc. or similar terms such as Module A, Module B, Module C, etc. in the description and claims are only used to distinguish similar objects and do not represent a specific order for the objects. Understandably, the specific order or sequence can be interchanged when permitted, so that the embodiments of the present invention described herein can be implemented in an order other than that illustrated or described herein.

[0061] In the above description, the reference numerals representing steps do not necessarily mean that the steps will be executed in this order. It may also include intermediate steps or be replaced by other steps. The order of the front and rear steps can be interchanged when permitted, or they can be executed simultaneously.

[0062] The term "comprising" used in the description and claims should not be construed as limited to the content listed thereafter; it does not exclude other elements or steps. Therefore, it should be construed as specifying the presence of the stated features, wholes, steps or components, but does not exclude the presence or addition of one or more other features, wholes, steps or components and their groups. Therefore, the expression "a device comprising Device A and B" should not be limited to a device consisting only of components A and B.

[0063] The "one embodiment" or "embodiment" mentioned in this specification means that the specific features, structures or characteristics described in connection with the embodiment are included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment" or "in an embodiment" that appear throughout this specification do not necessarily refer to the same embodiment, but may refer to the same embodiment. In addition, in various embodiments of the present invention, if there is no special description and logical conflict, the terms and / or descriptions between different embodiments are consistent and can be referenced to each other. The technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationships.

[0064] Note that the above is only the preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, re-adjustments and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, all of which fall within the protection scope of the present invention.

Claims

1. A program flow tracing method for processor prototype verification, characterized in that The method includes: Judging whether the current program counter is consecutive with the previous program counter according to the previous program counter, previous instruction type signal value, current program counter and counter obtained from the processor core to be tested; the counter is used to record the instruction length of the consecutive instruction stream; When they are consecutive, the counter is incremented by different values according to different previous instruction type signal values; When they are not consecutive, a tuple data item is generated according to the program counter value of the current consecutive instruction stream, the program counter value of the previous consecutive instruction stream, and the value of the counter, and at the same time the counter is updated to restart counting; the tuple data is used to restore the program instruction stream.

2. The program flow tracing method for processor prototype verification according to claim 1, characterized in that The method for restoring the program instruction stream according to the tuple data includes: Reading the tuple type field of this tuple to judge whether this tuple is an offset tuple or an original tuple; If it is an original tuple, the program data field read of this tuple is the program counter of this tuple; If it is an offset tuple, the program data field read of this tuple is the offset data of this tuple, and the program counter data obtained or calculated from the previous tuple is added to the offset data of this tuple to obtain the program counter of this tuple.

3. The program flow tracing method for processor prototype verification according to claim 2, characterized in that The method for restoring the program instruction stream according to the tuple data further includes: Calculating the start address and end address of each consecutive program stream according to the program counter of this tuple and the data of the instruction consecutive length field of this tuple; Combining the disassembly file of the running program, intercepting all program addresses between the start address and end address of the consecutive program stream, and splicing them in tuple order to determine the complete program stream.

4. A program flow tracing system for processor prototype verification, characterized in that The system is a prototype verification platform system-on-chip including the processor core to be tested, and a program flow tracking module including a counter, a continuity judgment module and a tuple generation module is connected to the prototype verification platform system-on-chip; The continuity judgment module judges whether the current program counter is consecutive with the previous program counter according to the previous program counter, previous instruction type signal value, current program counter and counter obtained from the processor core to be tested; the counter is used to record the instruction length of the consecutive instruction stream; When they are consecutive, the continuity judgment module increments the counter by different values according to different previous instruction type signal values; When they are not consecutive, the tuple generation module generates a tuple data item according to the program counter value of the current consecutive instruction stream, the program counter value of the previous consecutive instruction stream, and the value of the counter, and at the same time updates the counter to restart counting; the tuple data is used to restore the program instruction stream.

5. The program flow tracing system for processor prototype verification according to claim 4, characterized in that: When the current program counter is consecutive with the previous program counter, the continuity judgment module keeps the program counter value of the current consecutive instruction stream unchanged; When the current program counter is not consecutive with the previous program counter, the continuity judgment module assigns the current program counter to the program counter of the current consecutive instruction stream.

6. The program flow tracing system for processor prototype verification according to claim 4, characterized in that The continuity judgment module judges whether the current program counter is consecutive with the previous program counter according to the previous program counter, previous instruction type signal value, current program counter and the counter obtained from the processor core to be tested, including: When the value of the counter reaches the maximum count value of the counter, it is determined that the current program counter is discontinuous with the previous program counter; When the value of the counter does not reach the maximum count value of the counter, it is judged whether the current program counter is continuous with the previous program counter according to whether the instruction represented by the previous instruction type signal value is a compressed instruction and the difference between the current program counter and the previous program counter.

7. The program flow tracing system for processor prototype verification according to claim 4, characterized in that The tuple generation module generates a tuple data item based on the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, including: Determine the absolute value of the difference between the program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream; Generate an offset tuple or a raw tuple according to the relationship between the absolute value of the difference and the capacity of the offset field in the offset tuple; the program data field saved in the raw tuple is the program counter value of the current continuous instruction stream, the program data field saved in the offset tuple is the absolute value of the difference, and the instruction continuous length fields of the raw tuple and the offset tuple are both the value of the counter sent into the tuple generation module; both the raw tuple and the offset tuple include a tuple type field.

8. The program flow tracing system for processor prototype verification according to claim 7, characterized in that Generating an offset tuple or a raw tuple according to the relationship between the absolute value of the difference and the bit width of the offset field in the offset tuple includes: If the absolute value of the difference is less than half of the capacity of the offset field in the offset tuple, generate an offset tuple; If the absolute value of the difference is greater than or equal to half of the capacity of the offset field in the offset tuple, generate a raw tuple.

9. The program flow tracing system for processor prototype verification according to claim 4, characterized in thatThe program flow tracking module further includes: A first-in-first-out queue for caching the tuple data generated by the tuple generation module; A compression module for encoding and compressing the tuple data cached in the first-in-first-out queue and then outputting it.

10. The program flow tracing system for processor prototype verification according to claim 4, wherein The system further includes a communication control module for controlling the program flow generated by the program flow tracking module to be output from the communication interface.

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