A multi-slave control system, method, device, program product and storage medium

Abstract

The present invention discloses a multi-slave machine control system, method, device, program product and storage medium, belonging to the field of integrated circuit buses, and is used to realize the multi-slave machine control of integrated circuit buses through a simple structure, solving the problems of large circuit volume and high cost of multi-slave machine control solutions. The multi-slave machine control system in the present invention is composed of a central processor and a multi-slave machine controller. When the target device address in the data control command sent by the host device of the integrated circuit bus exists in the preset device address pool, the multi-slave machine controller can trigger the central processor to realize data interaction between the host device and the target external device through the multi-slave machine controller. By maintaining the device address pool, it is possible to efficiently identify whether there is a target external device, and the structure is relatively simple, which is beneficial to reducing the circuit volume and cost.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit buses, and particularly to a multi-slave control system, method, device, program product and storage medium. Background Art

[0002] Some IIC (Inter-Integrated Circuit) hosts have a small number of IIC interfaces, for example, only one. In this case, the IIC host may have a need to "access multiple external devices through a single IIC interface". However, in the related art, there is a lack of a mature multi-slave control scheme, and there are problems of large circuit volume and high cost when implementing "accessing multiple external devices through a single IIC interface".

[0003] Therefore, how to provide a solution to the above technical problems is an issue that those skilled in the art need to solve currently. Summary of the Invention

[0004] The object of the present invention is to provide a multi-slave control system, method, device, program product and storage medium. The multi-slave control system in the present invention is composed of a central processor and a multi-slave controller. When the target device address in the data control command sent by the host device of the integrated circuit bus exists in the preset device address pool, the multi-slave controller can trigger the central processor to implement data interaction between the host device and the target external device through the multi-slave controller. By maintaining the device address pool, it is possible to efficiently identify whether there is a target external device, and the structure is relatively simple, which is beneficial to reducing the circuit volume and cost.

[0005] To solve the above technical problems, the present invention provides a multi-slave control system, including: a central processor connected to multiple external devices, configured to, after being triggered by the multi-slave controller, implement data interaction between the host device and the target external device through the multi-slave controller according to the data interaction type specified by the read / write flag bit in the data control command; a multi-slave controller respectively connected to the central processor and the host device of the integrated circuit bus, configured to determine whether the target device address in the data control command sent by the host device of the integrated circuit bus exists in the preset device address pool; if it exists, trigger the central processor; wherein, the device address pool includes the device addresses of each external device communicatively connected to the central processor, the data interaction type includes read or write, and the target external device is: the external device with the device address being the target device address.

[0006] On the other hand, the multi-slave controller includes a control device, a data interface module, a data buffer module, and an address pool module; the data interface module is respectively connected to the host device of the integrated circuit bus, the control device, and the address pool module, and the data buffer module is respectively connected to the control device and the central processing unit; the data interface module is used to respectively implement data transmission between the address pool module and the control device and the host device; the address pool module is used to determine whether the target device address exists in the preset device address pool and give a judgment result after receiving the target device address in the data control command sent by the host device through the data interface module; the control device is used to trigger the central processing unit when the judgment result is yes; the data buffer module is used to implement read and write data buffering between the host device and the target device connected to the central processing unit.

[0007] On the other hand, the address pool module includes a multi-bit register and a multi-level selection module; the number of bits of the multi-bit register is: the total number of device addresses supported by the number of bits of the addressing mode, and the number of levels of the selector of the multi-level selection module is equal to the number of bits of the addressing mode; the multi-level selection module is used to input the numerical values of each bit order in the binary target device address as control signals to the control ends of each selector in the level corresponding to the bit order in the multi-level selection module, so that the multi-level selection module outputs the register value of the register bit corresponding to the target device address; wherein, when the register value output by the multi-level selection module is a preset valid value, it indicates that the target device address exists in the preset device address pool.

[0008] On the other hand, the number of selectors in each level of the multi-level selection module is: X / 2 n ; The input end of any selector in the first level is correspondingly connected to one bit of the multi-bit register, the output ends of each selector in the previous level are correspondingly connected to the input ends of each selector in the next level, and the output end of the selector in the nth level is used as the output end of the multi-level selection module; wherein, X is the number of bits of the multi-bit register, and n is the level serial number.

[0009] On the other hand, the host device includes the host of the server.

[0010] On the other hand, the central processing unit includes the central processing unit of the baseboard management controller of the server; the multi-slave controller is integrated in the baseboard management controller.

[0011] On the other hand, the data interface module includes a data sampling and transmission module, an address shift register, and a data shift register; the data sampling and transmission module is used to convert the serial data sent by the host device into parallel data, and under the control of the control device, convert the device address in the address shift register and the data in the data shift register into serial data and then send it to the host device; the address shift register is used to store the target device address sent by the host device under the control of the data sampling and transmission module, and is also used to store the device address sent by the control device under the control of the control device; the data shift register is used to store the data sent by the host device under the control of the data sampling and transmission module, and is also used to store the data sent by the control device under the control of the control device.

[0012] On the other hand, the control device includes a control module, an interrupt generation module, a response processing module, and a register module; the control module is used to, when the judgment result is yes, control the response processing module to send an acknowledgment signal to the host device, store the target device address in the register module, and control the interrupt generation module to send an interrupt to the central processing unit, so as to trigger the central processing unit to obtain the target device address from the register module and communicate with the target external device.

[0013] On the other hand, the register module is further used to: save the configuration parameters of the addressing mode under the control of the central processing unit, so as to adjust the addressing mode used by the control device.

[0014] On the other hand, the data buffer module includes a bus data parsing module, a write data buffer, and a read data buffer; the bus data parsing module is used to parse the data sent by the central processing unit through the control bus, store the parsed data in the write data buffer, and is also used to send the data in the read data buffer to the control bus of the central processing unit; the control device is further used to send the data in the write data buffer to the host device through the data interface module, and write the data sent by the host device into the read data buffer.

[0015] On the other hand, the central processing unit is further used to: in response to a configuration instruction, modify the device addresses in the device address pool.

[0016] To solve the above technical problems, the present invention also provides a multi-slave control method, which is applied to a multi-slave control device and includes: obtaining the target device address in the data control command sent by the host device of the integrated circuit bus; determining whether the target device address exists in a preset device address pool, where the device address pool includes the device addresses of each external device communicatively connected to the multi-slave control device; if it exists, perform data interaction with the target external device according to the data interaction type specified by the read / write flag bit in the data control command, where the data interaction type includes read or write, and the target external device is the external device with the device address being the target device address.

[0017] To solve the above technical problems, the present invention also provides a multi-slave control device, including: a memory for storing a computer program; a processor for implementing the steps of the above multi-slave control method when executing the computer program.

[0018] To solve the above technical problems, the present invention also provides a computer program product, including computer programs / instructions, and when the computer programs / instructions are executed by a processor, the steps of the above multi-slave control method are implemented.

[0019] To solve the above technical problems, the present invention also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above multi-slave control method are implemented.

[0020] Beneficial effects: The present invention provides a multi-slave control system. Considering that more external devices can be connected through the interface of an additional central processor, and the device address pool of the connected external devices can be maintained to efficiently identify whether there is a target external device, the multi-slave control system in the present invention is composed of a central processor and a multi-slave controller. The multi-slave controller can trigger the central processor to implement data interaction between the host device and the target external device when the target device address in the data control command sent by the host device of the integrated circuit bus exists in the preset device address pool. By maintaining the device address pool, it is possible to efficiently identify whether there is a target external device. The structure is relatively simple, which is beneficial to reducing the circuit volume and cost.

[0021] The present invention also provides a multi-slave control method, device, equipment and computer-readable storage medium, which have the same beneficial effects as the above multi-slave control method. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the attached drawings required in the related technologies and embodiments. Obviously, the attached drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other attached drawings can be obtained based on these attached drawings.

[0023] Figure 1 It is a schematic structural diagram of a multi-slave machine control system provided by the present invention.

[0024] Figure 2 It is a schematic structural diagram of an address pool module provided by the present invention.

[0025] Figure 3 It is a schematic structural diagram of another multi-slave machine control system provided by the present invention.

[0026] Figure 4 It is a schematic flowchart of the first multi-slave machine control method provided by the present invention.

[0027] Figure 5 It is a schematic flowchart of the state machine jump of a control module provided by the present invention.

[0028] Figure 6 It is a schematic flowchart of the second multi-slave machine control method provided by the present invention.

[0029] Figure 7 It is a schematic structural diagram of a multi-slave machine control device provided by the present invention.

[0030] Figure 8 It is a schematic structural diagram of a computer-readable storage medium provided by the present invention. Detailed implementation manners

[0031] The core of the present invention is to provide a multi-slave machine control system, method, device, program product and storage medium. The multi-slave machine control system in the present invention consists of a central processor and a multi-slave machine controller. When the multi-slave machine controller can trigger the central processor to realize data interaction between the host device and the target external device through the multi-slave machine controller in the case of the target device address in the data control command sent by the host device existing in the preset device address pool, the target external device can be efficiently identified through the maintenance of the device address pool, and the structure is relatively simple, which is beneficial to reducing the circuit volume and cost.

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0033] Please refer to Figure 1 , Figure 1 which is a schematic structural diagram of a multi-slave control system provided by the present invention. The multi-slave control system includes: a central processor 1 connected to multiple external devices, which is used to, after being triggered by a multi-slave controller 2, according to the data interaction type specified by the read / write flag bit in the data control command, implement data interaction between the host device and the target external device through the multi-slave controller 2; the multi-slave controller 2 is respectively connected to the central processor 1 and the host device of the integrated circuit bus, and is used to determine whether the target device address in the data control command sent by the host device of the integrated circuit bus exists in the preset device address pool; if it exists, trigger the central processor 1; wherein, the device address pool includes the device addresses of each external device communicatively connected to the central processor 1, the data interaction type includes read or write, and the target external device is: the external device with the device address being the target device address.

[0034] Specifically, considering the technical problems in the above background technology, and also considering that more external devices can be connected through the interface of another central processor 1, and the device address pool of the connected external devices can be maintained to efficiently identify whether there is a target external device, so in the embodiments of the present invention, it is desired to realize the mounting and connection of more external devices through the interface of another central processor 1, and the multi-slave controller 2 independent of the central processor 1 is used to judge whether there is a target external device accessed by the "host device of the integrated circuit bus" among the external devices connected to the central processor 1. If it exists, the data interaction processing action of the central processor 1 can be triggered, so as to realize the multi-slave control of the integrated circuit bus (IIC) through the simple structure of the central processor 1 and the multi-slave controller 2, which is beneficial to reducing the circuit volume and cost.

[0035] Specifically, the device addresses in the preset device address pool are actually equivalent to the device addresses of the external devices connected to the central processing unit 1. Therefore, it can be determined whether the target device address in the data control command sent by the host device of the integrated circuit bus exists in the preset device address pool. If it exists, it can be considered that there is a target external device among the external devices connected to the central processing unit 1 (i.e., the external device with the device address being the target device address). If it does not exist, it can be considered that there is no target external device among the external devices connected to the central processing unit 1.

[0036] Among them, after being triggered, the central processing unit 1 can, according to the data control instruction, perform corresponding data interaction processing between the host device and the target external device through the multi-slave controller 2. For example, write the data to be written by the host device into the target external device, or read the data of the target external device to the host device.

[0037] Specifically, the central processing unit 1 can modify the device address pool through the control bus. For example, during the initialization phase, the device addresses of the external devices connected to the central processing unit 1 can be stored in the device address pool to facilitate the subsequent judgment work of the multi-slave controller 2.

[0038] Among them, the control bus can be of various types. For example, it can be an APB (Advanced Peripheral Bus) bus, etc. The embodiments of the present invention do not limit this here.

[0039] Among them, the external devices connected to the central processing unit 1 can be of various types and can be flexibly set according to the structure of the central processing unit 1. For example, they can be IIC bus devices or other types of devices, etc. The embodiments of the present invention do not limit this here.

[0040] The present invention provides a multi-slave control system. Considering that more external devices can be connected through the interface of another central processing unit, and whether there is a target external device can be efficiently identified by maintaining the device address pool of the connected external devices. Therefore, the multi-slave control system in the present invention consists of a central processing unit and a multi-slave controller. The multi-slave controller can trigger the central processing unit to implement data interaction between the host device and the target external device through the multi-slave controller when the target device address in the data control command sent by the host device of the integrated circuit bus exists in the preset device address pool. By maintaining the device address pool, whether there is a target external device can be efficiently identified. The structure is relatively simple, which is beneficial to reducing the circuit volume and cost.

[0041] Based on the above embodiments:

[0042] As an alternative embodiment, the multi-slave controller 2 includes a control device, a data interface module, a data buffer module, and an address pool module; the data interface module is respectively connected to the host device, the control device, and the address pool module of the integrated circuit bus, and the data buffer module is respectively connected to the control device and the central processing unit 1; the data interface module is used to respectively implement data transmission between the address pool module, the control device, and the host device; the address pool module is used to determine whether the target device address exists in the preset device address pool and give a judgment result after receiving the target device address in the data control command sent by the host device through the data interface module; the control device is used to trigger the central processing unit 1 when the judgment result is yes; the data buffer module is used to implement read / write data buffering between the host device and the target device connected to the central processing unit 1.

[0043] Specifically, considering that the multi-slave controller 2 needs to coordinate the core control part of the overall situation, the part responsible for communication between the host device and the multi-slave controller 2, the part responsible for communication between the central processing unit 1 and the multi-slave controller 2, and the address pool for storing device addresses, the multi-slave controller 2 in the embodiment of the present invention includes a control device, a data interface module, a data buffer module, and an address pool module. The control device can be used as the core control part of the multi-slave controller 2, the data interface module can be responsible for communication between the host device and the multi-slave controller 2, the data buffer module can be responsible for communication between the central processing unit 1 and the multi-slave controller 2, and the address pool module can store the address pool of device addresses.

[0044] Among them, in order to reduce the burden on the control device, the address pool module can independently determine whether the target device address exists in the preset device address pool and give a judgment result after receiving the target device address in the data control command sent by the host device through the data interface module, which is beneficial to reducing the volume and cost of the control device.

[0045] As an alternative embodiment, the address pool module includes a multi-bit register and a multi-level selection module; the number of bits of the multi-bit register is the total number of device addresses supported by the number of bits of the addressing mode, and the number of levels of the selector of the multi-level selection module is equal to the number of bits of the addressing mode; the multi-level selection module is used to input the values of each bit position in the binary target device address as control signals to the control terminals of each selector in the level corresponding to the bit position one by one in the multi-level selection module, so that the multi-level selection module outputs the register value of the register bit corresponding to the target device address; among them, when the register value output by the multi-level selection module is a preset valid value, it means that the target device address exists in the preset device address pool.

[0046] Specifically, considering that on the basis of establishing the "corresponding relationship between each register bit in the multi-bit register and the device address", the value of a single register bit in the multi-bit register can represent "whether the central processor 1 is connected to the device address corresponding to this register bit". Specifically, the preset valid value can be used to represent that "the central processor 1 is connected to the device address corresponding to this register bit". Therefore, in one aspect of the embodiments of the present invention, the "device address pool" can be maintained through the multi-bit register. On the other hand, considering that the binary target device address is directly used as the control signal of the multi-level selection module, the "register value of the register bit corresponding to the target device address" can be selected and output through the multi-level selection module, so as to implement the judgment through the register value. Therefore, in the embodiments of the present invention, a multi-level selection module is provided. The multi-level selection module can select and output the "register value of the register bit corresponding to the target device address" from the multi-bit register under the control of the binary target device address.

[0047] Among them, the preset valid value can be set independently. For example, it can be 1, etc., and the embodiments of the present invention do not make limitations here.

[0048] Specifically, to better illustrate the embodiments of the present invention, please refer to Figure 2 , Figure 2 which is a schematic structural diagram of an address pool module provided by the present invention. When the addressing mode is a 7-bit addressing mode, the number of bits of the multi-bit register can be 128 bits (0 to 127), and the multi-level selection module has 7 levels of selectors ( Figure 2 The trapezoidal devices in are all selectors), and the numerical bit order in the binary target device address is successively A0 - A6, a total of seven in ascending order; the numerical bit order in the binary target device address and the levels in the multi-level selection module can correspond one by one in ascending order, that is, the first bit order in the target device address corresponds to the selector of the first level (starting from the side close to the multi-bit register), the second bit order corresponds to the selector of the second level, and so on, and the highest bit order corresponds to the selector of the highest level.

[0049] Among them, each bit in the multi-bit register represents an IIC device address. The device addresses represented by the first three register bits are 0x00 = 1, 0x01 = 0, and 0x02 = 1 respectively; 1 means that the address exists in the device address pool, such as device addresses 0x00 and 0x02, and 0 means that the address does not exist in the address pool, such as device address 0x01. If you want the device address pool to have the required addresses, you only need to set the corresponding register bit to 1. For any 7-bit IIC address A[6:0], it is used as the selection signal of the selector in the lookup table. When the selection signal of the selector is 1, the input of the upper pin is selected, otherwise the output of the lower pin is selected. The register data at the corresponding position is finally output by controlling the selector through the IIC address A; when the output is 1, it means that the current target device address exists in the device address pool, and a corresponding acknowledgment signal is generated, otherwise no corresponding acknowledgment signal is generated.

[0050] Of course, in addition to this specific form, the address pool module can also be of many other types, which are not limited in the embodiments of the present invention.

[0051] As an alternative embodiment, the number of selectors at each level in the multi-level selection module is: X / 2 n ; The input end of any selector in the first level is connected to one bit of the multi-bit register one by one. The output ends of the selectors in the previous level are connected to the input ends of the selectors in the next level one by one. The output end of the selector in the nth level is used as the output end of the multi-level selection module; where X is the number of bits of the multi-bit register and n is the level serial number.

[0052] Specifically, in the embodiments of the present invention, the structure of the multi-level selection module is defined, that is, the number of selectors at each level and their connection relationships are defined. Still taking a 128-bit multi-bit register (X = 128) in a 7-bit addressing mode as an example, the number of selectors in the first level is 128 / 2 = 64, and the input end of each selector is connected to one bit in the 128-bit register respectively. The output ends of the first-level selectors are sequentially connected to the input ends of 32 selectors in the second level (128 / 2 2 ), and so on, until the 1 selector in the 7th level, and its output end is used as the output end of the multi-level selection module to output the register value corresponding to the target device address.

[0053] Specifically, the multi-level selection module in the embodiments of the present invention has the characteristics of simple structure and low cost.

[0054] Of course, in addition to this specific form, the multi-level selection module can also be of many other types, which are not limited in the embodiments of the present invention.

[0055] As an alternative embodiment, the host device includes the host of the server.

[0056] Specifically, considering that the interface resources of the server host are relatively limited, it is of high value to apply this multi-slave control system to the server host. In a common server architecture, the host device is usually the server host. The server host communicates with the multi-slave control system in the BMC (Baseboard Management Controller) system through the IIC bus, sending data control commands to access external devices connected to the BMC system.

[0057] Of course, in addition to the server host, the host device can also be of various other types, which are not limited in the embodiments of the present invention.

[0058] As an alternative embodiment, the central processing unit 1 includes the central processing unit 1 of the server's baseboard management controller; the multi-slave controller 2 is integrated in the baseboard management controller.

[0059] Specifically, considering that in a server, the CPU (Central Processing Unit, central processing unit 1) of the BMC itself has rich interfaces for connecting multiple external devices, the central processing unit 1 in the embodiments of the present invention can include the central processing unit 1 of the server's baseboard management controller. In the BMC system architecture of the server, the central processing unit 1 is the CPU inside the server baseboard management controller (BMC). The multi-slave controller 2 is integrated inside the BMC chip, and the BMC internal CPU is responsible for operations such as the initialization configuration of the multi-slave controller 2 and writing address pool data. In the device initialization stage, the BMC internal CPU writes the address pool data into the address pool module of the multi-slave controller 2 through a control bus (such as the APB bus) to achieve the initialization settings of the system.

[0060] Of course, in addition to this specific form, the central processing unit 1 can also be other processors in the server, which are not limited in the embodiments of the present invention.

[0061] As an alternative embodiment, the data interface module includes a data sampling and transmission module, an address shift register, and a data shift register; the data sampling and transmission module is used to convert the serial data sent by the host device into parallel data, and under the control of the control device, convert the device address in the address shift register and the data in the data shift register into serial data and then send it to the host device; the address shift register is used to store the target device address sent by the host device under the control of the data sampling and transmission module, and is also used to store the device address sent by the control device under the control of the control device; the data shift register is used to store the data sent by the host device under the control of the data sampling and transmission module, and is also used to store the data sent by the control device under the control of the control device.

[0062] Specifically, for a better illustration of the embodiments of the present invention, please refer to Figure 3 , Figure 3 which is a schematic structural diagram of another multi-slave control system provided by the present invention. After receiving the serial data sent by the host device, the data sampling and transmission module converts it into parallel data for subsequent processing. Under the control of the control device, it converts the device address in the address shift register and the data in the data shift register into serial data and then sends it back to the host device. The address shift register receives and stores the target device address sent by the host device under the control of the data sampling and transmission module; under the control of the control device, it can also store the device address sent by the control device. Similarly, the data shift register stores the data sent by the host device and the control device.

[0063] Specifically, through the above data interface module, efficient and stable data interaction between the control device and the host device can be achieved.

[0064] As an optional embodiment, the control device includes a control module, an interrupt generation module, a response processing module, and a register module; the control module is used to, when the judgment result is yes, control the response processing module to send an acknowledgment signal to the host device, store the target device address in the register module, and control the interrupt generation module to send an interrupt to the central processing unit 1, so as to trigger the central processing unit 1 to obtain the target device address from the register module and communicate with the target external device.

[0065] Specifically, for a better illustration of the embodiments of the present invention, please refer to Figure 4 , Figure 4 which is a schematic flowchart of the first multi-slave control method provided by the present invention, including configuring the device address pool of the external device through the central processing unit 1, receiving the target device address sent by the host device, judging whether the target device address is in the device address pool, if not, ending, if so, generating an acknowledgment signal for the host device, and then the multi-slave controller 2 controls the central processing unit 1 to read data or write data according to the read / write flag bit, and then the work of transmitting data and processing responses can be executed.

[0066] Specifically, when the control device receives the judgment result from the address pool module that there is a target device address, the control module immediately comes into play. It controls the response processing module to send an acknowledgment signal (such as an ack signal) to the host device, informing the host device that the address has been recognized; at the same time, it stores the target device address in the register module and controls the interrupt generation module to send an interrupt signal to the central processing unit 1. After receiving the interrupt signal, the central processing unit 1 reads the target device address from the register module and then conducts data communication with the target external device.

[0067] Specifically, the control device in the above form can efficiently and accurately implement the process from judgment result recognition to response signal transmission and interruption of transmission.

[0068] Of course, in addition to this specific form, the control device can also be in other forms, which are not limited in the embodiments of the present invention.

[0069] Specifically, to better illustrate the embodiments of the present invention, please refer to Figure 5 , Figure 5 which is a schematic flowchart of the state machine jump of a control module provided by the present invention. The system is initially in the idle state. When a start signal is detected, the state jump starts, and then the IIC address is listened to. The 7-bit address (target device address) of the IIC is stored in the shift register through the shift register, and then the value in the shift register is input to the address pool module to determine whether the address exists in the device address pool. If it exists, an ack response is generated and the transmission state is entered; then, according to the read / write flag signal bit incoming on the IIC bus, the state machine jumps to the read data state or the write data state. When in the read / write data state, the central processing unit 1 is required to cooperate to complete the data reading and writing process. When the host device of the IIC reads data, it first sends a read data control command. After the multi-slave controller 2 receives the read data control command, it generates a data interrupt for the central processing unit 1. The central processing unit 1 parses the read data control command and writes the data to be transmitted into the "write data buffer", and then returns it to the host device of the IIC after serial timing conversion. Similarly, when the host device writes data, it first sends a write data control command. After the multi-slave controller 2 receives it, it puts the data into the read data buffer through serial timing conversion. After the central processing unit 1 receives the interrupt, it reads the data in the "read data buffer".

[0070] Among them, correct address == 0 indicates that the target device address does not exist in the device address pool, correct address == 1 indicates that the target device address exists in the device address pool, write == 1 indicates the write data control instruction sent by the host device, read == 1 indicates the read data control instruction sent by the host device, and response signal = 1 indicates sending a response signal to the host device.

[0071] After the multi-slave controller 2 generates an interrupt, it is equivalent to notifying the CPU to read the register module to confirm the target device address currently in communication transmission, drive different external devices according to different addresses, and then write and read the data sent or received to complete the IIC data communication process.

[0072] When the current data transmission is completed (or in the transmission state), the control module of the multi-slave controller 2 receives an end signal notification, and the internal state machine jumps to the idle state, waiting for the next data transmission.

[0073] As an alternative embodiment, the register module is further configured to: under the control of the central processing unit 1, save the configuration parameters of the addressing mode so as to adjust the addressing mode used by the control device.

[0074] Specifically, considering that the register module can meet the configuration function of the addressing mode, the register module in the embodiment of the present invention can also, under the control of the central processing unit 1, save the configuration parameters of the addressing mode, such as the selection parameters of the 7-bit or 10-bit addressing mode. When the system needs to adjust the addressing mode, the (BMC internal) CPU sends an instruction to the register module through the control bus to modify the configuration parameters, thereby adjusting the addressing mode used by the control device to adapt to different device connection requirements.

[0075] Among them, in addition to configuring the addressing mode, the register module can also, under the control of the central processing unit 1, save the configuration parameters of the interrupt type so as to adjust the interrupt type used by the control device.

[0076] As an alternative embodiment, the data buffer module includes a bus data parsing module, a write data buffer, and a read data buffer; the bus data parsing module is configured to parse the data sent by the central processing unit 1 through the control bus, store the parsed data in the write data buffer, and is further configured to send the data in the read data buffer to the control bus of the central processing unit 1; the control device is further configured to send the data in the write data buffer to the host device through the data interface module, and write the data sent by the host device into the read data buffer.

[0077] Specifically, the bus data parsing module receives the data sent by the central processing unit 1 through the control bus (such as the APB bus), parses it, and stores it in the write data buffer. When it is necessary to send the data back to the central processing unit 1, the bus data parsing module reads the data from the read data buffer and sends it to the control bus of the central processing unit 1. The control device sends the data in the write data buffer to the host device through the data interface module; at the same time, writes the data sent by the host device into the read data buffer to achieve the orderly transfer of data between different devices.

[0078] Among them, the write data buffer and the read data buffer can be of various types respectively. For example, they can be FIFO (First In First Out), etc., which are not limited in the embodiment of the present invention.

[0079] Specifically, through the data buffer module in the above form, the orderly transfer of data between different devices can be achieved efficiently and stably.

[0080] Of course, in addition to the above form, the data buffer module can also be of many other types, which are not limited in the embodiment of the present invention.

[0081] As an alternative embodiment, the central processing unit 1 is further configured to: in response to a configuration instruction, modify the device addresses in the device address pool.

[0082] Specifically, after receiving the configuration instruction, the central processing unit 1 (such as the CPU inside the BMC) can modify the device addresses in the device address pool. For example, when a new external device is added to the system, the CPU inside the BMC sends an instruction to the address pool module of the multi-slave controller 2 via the control bus according to the address information of the new device, and adds the new device address to the address pool; if a device is removed, the corresponding device address is deleted to ensure the consistency between the address pool and the actual external devices and guarantee the normal communication of the system.

[0083] Please refer to Figure 6 , Figure 6 FIG.

[0084] For the introduction of the multi-slave control method provided by the embodiments of the present invention, please refer to the embodiments of the multi-slave control system described above, and the embodiments of the present invention will not be elaborated here.

[0085] Please refer to Figure 7 , Figure 7 FIG.

[0086] For the introduction of the multi-slave control device provided by the embodiments of the present invention, please refer to the embodiments of the multi-slave control system described above, and the embodiments of the present invention will not be elaborated here.

[0087] The present invention also provides a computer program product, including a computer program / instructions, and when the computer program / instructions are executed by a processor, the steps of the multi-slave control method in the foregoing embodiments are implemented.

[0088] For the introduction of the computer program product provided by the embodiments of the present invention, please refer to the embodiments of the multi-slave control system described above, and the embodiments of the present invention will not be elaborated here.

[0089] Please refer to Figure 8 , Figure 8 which is a schematic structural diagram of a computer-readable storage medium provided by the present invention. A computer program 82 is stored on the computer-readable storage medium 8. When the computer program 82 is executed by a processor, the steps of the multi-slave control method in the foregoing embodiments are implemented.

[0090] For the introduction of the computer-readable storage medium provided by the embodiments of the present invention, please refer to the embodiments of the foregoing multi-slave control system. The embodiments of the present invention will not be elaborated herein.

[0091] In this specification, the various embodiments are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple. For the related parts, please refer to the description in the method part. It should also be noted that in this specification, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover a non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0092] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art. The general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A multi-slave control system, characterized in that, Including: A central processing unit connected to multiple external devices, which is used to, after being triggered by a multi-slave controller, implement data interaction between the host device and the target external device through the multi-slave controller according to the data interaction type specified by the read / write flag bit in the data control command; A multi-slave controller respectively connected to the central processing unit and the host device of the integrated circuit bus, which is used to determine whether the target device address in the data control command sent by the host device of the integrated circuit bus exists in the preset device address pool; if it exists, trigger the central processing unit; Wherein, the device address pool includes the device addresses of each external device communicatively connected to the central processing unit, the data interaction type includes read or write, and the target external device is: the external device whose device address is the target device address; The multi-slave controller includes a control device, a data interface module, a data buffer module, and an address pool module; The data interface module is respectively connected to the host device of the integrated circuit bus, the control device, and the address pool module, and the data buffer module is respectively connected to the control device and the central processing unit; The data interface module is used to respectively implement data transmission between the address pool module and the control device and the host device; The address pool module is used to, after receiving the target device address in the data control command sent by the host device through the data interface module, determine whether the target device address exists in the preset device address pool and give a judgment result; The control device is used to trigger the central processing unit when the judgment result is yes; The data buffer module is used to implement read / write data buffering between the host device and the target device connected to the central processing unit; The address pool module includes a multi-bit register and a multi-level selection module; The number of bits of the multi-bit register is: the total number of device addresses supported by the number of bits of the addressing mode, and the number of levels of the selector of the multi-level selection module is equal to the number of bits of the addressing mode; The multi-level selection module is used to use the numerical values of each bit order in the binary target device address as control signals to input to the control ends of each selector in the layer corresponding to the bit order one by one in the multi-level selection module, so that the multi-level selection module outputs the register value of the register bit corresponding to the target device address; Wherein, when the register value output by the multi-level selection module is a preset valid value, it means that the target device address exists in the preset device address pool.

2. The multi-slave control system according to claim 1, wherein The number of selectors in each layer of the multi-level selection module is: X / 2 n ； The input end of any selector in the first layer is correspondingly connected to one bit of the multi-bit register, the output ends of each selector in the previous layer are correspondingly connected to the input ends of each selector in the next layer, and the output end of the selector in the nth layer is used as the output end of the multi-level selection module; Wherein, X is the number of bits of the multi-bit register, and n is the layer serial number.

3. The multi-slave control system according to claim 1, characterized in that, The host device includes the host of the server.

4. The multi-slave control system according to claim 3, characterized in that, The central processing unit includes the central processing unit of the baseboard management controller of the server; The multi-slave controller is integrated in the baseboard management controller.

5. The multi-slave control system according to claim 1, characterized in that, The data interface module includes a data sampling and transmission module, an address shift register, and a data shift register; The data sampling and transmission module is used to convert the serial data sent by the host device into parallel data, and under the control of the control device, convert the device address in the address shift register and the data in the data shift register into serial data and then send it to the host device; The address shift register is used to store the target device address sent by the host device under the control of the data sampling and transmission module, and is also used to store the device address sent by the control device under the control of the control device; The data shift register is used to store the data sent by the host device under the control of the data sampling and transmission module, and is also used to store the data sent by the control device under the control of the control device.

6. The multi-slave control system according to claim 1, characterized in that, The control device includes a control module, an interrupt generation module, a response processing module, and a register module; The control module is used to, when the judgment result is yes, control the response processing module to send an acknowledgment signal to the host device, store the target device address in the register module, and control the interrupt generation module to send an interrupt to the central processing unit, so as to trigger the central processing unit to obtain the target device address from the register module and communicate with the target external device.

7. The multi-slave control system according to claim 6, wherein The register module is further used for: Save the configuration parameters of the addressing mode under the control of the central processing unit, so as to adjust the addressing mode used by the control device.

8. The multi-slave control system according to claim 1, characterized in that, The data buffer module includes a bus data parsing module, a write data buffer, and a read data buffer; The bus data parsing module is used to parse the data sent by the central processing unit through the control bus, store the parsed data in the write data buffer, and is also used to send the data in the read data buffer to the control bus of the central processing unit; The control device is further used to send the data in the write data buffer to the host device through the data interface module, and write the data sent by the host device into the read data buffer.

9. The multi-slave control system according to any one of claims 1 to 8, characterized in that, The central processing unit is further used for: In response to the configuration instruction, modify the device addresses in the device address pool.

10. A multi-slave control method, characterized in that, Applied to the multi-slave control system according to any one of claims 1 to 9, including: Obtain the target device address in the data control command sent by the host device of the integrated circuit bus; Judge whether the target device address exists in the preset device address pool, where the device address pool includes the device addresses of each external device communicatively connected to the multi-slave control device; If it exists, perform data interaction with the target external device according to the data interaction type specified by the read / write flag bit in the data control command, where the data interaction type includes read or write, and the target external device is: the external device with the device address being the target device address.

11. A multi-slave control device, characterized in that, Including: A memory for storing a computer program; A processor for implementing the steps of the multi-slave control method according to claim 10 when executing the computer program.

12. A computer program product, comprising a computer program / instructions, characterized in that, The computer program / instructions, when executed by the processor, implement the steps of the multi-slave control method according to claim 10.

13. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, and when the computer program is executed by the processor, the steps of the multi-slave control method according to claim 10 are implemented.

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