Data transmission method and receiving device for LED backlight display equipment

By setting constant sequences, device addresses and register addresses in the data frames, enabling specific differential data lines and directed transmission of data frames is solved, and the bandwidth and power consumption waste problems that Mini-LVDS technology exists in the data transmission process is improved, and the flexibility and efficiency of data transmission is improved, and equipment costs are reduced.

CN120183348AActive Publication Date: 2025-06-20SHENZHEN INJOINIC TECH
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Patent Information

Application Number
CN202510583105.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-07
Publication Date
2025-06-20
Estimated Expiration
2045-05-07

AI Technical Summary

Technical Problem

The existing Mini-LVDS technology has problems of bandwidth and power consumption during data transmission, and it is impossible to flexibly enable specific differential data lines, and it is difficult to adapt to high-resolution/high refresh rate LED backlit display devices.

Method used

By setting a constant sequence, device address and register address in the data frame, enabling the activation of a specific differential data line and directed transmission of the data frame is realized, and data communication between the master device and multiple LED backlight display devices is supported.

Benefits of technology

It effectively avoids bandwidth and power consumption waste, improves the flexibility and efficiency of data transmission, reduces the requirements for the number of differential interfaces of the main control equipment, and reduces equipment costs.

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Abstract

The invention discloses a data transmission method and receiving device for LED backlight display equipment, and the method comprises the steps: outputting a data frame which at least comprises a constant sequence, an equipment address, a register address, the number of data and display data; acquiring and analyzing a data frame; when a constant sequence is measured, starting data communication; enabling a particular differential data line based on the device address; a slave device corresponding to a particular differential data line receives a data frame. Therefore, the specific differential data line is started by setting the constant sequence, the device address is matched, data communication between the main control device and the specified LED backlight display device is achieved in the current communication, the use flexibility is high, the problem of bandwidth and power consumption waste is avoided, the main control device does not need to independently connect wires for all the slave devices, and the cost is reduced. And the requirement on the number of differential interfaces of the main control equipment is greatly reduced, the redundancy margin is greatly improved, and the equipment cost is effectively reduced.
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Description

Technical Field

[0001] The present invention relates to the technical field of data transmission, and in particular, to a data transmission method and a receiving device for an LED backlight display device. Background Art

[0002] For a long time, master devices mostly transmit data to LED backlight display devices through SPI (Serial Peripheral Interface), I2C (Inter-Integrated Circuit) or parallel interfaces. The above transmission schemes all adopt traditional single-ended transmission methods, which are suitable for wired short-distance transmission within one meter. However, with the rapid development of LED backlight display devices in terms of panel specifications, resolution, refresh rate and other indicators, the above transmission schemes further expose the problems of low bandwidth and difficulty in adapting to high-resolution / high-refresh-rate LED backlight display devices. In addition, the parallel interface method has multiple wire harnesses, and strict constraints on data timing are required during the data transmission process to avoid out-of-order, which increases the implementation difficulty and hardware cost at the hardware end.

[0003] Therefore, the existing Mini-LVDS technology (Mini Low Voltage Differential Signaling) that uses one or more pairs of differential data lines to transmit data has good low-power and anti-interference performance, and at the same time has a relatively high bandwidth, so it is widely used for data transmission between various terminal devices and LED backlight display devices.

[0004] However, Mini-LVDS is still in the process of iterative improvement, and there are still the following defects at present: 1. During the data transmission process, the differential data lines can only communicate in a fixed logarithm, and there is a problem of bandwidth and power consumption waste when the amount of transmitted data is small; 2. It is impossible to specifically enable specific differential data lines, and it is impossible to specify the data flow of each pair of differential data lines. Only data transmission can be performed in a pre-allocated communication mode. When the amount of data is large, time-division transmission may be required, and then data alignment is performed; 3. Existing Mini-LVDS is mostly used for point-to-point connections. The differential interfaces on the master device correspond one-to-one with the differential interfaces on the slave device, and it does not support a single differential interface on the master device to connect multiple slave devices, which puts relatively high requirements on the number of differential interfaces of the master device, and it is difficult to balance the device scale and device cost. Summary of the Invention

[0005] The first aspect of the embodiments of the present invention discloses a data transmission method for an LED backlight display device, which specifically includes:

[0006] Output a data frame, where the data frame at least includes a constant sequence, a device address, a register address, the number of data, and display data;

[0007] Obtain and analyze the data frame;

[0008] When a constant sequence is detected in the data frame, initiate data communication;

[0009] Based on the device address in the data frame, select the slave device that the master device needs to connect to in this communication;

[0010] The slave device receives the data frame.

[0011] As a preferred implementation, the constant sequence is used to identify the working state of the differential data line for transmitting this data frame;

[0012] The device address includes a broadcast mode and a single - transmission mode. The broadcast mode is used for data communication with all slave devices, and the single - transmission mode is used for data communication with slave devices at a specific address;

[0013] The register address is used to identify the starting register address accessed by the current data transmission;

[0014] The number of data is used to identify the quantity of display data transmitted by the current data frame. If the quantity of display data is i, the display data is represented as: Data_i (i = 0, 1, 2,..., i - 1).

[0015] As a preferred implementation, when multiple pairs of differential data lines are enabled for data communication, the constant sequences, device addresses, and register addresses included in the data frames transmitted by each pair of differential data lines are the same.

[0016] The second aspect of the embodiments of the present invention discloses a receiving device, including:

[0017] A receiving module corresponding to each pair of differential data lines, used to convert the serially - input data frame into parallel data;

[0018] A multiplexer electrically connected to each receiving module, used to sequentially receive the display data in the data frame;

[0019] A first - in - first - out queue, used to relay - connect the multiplexer and an external data processing module, and sequentially output the input parallel data.

[0020] As a preferred implementation, each of the receiving modules includes a sequence detector, a shift register, and a finite - state machine;

[0021] Among them, the sequence detector is used to detect the constant sequence in the data frame. When the sequence detector detects that there is a constant sequence in the data frame, it activates the shift register and the finite - state machine, and at the same time the sequence detector goes to sleep;

[0022] Also, when the sequence detector does not detect a constant sequence, the shift register and the finite state machine go into sleep mode.

[0023] As a preferred implementation, based on the data volume and bandwidth requirements of the current data communication, a specific logarithm of differential data lines are enabled to perform data communication;

[0024] Also, the constant sequence is not transmitted on the differential data lines that are not enabled.

[0025] As a preferred implementation, the shift register is used to convert the register address included in the data frame into a parallel format and output it as the reg_addr signal, which serves as the starting address for writing to the register;

[0026] Also, the display data is converted into a parallel format and output as the wr_data signal.

[0027] As a preferred implementation, when the receiving module receives the device address, the finite state machine raises the level output of the pair_vld signal and outputs a wr_data_rdy pulse signal indicating data validity when each display data is received;

[0028] Also, when the current data frame transmission is completed, the level output of the pair_vld signal is lowered.

[0029] As a preferred implementation, when the external data processing module detects the rising edge of the pair_vld signal raised by the finite state machine, the reg_addr signal is latched into the external data processing module and serves as the starting address for writing to the register;

[0030] Also, each time a display data is read from the first-in-first-out queue, the external data processing module incrementally updates the reg_addr signal in the register being written.

[0031] As a preferred implementation, the receiving device performs overall timing control based on the finite state machine, and it includes at least 5 working states, which respectively correspond to not detecting a constant sequence, receiving the device address, receiving the register address, receiving the number of data, and receiving the display data.

[0032] A third aspect of the embodiments of the present invention discloses a master device, including:

[0033] A memory storing executable program code;

[0034] A processor coupled to the memory;

[0035] The processor calls the executable program code stored in the memory and executes a data transmission method for an LED backlight display device disclosed in the first aspect of the embodiments of the present invention.

[0036] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0037] In the embodiments of the present invention, by setting the constant sequence of the data frame, specific differential data lines can be enabled. Combined with the device address, in each independent communication process, the master device can communicate with only the LED backlight display device corresponding to the device address, with strong flexibility in use and avoiding the problems of bandwidth and power consumption waste. In addition, the device address can ensure the directional transmission of display data to a specific slave device. Therefore, each slave device does not need to be independently wired from different differential interfaces on the master device, greatly reducing the requirements for the number of differential interfaces of the master device, significantly improving the redundancy margin, and effectively reducing the device cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0039] Figure 1 is a schematic flowchart of a data transmission method for an LED backlight display device disclosed in the embodiments of the present invention;

[0040] Figure 2 is a schematic structural diagram of transmitting a data frame using multiple pairs of differential data lines disclosed in the embodiments of the present invention;

[0041] Figure 3 is a schematic structural diagram of a receiving device disclosed in the embodiments of the present invention;

[0042] Figure 4 is a schematic structural diagram of a receiving module in a receiving device disclosed in the embodiments of the present invention;

[0043] Figure 5 is a timing diagram of transmitting a data frame using 4 pairs of differential data lines disclosed in the embodiments of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0044] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0045] It should be noted that the terms "first", "second", "third", "fourth", etc. in the specification and claims of the present invention are used to distinguish different objects, rather than to describe a specific order. The terms "including" and "having" in the embodiments of the present invention and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device including a series of steps or units does not necessarily have to be limited to those clearly listed steps or units, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0046] Embodiment 1

[0047] Please refer to Figures 1 - 2 , as Figure 1 shown, a data transmission method for an LED backlight display device disclosed in an embodiment of the present invention includes the following steps:

[0048] 101. Output a data frame.

[0049] In a typical application scenario, the main control device outputs display data to the LED backlight display device through a signal cable, and the LED backlight display device adjusts the color and brightness of each LED lamp string accordingly to achieve image output.

[0050] In this embodiment, the display data is combined with a frame header to form a data frame, which is transmitted by the main control device to the LED backlight display device through several pairs of differential data lines.

[0051] Specifically, the data frame at least includes a constant sequence Header, a device address DevAddr, a register address RegAddr, a data number DataNum, and display data.

[0052] In this embodiment, the constant sequence Header is used to identify the working state of the differential data line transmitting this data frame.

[0053] As an optional implementation manner, only when there is a constant sequence Header in the data frame, this differential data line is activated and enabled.

[0054] It can be seen that the constant sequence Header serves as a handshake signal for initiating data communication here. The master device can construct data frames with or without the constant sequence Header and output them to different differential data lines accordingly. Only the differential data lines with the constant sequence Header in the transmitted data frames are enabled, enabling data communication on specific pairs of differential data lines among multiple pairs of differential data lines. Thus, when the data load is small, it is not necessary to use all differential data lines. Only some differential data lines and the corresponding receiving devices are enabled to complete data communication, effectively reducing power consumption in long-term high-frequency transmission tasks. When the data load is large, redundant differential data lines can be enabled, without causing bandwidth waste.

[0055] In this embodiment, the register address RegAddr is used to identify the starting register address accessed by the current data transmission.

[0056] Specifically, in a scenario with multiple pairs of differential data lines, after the display data is divided and output, data collection is still required and then it is sent to the LED backlight display device to drive the LED lamp strings to operate. Therefore, it is necessary to determine the starting register address RegAddr during the data collection process, so as to read and collect in accordance with the transmission order to avoid disorder of the display data.

[0057] In this embodiment, the data number DataNum is used to identify the quantity of display data transmitted by the current data frame. If the quantity of display data is i, then the display data is represented as: Data_i (i = 0, 1, 2,..., i - 1).

[0058] Specifically, the data frames transmitted through different differential data lines can be represented as Figure 2 as follows.

[0059] In this embodiment, when multiple pairs of differential data lines are enabled for data communication, the constant sequence, device address, and register address included in the data frames transmitted by each pair of differential data lines are the same.

[0060] It can be understood that during a single data transmission process, the master device only establishes a data link with a single LED backlight display device based on the device address DevAddr. On this premise, the constant sequence Header, device address DevAddr, and register address RegAddr are all consistent to ensure sequential access of the display data in the register.

[0061] 102. Obtain and analyze the data frame.

[0062] In this embodiment, the constant sequence Header and device address DevAddr in the data frame are obtained and analyzed to identify whether the display data for this time needs to be received.

[0063] 103. When a constant sequence is detected in the data frame, start data communication.

[0064] In this embodiment, the constant sequence Header is a handshake signal. When the constant sequence Header is detected in the data frame, data connection is achieved between the master device and the LED backlight display device, and data communication is started.

[0065] 104. Based on the device address in the data frame, select the slave device that the master device needs to connect to in this communication.

[0066] In this embodiment, the device address DevAddr is used to declare the specific LED backlight display device that the master device needs to connect to in this data communication. Only the specific LED backlight display device corresponding to the device address DevAddr can receive display data from the master device.

[0067] In this embodiment, the device address DevAddr includes a broadcast mode and a unicast mode. The broadcast mode is used for data communication with all slave devices, and the unicast mode is used for data communication with a slave device at a specific address.

[0068] It can be understood that in the above scenario where there are multiple pairs of differential data lines, a single master device is connected to multiple LED backlight display devices simultaneously.

[0069] As an alternative implementation, if each LED backlight display device is used to display the same synchronous image, then the device address DevAddr can adopt the broadcast mode at this time. At this time, there is no need to specifically carry the device code of each LED backlight display device in the device address DevAddr, and the master device communicates with each LED backlight display device in the communication link.

[0070] As another alternative implementation, if the images displayed between different LED backlight display devices are different, then the master device needs to adopt the unicast mode. At this time, the device address DevAddr carries a specific device code. When the master device performs a single data transmission, it only achieves data communication with the corresponding LED backlight display device to ensure that the specific display data is transmitted to the corresponding LED backlight display device for display.

[0071] It can be seen that when the master device is connected to multiple LED backlight display devices simultaneously, by setting the constant sequence Header and the device address DevAddr of the data frame, it is possible to achieve data communication between the master device and only the LED backlight display device corresponding to the device address DevAddr in each independent communication process.

[0072] Furthermore, by alternately changing the device address DevAddr in different data communication processes, in the scenario of "one master and multiple slaves" where the master device is connected to multiple LED backlight display devices simultaneously, display data can be transmitted to different LED backlight display devices in batches at different times, with strong flexibility in use.

[0073] In addition, since the device address DevAddr is set to ensure the directional transmission of display data, in the scenario of "one master and multiple slaves", the master device can use a one-to-many differential data line instead of separately leading independent differential data lines from different differential interfaces on the master device to connect to each slave device, greatly reducing the requirements for the number of differential interfaces on the master device, significantly improving the redundancy margin, and effectively reducing the device cost.

[0074] Here, assuming there is a large display panel composed of multiple LED backlight display devices combined, the master device can be connected through a one-to-many differential data line. By alternately changing the device address DevAddr during the data communication process, display data is sent to each LED backlight display device at different times. In the case of high-frequency transmission, a visual effect of smooth synchronous playback of each LED backlight display device can be obtained without configuring an independent master device for each LED backlight display device, reducing the device cost and eliminating the signal synchronization problem existing in multiple master devices at the same time.

[0075] 105. The slave device receives the data frame.

[0076] In this embodiment, after the data transmission channel is established between the master device and a specific slave device, the display data is transmitted to the specific slave device through a specific differential data line.

[0077] Thus, the master device does not need to independently connect differential data lines to each slave device, but realizes slave device authentication and communication through the device address DevAddr.

[0078] In summary, by setting the constant sequence Header of the data frame, enabling a specific differential data line can be achieved. In combination with the device address DevAddr, in each independent communication process, the master device can communicate with only the LED backlight display device corresponding to the device address DevAddr, with strong flexibility in use and avoiding the problems of bandwidth and power consumption waste. In addition, the device address DevAddr can ensure the directional transmission of display data to a specific slave device, so each slave device does not need to be independently wired from different differential interfaces on the master device, greatly reducing the requirements for the number of differential interfaces on the master device, significantly improving the redundancy margin, and effectively reducing the device cost.

[0079] Embodiment 2

[0080] Please refer to Figures 3 - 5 As shown in Figure 3As shown, the receiving device may include:

[0081] Receiving modules corresponding one by one to each pair of differential data lines, for converting the serially input data frames into parallel data;

[0082] A multiplexer electrically connected to each receiving module, for sequentially receiving the display data in the data frames;

[0083] A first-in first-out queue, for relaying and connecting the multiplexer and an external data processing module, and sequentially outputting the parallel data input in sequence.

[0084] As Figure 4 shown, in this embodiment, each receiving module includes a sequence detector, a shift register and a finite state machine;

[0085] Among them, the sequence detector is used to detect the constant sequence in the data frame. When the sequence detector detects that there is a constant sequence in the data frame, it activates the shift register and the finite state machine, and at the same time the sequence detector goes to sleep;

[0086] And when the sequence detector does not detect the constant sequence, the shift register and the finite state machine go to sleep.

[0087] Specifically, the sequence detector is used to detect whether the corresponding differential data line inputs a constant sequence Header, and after detecting the constant sequence Header, it activates the shift register and the finite state machine to receive the data frame and the display data contained therein.

[0088] That is, if the sequence detector never detects the constant sequence Header, the corresponding differential data line will not be enabled, and other functional modules in the corresponding receiving device will not be activated and run.

[0089] In other words, the master device can select to send a constant sequence Header to a specific differential data line to enable the specific differential data line, so as to flexibly adjust the number of enabled differential data lines according to the actual traffic load, reduce power consumption, and improve bandwidth utilization. Or, by enabling the differential data line corresponding to a specific slave device, the directed transmission to the specific slave device is realized.

[0090] As an optional implementation manner, based on the data volume and bandwidth requirements of the current data communication, a specific number of pairs of differential data lines are enabled to perform data communication;

[0091] And, the constant sequence is not transmitted to the unenabled differential data lines.

[0092] It can be seen that in the case where the master device is connected to different slave devices in multiple lines, the setting of the constant sequence Header provides diversified transmission modes and control schemes. When the traffic load is small, only some differential data lines can be enabled, and when the traffic load is large, redundant differential data lines can be enabled, thereby improving the bandwidth utilization rate and reducing the device power consumption.

[0093] As an optional implementation manner, while activating the shift register and the finite state machine, the sequence detector will go into self-sleep.

[0094] It can be understood that after the sequence detector measures the constant sequence Header, the shift register will receive the display data included in this data communication. If the value of the display data is equal to the value of the constant sequence Header at this time, the display data will erroneously trigger the sequence detector, thereby generating two activation signals in a single data communication, affecting the normal operation of the shift register and the finite state machine, and causing the cache sequence and the display data to be disordered.

[0095] Therefore, the sequence detector will immediately go into sleep after measuring the constant sequence Header to avoid the above situation. It will not be activated again until the shift register has received all the display data and this data communication ends.

[0096] As an optional implementation manner, the shift register is used to convert the register address included in the data frame into a parallel format and output it as the reg_addr signal, which serves as the starting address for writing to the register;

[0097] And, convert the display data into a parallel format and output it as the wr_data signal.

[0098] Here, the multiplexer sorts the wr_data signals generated by each receiving module according to the number size of each receiving module, and the parallel-format wr_data signals are written into the first-in-first-out queue in sequence according to the number order of the receiving modules.

[0099] As an optional implementation manner, when the receiving module receives the device address, the finite state machine raises the level output of the pair_vld signal and outputs a wr_data_rdy pulse signal indicating data validity when each display data is received;

[0100] And, when the current data frame transmission is completed, lower the level output of the pair_vld signal.

[0101] Here, the finite state machine outputs the reception and access status of the display data to the external data processing module by adjusting the level state of the pair_vld signal, so that the external data processing module can cooperate to execute the display data reading.

[0102] As an alternative implementation, when the external data processing module detects the rising edge of the pair_vld signal pulled high by the finite state machine, the reg_addr signal is latched into the external data processing module as the starting address for writing to the register.

[0103] Moreover, each time a display data is read from the first-in first-out queue, the external data processing module incrementally updates the reg_addr signal in the write register.

[0104] Specifically, for the read operation of the display data, the external data processing module also feeds back to trigger the incremental update of its internal write register. Thus, the external data processing module reads the display data sequentially and writes them sequentially, enabling sequential reading of the display data transmitted through multiple pairs of differential data lines and avoiding out-of-order situations.

[0105] Here, assume that in this data communication, the master device enables 4 pairs of differential data lines and transmits in single-transmission mode. Then, each data frame can be characterized as Figure 5 shown.

[0106] During the data communication process, when each receiving module has completed receiving one data, a total of 4 wr_data_rdy pulse signals indicating data validity are generated and input into the multiplexer. As Figure 5 shown, the multiplexer accordingly assigns 0-beat, 1-beat, 2-beat, and 3-beat time delays to the 4 wr_data_rdy pulse signals respectively, denoted as data_rdy0_dd0, data_rdy1_dd1, data_rdy2_dd2, and data_rdy3_dd3. Thus, when data_rdy0_dd0 is at a high level, the display data received by the corresponding differential data line is written into the first-in first-out queue. When data_rdy1_dd1 is at a high level, the display data received by the corresponding differential data line is written into the first-in first-out queue, and so on. The display data of each pair of differential data lines will be written into the first-in first-out queue in sequence.

[0107] Subsequently, each receiving module continues to receive the next display data and performs the above sorting and writing operations via the multiplexer until each receiving module has completed receiving the display data of the DataNum quantity, at which point this data communication ends.

[0108] In this embodiment, the receiving device performs overall timing control based on the finite state machine, which includes at least 5 working states, corresponding to not detecting the constant sequence Header, receiving the device address DevAddr, receiving the register address RegAddr, receiving the data quantity DataNum, and receiving the display data respectively.

[0109] Specifically, the transfer conditions for the previous working state are as follows:

[0110] (a) The constant sequence Header is not detected;

[0111] (b) The constant sequence Header is detected, and the device address DevAddr starts to be received;

[0112] (c) The device address DevAddr is being received;

[0113] (d) After the device address DevAddr is received completely, the register address RegAddr starts to be received;

[0114] (e) The register address RegAddr is being received;

[0115] (f) After the register address RegAddr is received completely, the data number DataNum starts to be received;

[0116] (g) The data number DataNum is being received;

[0117] (h) After the data number DataNum is received completely, the display data starts to be received;

[0118] (i) The display data is being received;

[0119] (j) After DataNum display data are received completely.

[0120] Thus, in the above loop process, the display data synchronously transmitted through each differential data line are read by the receiving module and sequentially written into the first-in first-out queue under the timing control of the multiplexer. The external data processing module sequentially reads the display data according to the order in the first-in first-out queue for realizing image output.

[0121] Those of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium. The storage medium includes read-only memory (ROM), random access memory (RAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), one-time programmable read-only memory (OTPROM), electrically-erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc memories, magnetic disc memories, magnetic tape memories, or any other medium that can be used to carry or store data and is computer-readable.

[0122] The above has introduced in detail a data transmission method and a receiving device for an LED backlight display device disclosed in the embodiments of the present invention. Specific examples are used herein to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A data transmission method for an LED backlight display device, characterized in that: The method comprises: Outputting a data frame, wherein the data frame at least includes a constant sequence, a device address, a register address, a data quantity and display data; Get and analyze data frames; When it is detected that a constant sequence exists in the data frame, data communication is started; Based on the device address in the data frame, select the slave device that the master device needs to communicate with in this communication; The slave device receives a data frame.

2. A data transmission method for an LED backlight display device according to claim 1, characterized in that: include: The constant sequence is used to identify the working state of the differential data line transmitting the data frame; The device address includes a broadcast mode and a single transmission mode, wherein the broadcast mode is used to perform data communication with all slave devices, and the single transmission mode is used to perform data communication with a slave device with a specific address; The register address is used to identify the starting register address accessed by the current data transmission; The data number is used to identify the number of display data transmitted in the current data frame. If the number of display data is i, the display data is represented by: Data_i (i=0, 1, 2, . . . , i-1).

3. A data transmission method for an LED backlight display device according to claim 1, characterized in that: include: When multiple pairs of differential data lines are enabled for data communication, the constant sequence, device address and register address contained in the data frame transmitted by each pair of differential data lines are the same.

4. A receiving device, characterized in that: The receiving device comprises: A receiving module corresponding to each pair of differential data lines is used to convert the serial input data frame into parallel data; A multiplexer electrically connected to each receiving module for sequentially receiving display data in the data frame; The first-in-first-out queue is used to relay the multiplexer and the external data processing module, and sequentially output the parallel data input in sequence.

5. A receiving device according to claim 4, characterized in that: include: Each of the receiving modules is provided with a sequence detector, a shift register and a finite state machine; Wherein, the sequence detector is used to detect a constant sequence in a data frame. When the sequence detector detects that a constant sequence exists in the data frame, the shift register and the finite state machine are activated, and the sequence detector is in sleep mode. Furthermore, when the sequence detector does not detect a constant sequence, the shift register and the finite state machine are in sleep mode.

6. A receiving device according to claim 5, characterized in that: include: Based on the data volume and bandwidth requirements of the current data communication, a specific number of differential data lines are enabled to perform data communication; Also, the constant sequence is not transmitted to the differential data lines that are not enabled.

7. A receiving device according to claim 5, characterized in that: include: The shift register is used to convert the register address contained in the data frame into a parallel format and output it as a reg_addr signal as the starting address of the write register; Also, the display data is converted into a parallel format and output as a wr_data signal.

8. A receiving device according to claim 7, characterized in that: include: When the receiving module receives the device address, the finite state machine pulls up the level output of the pair_vld signal, and outputs a wr_data_rdy pulse signal indicating that the data is valid after receiving each display data; And, when the data frame transmission is completed, the level output of the pair_vld signal is pulled low.

9. A receiving device according to claim 8, characterized in that: include: When the external data processing module detects that the finite state machine pulls up the rising edge of the pair_vld signal, the reg_addr signal is latched into the external data processing module as the starting address of the write register; And, each time a display data is read from the FIFO queue, the external data processing module incrementally updates the reg_addr signal in the write register.

10. A receiving device according to claim 8, characterized in that: include: The receiving device performs overall timing control based on the finite state machine, which includes at least 5 working states, corresponding to unmeasured constant sequence, receiving device address, receiving register address, receiving data number and receiving display data.

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