Integrated circuit packaging system with isolation structure

Abstract

The invention provides an integrated circuit packaging system with an isolation structure. The system comprises an isolation barrier building assembly which divides a function module and a signal path into a plurality of isolation areas; the electrical performance test assembly is responsible for applying an electrical performance test signal of the integrated circuit at the input end of the integrated circuit, collecting an output signal of the integrated circuit at the output end, and analyzing the electrical performance test signal and the output signal to obtain a quality parameter of the electrical performance test signal; and the signal path adjustment component is responsible for providing adjustment suggestions for the signal path of the current integrated circuit according to the analysis result of the quality parameters. According to the invention, electrical isolation and physical protection are ensured; the signal quality and the system performance under the isolation structure are evaluated through analysis of the test signal and the output signal; providing an optimization suggestion according to a test result, and adjusting a signal path and an isolation barrier design; and the integrated circuit packaging system with the isolation structure is ensured to reach the optimal level in the aspects of electrical performance, signal integrity and reliability.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device packaging, and particularly relates to an integrated circuit packaging system with an isolation structure. Background Art

[0002] With the rapid development of integrated circuit technology, the functions of chips are becoming increasingly complex and the integration degree is getting higher and higher. Between the chip and the packaging substrate, the integrity and stability of signal transmission become one of the key factors determining the overall performance. However, in the complex circuit environment of semiconductor devices, electrical interference is likely to occur between different functional modules or signal paths. Electrical interference may cause problems such as signal distortion and increased delay, and even affect the normal operation of the chip. To solve this problem, the introduction of an isolation structure has become an important research direction in the field of integrated circuit packaging. Through a physical barrier or an insulating material layer, the isolation structure can effectively block electrical interference and ensure the efficiency and stability of signal transmission. Therefore, developing an integrated circuit packaging system with an efficient isolation structure has important technical value and practical application significance.

[0003] Prior Art One, Application No.: CN202210050133.4 discloses an integrated circuit chip, an integrated circuit package, and a method of forming a pad structure, which is directed to an integrated circuit (IC) chip including a high-pin pad structure. Conductors are located on the front surface of the semiconductor substrate and below the semiconductor substrate. Additionally, a trench isolation structure extends into the front surface of the semiconductor substrate. The high-pin pad structure is embedded in the back surface of the semiconductor substrate opposite to the front surface. The high-pin pad structure includes a pad body and a pad protrusion. The pad protrusion is located below the pad body and protrudes toward the conductor through a portion of the semiconductor substrate and the trench isolation structure. The pad body is located above a portion of the semiconductor substrate and is separated from the trench isolation structure by the portion of the semiconductor substrate. Although an integrated circuit chip, an integrated circuit package, and a method of forming a pad structure are provided; however, the isolation function is not mentioned, and further improvement is needed in terms of preventing signal interference and improving circuit performance.

[0004] Prior Art 2, Application No.: CN201910369158.9 discloses a method for forming a semiconductor device and a semiconductor device, including forming fins, dummy gates, and encapsulation structures on a substrate; forming a first interlayer dielectric layer on one side of the dummy gate, forming a second interlayer dielectric layer between adjacent fins, and simultaneously forming a first masking trench for fins; depositing a thin film layer on the peripheries of the first interlayer dielectric layer and the second interlayer dielectric layer to form an isolation structure; forming a second masking trench for fins on the side of the second interlayer dielectric layer away from the substrate. Compared with directly depositing mask layer materials on the interlayer dielectric layer in the prior art to form a mask. Although the thin film layer is used to isolate the first masking trench for fins formed on the peripheries of the first interlayer dielectric layer and the second interlayer dielectric layer, and the second masking trench for fins formed on the side of the second interlayer dielectric layer away from the substrate, effectively avoiding the problem of short circuit between mask layer materials. The present invention also discloses a semiconductor device with better performance; however, it does not involve the adjustment of signal paths, and the technical means for improving the quality and efficiency of signal transmission are relatively single; nor does it involve the overall electrical performance test, and it cannot timely detect the improvement bottleneck of integrated circuits.

[0005] Prior Art 3, Application No.: CN202010086320.9 discloses a signal isolation structure for electromagnetic communication, a method, a system, and a device for an EM isolation structure. One of the devices includes a communication module, and the communication module includes: a printed circuit board; a plurality of integrated circuit packages, each integrated circuit package includes at least one transmitter, receiver, or transceiver; and one or more metal barrier structures configured to at least partially surround the corresponding integrated circuit package among the plurality of integrated circuit packages. Although each metal barrier structure is configured to reduce signal leakage from the corresponding integrated circuit package; or a plurality of isolation structures can reduce crosstalk between communication channels with a small separation distance; however, it does not mention a signal path adjustment method and cannot further reduce signal leakage and crosstalk.

[0006] Currently, Prior Art 1, Prior Art 2, and Prior Art 3 have problems such as insufficient isolation function, insufficient signal path optimization, signal leakage, and crosstalk. Therefore, the present invention provides an integrated circuit package system with an isolation structure. Summary of the Invention

[0007] To solve the above technical problems, the present invention provides an integrated circuit package system with an isolation structure, including: An isolation barrier construction component, responsible for installing isolation devices for isolating functional modules and signal paths before the integrated circuit is encapsulated, and the isolation devices divide the functional modules and signal paths into several isolation regions; An electrical performance test component is responsible for applying an electrical performance test signal to the input end of an integrated circuit, collecting the output signal of the integrated circuit at the output end, analyzing the electrical performance test signal and the output signal, and obtaining quality parameters of the electrical performance test signal; A signal path adjustment component is responsible for providing adjustment suggestions for the signal path of the current integrated circuit according to the analysis result of the quality parameters.

[0008] Optionally, an isolation barrier construction component includes: A location information acquisition module is responsible for acquiring the layout of functional modules and signal paths in the integrated circuit, and obtaining the location information of the functional modules and the direction of the signal paths; An isolation device manufacturing module is responsible for manufacturing an isolation device composed of a dielectric isolation component, a metal shielding enhancement component, a microstructure and a filling material device, etc.; an isolation cavity is added between the microstructure and the filling material device, and the isolation cavity is surrounded by silicone rubber; An installation location confirmation module is responsible for confirming the position of the chip of the integrated circuit and the packaging substrate, confirming the installation position of the isolation device according to the location information and the direction, and installing the isolation device between the chip of the integrated circuit and the packaging substrate; at the same time, marking position stamps corresponding to the functional modules and signal paths on several isolation areas divided by the isolation device.

[0009] Optionally, the installation location confirmation module includes: An information analysis sub-module is responsible for obtaining the longitude and latitude coordinates and size position information of the functional modules in the area to be protected; at the same time, it is also necessary to obtain the direction of the signal path including the starting point, the ending point and the path nodes; after collecting the location information and the signal path, analyze the signal path to find the key nodes and the path direction; according to the signal path direction, divide the area to be protected into several isolation areas and mark them on the circuit map; A region pairing sub-module is responsible for identifying the functional modules corresponding to the isolation regions after dividing the isolation regions; analyzing the correlation between the signal path and each functional module through the signal flow direction to obtain the mapping relationship between the signal path and each functional module; pairing the isolation regions with the functional modules to determine which functional modules are protected by which isolation regions; A location confirmation sub-module is responsible for obtaining the location information of the isolated functional modules and signal paths, that is, the installation position of the isolation device, according to the longitude and latitude coordinates and size position information of the paired functional modules and the marked isolation regions.

[0010] Optionally, the electrical performance test component includes: The parameter set input module is responsible for obtaining the parameter set of the electrical performance test signals that include the voltage fluctuation, current change, and temperature change conditions of the integrated circuit; meanwhile, it collects the response output of the integrated circuit to the parameter set of the electrical performance test signals at the output end of the integrated circuit. The response output analysis module is responsible for analyzing the response output. The analysis content includes time-domain analysis, frequency-domain analysis, statistical analysis, and waveform analysis, and obtains the characteristics of the response output corresponding to the time-domain analysis, frequency-domain analysis, statistical analysis, and waveform analysis. The quality parameter confirmation module is responsible for determining the quality parameters of the parameter set of the electrical performance test signals during the transmission process of the integrated circuit according to the characteristics of the response output corresponding to the time-domain analysis, frequency-domain analysis, statistical analysis, and waveform analysis. The quality parameters include attenuation, delay, and distortion.

[0011] Optionally, the parameter set input module includes: The factor confirmation sub-module is responsible for determining the characteristics of the integrated circuit, obtaining the change factors of the test environment corresponding to the characteristics; collecting data on the performance of various integrated circuits under different test environments. The model construction sub-module is responsible for using the electrical performance test decision tree, taking the characteristics, change factors, and test environment as inputs, and outputting the voltage fluctuation, current change, and temperature change corresponding to the integrated circuit. The content output sub-module is responsible for using the electrical performance test interface integrated with the electrical performance test decision tree to output the voltage fluctuation, current change, and temperature change corresponding to the current integrated circuit, and obtaining the parameter set of the electrical performance test signals within a preset period.

[0012] Optionally, the model construction sub-module includes: The topology formation unit is responsible for discretizing the characteristics of the integrated circuit and the change factors of the test environment to form a multi-dimensional feature vector; adopting the synaptic weight adjustment mechanism of the biological neural network to dynamically enhance the decision weight of the characteristics of the integrated circuit, and forming a multi-branch topology structure. The decision boundary establishment unit is responsible for performing probability density slicing on the continuous variables in the change factors of the test environment, calculating the mutual information of the temperature drift rate and leakage current fluctuation in adjacent intervals using the sliding window method; eliminating the interference of high-frequency fluctuation signals on the segmentation threshold through gain rate normalization, and establishing an anti-noise binary decision boundary. The evaluation system construction unit is responsible for constructing a time-domain-frequency-domain two-dimensional purity evaluation system at the output stage of voltage fluctuation, current change, and temperature change: implementing asymmetric binary tree pruning based on the variance reduction ratio, and balancing the complexity of the decision path and the prediction stability through the thermodynamic entropy increase model to form a parameter set that meets a specific confidence interval.

[0013] Optionally, the topology structure forming unit calculates the uncertainty elimination capability of each discrete feature on the electrical response through information entropy difference analysis, and establishes an initial splitting rule based on maximizing information gain.

[0014] Optionally, the evaluation system construction unit evaluates the category separability of voltage fluctuation peak and valley values ​​through the Gini index on the time domain side, and fits the regression surface of the current harmonic distortion rate through the least squares criterion on the frequency domain side; and uses coherent synthesis in laser interferometry to decompose the long-period temperature rise curve into multiple local steady-state processes.

[0015] Optional, quality parameter confirmation module, including: The parameter mapping submodule is responsible for using the voltage fluctuation matrix and the temperature-dependent creep gradient field at the input end of the integrated circuit to form an asymmetric alternating signal topology set; the output end of the integrated circuit captures the spatiotemporal defocused response information flow through the dissolved state monitoring array; The feature deconstruction submodule is responsible for time domain analysis to segment the metabolic energy level of amplitude / phase, quantify the waveform steepness and trailing edge vibration inertia; frequency domain analysis to strip off the harmonic wavelength tail interference and the polarization state of the base noise; statistical analysis to calculate the eddy diffusion coefficient of the signal-to-noise ratio, and project the gravitational offset trajectory of the mean-variance on the thermodynamic equivalent surface; waveform analysis to determine the entropy increase path of the distortion indentation; The parameter optimization submodule is responsible for quantitatively determining the unstable phase boundary of longitudinal energy dissipation using the viscous loss inversion method to obtain the attenuation parameters of the electrical performance test signal; taking the topological heterojunction migration scale as a reference, it calculates the interference time gap difference between the signal phase wave and the lattice vibration mode to obtain the delay parameters of the electrical performance test signal; it calculates the non-closed curvature radius of the waveform quantum orbit, and combines the Legendre polynomial to fit the nonlinear bending factor of the transmission channel to obtain the distortion parameters of the electrical performance test signal.

[0016] Optional signal path adjustment components, including: The efficiency ranking module is responsible for receiving the quality parameters of the electrical performance test signal from the electrical performance test component, and evaluating the signal path of the current electrical performance test signal based on the received quality parameters. The evaluation result is to rank the signal transmission efficiency according to attenuation, delay and distortion; The suggestion generation module is responsible for generating specific adjustment suggestions for the signal path at the end of the sorting according to the results of the signal transmission efficiency sorting; The application detection module is responsible for applying the adjustment suggestions to the integrated circuit and continuing to monitor the evaluation results of the new integrated circuit.

[0017] The isolation barrier construction component of the present invention physically separates different functional modules (such as logic units, memories, analog circuits) in an integrated circuit to avoid electrical interference or signal crosstalk between the modules; the isolation device divides the critical signal path into independent isolation regions, reducing interference and attenuation during signal transmission and ensuring signal integrity; the isolation device forms a physical barrier between the chip and the package substrate. The electrical performance test component detects whether the isolation barrier construction component effectively isolates the functional modules and the working state of the signal path in the isolation environment; collects the output signal and compares it with the test signal, and quantifies the signal parameters through time-domain or frequency-domain analysis to provide data support for signal path optimization. The signal path adjustment component ensures that the isolation effect and signal integrity reach the optimal balance; feeds back the adjustment suggestions to the package design stage to optimize the signal path layout, isolation structure parameters, or package material selection, and improves the overall system performance.

[0018] Other features and advantages of the present invention will be described in the following specification, and in part will be obvious from the specification, or will be understood by implementing the present invention. The objectives and other advantages of the present invention can be realized and obtained by the structure specifically pointed out in the written specification and the drawings.

[0019] The technical solutions of the present invention will be further described in detail below through the drawings and embodiments. Description of the Drawings

[0020] The drawings are used to provide a further understanding of the present invention and constitute a part of the specification. They are used together with the embodiments of the present invention to explain the present invention and do not constitute a limitation to the present invention. In the drawings: Figure 1 It is a block diagram of an integrated circuit package system with an isolation structure in Embodiment 1 of the present invention; Figure 2 It is a block diagram of the isolation barrier construction component in Embodiment 2 of the present invention; Figure 3 It is a block diagram of the installation position confirmation module in Embodiment 3 of the present invention; Figure 4 It is a block diagram of the electrical performance test component in Embodiment 4 of the present invention; Figure 5 It is a block diagram of the parameter set input module in Embodiment 5 of the present invention; Figure 6 It is a block diagram of the model construction sub-module in Embodiment 6 of the present invention; Figure 7 It is a block diagram of the quality parameter confirmation module in Embodiment 7 of the present invention; Figure 8 It is a block diagram of the signal path adjustment component in Embodiment 8 of the present invention. Detailed Description of the Embodiments

[0021] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are only for the purpose of illustrating and explaining the present invention, and are not intended to limit the present invention.

[0022] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the embodiments of the present application. In the embodiments of the present application, the singular forms of "a", "the" and "said" are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0023] When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application. In the description of the present application, it should be understood that the terms "first", "second", "third", etc. are only used to distinguish similar objects, and do not have to be used to describe a specific order or sequence, nor can they be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0024] Embodiment 1: As Figure 1 shown, the embodiment of the present invention provides an integrated circuit packaging system with an isolation structure, including: An isolation barrier building component, responsible for installing isolation devices for isolating functional modules and signal paths before the integrated circuit is plastic encapsulated. The isolation devices divide the functional modules and signal paths into several isolation regions; An electrical performance testing component, responsible for applying an electrical performance test signal of the integrated circuit at the input end of the integrated circuit, collecting the output signal of the integrated circuit at the output end, and analyzing the electrical performance test signal and the output signal to obtain quality parameters of the electrical performance test signal; A signal path adjustment component, responsible for providing adjustment suggestions for the signal path of the current integrated circuit according to the analysis result of the quality parameters.

[0025] The working principle and beneficial effects of the above technical solution are as follows: Before the integrated circuit is encapsulated, the isolation barrier construction component of this embodiment installs isolation devices for isolating functional modules and signal paths. The isolation devices divide the functional modules and signal paths into several isolation regions; the isolation devices are installed between the chip of the integrated circuit and the packaging substrate; the electrical performance test component applies an electrical performance test signal of the integrated circuit at the input end of the integrated circuit, collects the output signal of the integrated circuit at the output end, and analyzes the electrical performance test signal and the output signal to obtain the quality parameters of the electrical performance test signal; the signal path adjustment component provides adjustment suggestions for the signal path of the current integrated circuit according to the analysis result of the quality parameters. The isolation barrier construction component of the above solution physically separates different functional modules (such as logic units, memories, analog circuits) in the integrated circuit by installing isolation devices, avoiding electrical interference or signal crosstalk between modules; the isolation devices divide the key signal paths into independent isolation regions, reducing interference and attenuation during signal transmission and ensuring signal integrity; the isolation devices form a physical barrier between the chip and the packaging substrate, preventing the chip from being affected by mechanical stress or chemical corrosion in subsequent packaging processes (such as plastic encapsulation). The electrical performance test component evaluates the signal transmission performance (such as attenuation, delay, distortion) of the integrated circuit under the isolation structure by applying electrical performance test signals with specific frequencies, amplitudes, and waveforms; detects whether the isolation barrier construction component effectively isolates the functional modules and the working state of the signal path in the isolation environment; collects the output signal and compares it with the test signal, and quantifies the signal parameters through time-domain or frequency-domain analysis to provide data support for signal path optimization. The signal path adjustment component identifies problems (such as impedance mismatch, crosstalk, or attenuation) in signal transmission based on the electrical performance test results and proposes targeted adjustment suggestions; adjusts the material, size, or layout of the isolation devices according to the signal quality parameters to ensure that the isolation effect and signal integrity reach the optimal balance; feeds back the adjustment suggestions to the packaging design stage to optimize the signal path layout, isolation structure parameters, or packaging material selection, improving the overall system performance.

[0026] In summary, in this embodiment, isolation devices are installed before plastic encapsulation to isolate functional modules and optimize signal paths, ensuring electrical isolation and physical protection; the signal quality and system performance under the isolation structure are evaluated through the analysis of test signals and output signals; optimization suggestions are provided according to the test results, and the signal path and isolation barrier design are adjusted to improve the overall system performance. Ensure that the integrated circuit packaging system with an isolation structure reaches the optimal level in terms of electrical performance, signal integrity, and reliability.

[0027] Embodiment 2: As Figure 2 shown, on the basis of Embodiment 1, the isolation barrier construction component provided by the embodiment of the present invention includes: A location information acquisition module, responsible for acquiring the layout of functional modules and signal paths in an integrated circuit, obtaining the location information of the functional modules and the routing of the signal paths; An isolation device manufacturing module, responsible for manufacturing an isolation device composed of a dielectric isolation component, a metal shielding enhancement component, a microstructure and a filling material device, etc.; adding an isolation cavity between the microstructure and the filling material device, and the isolation cavity is surrounded by silicone rubber; Among them, the main function of the dielectric isolation component is to block the electric field and electromagnetic interference between different functional modules. The dielectric material includes epoxy resin and silicone resin. An air gap or a vacuum structure is provided in the dielectric isolation component to reduce the electric field strength in the dielectric material; the main function of the metal shielding enhancement component is to absorb and reflect electromagnetic waves and reduce electromagnetic interference; the metal shielding material includes copper, aluminum, etc.; the metal shielding enhancement component can be arranged between or around the dielectric materials to form a multi-layer shielding structure; the microstructure and the filling material device include the microstructure in the isolation barrier, such as trenches, holes, etc., and the main function is to finely control the shape and path of the electric field lines to achieve precise isolation; the filling material includes conductive rubber and semiconductor materials, etc.; An installation position confirmation module, responsible for confirming the position of the chip of the integrated circuit and the packaging substrate, confirming the installation position of the isolation device according to the location information and the routing, and the isolation device is installed between the chip of the integrated circuit and the packaging substrate; at the same time, marking position stamps corresponding to the functional modules and signal paths for several isolation areas divided by the isolation device.

[0028] The working principle and beneficial effects of the above technical solution are as follows: The position information acquisition module of this embodiment acquires the layout of functional modules and signal paths in the integrated circuit, obtaining the position information of the functional modules and the direction of the signal paths; the isolation device manufacturing module manufactures an isolation device composed of a dielectric isolation component, a metal shielding enhancement component, a microstructure and a filling material device, etc.; an isolation cavity is added between the microstructure and the filling material device, and the isolation cavity is surrounded by silicone rubber; among them, the main function of the dielectric isolation component is to block the electric field and electromagnetic interference between different functional modules, the dielectric material includes epoxy resin and silicone resin, and an air gap or a vacuum structure is set in the dielectric isolation component to reduce the electric field strength in the dielectric material; the main function of the metal shielding enhancement component is to absorb and reflect electromagnetic waves and reduce electromagnetic interference; the metal shielding material includes copper, aluminum, etc.; the metal shielding enhancement component can be arranged between or around the dielectric materials to form a multi-layer shielding structure; the microstructure and the filling material device include microstructures in the isolation barrier, such as grooves, holes, etc., and the main function is to finely control the shape and path of the electric field lines to achieve precise isolation; the filling material includes conductive rubber and semiconductor materials, etc.; the installation position confirmation module confirms the positions of the chip of the integrated circuit and the packaging substrate, and confirms the installation position of the isolation device according to the position information and the direction, and the isolation device is installed between the chip of the integrated circuit and the packaging substrate; at the same time, position stamps corresponding to the functional modules and signal paths are marked on several isolation areas divided by the isolation device. The position information acquisition module of the above solution collects the layout of the functional modules and their signal paths inside the integrated circuit, locates the spatial positions of each functional module and the transmission path of the signal inside the chip through high-precision detection and analysis techniques, provides accurate physical and electrical parameters, and ensures that the isolation device can be correctly laid out in the required position. The isolation device manufacturing module is composed of a variety of materials, including a dielectric isolation component, a metal shielding enhancement component, a microstructure and a filling material device, etc.; the selection of materials and the manufacturing process of the device achieve effective electrical isolation between different functional modules; especially the design of the isolation cavity, through the formation of a closed structure by silicone rubber, further enhances the isolation effect. The dielectric isolation component blocks the electric field and electromagnetic interference between different functional modules, and dielectric materials such as epoxy resin and silicone resin are used to manufacture the dielectric isolation component, and the electric field strength in the dielectric material is reduced by setting an air gap or a vacuum structure, thereby reducing electric field interference. The metal shielding enhancement component absorbs and reflects electromagnetic waves to reduce electromagnetic interference, and can be arranged between or around the dielectric materials to form a multi-layer shielding structure to enhance the overall electromagnetic shielding effect. The microstructure and the filling material device are mainly used to finely control the shape and path of the electric field lines to achieve precise isolation; the filling material, such as conductive rubber and semiconductor materials, etc., is used to fill the space in the microstructure to further enhance the isolation effect. The installation position confirmation module ensures that the positions of the chip of the integrated circuit and the packaging substrate are accurate, and confirms the installation position of the isolation device according to the previously obtained position information and the signal path direction.The isolation device is installed between the chip of the integrated circuit and the packaging substrate to achieve effective isolation. In addition, it is also responsible for marking the isolation areas divided by the isolation device, corresponding to the position stamps of the functional modules and signal paths, to ensure the correct installation and function realization of the isolation device.

[0029] Embodiment 3: As Figure 3 shown, based on Embodiment 2, the installation position confirmation module provided by the embodiment of the present invention includes: The information analysis sub-module is responsible for obtaining the longitude and latitude coordinates and size position information of the functional modules in the area to be protected; at the same time, it also needs to obtain the signal path including the starting point, ending point and the trend of the path nodes; after collecting the position information and signal path, analyze the signal path to find the key nodes and path trends; according to the signal path trend, divide the area to be protected into several isolation areas and mark them on the circuit map; The area pairing sub-module is responsible for identifying the functional modules corresponding to the isolation areas after dividing the isolation areas; analyze the correlation between the signal path and each functional module through the signal flow direction to obtain the mapping relationship between the signal path and each functional module; pair the isolation areas with the functional modules to determine which functional modules are protected by which isolation areas; The position confirmation sub-module is responsible for obtaining the position information of the isolated functional modules and signal paths, that is, the installation position of the isolation device, according to the longitude and latitude coordinates and size position information of the paired functional modules and the marked isolation areas.

[0030] The working principle and beneficial effects of the above technical solution are as follows: The information analysis sub-module of this embodiment obtains the longitude and latitude coordinates and size position information of the function module in the area to be protected; at the same time, it is also necessary to obtain the signal path including the starting point, ending point and the direction of the path nodes; after collecting the position information and the signal path, analyze the signal path to find the key nodes and the path direction; according to the signal path direction, divide the area to be protected into several isolation areas and mark them on the circuit map; after the isolation areas are divided, the area pairing sub-module identifies the function modules corresponding to the isolation areas; analyze the correlation between the signal path and each function module through the signal flow to obtain the mapping relationship between the signal path and each function module; pair the isolation areas with the function modules to determine which function modules are protected by which isolation areas; the position confirmation sub-module obtains the position information of the isolated function module and the signal path, that is, the installation position of the isolation device, according to the longitude and latitude coordinates, size position information of the paired function module and the marked isolation area. The information analysis sub-module of the above solution determines the spatial range of the area to be protected, provides a basis for signal isolation and area division, and facilitates area pairing and position confirmation. The area pairing sub-module realizes the corresponding relationship between the area and the module, obtains the mapping relationship between the signal path and each function module, and clarifies which isolation areas are responsible for protecting which function modules. The position confirmation sub-module ensures the correct installation of the isolation device and protects the function module.

[0031] In summary, this embodiment realizes the precise confirmation from signal path analysis to isolation area division and then to the installation position of the isolation device.

[0032] Embodiment 4: As Figure 4 shown, on the basis of Embodiment 1, the electrical performance test component provided by the embodiment of the present invention includes: A parameter set input module, which is responsible for obtaining an electrical performance test signal parameter set including the voltage fluctuation, current change and temperature change conditions of the integrated circuit; at the same time, collect the response output of the integrated circuit to the electrical performance test signal parameter set at the output end of the integrated circuit; A response output analysis module, which is responsible for analyzing the response output. The analysis content includes time-domain analysis, frequency-domain analysis, statistical analysis and waveform analysis, and obtains the characteristics of the response output corresponding to the time-domain analysis, frequency-domain analysis, statistical analysis and waveform analysis; Among them, time-domain analysis checks the basic characteristics such as the amplitude, frequency and phase of the response output signal, and evaluates the stability and timing accuracy of the signal; frequency-domain analysis analyzes the spectral components of the response output signal through technologies such as Fourier transform to identify possible harmonic interference or noise; statistical analysis evaluates the stability and reliability of the response output signal, such as statistical parameters such as mean, variance, and signal-to-noise ratio; waveform analysis checks whether the waveform of the response output signal meets the expectations and whether there are distortions or deformations; The quality parameter confirmation module is responsible for determining the quality parameters of the electrical performance test signal parameter set during the integrated circuit transmission process according to the characteristics of the response outputs corresponding to time-domain analysis, frequency-domain analysis, statistical analysis, and waveform analysis. The quality parameters include attenuation, delay, and distortion.

[0033] The working principle and beneficial effects of the above technical solution are as follows: The parameter set input module of this embodiment obtains an electrical performance test signal parameter set including integrated circuit voltage fluctuations, current changes, and temperature change conditions; at the same time, the response output of the integrated circuit to the electrical performance test signal parameter set is collected at the output end of the integrated circuit; the response output analysis module analyzes the response output, and the analysis content includes time-domain analysis, frequency-domain analysis, statistical analysis, and waveform analysis, to obtain the characteristics of the response output corresponding to time-domain analysis, frequency-domain analysis, statistical analysis, and waveform analysis; among them, time-domain analysis examines the basic characteristics of the response output signal, such as amplitude, frequency, and phase, to evaluate the stability and timing accuracy of the signal; frequency-domain analysis analyzes the spectral components of the response output signal through techniques such as Fourier transform to identify possible harmonic interference or noise; statistical analysis evaluates the stability and reliability of the response output signal, such as statistical parameters such as mean, variance, and signal-to-noise ratio; waveform analysis checks whether the waveform of the response output signal meets the expectations and whether there are distortions or abnormalities; the quality parameter confirmation module determines the quality parameters of the electrical performance test signal parameter set during the transmission process of the integrated circuit according to the characteristics of the response output corresponding to time-domain analysis, frequency-domain analysis, statistical analysis, and waveform analysis, and the quality parameters include attenuation, delay, and distortion. The parameters of the parameter set input module of the above solution are the basic data for evaluating the performance of the integrated circuit and directly reflect the working state of the circuit; at the same time, the response output of the integrated circuit is collected, that is, the processing result of the integrated circuit on the input signal, to ensure the integrity and accuracy of the electrical performance test signal. The response output analysis module deeply analyzes the response output signal collected by the parameter set input module to ensure that the quality and performance of the signal meet the design requirements; time-domain analysis examines the basic characteristics of the electrical performance test signal, such as amplitude, frequency, and phase, to evaluate the stability and timing accuracy of the signal, which is crucial for ensuring the correct response of the integrated circuit in terms of timing; frequency-domain analysis analyzes the spectral components of the electrical performance test signal through techniques such as Fourier transform to identify possible harmonic interference or noise, which is of guiding significance for optimizing the integrated circuit design and improving the signal quality; statistical analysis evaluates the stability and reliability of the electrical performance test signal, including statistical parameters such as mean, variance, and signal-to-noise ratio, which is very critical for predicting the performance of the integrated circuit under different working conditions; waveform analysis checks whether the waveform of the electrical performance test signal meets the expectations and whether there are distortions or abnormalities, which has a direct impact on ensuring the accuracy and stability of the circuit output. The quality parameter confirmation module synthesizes the results of the response output analysis module to determine the key quality parameters of the electrical performance test signal parameter set during the transmission process of the integrated circuit, such as attenuation, delay, and distortion. The accurate identification and evaluation of the quality parameters are of great significance for the optimization of the integrated circuit design and fault diagnosis.

[0034] In summary, this embodiment ensures that the electrical performance test of the integrated circuit can comprehensively and accurately evaluate the performance and reliability of the circuit, providing a scientific basis for the optimization of integrated circuit design and production.

[0035] Embodiment 5: As Figure 5 shown, based on Embodiment 4, the parameter set input module provided by the embodiment of the present invention includes: A factor confirmation sub-module, responsible for determining the characteristics of the integrated circuit, obtaining the change factors of the test environment corresponding to the characteristics; collecting data on the performance of various integrated circuits under different test environments; A model construction sub-module, responsible for using an electrical performance test decision tree, taking the characteristics, change factors, and test environment as inputs, and outputting the voltage fluctuation, current change, and temperature change corresponding to the integrated circuit; A content output sub-module, responsible for using the electrical performance test interface integrated with the electrical performance test decision tree to output the voltage fluctuation, current change, and temperature change corresponding to the current integrated circuit, and obtaining the electrical performance test signal parameter set within a preset period.

[0036] The working principle and beneficial effects of the above technical solution are as follows: The factor confirmation sub-module of this embodiment determines the characteristics of the integrated circuit, obtains the change factors of the test environment corresponding to the characteristics; collects data on the performance of various integrated circuits under different test environments; the model construction sub-module uses an electrical performance test decision tree, takes the characteristics, change factors, and test environment as inputs, and outputs the voltage fluctuation, current change, and temperature change corresponding to the integrated circuit; the content output sub-module uses the electrical performance test interface integrated with the electrical performance test decision tree to output the voltage fluctuation, current change, and temperature change corresponding to the current integrated circuit, and obtains the electrical performance test signal parameter set within a preset period. The factor confirmation sub-module of the above solution is to identify the key characteristics of the integrated circuit (IC) and determine the change factors of the key characteristics in different test environments; by collecting and analyzing the performance of various types of integrated circuits under different test environments, the key factors affecting the IC performance can be captured. The model construction sub-module uses the electrical performance test decision tree to comprehensively analyze the input parameters such as the IC characteristics, change factors, and test environment obtained from the factor confirmation sub-module; using the input, the model construction sub-module outputs the electrical performance indicators such as the voltage fluctuation, current change, and temperature change of the IC under a specific test environment. The content output sub-module displays the electrical performance test results obtained by the model construction sub-module to the user through the electrical performance test interface integrated with the electrical performance test decision tree; outputs the electrical performance test signal parameter set such as the voltage fluctuation, current change, and temperature change corresponding to the current integrated circuit, providing a reference for the test within a preset period.

[0037] In summary, the three sub-modules of this embodiment together constitute a complete parameter set input module, ensuring the accuracy, efficiency, and user experience of the electrical performance testing of integrated circuits.

[0038] Embodiment 6: As Figure 6 shown, based on Embodiment 5, the model construction sub-module provided by the embodiment of the present invention includes: A topology structure formation unit, which is responsible for discretizing the characteristics of the integrated circuit and the changing factors of the test environment to form a multi-dimensional feature vector; calculates the uncertainty resolution ability of each discrete feature to the electrical response through information entropy difference analysis, establishes an initial splitting rule based on maximizing information gain, and adopts the synaptic weight adjustment mechanism of a biological neural network to dynamically enhance the decision weight of the characteristics of the integrated circuit, forming a multi-branch topology structure; A decision boundary establishment unit, which is responsible for performing probability density slicing on the continuous variables in the changing factors of the test environment, and calculates the mutual information between the temperature drift rate and the leakage current fluctuation in adjacent intervals using the sliding window method; eliminates the interference of high-frequency fluctuation signals on the segmentation threshold through gain rate normalization, and establishes an anti-noise binary decision boundary; An evaluation system construction unit, which is responsible for constructing a time-domain - frequency-domain two-dimensional purity evaluation system at the output stage of voltage fluctuation, current change, and temperature change: on the time-domain side, evaluates the class separability of the peak and valley values of voltage fluctuation through the Gini index, and on the frequency-domain side, fits the regression surface of the current harmonic distortion rate using the least squares criterion. Adopts coherent synthesis in laser interferometry to decompose the long-period temperature rise curve into multiple local steady-state processes, implements asymmetric binary tree pruning based on the variance reduction ratio, and balances the complexity of the decision path and the prediction stability through the thermodynamic entropy increase model to form a parameter set that meets a specific confidence interval.

[0039] The working principle and beneficial effects of the above technical solution are as follows: The topology structure forming unit in this embodiment is responsible for discretizing the characteristics of the integrated circuit and the changing factors of the test environment to form a multi-dimensional feature vector; by analyzing the uncertainty resolution ability of each discrete feature on the electrical response through information entropy difference calculation, an initial splitting rule based on maximizing information gain is established, and the synaptic weight adjustment mechanism of the biological neural network is adopted to dynamically enhance the decision weight of the characteristics of the integrated circuit, forming a multi-branch topology structure; the decision boundary establishment unit performs probability density slicing on the continuous variables among the changing factors of the test environment, and uses the sliding window method to calculate the mutual information between the temperature drift rate and the leakage current fluctuation in adjacent intervals; by normalizing the gain rate, the interference of high-frequency fluctuation signals on the segmentation threshold is eliminated, and an anti-noise binary decision boundary is established; the evaluation system construction unit constructs a time-domain - frequency-domain two-dimensional purity evaluation system at the output stage of voltage fluctuation, current change, and temperature change: on the time-domain side, the class separability of the peak and valley values of voltage fluctuation is evaluated through the Gini index, and on the frequency-domain side, the regression surface of the current harmonic distortion rate is fitted using the least squares criterion. By using coherent synthesis in laser interferometry, the long-period temperature rise curve is decomposed into multiple local steady-state processes, and asymmetric binary tree pruning is implemented based on the variance reduction ratio. Through the thermodynamic entropy increase model, the complexity of the decision path and the prediction stability are balanced to form a parameter set that meets a specific confidence interval. The topology structure forming unit in the above solution analyzes the uncertainty resolution ability of each discrete feature on the electrical response through information entropy difference, establishes an initial splitting rule with the goal of maximizing information gain, dynamically adjusts the decision weight, and forms a multi-branch topology structure; it can effectively quantify the characteristics of the integrated circuit and environmental factors, and establish a complex decision network, improving the adaptability and accuracy of the model. The decision boundary establishment unit eliminates the interference of high-frequency fluctuation signals through the sliding window method and gain rate normalization, and establishes an anti-noise decision boundary; enabling the model to accurately divide the decision boundary when facing continuously changing factors, improving the robustness and accuracy of the model. The evaluation system construction unit evaluates voltage fluctuation and current harmonic distortion in the time domain and frequency domain respectively through the Gini index and the least squares criterion, and uses coherent synthesis technology and variance reduction ratio in laser interferometry to implement asymmetric binary tree pruning; through comprehensive evaluation in the time domain and frequency domain, the purity and stability of the model output are comprehensively evaluated, the decision path is optimized, the model complexity and prediction stability are balanced, and it is ensured that the model output conforms to the parameter set of a specific confidence interval.

[0040] Example 7: As Figure 7 shown, based on Example 4, the quality parameter confirmation module provided by the embodiment of the present invention includes: The parameter mapping sub-module is responsible for using a voltage fluctuation matrix and a temperature-variable creep gradient field at the input end of the integrated circuit to form an asymmetric alternating signal topology set; the output end of the integrated circuit captures the response information flow of spatio-temporal defocusing through a dissolved state monitoring array, and through anti-parabolic correction, eliminates the coupling interference of the edge field effect on the parameter framework; The feature deconstruction sub-module is responsible for time-domain analysis to segment the metabolic energy levels of amplitude / phase, quantifying the waveform steepness and the trailing-edge vibration inertia; frequency-domain analysis to strip the harmonic wavelength tail interference and the polarization state of the substrate noise; statistical analysis to calculate the vortex diffusion coefficient of the signal-to-noise ratio, and project the gravitational offset trajectory of the mean-variance on the thermo-dynamic equivalent surface; waveform analysis to determine the entropy increase path of the distortion indentation; The parameter optimization sub-module is responsible for quantitative determination using the viscous loss inversion method, determining the unstable phase boundary of the longitudinal energy dissipation, and obtaining the attenuation parameter of the electrical performance test signal; based on the migration scale of the topological heterojunction, calculating the interference time slot difference between the signal phase wave and the lattice vibration mode, and obtaining the delay parameter of the electrical performance test signal; calculating the non-closed curvature radius of the waveform quantum orbit, and fitting the non-linear bending factor of the transmission channel by combining with the Legendre polynomial, and obtaining the distortion parameter of the electrical performance test signal.

[0041] The working principle and beneficial effects of the above technical solution are as follows: The parameter mapping sub-module of this embodiment uses a voltage fluctuation matrix and a temperature-variable creep gradient field at the input end of the integrated circuit to form an asymmetric alternating signal topology set; the output end of the integrated circuit captures the response information flow of spatio-temporal defocusing through a dissolved state monitoring array, and through anti-parabolic correction, eliminates the coupling interference of the edge field effect on the parameter framework; the feature deconstruction sub-module conducts time-domain analysis to segment the metabolic energy levels of amplitude / phase, quantifying the waveform steepness and the trailing-edge vibration inertia; frequency-domain analysis to strip the harmonic wavelength tail interference and the polarization state of the substrate noise; statistical analysis to calculate the vortex diffusion coefficient of the signal-to-noise ratio, and project the gravitational offset trajectory of the mean-variance on the thermo-dynamic equivalent surface; waveform analysis to determine the entropy increase path of the distortion indentation; the parameter optimization sub-module is responsible for quantitative determination using the viscous loss inversion method, determining the unstable phase boundary of the longitudinal energy dissipation, and obtaining the attenuation parameter of the electrical performance test signal; based on the migration scale of the topological heterojunction, calculating the interference time slot difference between the signal phase wave and the lattice vibration mode, and obtaining the delay parameter of the electrical performance test signal; calculating the non-closed curvature radius of the waveform quantum orbit, and fitting the non-linear bending factor of the transmission channel by combining with the Legendre polynomial, and obtaining the distortion parameter of the electrical performance test signal. Through the close cooperation of the three sub-modules of parameter mapping, feature deconstruction, and parameter optimization, the above solution realizes the comprehensive and accurate analysis and optimization of the electrical performance test signal of the integrated circuit; not only improves the accuracy and stability of signal processing and analysis, but also provides strong support for the design and optimization of the integrated circuit, thus promoting the technological progress and innovation of the entire electronics industry.

[0042] Example 8: As Figure 8As shown in the figure, based on Embodiment 1, the signal path adjustment component provided by the embodiment of the present invention includes: An efficiency sorting module, which is responsible for receiving the quality parameters of the electrical performance test signal from the electrical performance test component, and based on the received quality parameters, evaluating the signal path of the current electrical performance test signal. The evaluation result is to sort the signal transmission efficiency according to attenuation, delay, and distortion; A suggestion generation module, which is responsible for generating specific adjustment suggestions for the signal path with the lowest sorting according to the result of the signal transmission efficiency sorting; Among them, the adjustment suggestions include whether it is necessary to optimize the layout of some signal paths to reduce the signal transmission distance; whether it is necessary to add buffers or amplifiers to enhance the signal strength; whether it is necessary to re-plan the position of the isolation barrier to improve the isolation effect; An application detection module, which is responsible for applying the adjustment suggestions to the integrated circuit and continuing to monitor the evaluation results of the new integrated circuit.

[0043] The working principle and beneficial effects of the above technical solution are as follows: The efficiency sorting module of this embodiment receives the quality parameters of the electrical performance test signal from the electrical performance test component, and based on the received quality parameters, evaluates the signal path of the current electrical performance test signal. The evaluation result is to sort the signal transmission efficiency according to attenuation, delay, and distortion; the suggestion generation module generates specific adjustment suggestions for the signal path with the lowest sorting according to the result of the signal transmission efficiency sorting; among them, the adjustment suggestions include whether it is necessary to optimize the layout of some signal paths to reduce the signal transmission distance; whether it is necessary to add buffers or amplifiers to enhance the signal strength; whether it is necessary to re-plan the position of the isolation barrier to improve the isolation effect; the application detection module applies the adjustment suggestions to the integrated circuit and continues to monitor the evaluation results of the new integrated circuit. The above solution quickly identifies the paths with low signal transmission performance through the efficiency sorting module; through the suggestion generation module, targeted adjustment measures are proposed, including path layout optimization, signal enhancement, and isolation barrier optimization, comprehensively improving the signal transmission efficiency; through the application detection module, the optimization effect is dynamically monitored, forming a closed-loop optimization process to ensure that the final design meets the performance requirements. It not only improves the efficiency of optimizing the signal path of the integrated circuit, but also enhances the scalability and adaptability of the system, providing reliable technical support for the design of high-performance integrated circuits.

[0044] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the equivalent technology of the present invention, the present invention also intends to include these changes and variations.

Claims

1. An integrated circuit packaging system with an isolation structure, characterized in that, Comprising: An isolation barrier construction component, responsible for installing isolation devices for isolating functional modules and signal paths before the integrated circuit is encapsulated. The isolation devices divide the functional modules and signal paths into several isolation regions; An electrical performance testing component, responsible for applying electrical performance test signals of the integrated circuit at the input end of the integrated circuit, collecting the output signals of the integrated circuit at the output end, analyzing the electrical performance test signals and the output signals, and obtaining quality parameters of the electrical performance test signals; A signal path adjustment component, responsible for providing adjustment suggestions for the signal path of the current integrated circuit according to the analysis result of the quality parameters.

2. The integrated circuit packaging system with an isolation structure according to claim 1, characterized in that, The isolation barrier construction component comprises: A position information acquisition module, responsible for acquiring the layout of functional modules and signal paths in the integrated circuit, and obtaining the position information of the functional modules and the trend of the signal paths; An isolation device manufacturing module, responsible for manufacturing isolation devices composed of dielectric isolation components, metal shielding enhancement components, and microstructures and filler material devices; adding an isolation cavity between the microstructures and filler material devices, and the isolation cavity is surrounded by silicone rubber; An installation position confirmation module, responsible for confirming the positions of the chip and the packaging substrate of the integrated circuit, confirming the installation positions of the isolation devices according to the position information and the trend, and installing the isolation devices between the chip and the packaging substrate of the integrated circuit; at the same time, marking position stamps corresponding to the functional modules and signal paths for the several isolation regions divided by the isolation devices.

3. The integrated circuit packaging system with an isolation structure according to claim 2, characterized in that, The installation position confirmation module comprises: An information analysis sub-module, responsible for obtaining the longitude and latitude coordinates and size position information of the functional modules in the area to be protected; at the same time, it is also necessary to obtain the trend of the signal path including the starting point, the ending point and the path nodes; after collecting the position information and the signal path, analyze the signal path to find the key nodes and the path trend; according to the signal path trend, divide the area to be protected into several isolation regions and mark them on the circuit map; An area pairing sub-module, responsible for identifying the functional modules corresponding to the isolation regions after dividing the isolation regions; analyzing the correlation between the signal path and each functional module through the signal flow direction to obtain the mapping relationship between the signal path and each functional module; Pairing the isolation regions with the functional modules to determine which functional modules are protected by which isolation regions; A position confirmation sub-module, responsible for obtaining the position information of the isolated functional modules and signal paths, that is, the installation positions of the isolation devices, according to the longitude and latitude coordinates and size position information of the paired functional modules and the marked isolation regions.

4. The integrated circuit packaging system with an isolation structure according to claim 1, characterized in that, The electrical performance testing component comprises: A parameter set input module, responsible for obtaining a set of electrical performance test signal parameters including the voltage fluctuation, current change and temperature change conditions of the integrated circuit; at the same time, collecting the response output of the integrated circuit to the set of electrical performance test signal parameters at the output end of the integrated circuit; A response output analysis module, responsible for analyzing the response output, and the analysis content includes time domain analysis, frequency domain analysis, statistical analysis and waveform analysis, and obtaining the characteristics of the response output corresponding to the time domain analysis, frequency domain analysis, statistical analysis and waveform analysis. The quality parameter confirmation module is responsible for determining the quality parameters of the electrical performance test signal parameters set during the integrated circuit transmission process according to the characteristics of the response outputs corresponding to time-domain analysis, frequency-domain analysis, statistical analysis, and waveform analysis. The quality parameters include attenuation, delay, and distortion.

5. The integrated circuit packaging system with an isolation structure according to claim 4, characterized in that, The parameter set input module includes: The factor confirmation sub-module is responsible for determining the characteristics of the integrated circuit, obtaining the change factors of the test environment corresponding to the characteristics; collecting data on the performance of various integrated circuits under different test environments; The model construction sub-module is responsible for using the electrical performance test decision tree, taking the characteristics, change factors, and test environment as inputs, and outputting the voltage fluctuation, current change, and temperature change corresponding to the integrated circuit; The content output sub-module is responsible for using the electrical performance test interface integrated with the electrical performance test decision tree to output the voltage fluctuation, current change, and temperature change corresponding to the current integrated circuit, and obtaining the electrical performance test signal parameters set within a preset period.

6. The integrated circuit packaging system with an isolation structure according to claim 5, characterized in that, The model construction sub-module includes: The topology formation unit is responsible for discretizing the characteristics of the integrated circuit and the change factors of the test environment to form a multi-dimensional feature vector; adopting the synaptic weight adjustment mechanism of the biological neural network to dynamically enhance the decision weight of the characteristics of the integrated circuit and form a multi-branch topology structure; The decision boundary establishment unit is responsible for performing probability density slicing on the continuous variables in the change factors of the test environment, calculating the mutual information of the temperature drift rate and leakage current fluctuation in adjacent intervals using the sliding window method; eliminating the interference of high-frequency fluctuation signals on the segmentation threshold through gain rate normalization, and establishing an anti-noise binary decision boundary; The evaluation system construction unit is responsible for constructing a time-domain - frequency-domain two-dimensional purity evaluation system during the output stage of voltage fluctuation, current change, and temperature change: implementing asymmetric binary tree pruning based on the variance reduction ratio, balancing the complexity of the decision path and the prediction stability through the thermodynamic entropy increase model, and forming a parameter set that meets a specific confidence interval.

7. The integrated circuit packaging system with an isolation structure according to claim 6, characterized in that, The topology formation unit calculates the uncertainty resolution ability of each discrete feature on the electrical response through information entropy difference analysis, and establishes an initial splitting rule based on the maximization of information gain.

8. The integrated circuit packaging system with an isolation structure according to claim 6, characterized in that, The evaluation system construction unit evaluates the class separability of the voltage fluctuation peak and valley values through the Gini index on the time-domain side, and fits the regression surface of the current harmonic distortion rate using the least squares criterion on the frequency-domain side; adopts coherent synthesis in laser interferometry to decompose the long-period temperature rise curve into multiple local steady-state processes.

9. The integrated circuit packaging system with an isolation structure according to claim 4, characterized in that, The quality parameter confirmation module includes: The parameter mapping sub-module is responsible for using the voltage fluctuation matrix and temperature change creep gradient field at the input end of the integrated circuit to form an asymmetric alternating signal topology set; the output end of the integrated circuit captures the response information flow of spatio-temporal defocusing through the dissolved state monitoring array; The feature deconstruction sub-module is responsible for time-domain analysis to segment the metabolic energy level of amplitude / phase, quantifying the waveform steepness and trailing edge vibration inertia; frequency-domain analysis to strip the harmonic wavelength tail interference and substrate noise polarization state; statistical analysis to calculate the vortex diffusion coefficient of the signal-to-noise ratio, and project the gravitational offset trajectory of the mean-variance on the thermodynamically equivalent surface; waveform analysis to determine the entropy increase path of the distortion indentation; The parameter optimization sub-module is responsible for quantitatively determining the unstable phase boundary of longitudinal energy dissipation by using the viscous loss inversion method, and obtaining the attenuation parameter of the electrical performance test signal; Based on the migration scale of the topological heterojunction, the interference time slot difference between the signal phase wave and the lattice vibration mode is deduced to obtain the delay parameter of the electrical performance test signal; The non-closed curvature radius of the waveform quantum orbit is calculated, and the nonlinear bending factor of the transmission channel is fitted by combining the Legendre polynomial to obtain the distortion parameter of the electrical performance test signal.

10. The integrated circuit packaging system with an isolation structure as claimed in claim 1, wherein, The signal path adjustment component includes: The efficiency sorting module is responsible for receiving the quality parameter of the electrical performance test signal from the electrical performance test component, and evaluating the signal path of the current electrical performance test signal based on the received quality parameter. The evaluation result is to sort the signal transmission efficiency according to attenuation, delay and distortion; The suggestion generation module is responsible for generating specific adjustment suggestions for the signal path with the lowest sorting according to the result of the signal transmission efficiency sorting; The application detection module is responsible for applying the adjustment suggestion to the integrated circuit and continuously monitoring the evaluation result of the new integrated circuit.

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