Multipath charging priority control circuit, charging control method and equipment

Abstract

The embodiment of the invention relates to the field of communication, and provides a multi-path charging priority control circuit, a charging control method and equipment, and the circuit comprises the steps: in a first charging path, a first signal end and at least one switching tube form a charging path; in the second charging path, the second signal end, the first overvoltage protection chip and the at least two switching tubes form a charging path, and the first signal end enables and controls the switching tube connected with the first overvoltage protection chip; in the third charging path, the third signal end, the second overvoltage protection chip and at least two switch tubes form a charging path, and the first signal end, the second signal end and the external insertion detection end enable control of the switch tube connected with the second overvoltage protection chip; when the access of the external equipment is detected, the external insertion detection end enables to control the power supply conversion chip, and the power supply conversion chip supplies power to the external equipment when being started, so that the priority control of multiple charging modes is realized, and the charging requirements in different scenes are met.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of communication technologies, and in particular, to a multi-path charging priority control circuit, a multi-path charging priority control method, and a corresponding electronic device. Background Art

[0002] In current product designs, Poka - Yoke (structural mistake - proofing) is a commonly used method to prevent incorrect operations or ensure a specific operation sequence, that is, structural mistake - proofing is usually used to implement multi - path charging priority control. However, with the diversification of product requirements, especially the increase in ID (Industrial Design) requirements, since structural mistake - proofing is usually fixed, it is difficult to adapt to different user requirements or scenario changes and cannot meet the requirements of multi - path charging priority control. Summary of the Invention

[0003] The embodiments of the present application provide a multi - path charging priority control circuit, a charging control method, and a device, which can achieve the priority control of multiple charging methods and meet the charging requirements in different scenarios.

[0004] In one aspect, the embodiments of the present application provide a multi - path charging priority control circuit, and the circuit includes:

[0005] Multiple signal terminals, respectively used for the insertion detection of multiple charging paths; among them, the multiple signal terminals include a first signal terminal, a second signal terminal, and a third signal terminal, and the multiple charging paths include a first charging path, a second charging path, and a third charging path;

[0006] An external insertion detection terminal, used for the insertion detection of an external device;

[0007] Multiple over - voltage protection chips, including a first over - voltage protection chip and a second over - voltage protection chip;

[0008] Wherein, in the first charging path, the first signal terminal and at least one switching transistor form a charging path; in the second charging path, the second signal terminal, the first over - voltage protection chip, and at least two switching transistors form a charging path, and the first signal terminal enables the control of the switching transistor connected to the first over - voltage protection chip; in the third charging path, the third signal terminal, the second over - voltage protection chip, and at least two switching transistors form a charging path, and the first signal terminal, the second signal terminal, and the external insertion detection terminal enable the control of the switching transistors connected to the second over - voltage protection chip; when it is detected that the external device is connected, the external insertion detection terminal enables the control of a power conversion chip, and the power conversion chip supplies power to the external device when it is turned on.

[0009] In some embodiments of the present application, when the plurality of signal terminals and the external insertion detection terminal detect an insertion signal, they are at a high level, and when no insertion signal is detected, they are at a low level.

[0010] In some embodiments of the present application, the first charging path includes a first switching tube. When the first switching tube is closed, the charging path formed by the first signal terminal, the first switching tube, and the voltage dividing resistor is conducted, and a charging voltage is output via the first charging path. The voltage dividing resistor is used to divide the input voltage into a charging voltage within a preset range.

[0011] The second charging path includes a second switching tube and a third switching tube. The second switching tube and the third switching tube are connected in series. The second switching tube is connected to the first overvoltage protection chip and is enabled and controlled based on the first signal terminal. The third switching tube is controlled based on the first signal terminal. When the second switching tube is closed and the third switching tube is open, a charging voltage is output via the second charging path. When the second switching tube is open and the third switching tube is closed, a charging voltage is output via the first charging path.

[0012] The third charging path includes a fourth switching tube and a fifth switching tube. The fourth switching tube and the fifth switching tube are connected in series. The fourth switching tube is connected to the second overvoltage protection chip and is enabled and controlled based on the first signal terminal, the second signal terminal, and the external insertion detection terminal. The fifth switching tube is controlled based on the first signal terminal, the second signal terminal, and the external insertion detection terminal. When the fourth switching tube is closed and the fifth switching tube is open, a charging voltage is output via the third charging path. When the fourth switching tube is open and the fifth switching tube is closed, a charging voltage is output via the first charging path or the second charging path, and / or a supply voltage is output through the power conversion chip.

[0013] In some embodiments of the present application, when an insertion signal is detected at the first signal terminal, the first signal terminal is at a high level, the first switching tube is closed, and a charging voltage is output via the first charging path.

[0014] In some embodiments of the present application, when an insertion signal is detected at the second signal terminal, if no insertion signal is detected at the first signal terminal, the second signal terminal is at a high level, the first signal terminal is at a low level, the second switching tube is closed, the third switching tube is open, and a charging voltage is output via the second charging path.

[0015] And / or, when an insertion signal is detected at the second signal terminal, if an insertion signal is detected at the first signal terminal, the second signal terminal is at a high level, the first signal terminal is at a high level, the second switching transistor is turned off, the third switching transistor is turned on, the first switching transistor is turned on, and a charging voltage is output via the first charging path.

[0016] In some embodiments of the present application, when an insertion signal is detected at the third signal terminal, if no insertion signal is detected at the first signal terminal, the second signal terminal, and the external insertion detection terminal, the third signal terminal is at a high level, the first signal terminal and the second signal terminal are at a low level, the fourth switching transistor is turned on, the fifth switching transistor is turned off, and a charging voltage is output via the third charging path;

[0017] And / or, when an insertion signal is detected at the third signal terminal, if an insertion signal is detected at the second signal terminal and no insertion signal is detected at the first signal terminal, the third signal terminal is at a high level, the second signal terminal is at a high level, the fourth switching transistor is turned off, the fifth switching transistor is turned on, the second switching transistor is turned on, the third switching transistor is turned off, and a charging voltage is output via the second charging path;

[0018] When an insertion signal is detected at the third signal terminal, if an insertion signal is detected at the first signal terminal, the third signal terminal is at a high level, the first signal terminal is at a high level, the fourth switching transistor is turned off, the fifth switching transistor is turned on, the third switching transistor is turned on, the second switching transistor is turned off, the first switching transistor is turned on, and a charging voltage is output via the first charging path.

[0019] In some embodiments of the present application, when an insertion signal is detected at the external insertion detection terminal, the third signal terminal is at a low level, the external insertion detection terminal is at a high level, the fourth switching transistor is turned off, the fifth switching transistor is turned on, and a supply voltage is output through the power conversion chip.

[0020] In some embodiments of the present application, the charging priority of the first charging path is higher than that of the second charging path, and the charging priority of the second charging path is higher than that of the third charging path.

[0021] On the other hand, an embodiment of the present application provides a multi-path charging priority control method, which is applied to the multi-path charging priority control circuit, and the method includes:

[0022] When an input signal is detected at the first signal terminal, a charging path formed by the first signal terminal and at least one switching transistor is turned on, and a charging voltage is output via the first charging path;

[0023] When an input signal is detected at the second signal terminal and no input signal is detected at the first signal terminal, the switch tube connecting the second signal terminal to the first overvoltage protection chip is turned on to form a charging path, and the charging voltage is output via the second charging path;

[0024] When an input signal is detected at the third signal terminal and no input signal is detected at the first signal terminal, the second signal terminal, and the external insertion detection terminal, the switch tube connecting the third signal terminal to the second overvoltage protection chip is turned on to form a charging path, and the charging voltage is output via the third charging path;

[0025] When an input signal is detected at the external insertion detection terminal, the power conversion chip is turned on, and the external device is powered by the power conversion chip.

[0026] In another aspect, an embodiment of the present application further provides an electronic device, including a processor and the multi-path charging priority control circuit, and the processor is configured to control the multi-path charging priority control circuit to implement the multi-path charging priority control method.

[0027] In the multi-path charging priority control circuit, charging control method, and device provided by the embodiments of the present application, in the first charging path provided by the multi-path charging priority control circuit, the first signal terminal and at least one switch tube form a charging path. In the second charging path provided, the second signal terminal, the first overvoltage protection chip, and at least two switch tubes form a charging path, and the first signal terminal enables the control of the switch tube connected to the first overvoltage protection chip. In the third charging path provided, the third signal terminal, the second overvoltage protection chip, and at least two switch tubes form a charging path, and the first signal terminal, the second signal terminal, and the external insertion detection terminal enable the control of the switch tube connected to the second overvoltage protection chip. The multi-path charging priority control circuit is built using the overvoltage protection chip and the switch tube, and the switch tube connected to the overvoltage protection chip is controlled based on the signal terminal to achieve the priority control of multiple charging methods and meet the charging requirements of users in different scenarios; and when it is detected that an external device is connected, the external insertion detection terminal can enable the control of the power conversion chip, and the power conversion chip can power the external device when it is turned on, so as to ensure the control of the charging priority whether the external device is connected or not, and further meet the charging requirements of users in different scenarios. Description of the Drawings

[0028] Figure 1 is a structural block diagram of a multi-path charging priority control circuit provided by an embodiment of the present application;

[0029] Figures 2A to 2C is a structural schematic diagram of a charging path provided by an embodiment of the present application;

[0030] Figure 3 It is a schematic structural diagram of a power supply path provided by an embodiment of the present application;

[0031] Figures 4A to 4C It is a schematic structural diagram of another charging path provided by an embodiment of the present application;

[0032] Figures 5A to 5D It is a circuit schematic diagram of a multi - path charging priority control circuit provided by an embodiment of the present application;

[0033] Figure 6 It is a step - flow chart of a multi - path charging priority control method provided by an embodiment of the present application;

[0034] Figure 7 It is a schematic flow diagram of controlling the multi - path charging priority provided by an embodiment of the present application;

[0035] Figure 8 It is a structural block diagram of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0036] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0037] In the case of diverse product designs today, simply relying on structural anti - misoperation is difficult to meet the requirements of multi - path charging priority control.

[0038] In the embodiments of the present application, a multi - path charging priority control circuit is built by using an over - voltage protection chip and a switching tube. Based on the signal terminal, the switching tube connected to the over - voltage protection chip is controlled to achieve the priority control of multiple charging methods, so as to achieve the purpose of flexibly adjusting the charging priority according to the change of the working scenario and meet the charging requirements of users in different scenarios; and when it is detected that an external device is connected, the external insertion detection terminal can enable the control power conversion chip, and the power conversion chip can supply power to the external device when it is turned on, so as to ensure the control of the charging priority whether the external device is connected or not, further meet the charging requirements of users in different scenarios, and at the same time reasonably arrange the charging sequence to maximize the working efficiency of the product. In addition, in the built multi - path charging priority control circuit, for the priority control of the three - path charging path, only two over - voltage chips are used, which relatively reduces the cost of the multi - path charging priority control circuit and realizes a low - cost circuit.

[0039] Refer to Figure 1, which shows a structural block diagram of a multi-path charging priority control circuit provided by an embodiment of the present application. The multi-path charging priority control circuit 101 may have multiple charging paths, such as charging path 1, ..., charging path N. There is a reasonable charging priority for these N charging paths. Specifically, there are multiple charging methods corresponding to the multiple charging paths respectively, and there are multiple signal terminals for insertion detection of the multiple charging paths; for the insertion detection of an external device, there is an external insertion detection terminal to achieve it.

[0040] As Figure 1 shown, taking a certain charging path that is not at the highest charging priority as an example, there is a charging path formed by a signal terminal 1 for detecting a certain insertion signal, an overvoltage protection chip, and at least two switching tubes, such as switching tube 1 and switching tube 2. Among them, switching tube 1 and switching tube 2 are connected in series, and there is a signal terminal 2 for detecting another insertion signal to enable control of the switching tube connected to the aforementioned overvoltage protection chip. Assuming that the switching tube connected to the aforementioned overvoltage protection chip is switching tube 1, that is, signal terminal 2 can enable control of switching tube 1 and can directly control switching tube 2 connected in series with switching tube 1. Furthermore, the conduction of the charging path of the charging path with non-highest charging priority is affected by at least two signal terminals, thereby ensuring the charging priority control among multiple charging paths. Among them, the overvoltage protection chip can adopt an OVP (Over-Voltage Protection) chip, and the switching tube can adopt a MOS tube (Metal-Oxide-Semiconductor, transistor). The embodiments of the present application do not limit this.

[0041] Taking a three-path charging priority control circuit, that is, there are three charging methods at the same time as an example, the multiple charging paths may include a first charging path, a second charging path, and a third charging path. Then, the first signal terminal is used to detect the insertion signal of the first charging method, the second signal terminal is used to detect the insertion signal of the second charging method, and the third signal terminal is used to detect the insertion signal of the third charging method.

[0042] Assume that the charging priority of the first charging path is higher than that of the second charging path, and the charging priority of the second charging path is higher than that of the third charging path. In some embodiments of the present application, in the first charging path, the first signal terminal and at least one switching tube form a charging path; in the second charging path, the second signal terminal may form a charging path with a first overvoltage protection chip and at least two switching tubes, and the first signal terminal can enable control of the switching tube connected to the first overvoltage protection chip; in the third charging path, the third signal terminal forms a charging path with a second overvoltage protection chip and at least two switching tubes, and the first signal terminal, the second signal terminal, and the external insertion detection terminal can enable control of the switching tube connected to the second overvoltage protection chip.

[0043] In some embodiments of the present application, when an external device is detected to be connected, the external insertion detection terminal can enable the power conversion chip, and the power conversion chip supplies power to the external device when it is turned on, that is, when the external insertion detection terminal detects the insertion signal of the external device, it can supply power to the external device through the power conversion chip.

[0044] It should be noted that the third signal terminal and the external insertion detection terminal can be the same port, that is, there is no phenomenon that while supplying power to the external device, a charging voltage can be output via the third charging path; and when supplying power to the external device, since the insertion signal of the external insertion detection terminal does not affect the first charging path and the second charging path, then when the external device is inserted, it does not affect the charging priorities of the first charging method and the second charging method, that is, it still satisfies that the charging priority of the first charging path is higher than that of the second charging path.

[0045] In an embodiment of the present application, the first charging path may include a first switching tube. When the first switching tube is closed, the charging path formed by the first signal terminal, the first switching tube, and the voltage dividing resistor can be conducted, and a charging voltage is output via the first charging path. Among them, the voltage dividing resistor can be used to divide the input voltage into a charging voltage within a preset range. The preset range can be set based on actual needs, and the set preset range will affect the determination of the resistance value of the voltage dividing resistor. In this regard, the embodiments of the present application do not impose any limitations. Optionally, when an insertion signal is detected at the first signal terminal, the first switching tube is controlled to close.

[0046] In another embodiment of the present application, the second charging path may include a second switching tube and a third switching tube. The second switching tube and the third switching tube are connected in series. Assuming that the second switching tube is connected to the first overvoltage protection chip, then the second switching tube can be controlled to be enabled based on the first signal terminal, and the third switching tube can be directly controlled based on the first signal terminal. Optionally, when an insertion signal is detected at the second signal terminal, the second switching tube is controlled to close, and the enabled control can be manifested as when an insertion signal is detected at the first signal terminal, the second switching tube is controlled to open; its direct control can be manifested as when an insertion signal is detected at the first signal terminal, the third switching tube is controlled to close. Since the second switching tube and the third switching tube are connected in series, the opening of the second switching tube will cause the disconnection of the charging path.

[0047] In one case, when the second switching tube is closed and the third switching tube is open, the charging path formed by the second signal terminal, the first overvoltage protection chip, and the second switching tube can be conducted, and a charging voltage is output via the second charging path; in another case, when the second switching tube is open and the third switching tube is closed, at this time, the charging path formed by the second signal terminal, the first overvoltage protection chip, and the second switching tube is disconnected, and a charging voltage is output via the first charging path with the previous charging priority.

[0048] In yet another embodiment of the present application, the third charging path may include a fourth switching transistor and a fifth switching transistor. The fourth switching transistor and the fifth switching transistor are connected in series. Assuming that the fourth switching transistor is connected to the second overvoltage protection chip, then the fourth switching transistor can be enabled and controlled based on the first signal terminal, the second signal terminal, and the externally connected insertion detection terminal, and the fifth switching transistor can be directly controlled based on the first signal terminal, the second signal terminal, and the externally connected insertion detection terminal. Optionally, when an insertion signal is detected at the third signal terminal, the fourth switching transistor is controlled to close, and the enabled control can be manifested as controlling the fourth switching transistor to open when an insertion signal is detected at any one of the first signal terminal, the second signal terminal, and the externally connected insertion detection terminal; its direct control can be manifested as controlling the fifth switching transistor to close when an insertion signal is detected at any one of the first signal terminal, the second signal terminal, and the externally connected insertion detection terminal. Since the fourth switching transistor and the fifth switching transistor are connected in series, the opening of the fourth switching transistor will cause the charging path to be disconnected.

[0049] In one case, when the fourth switching transistor is closed and the fifth switching transistor is open, the charging path formed by the third signal terminal, the second overvoltage protection chip, and the fourth switching transistor can be conducted, and the charging voltage can be output via the third charging path; in another case, when the fourth switching transistor is open and the fifth switching transistor is closed, at this time, the charging path formed by the third signal terminal, the second overvoltage protection chip, and the fourth switching transistor is disconnected, and the charging voltage is output via the first charging path or the second charging path with a higher charging priority, and / or the power supply voltage is output through the power conversion chip.

[0050] Exemplarily, the multiple charging methods of a certain device may include three charging methods: POGO (dock), DC (5V), and TYPE-C (5V). Among them, when the POGO dock is connected, in addition to the basic charging function, more extended functions can be realized, such as extended hardware control, mechanical linkage function, etc.; in addition to the basic charging function, TYPE-C can also include functions such as power supply for external devices (based on OTG, On-The-Go, an extended USB standard implementation), communication function with the host computer, etc. Among the above three charging methods, the charging priority can be manifested as POGO > DC > TYPE-C.

[0051] Optionally, the first signal terminal can be the POGO_IN terminal, which is used to detect the insertion of the POGO insertion signal. The first charging path can refer to the first charging method, that is, the voltage transmission path for charging the device in the POGO method; the second signal terminal can be the DC_IN terminal, which is used to detect the insertion of the DC mode insertion signal. The second charging path can refer to the second charging method, that is, the voltage transmission path for charging the device in the DC method; the third signal terminal can be the TYPE-C_IN terminal, which is used to detect the insertion of the TYPE-C insertion signal. The third charging path can refer to the third charging method, that is, the voltage transmission path for charging the device in the TYPE-C method; the external insertion detection terminal and the aforementioned third signal terminal share a port, which mainly reflects the OTG transmission mode. For example, when a USB flash drive is inserted, when it is detected that the current insertion signal is in the OTG mode, power can be supplied to the externally connected device. The above third charging method is unavailable, and the above first and second charging methods are available, and their charging priorities are not affected by the OTG connection.

[0052] Optionally, when the multiple signal terminals and the external insertion detection terminal detect an insertion signal, they are at a high level, and when no insertion signal is detected, they are at a low level. Specifically, it can be manifested that when the signals of TYPE-C_IN, DC_IN, and POGO_IN are detected to be inserted, the corresponding signal terminals are at a high level, and when the aforementioned signals are not detected to be inserted, the corresponding signal terminals are at a low level; when OTG is inserted, the level of the OTG terminal will be pulled high by the OTG insertion signal, that is, the external insertion detection terminal is at a high level, and when OTG is not inserted, the external insertion detection terminal is at a low level.

[0053] For the first charging path, by way of example, as Figure 2A shown, assuming that the first switching transistor is switching transistor 1, when a POGO_IN insertion signal is detected at the POGO_IN terminal of the first signal terminal, the POGO_IN terminal is at a high level. Since the charging priority of the POGO method is the highest among the three charging methods, regardless of whether there is DC, TYPE-C, or OTG insertion, at this time, switching transistor 1 can be controlled to close, conducting the charging path formed by the POGO_IN terminal, switching transistor 1, and the voltage dividing resistor, and outputting a charging voltage via POGO_OUT of the first charging path to charge the device in the POGO method.

[0054] For the second charging path, by way of example, as Figure 2BAs shown, assume that the second switching transistor is switching transistor 2, the third switching transistor is switching transistor 3, and the first overvoltage protection chip is OVP1. When a DC_IN insertion signal is detected at the second signal terminal DC_IN terminal, the charging method with a charging priority higher than the DC method includes only the POGO method. That is, regardless of whether a signal insertion is detected at the third signal terminal and the external detection terminal, it does not affect the following charging control logic.

[0055] As an example, if a POGO_IN insertion signal is not detected at the first signal terminal POGO_IN terminal, it indicates that there is no user charging demand using the POGO method in the current working scenario. At this time, since the level of the DC_IN terminal is pulled high, the DC_IN terminal is at a high level, switching transistor 2 is turned on, while the POGO_IN terminal is at a low level, switching transistor 3 is turned off, and since the low level of the POGO_IN terminal does not satisfy the enable signal for controlling the disconnection of switching transistor 2, switching transistor 2 remains turned on at this time, conducting the charging path formed by the DC_IN terminal, OVP1, and switching transistor 2, and outputting a charging voltage via the VBUS_OUT of the second charging path to charge the device using the DC method.

[0056] As another example, if a POGO_IN insertion signal is detected at the first signal terminal POGO_IN terminal, it indicates that there is a user charging demand using the POGO method in the current working scenario. Even though the level of the DC_IN terminal is pulled high, causing the DC_IN terminal to be at a high level and thus switching transistor 2 to be turned on, since the level of the POGO_IN terminal is pulled high and is at a high level, satisfying the enable signal for controlling the disconnection of switching transistor 2, switching transistor 3 is turned on at this time, switching transistor 2 is turned off, and the charging path formed by the DC_IN terminal, OVP1, and switching transistor 2 is cut off, and as Figure 2A shown, switching transistor 1 is turned on, conducting the charging path formed by the POGO_IN terminal, switching transistor 1, and the voltage-dividing resistor, and outputting a charging voltage via the POGO_OUT of the first charging path, and the charging method can be automatically switched to the POGO method.

[0057] For the third charging path, by way of example, as Figure 2C shown, assume that the fourth switching transistor is switching transistor 4, the fifth switching transistor is switching transistor 5, and the second overvoltage protection chip is OVP2. When a TYPE-C_IN insertion signal is detected at the third signal terminal TYPE-C_IN terminal, the charging methods with a charging priority higher than the TYPE-C method include two types: the DC method and the POGO method.

[0058] As an example, if no insertion signal is detected at the first signal terminal POGO_IN terminal, the second signal terminal DC_IN terminal, and the external insertion detection terminal OTG terminal, it indicates that there is no user charging demand using the DC method or the POGO method in the current working scenario, and there is no reverse power supply demand for the OTG device. At this time, since the level of the TYPE-C_IN terminal is pulled high, the TYPE-C_IN terminal is at a high level, the switching transistor 4 is closed, while the DC_IN terminal, the POGO_IN terminal, and the OTG terminal are at a low level, and the switching transistor 5 is turned off. Moreover, since the low levels of the DC_IN terminal, the POGO_IN terminal, and the OTG terminal do not satisfy the enabling signal for controlling the disconnection of the switching transistor 4, the switching transistor 4 remains closed at this time, conducting the charging path formed by the TYPE-C_IN terminal, OVP2, and the switching transistor 4, and outputting a charging voltage via the VBUS_OUT of the third charging path to charge the device using the TYPE-C method.

[0059] As another example, if a DC_IN insertion signal is detected at the second signal terminal DC_IN terminal and no POGO_IN insertion signal is detected at the first signal terminal POGO_IN terminal, it indicates that there is a user charging demand using the DC method in the current working scenario. Even though the level of the TYPE-C_IN terminal is pulled high, causing the TYPE-C_IN terminal to be at a high level and thus the switching transistor 4 to be closed, since the level of the DC_IN terminal is pulled high to a high level, which satisfies the enabling signal for controlling the disconnection of the switching transistor 4, the switching transistor 5 is closed at this time, the switching transistor 4 is disconnected, and the charging path formed by the TYPE-C_IN terminal, OVP2, and the switching transistor 4 is cut off. And as Figure 2B shown, the switching transistor 2 is closed and the switching transistor 3 is disconnected, conducting the charging path formed by the DC_IN terminal, OVP1, and the switching transistor 2, and outputting a charging voltage via the VBUS_OUT of the second charging path, and the charging method can be automatically switched to the DC method.

[0060] As yet another example, if a POGO_IN insertion signal is detected at the first signal terminal POGO_IN terminal, regardless of whether DC and OTG are inserted or not, it indicates that there is a user charging demand using the POGO method in the current working scenario. Even though the level of the TYPE-C_IN terminal is pulled high, causing the TYPE-C_IN terminal to be at a high level and thus the switching transistor 4 to be closed, since the level of the POGO_IN terminal is pulled high to a high level, which satisfies the enabling signal for controlling the disconnection of the switching transistor 4, the switching transistor 5 is closed at this time, the switching transistor 4 is disconnected, and the charging path formed by the DC_IN terminal, OVP1, and the switching transistor 2 is cut off. And, as Figure 2B shown, the switching transistor 3 is closed and the switching transistor 2 is disconnected, and the charging path formed by the DC_IN terminal, OVP1, and the switching transistor 2 is cut off. As Figure 2AThe shown switch tube 1 closes, conducting the charging path formed by the POGO_IN terminal, switch tube 1, and voltage-dividing resistors. The charging voltage is output via POGO_OUT of the first charging path, and the charging method can be automatically switched to the POGO method.

[0061] Optionally, the third signal terminal TYPE-C_IN terminal and the access detection terminal OTG terminal can be the same port. For example, Figure 2C As shown, when an insertion signal is detected at the OTG terminal, it indicates that there is a user demand to supply power to the OTG device in the current working scenario. Since the TYPE-C_IN terminal and the OTG terminal share the same port, at this time, there is no TYPE-C_IN signal inserted at the TYPE-C_IN terminal, and the TYPE-C_IN terminal is at a low level. The switch tube 4 is disconnected. However, since the level of the OTG terminal is pulled high to a high level, the switch tube 5 closes. But due to the disconnection of the switch tube 4, there is no charging path.

[0062] In some embodiments of the present application, the high-level signal at the OTG terminal can enable the control power conversion chip to turn on. For example, Figure 3 As shown, at this time, the power supply voltage can be output to the OTG device through the power conversion chip. It should be noted that the process of supplying power to the OTG device is not affected by the charging priority and will not affect the charging priority either.

[0063] Exemplarily, the multi-path charging priority control circuit provided by the embodiments of the present application can implement corresponding control according to the charging control logic shown in Table 1 below:

[0064] Table 1 Truth table of charging insertion and charging method

[0065]

[0066] Among them, "1" indicates that an insertion signal is detected, and "0" indicates that no insertion signal is detected.

[0067] It should be noted that the charging priority of the POGO method is the highest. When a POGO_IN insertion signal is detected, the charging voltage is output at POGO_OUT; the charging priority of the DC method is lower than that of the POGO method. When a DC_IN insertion signal is detected, if there is a POGO_IN insertion signal, no charging voltage is output at VBUS_OUT of the DC method. If there is no POGO_IN insertion signal, the charging voltage is output at VBUS_OUT of the DC method; the charging priority of TYPE-C is the lowest. For whether the charging voltage is output at VBUS_OUT of the TYPE-C method, it needs to be judged in combination with the insertion detection of the DC method and the POGO method.

[0068] Optionally, there may be another circuit structure example for the charging path provided by the embodiments of the present application, that is, the number of switching tubes is not limited.

[0069] Exemplarily, as Figure 4A shown, for the first charging path, assuming that the number of switching tubes involved is two, such as switching tube 1 and switching tube 2. Among them, the voltage-dividing resistor controls switching tube 2, and then controls switching tube 1. When switching tube 1 and switching tube 2 are closed, a charging path formed by the POGO_IN terminal, switching tube 1, switching tube 2, and the voltage-dividing resistor can be formed; as Figure 4B shown, for the second charging path, assuming that the number of switching tubes involved is three, such as switching tube 3, switching tube 4, and switching tube 5. Among them, switching tube 3 is enabled and controlled by the POGO_IN terminal, the DC_IN terminal directly controls switching tube 4, and the POGO_IN terminal directly controls switching tube 5. When switching tube 3 and switching tube 4 are closed and switching tube 5 is open, a charging path formed by the DC_IN terminal, OVP1, switching tube 3, and switching tube 4 is formed; as Figure 4C shown, for the third charging path, assuming that the number of switching tubes involved is three, such as switching tube 6, switching tube 7, and switching tube 8. Among them, switching tube 6 is enabled and controlled by the POGO_IN terminal, DC_IN terminal, and OTG terminal, the TYPE-C_IN terminal directly controls switching tube 7, and switching tube 8 is directly controlled by the POGO_IN terminal, DC_IN terminal, and OTG terminal. When switching tube 6 and switching tube 7 are closed and switching tube 8 is open, a charging path formed by the TYPE-C_IN terminal, OVP2, switching tube 6, and switching tube 7 is formed.

[0070] It should be noted that the power supply path does not involve switching tubes and can follow the circuit structure as Figure 3 shown.

[0071] Optionally, based on the above circuit structure example, the following charging control logic can be implemented:

[0072] When a signal indicating the insertion of the TYPE-C_IN terminal is detected and signals indicating the insertion of the DC_IN terminal and the POGO_IN terminal are not detected, the DC_IN terminal and the POGO_IN terminal are at a low level. At this time, switch 8 is turned off, switch 7 is closed, and switch 6 is closed. At this time, charging the device in the TYPE-C mode; when a signal indicating the insertion of the TYPE-C_IN terminal is detected and at the same time a signal indicating the insertion of the DC_IN terminal is detected, switch 8 is closed, switch 7 is turned off, and switch 6 is turned off, cutting off the TYPE-C charging path. Since the level of the DC_IN terminal is pulled high, at this time switch 5 is turned off, switch 4 is closed, and switch 3 is closed, and the charging mode is automatically switched to the DC mode; when a signal indicating the insertion of the DC_IN terminal is detected and at the same time a signal indicating the insertion of the POGO_IN terminal is detected, the level of the POGO_IN terminal is pulled high, switch 5 is closed, switch 4 is turned off, thereby turning off switch 3 and cutting off the DC charging path, switch 2 is closed, and switch 1 is closed, and the charging mode is automatically switched to the POGO mode; when an OTG insertion signal is detected, the level of the OTG terminal is pulled high, turning on the power supply conversion to supply power to the OTG device, and it is not affected by the charging priority and does not affect the charging priority either.

[0073] It should be noted that for the cases not mentioned, corresponding reasoning and control can be carried out with reference to Table 1 and the above content, that is, the above circuit structure example satisfies the charging control logic as shown in Table 1 above.

[0074] To facilitate those skilled in the art to further understand the multi-path charging priority control circuit provided in the embodiments of the present application, the following description is made in combination with the circuit schematic diagram:

[0075] Figures 5A to 5C A low-cost charging priority control circuit implemented by using an OVP chip and switches is shown. The circuit principle analysis can be expressed as that the signals TYPE-C_IN, DC_IN, and POGO_IN are respectively the insertion detections of TYPE-C, DC, and POGO. When the corresponding insertions are detected, the corresponding signal terminals are at a high level, and when the corresponding insertions are not detected, the corresponding signal terminals are at a low level; when OTG is inserted, the level signal of the OTG terminal is pulled high, that is, it is at a high level.

[0076] In the embodiments of the present application, Figures 5A to 5C The circuit shown respectively corresponds to Figures 4A to 4C the circuit structure of Figure 5D The circuit shown corresponds to Figure 3 the circuit structure of

[0077] Combined with Figures 5A to 5C, when TYPE-C is inserted and DC and POGO are not inserted, DC_IN and POGO_IN are at low level. At this time, Q3811 (i.e., switch 8) is turned off. At this time, Q3809 (i.e., switch 6) is slightly conducting through its own freewheeling diode but not fully opened. However, since TYPE-C_IN is at high level, Q3808 (i.e., switch 7) is turned on. After there is a voltage difference between the G and S poles of Q3809 (i.e., switch 6), Q3809 (i.e., switch 6) is fully opened; when TYPE-C is inserted and at the same time DC is inserted, Q3811 (i.e., switch 8) is turned on at this time, which can pull down the G pole of Q3808 (i.e., switch 7), and Q3808 (i.e., switch 7) will be turned off, Q3809 (i.e., switch 6) is turned off, and since Q3802 (i.e., switch 4) has power input and DC_IN is pulled high, Q3802 (i.e., switch 4) conducts, and Q3810 (i.e., switch 3) is fully conducting; similarly, when DC is inserted and POGO is inserted, Q3801 (i.e., switch 5) will be turned on at this time, Q3802 (i.e., switch 4) is turned off, Q3810 (i.e., switch 3) is turned off, Q3803 (i.e., switch 2) is turned on, and Q3804 (i.e., switch 1) is turned on. And, in combination with Figure 5D , when OTG is inserted, the level signal at the OTG end is pulled high. At this time, the power conversion chip for powering the OTG device can be enabled, such as the DC-DC converter C4608. The embodiments of the present application do not limit this.

[0078] It should be noted that in the above description, the "turning on" of the switch tube is equivalent to closing for the loop where the switch tube is located, which is beneficial to the conduction of the circuit; the "turning off" of the switch tube is equivalent to disconnecting for the loop where the switch tube is located, which is not beneficial to the conduction of the circuit.

[0079] In the embodiments of the present application, by using an overvoltage protection chip and a switch tube to build a multi-path charging priority control circuit, and controlling the switch tube connected to the overvoltage protection chip based on the signal terminal, the priority control of multiple charging methods is realized, achieving the purpose of flexibly adjusting the charging priority according to the change of the working scenario and meeting the charging requirements of users in different scenarios; and when it is detected that an external device is connected, the external insertion detection terminal can enable the control of the power conversion chip, and the power conversion chip can supply power to the external device when it is turned on, so as to ensure the control of the charging priority whether the external device is connected or not, further meeting the charging requirements of users in different scenarios, and at the same time reasonably arranging the charging sequence to maximize the working efficiency of the product. In addition, in the built multi-path charging priority control circuit, only two overvoltage chips are used to realize the priority control of the three charging paths, which relatively reduces the cost of the multi-path charging priority control circuit and realizes a low-cost circuit.

[0080] Refer to Figure 6, which shows the step flowchart of a multi-channel charging priority control method provided by an embodiment of the present application. It is applied to the multi-channel charging priority control circuit provided by the embodiment of the present application, and specifically may include the following steps:

[0081] Step 601, when an input signal is detected at the first signal terminal, turn on the charging path formed by the first signal terminal and at least one switching tube, and output a charging voltage via the first charging path;

[0082] Step 602, when an input signal is detected at the second signal terminal and no input signal is detected at the first signal terminal, turn on the charging path formed by the switching tube connecting the second signal terminal and the first overvoltage protection chip, and output a charging voltage via the second charging path;

[0083] Step 603, when an input signal is detected at the third signal terminal and no input signal is detected at the first signal terminal, the second signal terminal, and the external insertion detection terminal, turn on the charging path formed by the switching tube connecting the third signal terminal and the second overvoltage protection chip, and output a charging voltage via the third charging path;

[0084] Step 604, when an input signal is detected at the external insertion detection terminal, turn on the power conversion chip, and supply power to the external device through the power conversion chip.

[0085] Optionally, the first signal terminal may be the POGO_IN terminal, which is used to detect the insertion of the POGO insertion signal. The first charging path may refer to the first charging method, that is, the voltage transmission path for charging the device in the POGO method; the second signal terminal may be the DC_IN terminal, which is used to detect the insertion of the DC mode insertion signal. The second charging path may refer to the second charging method, that is, the voltage transmission path for charging the device in the DC method; the third signal terminal may be the TYPE-C_IN terminal, which is used to detect the insertion of the TYPE-C insertion signal. The third charging path may refer to the third charging method, that is, the voltage transmission path for charging the device in the TYPE-C method; the external insertion detection terminal and the aforementioned third signal terminal share a port, which mainly reflects the OTG transmission mode. For example, when a USB flash drive is inserted, when it is detected that the current insertion signal is in the OTG mode, power can be supplied to the externally connected device. The above third charging method is unavailable, and the above first and second charging methods are available, and their charging priorities are not affected by the OTG access.

[0086] It should be noted that the above steps 601 to 604 are parallel solutions and do not limit their execution order.

[0087] In the embodiment of the present application, the three-way charging mode of POGO, DC and TYPE-C can realize charging priority through the circuit controlled by OVP and the switch tube. When the three ways exist at the same time, the charging priority order from high to low is POGO, DC, TYPE-C. When OTG is inserted, the POGO and DC charging priorities maintain POGO > DC, and cannot affect the power supply function of the TYPE-C end (sharing the same port with the OTG end) to the OTG device.

[0088] In the embodiments of the present application, low-cost devices can be used to control the charging priority input to meet the charging requirements of customers in different scenarios, flexibly adjust the charging priority according to changes in the working scenarios, and reasonably arrange the charging sequence to maximize the working efficiency of the machine.

[0089] Specifically, refer to Figure 7 , shows a flow chart of controlling multi-channel charging priorities provided in an embodiment of the present application, which is specifically a charging switching flow chart when TYPE-C, DC, and POGO are inserted and unplugged in sequence in combination with the multi-channel charging priority control circuit provided in an embodiment of the present application.

[0090] Specifically, during the charging process, first, it can be determined whether there is an OTG device inserted into the TYPE-C port. If there is an OTG device inserted, then based on the charging control logic for the multi-channel charging priority control circuit, the TYPE-C port can be prioritized to output 5V to power the OTG device. If there is no OTG device inserted, the charging method can be selected from high to low charging priorities of POGO, DC and TYPE-C. For example, when there is DC-IN charging, POGO and TYPE-C charging plugs are inserted, and the DC charging will automatically switch to the POGO charging. After POGO, DC and TYPE-C are inserted into the device at the same time, assuming that the POGO charging plug is unplugged, the POGO charging method will automatically switch to the DC charging method. Among them, since the functions on the POGO base are more diverse, the charging efficiency of the POGO method and the DC method is higher than that of the TYPE-C method. Setting this priority can optimize the charging efficiency and function of the device.

[0091] In the embodiments of the present application, a multi-path charging priority control circuit is built by using an overvoltage protection chip and a switching transistor. Based on the signal terminal, the switching transistor connected to the overvoltage protection chip is controlled to achieve the priority control of multiple charging methods, so as to flexibly adjust the charging priority according to the change of the working scenario and meet the charging requirements of users in different scenarios. In addition, when it is detected that an external device is connected, the external insertion detection terminal can enable the control power conversion chip, and the power conversion chip can supply power to the external device when it is turned on, so as to ensure the control of the charging priority whether the external device is connected or not, further meet the charging requirements of users in different scenarios, and reasonably arrange the charging sequence to maximize the working efficiency of the product. In addition, in the built multi-path charging priority control circuit, only two overvoltage chips are used to achieve the priority control of the three charging paths, which relatively reduces the cost of the multi-path charging priority control circuit and realizes a low-cost circuit.

[0092] It should be noted that, for the method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the embodiments of the present application are not limited by the described action sequence, because according to the embodiments of the present application, some steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present application.

[0093] In some embodiments of the present application, the multi-path charging priority control circuit provided by the embodiments of the present application can be applied to a machine with multiple charging methods. The machine is not limited and the voltage is not limited. The machine can be any electronic device with multiple charging methods. As Figure 8 shown, the electronic device 801 generally includes a processor 811 and the multi-path charging priority control circuit 101 provided by the embodiments of the present application. The processor 811 can be used to control the multi-path charging priority control circuit 101 to implement each process of the multi-path charging priority control method embodiment provided by the embodiments of the present application, and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0094] The embodiments in this specification are all described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0095] Those skilled in the art should understand that the embodiments of the present application can be provided as methods, apparatuses, or computer program products. Therefore, the embodiments of the present application can take the form of all-hardware embodiments, all-software embodiments, or embodiments combining software and hardware aspects. Moreover, the embodiments of the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memories, CD-ROMs, optical memories, etc.) containing computer-usable program codes.

[0096] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of methods, terminal devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal devices generate a device for implementing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0097] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device, and the instruction device implements the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0098] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, so that a series of operation steps are executed on the computer or other programmable terminal device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0099] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications to these embodiments once they know the basic creative concepts. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications falling within the scope of the present application.

[0100] Finally, it should also be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or terminal device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or terminal device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or terminal device comprising said element.

[0101] The technical solutions provided by the embodiments of the present application have been introduced in detail above. Specific examples are used in the embodiments of the present application to elaborate on the principles and implementation manners of the embodiments of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the embodiments of the present application; at the same time, for those of ordinary skill in the art, according to the idea of the embodiments of the present application, there will be changes in the specific implementation manners and application scopes. In summary, the content of this specification should not be construed as a limitation on the embodiments of the present application.

Claims

1. A multi-channel charging priority control circuit, characterized in that: The circuit comprises: A plurality of signal terminals, respectively used for insertion detection of a plurality of charging paths; wherein the plurality of signal terminals include a first signal terminal, a second signal terminal and a third signal terminal, and the plurality of charging paths include a first charging path, a second charging path and a third charging path; External insertion detection terminal, used for insertion detection of external devices; A plurality of overvoltage protection chips, including a first overvoltage protection chip and a second overvoltage protection chip; Among them, in the first charging path, the first signal end and at least one switch tube constitute a charging path; in the second charging path, the second signal end and the first overvoltage protection chip and at least two switch tubes constitute a charging path, and the first signal end enables control of the switch tube connected to the first overvoltage protection chip; in the third charging path, the third signal end and the second overvoltage protection chip and at least two switch tubes constitute a charging path, and the first signal end, the second signal end and the external insertion detection end enable control of the switch tube connected to the second overvoltage protection chip; when the external device is detected to be connected, the external insertion detection end enables control of the power conversion chip, and the power conversion chip supplies power to the external device when it is turned on.

2. The circuit according to claim 1, characterized in that The plurality of signal terminals and the external insertion detection terminal are at a high level when an insertion signal is detected, and are at a low level when no insertion signal is detected.

3. The circuit according to claim 2, characterized in that The first charging path includes a first switch tube, which conducts the first signal terminal and the charging path formed by the first switch tube and the voltage-dividing resistor when the first switch tube is closed, and outputs the charging voltage via the first charging path, wherein the voltage-dividing resistor is used to divide the input voltage into a charging voltage within a preset range; The second charging path includes a second switch tube and a third switch tube, the second switch tube and the third switch tube are connected in series, the second switch tube is connected to the first overvoltage protection chip, the second switch tube is enabled and controlled based on the first signal terminal, and the third switch tube is controlled based on the first signal terminal. When the second switch tube is closed and the third switch tube is disconnected, the charging voltage is output via the second charging path; when the second switch tube is disconnected and the third switch tube is closed, the charging voltage is output via the first charging path; The third charging path includes a fourth switch tube and a fifth switch tube, the fourth switch tube and the fifth switch tube are connected in series, the fourth switch tube is connected to the second overvoltage protection chip, the fourth switch tube is enabled and controlled based on the first signal end, the second signal end and the external insertion detection end, and the fifth switch tube is controlled based on the first signal end, the second signal end and the external insertion detection end. When the fourth switch tube is closed and the fifth switch tube is disconnected, the charging voltage is output via the third charging path; when the fourth switch tube is disconnected and the fifth switch tube is closed, the charging voltage is output via the first charging path or the second charging path, and / or the supply voltage is output through the power conversion chip.

4. The circuit according to claim 3, characterized in that When the insertion signal is detected at the first signal terminal, the first signal terminal is at a high level, the first switch tube is closed, and the charging voltage is output via the first charging path.

5. The circuit according to claim 3, characterized in that When the second signal terminal detects an insertion signal, if the first signal terminal does not detect an insertion signal, the second signal terminal is at a high level, the first signal terminal is at a low level, the second switch tube is closed, the third switch tube is opened, and the charging voltage is output via the second charging path; And / or, when an insertion signal is detected at the second signal end, if the first signal end detects an insertion signal, the second signal end is at a high level, the first signal end is at a high level, the second switch tube is disconnected, the third switch tube is closed, the first switch tube is closed, and the charging voltage is output via the first charging path.

6. The circuit according to claim 3, characterized in that When the third signal terminal detects an insertion signal, if the first signal terminal, the second signal terminal and the external insertion detection terminal do not detect an insertion signal, the third signal terminal is at a high level, the first signal terminal and the second signal terminal are at a low level, the fourth switch tube is closed, the fifth switch tube is opened, and the charging voltage is output via the third charging path; and / or, when the third signal terminal detects an insertion signal, if the second signal terminal detects an insertion signal and the first signal terminal does not detect an insertion signal, the third signal terminal is at a high level, the second signal terminal is at a high level, the fourth switch tube is disconnected, the fifth switch tube is closed, the second switch tube is closed, the third switch tube is disconnected, and the charging voltage is output via the second charging path; When an insertion signal is detected at the third signal terminal, if the first signal terminal detects an insertion signal, the third signal terminal is at a high level, the first signal terminal is at a high level, the fourth switch tube is disconnected, the fifth switch tube is closed, the third switch tube is closed, the second switch tube is disconnected, the first switch tube is closed, and the charging voltage is output via the first charging path.

7. The circuit according to claim 3, characterized in that When the external insertion detection terminal detects an insertion signal, the third signal terminal is at a low level, the external insertion detection terminal is at a high level, the fourth switch tube is disconnected, the fifth switch tube is closed, and the power supply voltage is output through the power conversion chip.

8. The circuit according to claim 1, characterized in that The charging priority of the first charging path is higher than that of the second charging path, and the charging priority of the second charging path is higher than that of the third charging path.

9. A multi-channel charging priority control method, characterized in that: Applied to the multi-channel charging priority control circuit according to any one of claims 1 to 8, the method comprising: When the first signal terminal detects an input signal, a charging path formed by the first signal terminal and at least one switch tube is turned on, and a charging voltage is output via the first charging path; When an input signal is detected at the second signal end and no input signal is detected at the first signal end, a charging path formed by a switch tube connected between the second signal end and the first overvoltage protection chip is turned on, and a charging voltage is output via the second charging path; When an input signal is detected at the third signal terminal, and no input signal is detected at the first signal terminal, the second signal terminal, and the external insertion detection terminal, a charging path formed by a switch tube connected to the third signal terminal and the second overvoltage protection chip is turned on, and a charging voltage is output via the third charging path; When the external insertion detection terminal detects an input signal, the power conversion chip is turned on to supply power to the external device through the power conversion chip.

10. An electronic device, characterized in that: It comprises a processor and a multi-channel charging priority control circuit as claimed in any one of claims 1 to 8, wherein the processor is used to control the multi-channel charging priority control circuit to implement the multi-channel charging priority control method as claimed in claim 9.

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